The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/pccard/pcic98reg.h

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    1 /*
    2         pcic98reg.h
    3 
    4         PC9801NS/A PCMCIA contorer routine conpatible to PCIC
    5         Noriyuki Hosobuchi 96.1.20
    6 
    7 */
    8 
    9 /*--- I/O port definition */
   10 #define PCIC98_REG0             0x0a8e          /* byte */
   11 #define PCIC98_REG1             0x1a8e          /* byte */
   12 #define PCIC98_REG2             0x2a8e          /* byte */
   13 #define PCIC98_REG3             0x3a8e          /* byte : Interrupt */
   14 #define PCIC98_REG4             0x4a8e          /* word : PC98 side IO base */
   15 #define PCIC98_REG5             0x5a8e          /* word : Card side IO base */
   16 #define PCIC98_REG6             0x7a8e          /* byte */
   17 
   18 #define PCIC98_REG_WINSEL       0x1e8e          /* byte : win bank select register */
   19 #define PCIC98_REG_PAGOFS       0x0e8e          /* word */
   20 
   21 /* PC98_REG_WINSEL */
   22 #define PCIC98_MAPWIN           0x84            /* map Card on 0xda0000 - 0xdbffff */
   23 #define PCIC98_UNMAPWIN         0x00
   24 
   25 /* PCIC98_REG1 */
   26 #define PCIC98_CARDEXIST        0x08    /* 1:exist 0:not exist */
   27 
   28 /* PCIC98_REG2 */
   29 #define PCIC98_IOMEMORY         0x80    /* 1:IO 0:Memory */
   30 #define PCIC98_MAPIO            0x40    /* 0:IO map 1:??? */
   31 #define PCIC98_8BIT                     0x20    /* bit width 1:8bit 0:16bit */
   32 #define PCIC98_MAP128           0x10    /* IO map size 1:128byte 0:16byte */
   33 #define PCIC98_VCC3P3V          0x02    /* Vcc 1:3.3V 0:5.0V */
   34 
   35 /* PCIC98_REG3 */
   36 #define PCIC98_INT0             (0xf8 + 0x0)    /* INT0(IRQ3) */
   37 #define PCIC98_INT1             (0xf8 + 0x1)    /* INT1(IRQ5) */
   38 #define PCIC98_INT2             (0xf8 + 0x2)    /* INT2(IRQ6) */
   39 #define PCIC98_INT4             (0xf8 + 0x4)    /* INT4(IRQ10) */
   40 #define PCIC98_INT5             (0xf8 + 0x5)    /* INT5(IRQ12) */
   41 #define PCIC98_INTDISABLE       (0xf8 + 0x7)    /* disable interrupt */
   42 
   43 /* PCIC98_REG6 */
   44 #define PCIC98_ATTRMEM          0x20    /* 1:attr mem 0:common mem */
   45 #define PCIC98_VPP12V           0x10    /* Vpp 0:5V 1:12V */

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