The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/pci/agp_via.c

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    1 /*-
    2  * Copyright (c) 2000 Doug Rabson
    3  * All rights reserved.
    4  *
    5  * Redistribution and use in source and binary forms, with or without
    6  * modification, are permitted provided that the following conditions
    7  * are met:
    8  * 1. Redistributions of source code must retain the above copyright
    9  *    notice, this list of conditions and the following disclaimer.
   10  * 2. Redistributions in binary form must reproduce the above copyright
   11  *    notice, this list of conditions and the following disclaimer in the
   12  *    documentation and/or other materials provided with the distribution.
   13  *
   14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   24  * SUCH DAMAGE.
   25  */
   26 
   27 #include <sys/cdefs.h>
   28 __FBSDID("$FreeBSD: releng/7.3/sys/pci/agp_via.c 195667 2009-07-13 22:13:13Z jkim $");
   29 
   30 #include "opt_bus.h"
   31 
   32 #include <sys/param.h>
   33 #include <sys/systm.h>
   34 #include <sys/malloc.h>
   35 #include <sys/kernel.h>
   36 #include <sys/module.h>
   37 #include <sys/bus.h>
   38 #include <sys/lock.h>
   39 #include <sys/mutex.h>
   40 #include <sys/proc.h>
   41 
   42 #include <dev/pci/pcivar.h>
   43 #include <dev/pci/pcireg.h>
   44 #include <pci/agppriv.h>
   45 #include <pci/agpreg.h>
   46 
   47 #include <vm/vm.h>
   48 #include <vm/vm_object.h>
   49 #include <vm/pmap.h>
   50 
   51 #define REG_GARTCTRL    0
   52 #define REG_APSIZE      1
   53 #define REG_ATTBASE     2
   54 
   55 struct agp_via_softc {
   56         struct agp_softc agp;
   57         u_int32_t       initial_aperture; /* aperture size at startup */
   58         struct agp_gatt *gatt;
   59         int             *regs;
   60 };
   61 
   62 static int via_v2_regs[] = { AGP_VIA_GARTCTRL, AGP_VIA_APSIZE,
   63     AGP_VIA_ATTBASE };
   64 static int via_v3_regs[] = { AGP3_VIA_GARTCTRL, AGP3_VIA_APSIZE,
   65     AGP3_VIA_ATTBASE };
   66 
   67 static const char*
   68 agp_via_match(device_t dev)
   69 {
   70         if (pci_get_class(dev) != PCIC_BRIDGE
   71             || pci_get_subclass(dev) != PCIS_BRIDGE_HOST)
   72                 return NULL;
   73 
   74         if (agp_find_caps(dev) == 0)
   75                 return NULL;
   76 
   77         switch (pci_get_devid(dev)) {
   78         case 0x01981106:
   79                 return ("VIA 8763 (P4X600) host to PCI bridge");
   80         case 0x02591106:
   81                 return ("VIA PM800/PN800/PM880/PN880 host to PCI bridge");
   82         case 0x02691106:
   83                 return ("VIA KT880 host to PCI bridge");
   84         case 0x02961106:
   85                 return ("VIA 3296 (P4M800) host to PCI bridge");
   86         case 0x03051106:
   87                 return ("VIA 82C8363 (Apollo KT133x/KM133) host to PCI bridge");
   88         case 0x03141106:
   89                 return ("VIA 3314 (P4M800CE) host to PCI bridge");
   90         case 0x03241106:
   91                 return ("VIA VT3324 (CX700) host to PCI bridge");
   92         case 0x03271106:
   93                 return ("VIA 3327 (P4M890) host to PCI bridge");
   94         case 0x03641106:
   95                 return ("VIA 3364 (P4M900) host to PCI bridge");
   96         case 0x03911106:
   97                 return ("VIA 8371 (Apollo KX133) host to PCI bridge");
   98         case 0x05011106:
   99                 return ("VIA 8501 (Apollo MVP4) host to PCI bridge");
  100         case 0x05971106:
  101                 return ("VIA 82C597 (Apollo VP3) host to PCI bridge");
  102         case 0x05981106:
  103                 return ("VIA 82C598 (Apollo MVP3) host to PCI bridge");
  104         case 0x06011106:
  105                 return ("VIA 8601 (Apollo ProMedia/PLE133Ta) host to PCI bridge");
  106         case 0x06051106:
  107                 return ("VIA 82C694X (Apollo Pro 133A) host to PCI bridge");
  108         case 0x06911106:
  109                 return ("VIA 82C691 (Apollo Pro) host to PCI bridge");
  110         case 0x30911106:
  111                 return ("VIA 8633 (Pro 266) host to PCI bridge");
  112         case 0x30991106:
  113                 return ("VIA 8367 (KT266/KY266x/KT333) host to PCI bridge");
  114         case 0x31011106:
  115                 return ("VIA 8653 (Pro266T) host to PCI bridge");
  116         case 0x31121106:
  117                 return ("VIA 8361 (KLE133) host to PCI bridge");
  118         case 0x31161106:
  119                 return ("VIA XM266 (PM266/KM266) host to PCI bridge");
  120         case 0x31231106:
  121                 return ("VIA 862x (CLE266) host to PCI bridge");
  122         case 0x31281106:
  123                 return ("VIA 8753 (P4X266) host to PCI bridge");
  124         case 0x31481106:
  125                 return ("VIA 8703 (P4M266x/P4N266) host to PCI bridge");
  126         case 0x31561106:
  127                 return ("VIA XN266 (Apollo Pro266) host to PCI bridge");
  128         case 0x31681106:
  129                 return ("VIA 8754 (PT800) host to PCI bridge");
  130         case 0x31891106:
  131                 return ("VIA 8377 (Apollo KT400/KT400A/KT600) host to PCI bridge");
  132         case 0x32051106:
  133                 return ("VIA 8235/8237 (Apollo KM400/KM400A) host to PCI bridge");
  134         case 0x32081106:
  135                 return ("VIA 8783 (PT890) host to PCI bridge");
  136         case 0x32581106:
  137                 return ("VIA PT880 host to PCI bridge");
  138         case 0xb1981106:
  139                 return ("VIA VT83xx/VT87xx/KTxxx/Px8xx host to PCI bridge");
  140         };
  141 
  142         return NULL;
  143 }
  144 
  145 static int
  146 agp_via_probe(device_t dev)
  147 {
  148         const char *desc;
  149 
  150         if (resource_disabled("agp", device_get_unit(dev)))
  151                 return (ENXIO);
  152         desc = agp_via_match(dev);
  153         if (desc) {
  154                 device_set_desc(dev, desc);
  155                 return BUS_PROBE_DEFAULT;
  156         }
  157 
  158         return ENXIO;
  159 }
  160 
  161 static int
  162 agp_via_attach(device_t dev)
  163 {
  164         struct agp_via_softc *sc = device_get_softc(dev);
  165         struct agp_gatt *gatt;
  166         int error;
  167         u_int32_t agpsel;
  168 
  169         /* XXX: This should be keying off of whether the bridge is AGP3 capable,
  170          * rather than a bunch of device ids for chipsets that happen to do 8x.
  171          */
  172         switch (pci_get_devid(dev)) {
  173         case 0x01981106:
  174         case 0x02591106:
  175         case 0x02691106:
  176         case 0x02961106:
  177         case 0x03141106:
  178         case 0x03241106:
  179         case 0x03271106:
  180         case 0x03641106:
  181         case 0x31231106:
  182         case 0x31681106:
  183         case 0x31891106:
  184         case 0x32051106:
  185         case 0x32581106:
  186         case 0xb1981106:
  187                 /* The newer VIA chipsets will select the AGP version based on
  188                  * what AGP versions the card supports.  We still have to
  189                  * program it using the v2 registers if it has chosen to use
  190                  * compatibility mode.
  191                  */
  192                 agpsel = pci_read_config(dev, AGP_VIA_AGPSEL, 1);
  193                 if ((agpsel & (1 << 1)) == 0)
  194                         sc->regs = via_v3_regs;
  195                 else
  196                         sc->regs = via_v2_regs;
  197                 break;
  198         default:
  199                 sc->regs = via_v2_regs;
  200                 break;
  201         }
  202         
  203         error = agp_generic_attach(dev);
  204         if (error)
  205                 return error;
  206 
  207         sc->initial_aperture = AGP_GET_APERTURE(dev);
  208 
  209         for (;;) {
  210                 gatt = agp_alloc_gatt(dev);
  211                 if (gatt)
  212                         break;
  213 
  214                 /*
  215                  * Probably contigmalloc failure. Try reducing the
  216                  * aperture so that the gatt size reduces.
  217                  */
  218                 if (AGP_SET_APERTURE(dev, AGP_GET_APERTURE(dev) / 2)) {
  219                         agp_generic_detach(dev);
  220                         return ENOMEM;
  221                 }
  222         }
  223         sc->gatt = gatt;
  224 
  225         if (sc->regs == via_v2_regs) {
  226                 /* Install the gatt. */
  227                 pci_write_config(dev, sc->regs[REG_ATTBASE], gatt->ag_physical | 3, 4);
  228                 
  229                 /* Enable the aperture. */
  230                 pci_write_config(dev, sc->regs[REG_GARTCTRL], 0x0f, 4);
  231         } else {
  232                 u_int32_t gartctrl;
  233 
  234                 /* Install the gatt. */
  235                 pci_write_config(dev, sc->regs[REG_ATTBASE], gatt->ag_physical, 4);
  236                 
  237                 /* Enable the aperture. */
  238                 gartctrl = pci_read_config(dev, sc->regs[REG_ATTBASE], 4);
  239                 pci_write_config(dev, sc->regs[REG_GARTCTRL], gartctrl | (3 << 7), 4);
  240         }
  241 
  242         device_printf(dev, "aperture size is %dM\n",
  243                 sc->initial_aperture / 1024 / 1024);
  244 
  245         return 0;
  246 }
  247 
  248 static int
  249 agp_via_detach(device_t dev)
  250 {
  251         struct agp_via_softc *sc = device_get_softc(dev);
  252 
  253         agp_free_cdev(dev);
  254 
  255         pci_write_config(dev, sc->regs[REG_GARTCTRL], 0, 4);
  256         pci_write_config(dev, sc->regs[REG_ATTBASE], 0, 4);
  257         AGP_SET_APERTURE(dev, sc->initial_aperture);
  258         agp_free_gatt(sc->gatt);
  259         agp_free_res(dev);
  260 
  261         return 0;
  262 }
  263 
  264 static u_int32_t
  265 agp_via_get_aperture(device_t dev)
  266 {
  267         struct agp_via_softc *sc = device_get_softc(dev);
  268         u_int32_t apsize;
  269 
  270         if (sc->regs == via_v2_regs) {
  271                 apsize = pci_read_config(dev, sc->regs[REG_APSIZE], 1) & 0x1f;
  272 
  273                 /*
  274                  * The size is determined by the number of low bits of
  275                  * register APBASE which are forced to zero. The low 20 bits
  276                  * are always forced to zero and each zero bit in the apsize
  277                  * field just read forces the corresponding bit in the 27:20
  278                  * to be zero. We calculate the aperture size accordingly.
  279                  */
  280                 return (((apsize ^ 0xff) << 20) | ((1 << 20) - 1)) + 1;
  281         } else {
  282                 apsize = pci_read_config(dev, sc->regs[REG_APSIZE], 2) & 0xfff;
  283                 switch (apsize) {
  284                 case 0x800:
  285                         return 0x80000000;
  286                 case 0xc00:
  287                         return 0x40000000;
  288                 case 0xe00:
  289                         return 0x20000000;
  290                 case 0xf00:
  291                         return 0x10000000;
  292                 case 0xf20:
  293                         return 0x08000000;
  294                 case 0xf30:
  295                         return 0x04000000;
  296                 case 0xf38:
  297                         return 0x02000000;
  298                 default:
  299                         device_printf(dev, "Invalid aperture setting 0x%x",
  300                             pci_read_config(dev, sc->regs[REG_APSIZE], 2));
  301                         return 0;
  302                 }
  303         }
  304 }
  305 
  306 static int
  307 agp_via_set_aperture(device_t dev, u_int32_t aperture)
  308 {
  309         struct agp_via_softc *sc = device_get_softc(dev);
  310         u_int32_t apsize, key, val;
  311 
  312         if (sc->regs == via_v2_regs) {
  313                 /*
  314                  * Reverse the magic from get_aperture.
  315                  */
  316                 apsize = ((aperture - 1) >> 20) ^ 0xff;
  317 
  318                 /*
  319                  * Double check for sanity.
  320                  */
  321                 if ((((apsize ^ 0xff) << 20) | ((1 << 20) - 1)) + 1 != aperture)
  322                         return EINVAL;
  323 
  324                 pci_write_config(dev, sc->regs[REG_APSIZE], apsize, 1);
  325         } else {
  326                 switch (aperture) {
  327                 case 0x80000000:
  328                         key = 0x800;
  329                         break;
  330                 case 0x40000000:
  331                         key = 0xc00;
  332                         break;
  333                 case 0x20000000:
  334                         key = 0xe00;
  335                         break;
  336                 case 0x10000000:
  337                         key = 0xf00;
  338                         break;
  339                 case 0x08000000:
  340                         key = 0xf20;
  341                         break;
  342                 case 0x04000000:
  343                         key = 0xf30;
  344                         break;
  345                 case 0x02000000:
  346                         key = 0xf38;
  347                         break;
  348                 default:
  349                         device_printf(dev, "Invalid aperture size (%dMb)\n",
  350                             aperture / 1024 / 1024);
  351                         return EINVAL;
  352                 }
  353                 val = pci_read_config(dev, sc->regs[REG_APSIZE], 2);
  354                 pci_write_config(dev, sc->regs[REG_APSIZE], 
  355                     ((val & ~0xfff) | key), 2);
  356         }
  357         return 0;
  358 }
  359 
  360 static int
  361 agp_via_bind_page(device_t dev, int offset, vm_offset_t physical)
  362 {
  363         struct agp_via_softc *sc = device_get_softc(dev);
  364 
  365         if (offset < 0 || offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT))
  366                 return EINVAL;
  367 
  368         sc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = physical;
  369         return 0;
  370 }
  371 
  372 static int
  373 agp_via_unbind_page(device_t dev, int offset)
  374 {
  375         struct agp_via_softc *sc = device_get_softc(dev);
  376 
  377         if (offset < 0 || offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT))
  378                 return EINVAL;
  379 
  380         sc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = 0;
  381         return 0;
  382 }
  383 
  384 static void
  385 agp_via_flush_tlb(device_t dev)
  386 {
  387         struct agp_via_softc *sc = device_get_softc(dev);
  388         u_int32_t gartctrl;
  389 
  390         if (sc->regs == via_v2_regs) {
  391                 pci_write_config(dev, sc->regs[REG_GARTCTRL], 0x8f, 4);
  392                 pci_write_config(dev, sc->regs[REG_GARTCTRL], 0x0f, 4);
  393         } else {
  394                 gartctrl = pci_read_config(dev, sc->regs[REG_GARTCTRL], 4);
  395                 pci_write_config(dev, sc->regs[REG_GARTCTRL], gartctrl &
  396                     ~(1 << 7), 4);
  397                 pci_write_config(dev, sc->regs[REG_GARTCTRL], gartctrl, 4);
  398         }
  399         
  400 }
  401 
  402 static device_method_t agp_via_methods[] = {
  403         /* Device interface */
  404         DEVMETHOD(device_probe,         agp_via_probe),
  405         DEVMETHOD(device_attach,        agp_via_attach),
  406         DEVMETHOD(device_detach,        agp_via_detach),
  407         DEVMETHOD(device_shutdown,      bus_generic_shutdown),
  408         DEVMETHOD(device_suspend,       bus_generic_suspend),
  409         DEVMETHOD(device_resume,        bus_generic_resume),
  410 
  411         /* AGP interface */
  412         DEVMETHOD(agp_get_aperture,     agp_via_get_aperture),
  413         DEVMETHOD(agp_set_aperture,     agp_via_set_aperture),
  414         DEVMETHOD(agp_bind_page,        agp_via_bind_page),
  415         DEVMETHOD(agp_unbind_page,      agp_via_unbind_page),
  416         DEVMETHOD(agp_flush_tlb,        agp_via_flush_tlb),
  417         DEVMETHOD(agp_enable,           agp_generic_enable),
  418         DEVMETHOD(agp_alloc_memory,     agp_generic_alloc_memory),
  419         DEVMETHOD(agp_free_memory,      agp_generic_free_memory),
  420         DEVMETHOD(agp_bind_memory,      agp_generic_bind_memory),
  421         DEVMETHOD(agp_unbind_memory,    agp_generic_unbind_memory),
  422 
  423         { 0, 0 }
  424 };
  425 
  426 static driver_t agp_via_driver = {
  427         "agp",
  428         agp_via_methods,
  429         sizeof(struct agp_via_softc),
  430 };
  431 
  432 static devclass_t agp_devclass;
  433 
  434 DRIVER_MODULE(agp_via, hostb, agp_via_driver, agp_devclass, 0, 0);
  435 MODULE_DEPEND(agp_via, agp, 1, 1, 1);
  436 MODULE_DEPEND(agp_via, pci, 1, 1, 1);

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