The Design and Implementation of the FreeBSD Operating System, Second Edition
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FreeBSD/Linux Kernel Cross Reference
sys/pci/amdsmb.c

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    1 /*-
    2  * Copyright (c) 2005 Ruslan Ermilov
    3  * All rights reserved.
    4  *
    5  * Redistribution and use in source and binary forms, with or without
    6  * modification, are permitted provided that the following conditions
    7  * are met:
    8  * 1. Redistributions of source code must retain the above copyright
    9  *    notice, this list of conditions and the following disclaimer.
   10  * 2. Redistributions in binary form must reproduce the above copyright
   11  *    notice, this list of conditions and the following disclaimer in the
   12  *    documentation and/or other materials provided with the distribution.
   13  *
   14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   24  * SUCH DAMAGE.
   25  */
   26 
   27 #include <sys/cdefs.h>
   28 __FBSDID("$FreeBSD: releng/10.2/sys/pci/amdsmb.c 179622 2008-06-06 18:29:56Z jhb $");
   29 
   30 #include <sys/param.h>
   31 #include <sys/bus.h>
   32 #include <sys/kernel.h>
   33 #include <sys/lock.h>
   34 #include <sys/module.h>
   35 #include <sys/mutex.h>
   36 #include <sys/systm.h>
   37 
   38 #include <machine/bus.h>
   39 #include <machine/resource.h>
   40 #include <sys/rman.h>
   41 
   42 #include <dev/pci/pcivar.h>
   43 #include <dev/pci/pcireg.h>
   44 
   45 #include <dev/smbus/smbconf.h>
   46 #include "smbus_if.h"
   47 
   48 #define AMDSMB_DEBUG(x) if (amdsmb_debug) (x)
   49 
   50 #ifdef DEBUG
   51 static int amdsmb_debug = 1;
   52 #else
   53 static int amdsmb_debug = 0;
   54 #endif
   55 
   56 #define AMDSMB_VENDORID_AMD             0x1022
   57 #define AMDSMB_DEVICEID_AMD8111_SMB2    0x746a
   58 
   59 /*
   60  * ACPI 3.0, Chapter 12, Embedded Controller Interface.
   61  */
   62 #define EC_DATA         0x00    /* data register */
   63 #define EC_SC           0x04    /* status of controller */
   64 #define EC_CMD          0x04    /* command register */
   65 
   66 #define EC_SC_IBF       0x02    /* data ready for embedded controller */
   67 #define EC_SC_OBF       0x01    /* data ready for host */
   68 #define EC_CMD_WR       0x81    /* write EC */
   69 #define EC_CMD_RD       0x80    /* read EC */
   70 
   71 /*
   72  * ACPI 3.0, Chapter 12, SMBus Host Controller Interface.
   73  */
   74 #define SMB_PRTCL       0x00    /* protocol */
   75 #define SMB_STS         0x01    /* status */
   76 #define SMB_ADDR        0x02    /* address */
   77 #define SMB_CMD         0x03    /* command */
   78 #define SMB_DATA        0x04    /* 32 data registers */
   79 #define SMB_BCNT        0x24    /* number of data bytes */
   80 #define SMB_ALRM_A      0x25    /* alarm address */
   81 #define SMB_ALRM_D      0x26    /* 2 bytes alarm data */
   82 
   83 #define SMB_STS_DONE    0x80
   84 #define SMB_STS_ALRM    0x40
   85 #define SMB_STS_RES     0x20
   86 #define SMB_STS_STATUS  0x1f
   87 #define SMB_STS_OK      0x00    /* OK */
   88 #define SMB_STS_UF      0x07    /* Unknown Failure */
   89 #define SMB_STS_DANA    0x10    /* Device Address Not Acknowledged */
   90 #define SMB_STS_DED     0x11    /* Device Error Detected */
   91 #define SMB_STS_DCAD    0x12    /* Device Command Access Denied */
   92 #define SMB_STS_UE      0x13    /* Unknown Error */
   93 #define SMB_STS_DAD     0x17    /* Device Access Denied */
   94 #define SMB_STS_T       0x18    /* Timeout */
   95 #define SMB_STS_HUP     0x19    /* Host Unsupported Protocol */
   96 #define SMB_STS_B       0x1a    /* Busy */
   97 #define SMB_STS_PEC     0x1f    /* PEC (CRC-8) Error */
   98 
   99 #define SMB_PRTCL_WRITE                 0x00
  100 #define SMB_PRTCL_READ                  0x01
  101 #define SMB_PRTCL_QUICK                 0x02
  102 #define SMB_PRTCL_BYTE                  0x04
  103 #define SMB_PRTCL_BYTE_DATA             0x06
  104 #define SMB_PRTCL_WORD_DATA             0x08
  105 #define SMB_PRTCL_BLOCK_DATA            0x0a
  106 #define SMB_PRTCL_PROC_CALL             0x0c
  107 #define SMB_PRTCL_BLOCK_PROC_CALL       0x0d
  108 #define SMB_PRTCL_PEC                   0x80
  109 
  110 struct amdsmb_softc {
  111         int rid;
  112         struct resource *res;
  113         device_t smbus;
  114         struct mtx lock;
  115 };
  116 
  117 #define AMDSMB_LOCK(amdsmb)             mtx_lock(&(amdsmb)->lock)
  118 #define AMDSMB_UNLOCK(amdsmb)           mtx_unlock(&(amdsmb)->lock)
  119 #define AMDSMB_LOCK_ASSERT(amdsmb)      mtx_assert(&(amdsmb)->lock, MA_OWNED)
  120 
  121 #define AMDSMB_ECINB(amdsmb, register)                                  \
  122         (bus_read_1(amdsmb->res, register))
  123 #define AMDSMB_ECOUTB(amdsmb, register, value) \
  124         (bus_write_1(amdsmb->res, register, value))
  125 
  126 static int      amdsmb_detach(device_t dev);
  127 
  128 static int
  129 amdsmb_probe(device_t dev)
  130 {
  131         u_int16_t vid;
  132         u_int16_t did;
  133 
  134         vid = pci_get_vendor(dev);
  135         did = pci_get_device(dev);
  136 
  137         if (vid == AMDSMB_VENDORID_AMD) {
  138                 switch(did) {
  139                 case AMDSMB_DEVICEID_AMD8111_SMB2:
  140                         device_set_desc(dev, "AMD-8111 SMBus 2.0 Controller");
  141                         return (BUS_PROBE_DEFAULT);
  142                 }
  143         }
  144 
  145         return (ENXIO);
  146 }
  147 
  148 static int
  149 amdsmb_attach(device_t dev)
  150 {
  151         struct amdsmb_softc *amdsmb_sc = device_get_softc(dev);
  152 
  153         /* Allocate I/O space */
  154         amdsmb_sc->rid = PCIR_BAR(0);
  155         
  156         amdsmb_sc->res = bus_alloc_resource_any(dev, SYS_RES_IOPORT,
  157                 &amdsmb_sc->rid, RF_ACTIVE);
  158 
  159         if (amdsmb_sc->res == NULL) {
  160                 device_printf(dev, "could not map i/o space\n");
  161                 return (ENXIO);
  162         }
  163 
  164         mtx_init(&amdsmb_sc->lock, device_get_nameunit(dev), "amdsmb", MTX_DEF);
  165 
  166         /* Allocate a new smbus device */
  167         amdsmb_sc->smbus = device_add_child(dev, "smbus", -1);
  168         if (!amdsmb_sc->smbus) {
  169                 amdsmb_detach(dev);
  170                 return (EINVAL);
  171         }
  172 
  173         bus_generic_attach(dev);
  174 
  175         return (0);
  176 }
  177 
  178 static int
  179 amdsmb_detach(device_t dev)
  180 {
  181         struct amdsmb_softc *amdsmb_sc = device_get_softc(dev);
  182 
  183         if (amdsmb_sc->smbus) {
  184                 device_delete_child(dev, amdsmb_sc->smbus);
  185                 amdsmb_sc->smbus = NULL;
  186         }
  187 
  188         mtx_destroy(&amdsmb_sc->lock);
  189         if (amdsmb_sc->res)
  190                 bus_release_resource(dev, SYS_RES_IOPORT, amdsmb_sc->rid,
  191                     amdsmb_sc->res);
  192 
  193         return (0);
  194 }
  195 
  196 static int
  197 amdsmb_callback(device_t dev, int index, void *data)
  198 {
  199         int error = 0;
  200 
  201         switch (index) {
  202         case SMB_REQUEST_BUS:
  203         case SMB_RELEASE_BUS:
  204                 break;
  205         default:
  206                 error = EINVAL;
  207         }
  208 
  209         return (error);
  210 }
  211 
  212 static int
  213 amdsmb_ec_wait_write(struct amdsmb_softc *sc)
  214 {
  215         int timeout = 500;
  216 
  217         while (timeout-- && AMDSMB_ECINB(sc, EC_SC) & EC_SC_IBF)
  218                 DELAY(1);
  219         if (timeout == 0) {
  220                 device_printf(sc->smbus, "timeout waiting for IBF to clear\n");
  221                 return (1);
  222         }
  223         return (0);
  224 }
  225 
  226 static int
  227 amdsmb_ec_wait_read(struct amdsmb_softc *sc)
  228 {
  229         int timeout = 500;
  230 
  231         while (timeout-- && ~AMDSMB_ECINB(sc, EC_SC) & EC_SC_OBF)
  232                 DELAY(1);
  233         if (timeout == 0) {
  234                 device_printf(sc->smbus, "timeout waiting for OBF to set\n");
  235                 return (1);
  236         }
  237         return (0);
  238 }
  239 
  240 static int
  241 amdsmb_ec_read(struct amdsmb_softc *sc, u_char addr, u_char *data)
  242 {
  243 
  244         AMDSMB_LOCK_ASSERT(sc);
  245         if (amdsmb_ec_wait_write(sc))
  246                 return (1);
  247         AMDSMB_ECOUTB(sc, EC_CMD, EC_CMD_RD);
  248 
  249         if (amdsmb_ec_wait_write(sc))
  250                 return (1);
  251         AMDSMB_ECOUTB(sc, EC_DATA, addr);
  252 
  253         if (amdsmb_ec_wait_read(sc))
  254                 return (1);
  255         *data = AMDSMB_ECINB(sc, EC_DATA);
  256 
  257         return (0);
  258 }
  259 
  260 static int
  261 amdsmb_ec_write(struct amdsmb_softc *sc, u_char addr, u_char data)
  262 {
  263 
  264         AMDSMB_LOCK_ASSERT(sc);
  265         if (amdsmb_ec_wait_write(sc))
  266                 return (1);
  267         AMDSMB_ECOUTB(sc, EC_CMD, EC_CMD_WR);
  268 
  269         if (amdsmb_ec_wait_write(sc))
  270                 return (1);
  271         AMDSMB_ECOUTB(sc, EC_DATA, addr);
  272 
  273         if (amdsmb_ec_wait_write(sc))
  274                 return (1);
  275         AMDSMB_ECOUTB(sc, EC_DATA, data);
  276 
  277         return (0);
  278 }
  279 
  280 static int
  281 amdsmb_wait(struct amdsmb_softc *sc)
  282 {
  283         u_char sts, temp;
  284         int error, count;
  285 
  286         AMDSMB_LOCK_ASSERT(sc);
  287         amdsmb_ec_read(sc, SMB_PRTCL, &temp);
  288         if (temp != 0)
  289         {
  290                 count = 10000;
  291                 do {
  292                         DELAY(500);
  293                         amdsmb_ec_read(sc, SMB_PRTCL, &temp);
  294                 } while (temp != 0 && count--);
  295                 if (count == 0)
  296                         return (SMB_ETIMEOUT);
  297         }
  298 
  299         amdsmb_ec_read(sc, SMB_STS, &sts);
  300         sts &= SMB_STS_STATUS;
  301         AMDSMB_DEBUG(printf("amdsmb: STS=0x%x\n", sts));
  302 
  303         switch (sts) {
  304         case SMB_STS_OK:
  305                 error = SMB_ENOERR;
  306                 break;
  307         case SMB_STS_DANA:
  308                 error = SMB_ENOACK;
  309                 break;
  310         case SMB_STS_B:
  311                 error = SMB_EBUSY;
  312                 break;
  313         case SMB_STS_T:
  314                 error = SMB_ETIMEOUT;
  315                 break;
  316         case SMB_STS_DCAD:
  317         case SMB_STS_DAD:
  318         case SMB_STS_HUP:
  319                 error = SMB_ENOTSUPP;
  320                 break;
  321         default:
  322                 error = SMB_EBUSERR;
  323                 break;
  324         }
  325 
  326         return (error);
  327 }
  328 
  329 static int
  330 amdsmb_quick(device_t dev, u_char slave, int how)
  331 {
  332         struct amdsmb_softc *sc = (struct amdsmb_softc *)device_get_softc(dev);
  333         u_char protocol;
  334         int error;
  335 
  336         protocol = SMB_PRTCL_QUICK;
  337 
  338         switch (how) {
  339         case SMB_QWRITE:
  340                 protocol |= SMB_PRTCL_WRITE;
  341                 AMDSMB_DEBUG(printf("amdsmb: QWRITE to 0x%x", slave));
  342                 break;
  343         case SMB_QREAD:
  344                 protocol |= SMB_PRTCL_READ;
  345                 AMDSMB_DEBUG(printf("amdsmb: QREAD to 0x%x", slave));
  346                 break;
  347         default:
  348                 panic("%s: unknown QUICK command (%x)!", __func__, how);
  349         }
  350 
  351         AMDSMB_LOCK(sc);
  352         amdsmb_ec_write(sc, SMB_ADDR, slave);
  353         amdsmb_ec_write(sc, SMB_PRTCL, protocol);
  354 
  355         error = amdsmb_wait(sc);
  356 
  357         AMDSMB_DEBUG(printf(", error=0x%x\n", error));
  358         AMDSMB_UNLOCK(sc);
  359 
  360         return (error);
  361 }
  362 
  363 static int
  364 amdsmb_sendb(device_t dev, u_char slave, char byte)
  365 {
  366         struct amdsmb_softc *sc = (struct amdsmb_softc *)device_get_softc(dev);
  367         int error;
  368 
  369         AMDSMB_LOCK(sc);
  370         amdsmb_ec_write(sc, SMB_CMD, byte);
  371         amdsmb_ec_write(sc, SMB_ADDR, slave);
  372         amdsmb_ec_write(sc, SMB_PRTCL, SMB_PRTCL_WRITE | SMB_PRTCL_BYTE);
  373 
  374         error = amdsmb_wait(sc);
  375 
  376         AMDSMB_DEBUG(printf("amdsmb: SENDB to 0x%x, byte=0x%x, error=0x%x\n",
  377            slave, byte, error));
  378         AMDSMB_UNLOCK(sc);
  379 
  380         return (error);
  381 }
  382 
  383 static int
  384 amdsmb_recvb(device_t dev, u_char slave, char *byte)
  385 {
  386         struct amdsmb_softc *sc = (struct amdsmb_softc *)device_get_softc(dev);
  387         int error;
  388 
  389         AMDSMB_LOCK(sc);
  390         amdsmb_ec_write(sc, SMB_ADDR, slave);
  391         amdsmb_ec_write(sc, SMB_PRTCL, SMB_PRTCL_READ | SMB_PRTCL_BYTE);
  392 
  393         if ((error = amdsmb_wait(sc)) == SMB_ENOERR)
  394                 amdsmb_ec_read(sc, SMB_DATA, byte);
  395 
  396         AMDSMB_DEBUG(printf("amdsmb: RECVB from 0x%x, byte=0x%x, error=0x%x\n",
  397             slave, *byte, error));
  398         AMDSMB_UNLOCK(sc);
  399 
  400         return (error);
  401 }
  402 
  403 static int
  404 amdsmb_writeb(device_t dev, u_char slave, char cmd, char byte)
  405 {
  406         struct amdsmb_softc *sc = (struct amdsmb_softc *)device_get_softc(dev);
  407         int error;
  408 
  409         AMDSMB_LOCK(sc);
  410         amdsmb_ec_write(sc, SMB_CMD, cmd);
  411         amdsmb_ec_write(sc, SMB_DATA, byte);
  412         amdsmb_ec_write(sc, SMB_ADDR, slave);
  413         amdsmb_ec_write(sc, SMB_PRTCL, SMB_PRTCL_WRITE | SMB_PRTCL_BYTE_DATA);
  414 
  415         error = amdsmb_wait(sc);
  416 
  417         AMDSMB_DEBUG(printf("amdsmb: WRITEB to 0x%x, cmd=0x%x, byte=0x%x, "
  418             "error=0x%x\n", slave, cmd, byte, error));
  419         AMDSMB_UNLOCK(sc);
  420 
  421         return (error);
  422 }
  423 
  424 static int
  425 amdsmb_readb(device_t dev, u_char slave, char cmd, char *byte)
  426 {
  427         struct amdsmb_softc *sc = (struct amdsmb_softc *)device_get_softc(dev);
  428         int error;
  429 
  430         AMDSMB_LOCK(sc);
  431         amdsmb_ec_write(sc, SMB_CMD, cmd);
  432         amdsmb_ec_write(sc, SMB_ADDR, slave);
  433         amdsmb_ec_write(sc, SMB_PRTCL, SMB_PRTCL_READ | SMB_PRTCL_BYTE_DATA);
  434 
  435         if ((error = amdsmb_wait(sc)) == SMB_ENOERR)
  436                 amdsmb_ec_read(sc, SMB_DATA, byte);
  437 
  438         AMDSMB_DEBUG(printf("amdsmb: READB from 0x%x, cmd=0x%x, byte=0x%x, "
  439             "error=0x%x\n", slave, cmd, (unsigned char)*byte, error));
  440         AMDSMB_UNLOCK(sc);
  441 
  442         return (error);
  443 }
  444 
  445 static int
  446 amdsmb_writew(device_t dev, u_char slave, char cmd, short word)
  447 {
  448         struct amdsmb_softc *sc = (struct amdsmb_softc *)device_get_softc(dev);
  449         int error;
  450 
  451         AMDSMB_LOCK(sc);
  452         amdsmb_ec_write(sc, SMB_CMD, cmd);
  453         amdsmb_ec_write(sc, SMB_DATA, word);
  454         amdsmb_ec_write(sc, SMB_DATA + 1, word >> 8);
  455         amdsmb_ec_write(sc, SMB_ADDR, slave);
  456         amdsmb_ec_write(sc, SMB_PRTCL, SMB_PRTCL_WRITE | SMB_PRTCL_WORD_DATA);
  457 
  458         error = amdsmb_wait(sc);
  459 
  460         AMDSMB_DEBUG(printf("amdsmb: WRITEW to 0x%x, cmd=0x%x, word=0x%x, "
  461             "error=0x%x\n", slave, cmd, word, error));
  462         AMDSMB_UNLOCK(sc);
  463 
  464         return (error);
  465 }
  466 
  467 static int
  468 amdsmb_readw(device_t dev, u_char slave, char cmd, short *word)
  469 {
  470         struct amdsmb_softc *sc = (struct amdsmb_softc *)device_get_softc(dev);
  471         u_char temp[2];
  472         int error;
  473 
  474         AMDSMB_LOCK(sc);
  475         amdsmb_ec_write(sc, SMB_CMD, cmd);
  476         amdsmb_ec_write(sc, SMB_ADDR, slave);
  477         amdsmb_ec_write(sc, SMB_PRTCL, SMB_PRTCL_READ | SMB_PRTCL_WORD_DATA);
  478 
  479         if ((error = amdsmb_wait(sc)) == SMB_ENOERR) {
  480                 amdsmb_ec_read(sc, SMB_DATA + 0, &temp[0]);
  481                 amdsmb_ec_read(sc, SMB_DATA + 1, &temp[1]);
  482                 *word = temp[0] | (temp[1] << 8);
  483         }
  484 
  485         AMDSMB_DEBUG(printf("amdsmb: READW from 0x%x, cmd=0x%x, word=0x%x, "
  486             "error=0x%x\n", slave, cmd, (unsigned short)*word, error));
  487         AMDSMB_UNLOCK(sc);
  488 
  489         return (error);
  490 }
  491 
  492 static int
  493 amdsmb_bwrite(device_t dev, u_char slave, char cmd, u_char count, char *buf)
  494 {
  495         struct amdsmb_softc *sc = (struct amdsmb_softc *)device_get_softc(dev);
  496         u_char i;
  497         int error;
  498 
  499         if (count < 1 || count > 32)
  500                 return (SMB_EINVAL);
  501 
  502         AMDSMB_LOCK(sc);
  503         amdsmb_ec_write(sc, SMB_CMD, cmd);
  504         amdsmb_ec_write(sc, SMB_BCNT, count);
  505         for (i = 0; i < count; i++)
  506                 amdsmb_ec_write(sc, SMB_DATA + i, buf[i]);
  507         amdsmb_ec_write(sc, SMB_ADDR, slave);
  508         amdsmb_ec_write(sc, SMB_PRTCL, SMB_PRTCL_WRITE | SMB_PRTCL_BLOCK_DATA);
  509 
  510         error = amdsmb_wait(sc);
  511 
  512         AMDSMB_DEBUG(printf("amdsmb: WRITEBLK to 0x%x, count=0x%x, cmd=0x%x, "
  513             "error=0x%x", slave, count, cmd, error));
  514         AMDSMB_UNLOCK(sc);
  515 
  516         return (error);
  517 }
  518 
  519 static int
  520 amdsmb_bread(device_t dev, u_char slave, char cmd, u_char *count, char *buf)
  521 {
  522         struct amdsmb_softc *sc = (struct amdsmb_softc *)device_get_softc(dev);
  523         u_char data, len, i;
  524         int error;
  525 
  526         if (*count < 1 || *count > 32)
  527                 return (SMB_EINVAL);
  528 
  529         AMDSMB_LOCK(sc);
  530         amdsmb_ec_write(sc, SMB_CMD, cmd);
  531         amdsmb_ec_write(sc, SMB_ADDR, slave);
  532         amdsmb_ec_write(sc, SMB_PRTCL, SMB_PRTCL_READ | SMB_PRTCL_BLOCK_DATA);
  533 
  534         if ((error = amdsmb_wait(sc)) == SMB_ENOERR) {
  535                 amdsmb_ec_read(sc, SMB_BCNT, &len);
  536                 for (i = 0; i < len; i++) {
  537                         amdsmb_ec_read(sc, SMB_DATA + i, &data);
  538                         if (i < *count)
  539                                 buf[i] = data;
  540                 }
  541                 *count = len;
  542         }
  543 
  544         AMDSMB_DEBUG(printf("amdsmb: READBLK to 0x%x, count=0x%x, cmd=0x%x, "
  545             "error=0x%x", slave, *count, cmd, error));
  546         AMDSMB_UNLOCK(sc);
  547 
  548         return (error);
  549 }
  550 
  551 static device_method_t amdsmb_methods[] = {
  552         /* Device interface */
  553         DEVMETHOD(device_probe,         amdsmb_probe),
  554         DEVMETHOD(device_attach,        amdsmb_attach),
  555         DEVMETHOD(device_detach,        amdsmb_detach),
  556 
  557         /* SMBus interface */
  558         DEVMETHOD(smbus_callback,       amdsmb_callback),
  559         DEVMETHOD(smbus_quick,          amdsmb_quick),
  560         DEVMETHOD(smbus_sendb,          amdsmb_sendb),
  561         DEVMETHOD(smbus_recvb,          amdsmb_recvb),
  562         DEVMETHOD(smbus_writeb,         amdsmb_writeb),
  563         DEVMETHOD(smbus_readb,          amdsmb_readb),
  564         DEVMETHOD(smbus_writew,         amdsmb_writew),
  565         DEVMETHOD(smbus_readw,          amdsmb_readw),
  566         DEVMETHOD(smbus_bwrite,         amdsmb_bwrite),
  567         DEVMETHOD(smbus_bread,          amdsmb_bread),
  568 
  569         { 0, 0 }
  570 };
  571 
  572 static devclass_t amdsmb_devclass;
  573 
  574 static driver_t amdsmb_driver = {
  575         "amdsmb",
  576         amdsmb_methods,
  577         sizeof(struct amdsmb_softc),
  578 };
  579 
  580 DRIVER_MODULE(amdsmb, pci, amdsmb_driver, amdsmb_devclass, 0, 0);
  581 DRIVER_MODULE(smbus, amdsmb, smbus_driver, smbus_devclass, 0, 0);
  582 
  583 MODULE_DEPEND(amdsmb, pci, 1, 1, 1);
  584 MODULE_DEPEND(amdsmb, smbus, SMBUS_MINVER, SMBUS_PREFVER, SMBUS_MAXVER);
  585 MODULE_VERSION(amdsmb, 1);

Cache object: d24c1a8146cf922c5c2d24226ae0c3ce


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