FreeBSD/Linux Kernel Cross Reference
sys/pci/amdsmb.c
1 #include <sys/cdefs.h>
2 __FBSDID("$FreeBSD$");
3
4 #include <sys/param.h>
5 #include <sys/bus.h>
6 #include <sys/kernel.h>
7 #include <sys/lock.h>
8 #include <sys/module.h>
9 #include <sys/mutex.h>
10 #include <sys/systm.h>
11
12 #include <machine/bus.h>
13 #include <machine/resource.h>
14 #include <sys/rman.h>
15
16 #include <dev/pci/pcivar.h>
17 #include <dev/pci/pcireg.h>
18
19 #include <dev/smbus/smbconf.h>
20 #include "smbus_if.h"
21
22 #define AMDSMB_DEBUG(x) if (amdsmb_debug) (x)
23
24 #ifdef DEBUG
25 static int amdsmb_debug = 1;
26 #else
27 static int amdsmb_debug = 0;
28 #endif
29
30 #define AMDSMB_VENDORID_AMD 0x1022
31 #define AMDSMB_DEVICEID_AMD8111_SMB2 0x746a
32
33 /*
34 * ACPI 3.0, Chapter 12, Embedded Controller Interface.
35 */
36 #define EC_DATA 0x00 /* data register */
37 #define EC_SC 0x04 /* status of controller */
38 #define EC_CMD 0x04 /* command register */
39
40 #define EC_SC_IBF 0x02 /* data ready for embedded controller */
41 #define EC_SC_OBF 0x01 /* data ready for host */
42 #define EC_CMD_WR 0x81 /* write EC */
43 #define EC_CMD_RD 0x80 /* read EC */
44
45 /*
46 * ACPI 3.0, Chapter 12, SMBus Host Controller Interface.
47 */
48 #define SMB_PRTCL 0x00 /* protocol */
49 #define SMB_STS 0x01 /* status */
50 #define SMB_ADDR 0x02 /* address */
51 #define SMB_CMD 0x03 /* command */
52 #define SMB_DATA 0x04 /* 32 data registers */
53 #define SMB_BCNT 0x24 /* number of data bytes */
54 #define SMB_ALRM_A 0x25 /* alarm address */
55 #define SMB_ALRM_D 0x26 /* 2 bytes alarm data */
56
57 #define SMB_STS_DONE 0x80
58 #define SMB_STS_ALRM 0x40
59 #define SMB_STS_RES 0x20
60 #define SMB_STS_STATUS 0x1f
61 #define SMB_STS_OK 0x00 /* OK */
62 #define SMB_STS_UF 0x07 /* Unknown Failure */
63 #define SMB_STS_DANA 0x10 /* Device Address Not Acknowledged */
64 #define SMB_STS_DED 0x11 /* Device Error Detected */
65 #define SMB_STS_DCAD 0x12 /* Device Command Access Denied */
66 #define SMB_STS_UE 0x13 /* Unknown Error */
67 #define SMB_STS_DAD 0x17 /* Device Access Denied */
68 #define SMB_STS_T 0x18 /* Timeout */
69 #define SMB_STS_HUP 0x19 /* Host Unsupported Protocol */
70 #define SMB_STS_B 0x1a /* Busy */
71 #define SMB_STS_PEC 0x1f /* PEC (CRC-8) Error */
72
73 #define SMB_PRTCL_WRITE 0x00
74 #define SMB_PRTCL_READ 0x01
75 #define SMB_PRTCL_QUICK 0x02
76 #define SMB_PRTCL_BYTE 0x04
77 #define SMB_PRTCL_BYTE_DATA 0x06
78 #define SMB_PRTCL_WORD_DATA 0x08
79 #define SMB_PRTCL_BLOCK_DATA 0x0a
80 #define SMB_PRTCL_PROC_CALL 0x0c
81 #define SMB_PRTCL_BLOCK_PROC_CALL 0x0d
82 #define SMB_PRTCL_PEC 0x80
83
84 struct amdsmb_softc {
85 int rid;
86 struct resource *res;
87 bus_space_tag_t smbst;
88 bus_space_handle_t smbsh;
89 device_t smbus;
90 struct mtx lock;
91 };
92
93 #define AMDSMB_LOCK(amdsmb) mtx_lock(&(amdsmb)->lock)
94 #define AMDSMB_UNLOCK(amdsmb) mtx_unlock(&(amdsmb)->lock)
95 #define AMDSMB_LOCK_ASSERT(amdsmb) mtx_assert(&(amdsmb)->lock, MA_OWNED)
96
97 #define AMDSMB_ECINB(amdsmb, register) \
98 (bus_space_read_1(amdsmb->smbst, amdsmb->smbsh, register))
99 #define AMDSMB_ECOUTB(amdsmb, register, value) \
100 (bus_space_write_1(amdsmb->smbst, amdsmb->smbsh, register, value))
101
102 static int amdsmb_detach(device_t dev);
103
104 static int
105 amdsmb_probe(device_t dev)
106 {
107 u_int16_t vid;
108 u_int16_t did;
109
110 vid = pci_get_vendor(dev);
111 did = pci_get_device(dev);
112
113 if (vid == AMDSMB_VENDORID_AMD) {
114 switch(did) {
115 case AMDSMB_DEVICEID_AMD8111_SMB2:
116 device_set_desc(dev, "AMD-8111 SMBus 2.0 Controller");
117 return (BUS_PROBE_DEFAULT);
118 }
119 }
120
121 return (ENXIO);
122 }
123
124 static int
125 amdsmb_attach(device_t dev)
126 {
127 struct amdsmb_softc *amdsmb_sc = device_get_softc(dev);
128
129 /* Allocate I/O space */
130 amdsmb_sc->rid = PCIR_BAR(0);
131
132 amdsmb_sc->res = bus_alloc_resource_any(dev, SYS_RES_IOPORT,
133 &amdsmb_sc->rid, RF_ACTIVE);
134
135 if (amdsmb_sc->res == NULL) {
136 device_printf(dev, "could not map i/o space\n");
137 return (ENXIO);
138 }
139
140 amdsmb_sc->smbst = rman_get_bustag(amdsmb_sc->res);
141 amdsmb_sc->smbsh = rman_get_bushandle(amdsmb_sc->res);
142 mtx_init(&amdsmb_sc->lock, device_get_nameunit(dev), "amdsmb", MTX_DEF);
143
144 /* Allocate a new smbus device */
145 amdsmb_sc->smbus = device_add_child(dev, "smbus", -1);
146 if (!amdsmb_sc->smbus) {
147 amdsmb_detach(dev);
148 return (EINVAL);
149 }
150
151 bus_generic_attach(dev);
152
153 return (0);
154 }
155
156 static int
157 amdsmb_detach(device_t dev)
158 {
159 struct amdsmb_softc *amdsmb_sc = device_get_softc(dev);
160
161 if (amdsmb_sc->smbus) {
162 device_delete_child(dev, amdsmb_sc->smbus);
163 amdsmb_sc->smbus = NULL;
164 }
165
166 mtx_destroy(&amdsmb_sc->lock);
167 if (amdsmb_sc->res)
168 bus_release_resource(dev, SYS_RES_IOPORT, amdsmb_sc->rid,
169 amdsmb_sc->res);
170
171 return (0);
172 }
173
174 static int
175 amdsmb_callback(device_t dev, int index, void *data)
176 {
177 int error = 0;
178
179 switch (index) {
180 case SMB_REQUEST_BUS:
181 case SMB_RELEASE_BUS:
182 break;
183 default:
184 error = EINVAL;
185 }
186
187 return (error);
188 }
189
190 static int
191 amdsmb_ec_wait_write(struct amdsmb_softc *sc)
192 {
193 int timeout = 500;
194
195 while (timeout-- && AMDSMB_ECINB(sc, EC_SC) & EC_SC_IBF)
196 DELAY(1);
197 if (timeout == 0) {
198 device_printf(sc->smbus, "timeout waiting for IBF to clear\n");
199 return (1);
200 }
201 return (0);
202 }
203
204 static int
205 amdsmb_ec_wait_read(struct amdsmb_softc *sc)
206 {
207 int timeout = 500;
208
209 while (timeout-- && ~AMDSMB_ECINB(sc, EC_SC) & EC_SC_OBF)
210 DELAY(1);
211 if (timeout == 0) {
212 device_printf(sc->smbus, "timeout waiting for OBF to set\n");
213 return (1);
214 }
215 return (0);
216 }
217
218 static int
219 amdsmb_ec_read(struct amdsmb_softc *sc, u_char addr, u_char *data)
220 {
221
222 AMDSMB_LOCK_ASSERT(sc);
223 if (amdsmb_ec_wait_write(sc))
224 return (1);
225 AMDSMB_ECOUTB(sc, EC_CMD, EC_CMD_RD);
226
227 if (amdsmb_ec_wait_write(sc))
228 return (1);
229 AMDSMB_ECOUTB(sc, EC_DATA, addr);
230
231 if (amdsmb_ec_wait_read(sc))
232 return (1);
233 *data = AMDSMB_ECINB(sc, EC_DATA);
234
235 return (0);
236 }
237
238 static int
239 amdsmb_ec_write(struct amdsmb_softc *sc, u_char addr, u_char data)
240 {
241
242 AMDSMB_LOCK_ASSERT(sc);
243 if (amdsmb_ec_wait_write(sc))
244 return (1);
245 AMDSMB_ECOUTB(sc, EC_CMD, EC_CMD_WR);
246
247 if (amdsmb_ec_wait_write(sc))
248 return (1);
249 AMDSMB_ECOUTB(sc, EC_DATA, addr);
250
251 if (amdsmb_ec_wait_write(sc))
252 return (1);
253 AMDSMB_ECOUTB(sc, EC_DATA, data);
254
255 return (0);
256 }
257
258 static int
259 amdsmb_wait(struct amdsmb_softc *sc)
260 {
261 u_char sts, temp;
262 int error, count;
263
264 AMDSMB_LOCK_ASSERT(sc);
265 amdsmb_ec_read(sc, SMB_PRTCL, &temp);
266 if (temp != 0)
267 {
268 count = 10000;
269 do {
270 DELAY(500);
271 amdsmb_ec_read(sc, SMB_PRTCL, &temp);
272 } while (temp != 0 && count--);
273 if (count == 0)
274 return (SMB_ETIMEOUT);
275 }
276
277 amdsmb_ec_read(sc, SMB_STS, &sts);
278 sts &= SMB_STS_STATUS;
279 AMDSMB_DEBUG(printf("amdsmb: STS=0x%x\n", sts));
280
281 switch (sts) {
282 case SMB_STS_OK:
283 error = SMB_ENOERR;
284 break;
285 case SMB_STS_DANA:
286 error = SMB_ENOACK;
287 break;
288 case SMB_STS_B:
289 error = SMB_EBUSY;
290 break;
291 case SMB_STS_T:
292 error = SMB_ETIMEOUT;
293 break;
294 case SMB_STS_DCAD:
295 case SMB_STS_DAD:
296 case SMB_STS_HUP:
297 error = SMB_ENOTSUPP;
298 break;
299 default:
300 error = SMB_EBUSERR;
301 break;
302 }
303
304 return (error);
305 }
306
307 static int
308 amdsmb_quick(device_t dev, u_char slave, int how)
309 {
310 struct amdsmb_softc *sc = (struct amdsmb_softc *)device_get_softc(dev);
311 u_char protocol;
312 int error;
313
314 protocol = SMB_PRTCL_QUICK;
315
316 switch (how) {
317 case SMB_QWRITE:
318 protocol |= SMB_PRTCL_WRITE;
319 AMDSMB_DEBUG(printf("amdsmb: QWRITE to 0x%x", slave));
320 break;
321 case SMB_QREAD:
322 protocol |= SMB_PRTCL_READ;
323 AMDSMB_DEBUG(printf("amdsmb: QREAD to 0x%x", slave));
324 break;
325 default:
326 panic("%s: unknown QUICK command (%x)!", __func__, how);
327 }
328
329 AMDSMB_LOCK(sc);
330 amdsmb_ec_write(sc, SMB_ADDR, slave);
331 amdsmb_ec_write(sc, SMB_PRTCL, protocol);
332
333 error = amdsmb_wait(sc);
334
335 AMDSMB_DEBUG(printf(", error=0x%x\n", error));
336 AMDSMB_UNLOCK(sc);
337
338 return (error);
339 }
340
341 static int
342 amdsmb_sendb(device_t dev, u_char slave, char byte)
343 {
344 struct amdsmb_softc *sc = (struct amdsmb_softc *)device_get_softc(dev);
345 int error;
346
347 AMDSMB_LOCK(sc);
348 amdsmb_ec_write(sc, SMB_CMD, byte);
349 amdsmb_ec_write(sc, SMB_ADDR, slave);
350 amdsmb_ec_write(sc, SMB_PRTCL, SMB_PRTCL_WRITE | SMB_PRTCL_BYTE);
351
352 error = amdsmb_wait(sc);
353
354 AMDSMB_DEBUG(printf("amdsmb: SENDB to 0x%x, byte=0x%x, error=0x%x\n",
355 slave, byte, error));
356 AMDSMB_UNLOCK(sc);
357
358 return (error);
359 }
360
361 static int
362 amdsmb_recvb(device_t dev, u_char slave, char *byte)
363 {
364 struct amdsmb_softc *sc = (struct amdsmb_softc *)device_get_softc(dev);
365 int error;
366
367 AMDSMB_LOCK(sc);
368 amdsmb_ec_write(sc, SMB_ADDR, slave);
369 amdsmb_ec_write(sc, SMB_PRTCL, SMB_PRTCL_READ | SMB_PRTCL_BYTE);
370
371 if ((error = amdsmb_wait(sc)) == SMB_ENOERR)
372 amdsmb_ec_read(sc, SMB_DATA, byte);
373
374 AMDSMB_DEBUG(printf("amdsmb: RECVB from 0x%x, byte=0x%x, error=0x%x\n",
375 slave, *byte, error));
376 AMDSMB_UNLOCK(sc);
377
378 return (error);
379 }
380
381 static int
382 amdsmb_writeb(device_t dev, u_char slave, char cmd, char byte)
383 {
384 struct amdsmb_softc *sc = (struct amdsmb_softc *)device_get_softc(dev);
385 int error;
386
387 AMDSMB_LOCK(sc);
388 amdsmb_ec_write(sc, SMB_CMD, cmd);
389 amdsmb_ec_write(sc, SMB_DATA, byte);
390 amdsmb_ec_write(sc, SMB_ADDR, slave);
391 amdsmb_ec_write(sc, SMB_PRTCL, SMB_PRTCL_WRITE | SMB_PRTCL_BYTE_DATA);
392
393 error = amdsmb_wait(sc);
394
395 AMDSMB_DEBUG(printf("amdsmb: WRITEB to 0x%x, cmd=0x%x, byte=0x%x, "
396 "error=0x%x\n", slave, cmd, byte, error));
397 AMDSMB_UNLOCK(sc);
398
399 return (error);
400 }
401
402 static int
403 amdsmb_readb(device_t dev, u_char slave, char cmd, char *byte)
404 {
405 struct amdsmb_softc *sc = (struct amdsmb_softc *)device_get_softc(dev);
406 int error;
407
408 AMDSMB_LOCK(sc);
409 amdsmb_ec_write(sc, SMB_CMD, cmd);
410 amdsmb_ec_write(sc, SMB_ADDR, slave);
411 amdsmb_ec_write(sc, SMB_PRTCL, SMB_PRTCL_READ | SMB_PRTCL_BYTE_DATA);
412
413 if ((error = amdsmb_wait(sc)) == SMB_ENOERR)
414 amdsmb_ec_read(sc, SMB_DATA, byte);
415
416 AMDSMB_DEBUG(printf("amdsmb: READB from 0x%x, cmd=0x%x, byte=0x%x, "
417 "error=0x%x\n", slave, cmd, (unsigned char)*byte, error));
418 AMDSMB_UNLOCK(sc);
419
420 return (error);
421 }
422
423 static int
424 amdsmb_writew(device_t dev, u_char slave, char cmd, short word)
425 {
426 struct amdsmb_softc *sc = (struct amdsmb_softc *)device_get_softc(dev);
427 int error;
428
429 AMDSMB_LOCK(sc);
430 amdsmb_ec_write(sc, SMB_CMD, cmd);
431 amdsmb_ec_write(sc, SMB_DATA, word);
432 amdsmb_ec_write(sc, SMB_DATA + 1, word >> 8);
433 amdsmb_ec_write(sc, SMB_ADDR, slave);
434 amdsmb_ec_write(sc, SMB_PRTCL, SMB_PRTCL_WRITE | SMB_PRTCL_WORD_DATA);
435
436 error = amdsmb_wait(sc);
437
438 AMDSMB_DEBUG(printf("amdsmb: WRITEW to 0x%x, cmd=0x%x, word=0x%x, "
439 "error=0x%x\n", slave, cmd, word, error));
440 AMDSMB_UNLOCK(sc);
441
442 return (error);
443 }
444
445 static int
446 amdsmb_readw(device_t dev, u_char slave, char cmd, short *word)
447 {
448 struct amdsmb_softc *sc = (struct amdsmb_softc *)device_get_softc(dev);
449 u_char temp[2];
450 int error;
451
452 AMDSMB_LOCK(sc);
453 amdsmb_ec_write(sc, SMB_CMD, cmd);
454 amdsmb_ec_write(sc, SMB_ADDR, slave);
455 amdsmb_ec_write(sc, SMB_PRTCL, SMB_PRTCL_READ | SMB_PRTCL_WORD_DATA);
456
457 if ((error = amdsmb_wait(sc)) == SMB_ENOERR) {
458 amdsmb_ec_read(sc, SMB_DATA + 0, &temp[0]);
459 amdsmb_ec_read(sc, SMB_DATA + 1, &temp[1]);
460 *word = temp[0] | (temp[1] << 8);
461 }
462
463 AMDSMB_DEBUG(printf("amdsmb: READW from 0x%x, cmd=0x%x, word=0x%x, "
464 "error=0x%x\n", slave, cmd, (unsigned short)*word, error));
465 AMDSMB_UNLOCK(sc);
466
467 return (error);
468 }
469
470 static int
471 amdsmb_bwrite(device_t dev, u_char slave, char cmd, u_char count, char *buf)
472 {
473 struct amdsmb_softc *sc = (struct amdsmb_softc *)device_get_softc(dev);
474 u_char i;
475 int error;
476
477 if (count < 1 || count > 32)
478 return (SMB_EINVAL);
479
480 AMDSMB_LOCK(sc);
481 amdsmb_ec_write(sc, SMB_CMD, cmd);
482 amdsmb_ec_write(sc, SMB_BCNT, count);
483 for (i = 0; i < count; i++)
484 amdsmb_ec_write(sc, SMB_DATA + i, buf[i]);
485 amdsmb_ec_write(sc, SMB_ADDR, slave);
486 amdsmb_ec_write(sc, SMB_PRTCL, SMB_PRTCL_WRITE | SMB_PRTCL_BLOCK_DATA);
487
488 error = amdsmb_wait(sc);
489
490 AMDSMB_DEBUG(printf("amdsmb: WRITEBLK to 0x%x, count=0x%x, cmd=0x%x, "
491 "error=0x%x", slave, count, cmd, error));
492 AMDSMB_UNLOCK(sc);
493
494 return (error);
495 }
496
497 static int
498 amdsmb_bread(device_t dev, u_char slave, char cmd, u_char *count, char *buf)
499 {
500 struct amdsmb_softc *sc = (struct amdsmb_softc *)device_get_softc(dev);
501 u_char data, len, i;
502 int error;
503
504 if (*count < 1 || *count > 32)
505 return (SMB_EINVAL);
506
507 AMDSMB_LOCK(sc);
508 amdsmb_ec_write(sc, SMB_CMD, cmd);
509 amdsmb_ec_write(sc, SMB_ADDR, slave);
510 amdsmb_ec_write(sc, SMB_PRTCL, SMB_PRTCL_READ | SMB_PRTCL_BLOCK_DATA);
511
512 if ((error = amdsmb_wait(sc)) == SMB_ENOERR) {
513 amdsmb_ec_read(sc, SMB_BCNT, &len);
514 for (i = 0; i < len; i++) {
515 amdsmb_ec_read(sc, SMB_DATA + i, &data);
516 if (i < *count)
517 buf[i] = data;
518 }
519 *count = len;
520 }
521
522 AMDSMB_DEBUG(printf("amdsmb: READBLK to 0x%x, count=0x%x, cmd=0x%x, "
523 "error=0x%x", slave, *count, cmd, error));
524 AMDSMB_UNLOCK(sc);
525
526 return (error);
527 }
528
529 static device_method_t amdsmb_methods[] = {
530 /* Device interface */
531 DEVMETHOD(device_probe, amdsmb_probe),
532 DEVMETHOD(device_attach, amdsmb_attach),
533 DEVMETHOD(device_detach, amdsmb_detach),
534
535 /* SMBus interface */
536 DEVMETHOD(smbus_callback, amdsmb_callback),
537 DEVMETHOD(smbus_quick, amdsmb_quick),
538 DEVMETHOD(smbus_sendb, amdsmb_sendb),
539 DEVMETHOD(smbus_recvb, amdsmb_recvb),
540 DEVMETHOD(smbus_writeb, amdsmb_writeb),
541 DEVMETHOD(smbus_readb, amdsmb_readb),
542 DEVMETHOD(smbus_writew, amdsmb_writew),
543 DEVMETHOD(smbus_readw, amdsmb_readw),
544 DEVMETHOD(smbus_bwrite, amdsmb_bwrite),
545 DEVMETHOD(smbus_bread, amdsmb_bread),
546
547 { 0, 0 }
548 };
549
550 static devclass_t amdsmb_devclass;
551
552 static driver_t amdsmb_driver = {
553 "amdsmb",
554 amdsmb_methods,
555 sizeof(struct amdsmb_softc),
556 };
557
558 DRIVER_MODULE(amdsmb, pci, amdsmb_driver, amdsmb_devclass, 0, 0);
559 DRIVER_MODULE(smbus, amdsmb, smbus_driver, smbus_devclass, 0, 0);
560
561 MODULE_DEPEND(amdsmb, pci, 1, 1, 1);
562 MODULE_DEPEND(amdsmb, smbus, SMBUS_MINVER, SMBUS_PREFVER, SMBUS_MAXVER);
563 MODULE_VERSION(amdsmb, 1);
Cache object: e1ce0a8bb1d5115e1f34c8293289ac34
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