FreeBSD/Linux Kernel Cross Reference
sys/pci/ide_pcireg.h
1 /*
2 * Copyright 1996 Massachusetts Institute of Technology
3 *
4 * Permission to use, copy, modify, and distribute this software and
5 * its documentation for any purpose and without fee is hereby
6 * granted, provided that both the above copyright notice and this
7 * permission notice appear in all copies, that both the above
8 * copyright notice and this permission notice appear in all
9 * supporting documentation, and that the name of M.I.T. not be used
10 * in advertising or publicity pertaining to distribution of the
11 * software without specific, written prior permission. M.I.T. makes
12 * no representations about the suitability of this software for any
13 * purpose. It is provided "as is" without express or implied
14 * warranty.
15 *
16 * THIS SOFTWARE IS PROVIDED BY M.I.T. ``AS IS''. M.I.T. DISCLAIMS
17 * ALL EXPRESS OR IMPLIED WARRANTIES WITH REGARD TO THIS SOFTWARE,
18 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT
20 * SHALL M.I.T. BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
23 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
24 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
25 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
26 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 *
29 * From: wd82371reg.h,v 1.3 1997/02/22 09:44:15 peter Exp $
30 * $FreeBSD$
31 */
32
33 #ifndef _PCI_IDEPCIREG_H_
34 #define _PCI_IDEPCIREG_H_ 1
35
36 /* Ports are for controller 0. Add SFF8038_CTLR_1 for controller 1. */
37 #define SFF8038_CTLR_1 8
38
39 /* Contents of BMICOM register */
40 #define BMICOM_PORT 0
41 #define BMICOM_READ_WRITE 0x0008 /* false = read, true = write */
42 #define BMICOM_STOP_START 0x0001 /* false = stop, true = start */
43
44 /* Contents of BMISTA register */
45 #define BMISTA_PORT 2
46 #define BMISTA_SIMPLEX 0x0080 /* 1 = controller cannot DMA on both
47 channels simultaneously */
48 #define BMISTA_DMA1CAP 0x0040 /* true = drive 1 can DMA */
49 #define BMISTA_DMA0CAP 0x0020 /* true = drive 0 can DMA */
50 #define BMISTA_INTERRUPT 0x0004
51 #define BMISTA_DMA_ERROR 0x0002
52 #define BMISTA_DMA_ACTIVE 0x0001
53
54 #define BMIDTP_PORT 4 /* use outl */
55
56 struct ide_pci_prd {
57 u_int32_t prd_base;
58 u_int32_t prd_count;
59 };
60
61 #define PRD_EOT_BIT 0x80000000
62
63 #endif /* _PCI_IDEPCIREG_H_ */
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