Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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sys/pci/if_fxp.c
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1 /* 2 * Copyright (c) 1995, David Greenman 3 * All rights reserved. 4 * 5 * Modifications to support NetBSD and media selection: 6 * Copyright (c) 1997 Jason R. Thorpe. All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice unmodified, this list of conditions, and the following 13 * disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 * 30 * $FreeBSD: src/sys/pci/if_fxp.c,v 1.21.2.17 1999/09/05 08:21:06 peter Exp $ 31 */ 32 33 /* 34 * Intel EtherExpress Pro/100B PCI Fast Ethernet driver 35 */ 36 37 #include "bpfilter.h" 38 39 #include <sys/param.h> 40 #include <sys/systm.h> 41 #include <sys/mbuf.h> 42 #include <sys/malloc.h> 43 #include <sys/kernel.h> 44 #include <sys/socket.h> 45 #include <sys/syslog.h> 46 47 #include <net/if.h> 48 #include <net/if_dl.h> 49 #include <net/if_media.h> 50 51 #ifdef INET 52 #include <netinet/in.h> 53 #endif 54 55 #ifdef NS 56 #include <netns/ns.h> 57 #include <netns/ns_if.h> 58 #endif 59 60 #if NBPFILTER > 0 61 #include <net/bpf.h> 62 #endif 63 64 #if defined(__NetBSD__) 65 66 #include <sys/ioctl.h> 67 #include <sys/errno.h> 68 #include <sys/device.h> 69 70 #include <net/if_dl.h> 71 #include <net/if_ether.h> 72 73 #include <netinet/if_inarp.h> 74 75 #include <vm/vm.h> 76 77 #include <machine/cpu.h> 78 #include <machine/bus.h> 79 #include <machine/intr.h> 80 81 #include <dev/pci/if_fxpreg.h> 82 #include <dev/pci/if_fxpvar.h> 83 84 #include <dev/pci/pcivar.h> 85 #include <dev/pci/pcireg.h> 86 #include <dev/pci/pcidevs.h> 87 88 #ifdef __alpha__ /* XXX */ 89 /* XXX XXX NEED REAL DMA MAPPING SUPPORT XXX XXX */ 90 #undef vtophys 91 #define vtophys(va) alpha_XXX_dmamap((vm_offset_t)(va)) 92 #endif /* __alpha__ */ 93 94 #else /* __FreeBSD__ */ 95 96 #include <sys/sockio.h> 97 98 #include <netinet/if_ether.h> 99 100 #include <vm/vm.h> /* for vtophys */ 101 #include <vm/pmap.h> /* for vtophys */ 102 #include <machine/clock.h> /* for DELAY */ 103 104 #include <pci/pcivar.h> 105 #include <pci/if_fxpreg.h> 106 #include <pci/if_fxpvar.h> 107 108 #endif /* __NetBSD__ */ 109 110 #ifdef BRIDGE 111 #include <net/if_types.h> 112 #include <net/bridge.h> 113 #endif 114 115 /* 116 * NOTE! On the Alpha, we have an alignment constraint. The 117 * card DMAs the packet immediately following the RFA. However, 118 * the first thing in the packet is a 14-byte Ethernet header. 119 * This means that the packet is misaligned. To compensate, 120 * we actually offset the RFA 2 bytes into the cluster. This 121 * alignes the packet after the Ethernet header at a 32-bit 122 * boundary. HOWEVER! This means that the RFA is misaligned! 123 */ 124 #define RFA_ALIGNMENT_FUDGE 2 125 126 /* 127 * Inline function to copy a 16-bit aligned 32-bit quantity. 128 */ 129 static __inline void fxp_lwcopy __P((volatile u_int32_t *, 130 volatile u_int32_t *)); 131 static __inline void 132 fxp_lwcopy(src, dst) 133 volatile u_int32_t *src, *dst; 134 { 135 volatile u_int16_t *a = (u_int16_t *)src; 136 volatile u_int16_t *b = (u_int16_t *)dst; 137 138 b[0] = a[0]; 139 b[1] = a[1]; 140 } 141 142 /* 143 * Template for default configuration parameters. 144 * See struct fxp_cb_config for the bit definitions. 145 */ 146 static u_char fxp_cb_config_template[] = { 147 0x0, 0x0, /* cb_status */ 148 0x80, 0x2, /* cb_command */ 149 0xff, 0xff, 0xff, 0xff, /* link_addr */ 150 0x16, /* 0 */ 151 0x8, /* 1 */ 152 0x0, /* 2 */ 153 0x0, /* 3 */ 154 0x0, /* 4 */ 155 0x80, /* 5 */ 156 0xb2, /* 6 */ 157 0x3, /* 7 */ 158 0x1, /* 8 */ 159 0x0, /* 9 */ 160 0x26, /* 10 */ 161 0x0, /* 11 */ 162 0x60, /* 12 */ 163 0x0, /* 13 */ 164 0xf2, /* 14 */ 165 0x48, /* 15 */ 166 0x0, /* 16 */ 167 0x40, /* 17 */ 168 0xf3, /* 18 */ 169 0x0, /* 19 */ 170 0x3f, /* 20 */ 171 0x5 /* 21 */ 172 }; 173 174 /* Supported media types. */ 175 struct fxp_supported_media { 176 const int fsm_phy; /* PHY type */ 177 const int *fsm_media; /* the media array */ 178 const int fsm_nmedia; /* the number of supported media */ 179 const int fsm_defmedia; /* default media for this PHY */ 180 }; 181 182 const int fxp_media_standard[] = { 183 IFM_ETHER|IFM_10_T, 184 IFM_ETHER|IFM_10_T|IFM_FDX, 185 IFM_ETHER|IFM_100_TX, 186 IFM_ETHER|IFM_100_TX|IFM_FDX, 187 IFM_ETHER|IFM_AUTO, 188 }; 189 #define FXP_MEDIA_STANDARD_DEFMEDIA (IFM_ETHER|IFM_AUTO) 190 191 const int fxp_media_default[] = { 192 IFM_ETHER|IFM_MANUAL, /* XXX IFM_AUTO ? */ 193 }; 194 #define FXP_MEDIA_DEFAULT_DEFMEDIA (IFM_ETHER|IFM_MANUAL) 195 196 const struct fxp_supported_media fxp_media[] = { 197 { FXP_PHY_DP83840, fxp_media_standard, 198 sizeof(fxp_media_standard) / sizeof(fxp_media_standard[0]), 199 FXP_MEDIA_STANDARD_DEFMEDIA }, 200 { FXP_PHY_DP83840A, fxp_media_standard, 201 sizeof(fxp_media_standard) / sizeof(fxp_media_standard[0]), 202 FXP_MEDIA_STANDARD_DEFMEDIA }, 203 { FXP_PHY_82553A, fxp_media_standard, 204 sizeof(fxp_media_standard) / sizeof(fxp_media_standard[0]), 205 FXP_MEDIA_STANDARD_DEFMEDIA }, 206 { FXP_PHY_82553C, fxp_media_standard, 207 sizeof(fxp_media_standard) / sizeof(fxp_media_standard[0]), 208 FXP_MEDIA_STANDARD_DEFMEDIA }, 209 { FXP_PHY_82555, fxp_media_standard, 210 sizeof(fxp_media_standard) / sizeof(fxp_media_standard[0]), 211 FXP_MEDIA_STANDARD_DEFMEDIA }, 212 { FXP_PHY_82555B, fxp_media_standard, 213 sizeof(fxp_media_standard) / sizeof(fxp_media_standard[0]), 214 FXP_MEDIA_STANDARD_DEFMEDIA }, 215 { FXP_PHY_80C24, fxp_media_default, 216 sizeof(fxp_media_default) / sizeof(fxp_media_default[0]), 217 FXP_MEDIA_DEFAULT_DEFMEDIA }, 218 }; 219 #define NFXPMEDIA (sizeof(fxp_media) / sizeof(fxp_media[0])) 220 221 static int fxp_mediachange __P((struct ifnet *)); 222 static void fxp_mediastatus __P((struct ifnet *, struct ifmediareq *)); 223 void fxp_set_media __P((struct fxp_softc *, int)); 224 static __inline void fxp_scb_wait __P((struct fxp_softc *)); 225 static FXP_INTR_TYPE fxp_intr __P((void *)); 226 static void fxp_start __P((struct ifnet *)); 227 static int fxp_ioctl __P((struct ifnet *, 228 FXP_IOCTLCMD_TYPE, caddr_t)); 229 static void fxp_init __P((void *)); 230 static void fxp_stop __P((struct fxp_softc *)); 231 static void fxp_watchdog __P((struct ifnet *)); 232 static int fxp_add_rfabuf __P((struct fxp_softc *, struct mbuf *)); 233 static int fxp_mdi_read __P((struct fxp_softc *, int, int)); 234 static void fxp_mdi_write __P((struct fxp_softc *, int, int, int)); 235 static void fxp_read_eeprom __P((struct fxp_softc *, u_int16_t *, 236 int, int)); 237 static int fxp_attach_common __P((struct fxp_softc *, u_int8_t *)); 238 void fxp_stats_update __P((void *)); 239 static void fxp_mc_setup __P((struct fxp_softc *)); 240 241 /* 242 * Set initial transmit threshold at 64 (512 bytes). This is 243 * increased by 64 (512 bytes) at a time, to maximum of 192 244 * (1536 bytes), if an underrun occurs. 245 */ 246 static int tx_threshold = 64; 247 248 /* 249 * Number of transmit control blocks. This determines the number 250 * of transmit buffers that can be chained in the CB list. 251 * This must be a power of two. 252 */ 253 #define FXP_NTXCB 128 254 255 /* 256 * TxCB list index mask. This is used to do list wrap-around. 257 */ 258 #define FXP_TXCB_MASK (FXP_NTXCB - 1) 259 260 /* 261 * Number of receive frame area buffers. These are large so chose 262 * wisely. 263 */ 264 #define FXP_NRFABUFS 64 265 266 /* 267 * Maximum number of seconds that the receiver can be idle before we 268 * assume it's dead and attempt to reset it by reprogramming the 269 * multicast filter. This is part of a work-around for a bug in the 270 * NIC. See fxp_stats_update(). 271 */ 272 #define FXP_MAX_RX_IDLE 15 273 274 /* 275 * Wait for the previous command to be accepted (but not necessarily 276 * completed). 277 */ 278 static __inline void 279 fxp_scb_wait(sc) 280 struct fxp_softc *sc; 281 { 282 int i = 10000; 283 284 while (CSR_READ_1(sc, FXP_CSR_SCB_COMMAND) && --i); 285 } 286 287 /************************************************************* 288 * Operating system-specific autoconfiguration glue 289 *************************************************************/ 290 291 #if defined(__NetBSD__) 292 293 #ifdef __BROKEN_INDIRECT_CONFIG 294 static int fxp_match __P((struct device *, void *, void *)); 295 #else 296 static int fxp_match __P((struct device *, struct cfdata *, void *)); 297 #endif 298 static void fxp_attach __P((struct device *, struct device *, void *)); 299 300 static void fxp_shutdown __P((void *)); 301 302 /* Compensate for lack of a generic ether_ioctl() */ 303 static int fxp_ether_ioctl __P((struct ifnet *, 304 FXP_IOCTLCMD_TYPE, caddr_t)); 305 #define ether_ioctl fxp_ether_ioctl 306 307 struct cfattach fxp_ca = { 308 sizeof(struct fxp_softc), fxp_match, fxp_attach 309 }; 310 311 struct cfdriver fxp_cd = { 312 NULL, "fxp", DV_IFNET 313 }; 314 315 /* 316 * Check if a device is an 82557. 317 */ 318 static int 319 fxp_match(parent, match, aux) 320 struct device *parent; 321 #ifdef __BROKEN_INDIRECT_CONFIG 322 void *match; 323 #else 324 struct cfdata *match; 325 #endif 326 void *aux; 327 { 328 struct pci_attach_args *pa = aux; 329 330 if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_INTEL) 331 return (0); 332 333 switch (PCI_PRODUCT(pa->pa_id)) { 334 case PCI_PRODUCT_INTEL_82557: 335 return (1); 336 } 337 338 return (0); 339 } 340 341 static void 342 fxp_attach(parent, self, aux) 343 struct device *parent, *self; 344 void *aux; 345 { 346 struct fxp_softc *sc = (struct fxp_softc *)self; 347 struct pci_attach_args *pa = aux; 348 pci_chipset_tag_t pc = pa->pa_pc; 349 pci_intr_handle_t ih; 350 const char *intrstr = NULL; 351 u_int8_t enaddr[6]; 352 struct ifnet *ifp; 353 354 /* 355 * Map control/status registers. 356 */ 357 if (pci_mapreg_map(pa, FXP_PCI_MMBA, PCI_MAPREG_TYPE_MEM, 0, 358 &sc->sc_st, &sc->sc_sh, NULL, NULL)) { 359 printf(": can't map registers\n"); 360 return; 361 } 362 printf(": Intel EtherExpress Pro 10/100B Ethernet\n"); 363 364 /* 365 * Allocate our interrupt. 366 */ 367 if (pci_intr_map(pc, pa->pa_intrtag, pa->pa_intrpin, 368 pa->pa_intrline, &ih)) { 369 printf("%s: couldn't map interrupt\n", sc->sc_dev.dv_xname); 370 return; 371 } 372 intrstr = pci_intr_string(pc, ih); 373 sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, fxp_intr, sc); 374 if (sc->sc_ih == NULL) { 375 printf("%s: couldn't establish interrupt", 376 sc->sc_dev.dv_xname); 377 if (intrstr != NULL) 378 printf(" at %s", intrstr); 379 printf("\n"); 380 return; 381 } 382 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr); 383 384 /* Do generic parts of attach. */ 385 if (fxp_attach_common(sc, enaddr)) { 386 /* Failed! */ 387 return; 388 } 389 390 printf("%s: Ethernet address %s%s\n", sc->sc_dev.dv_xname, 391 ether_sprintf(enaddr), sc->phy_10Mbps_only ? ", 10Mbps" : ""); 392 393 ifp = &sc->sc_ethercom.ec_if; 394 bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ); 395 ifp->if_softc = sc; 396 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 397 ifp->if_ioctl = fxp_ioctl; 398 ifp->if_start = fxp_start; 399 ifp->if_watchdog = fxp_watchdog; 400 401 /* 402 * Attach the interface. 403 */ 404 if_attach(ifp); 405 ether_ifattach(ifp, enaddr); 406 #if NBPFILTER > 0 407 bpfattach(&sc->sc_ethercom.ec_if.if_bpf, ifp, DLT_EN10MB, 408 sizeof(struct ether_header)); 409 #endif 410 411 /* 412 * Add shutdown hook so that DMA is disabled prior to reboot. Not 413 * doing do could allow DMA to corrupt kernel memory during the 414 * reboot before the driver initializes. 415 */ 416 shutdownhook_establish(fxp_shutdown, sc); 417 } 418 419 /* 420 * Device shutdown routine. Called at system shutdown after sync. The 421 * main purpose of this routine is to shut off receiver DMA so that 422 * kernel memory doesn't get clobbered during warmboot. 423 */ 424 static void 425 fxp_shutdown(sc) 426 void *sc; 427 { 428 fxp_stop((struct fxp_softc *) sc); 429 } 430 431 static int 432 fxp_ether_ioctl(ifp, cmd, data) 433 struct ifnet *ifp; 434 FXP_IOCTLCMD_TYPE cmd; 435 caddr_t data; 436 { 437 struct ifaddr *ifa = (struct ifaddr *) data; 438 struct fxp_softc *sc = ifp->if_softc; 439 440 switch (cmd) { 441 case SIOCSIFADDR: 442 ifp->if_flags |= IFF_UP; 443 444 switch (ifa->ifa_addr->sa_family) { 445 #ifdef INET 446 case AF_INET: 447 fxp_init(sc); 448 arp_ifinit(ifp, ifa); 449 break; 450 #endif 451 #ifdef NS 452 case AF_NS: 453 { 454 register struct ns_addr *ina = &IA_SNS(ifa)->sns_addr; 455 456 if (ns_nullhost(*ina)) 457 ina->x_host = *(union ns_host *) 458 LLADDR(ifp->if_sadl); 459 else 460 bcopy(ina->x_host.c_host, LLADDR(ifp->if_sadl), 461 ifp->if_addrlen); 462 /* Set new address. */ 463 fxp_init(sc); 464 break; 465 } 466 #endif 467 default: 468 fxp_init(sc); 469 break; 470 } 471 break; 472 473 default: 474 return (EINVAL); 475 } 476 477 return (0); 478 } 479 480 #else /* __FreeBSD__ */ 481 482 static u_long fxp_count; 483 static char *fxp_probe __P((pcici_t, pcidi_t)); 484 static void fxp_attach __P((pcici_t, int)); 485 486 static void fxp_shutdown __P((int, void *)); 487 488 static struct pci_device fxp_device = { 489 "fxp", 490 fxp_probe, 491 fxp_attach, 492 &fxp_count, 493 NULL 494 }; 495 DATA_SET(pcidevice_set, fxp_device); 496 497 /* 498 * Return identification string if this is device is ours. 499 */ 500 static char * 501 fxp_probe(config_id, device_id) 502 pcici_t config_id; 503 pcidi_t device_id; 504 { 505 if (((device_id & 0xffff) == FXP_VENDORID_INTEL) && 506 ((device_id >> 16) & 0xffff) == FXP_DEVICEID_i82557) 507 return ("Intel EtherExpress Pro 10/100B Ethernet"); 508 509 return NULL; 510 } 511 512 static void 513 fxp_attach(config_id, unit) 514 pcici_t config_id; 515 int unit; 516 { 517 struct fxp_softc *sc; 518 vm_offset_t pbase; 519 struct ifnet *ifp; 520 int s; 521 522 sc = malloc(sizeof(struct fxp_softc), M_DEVBUF, M_NOWAIT); 523 if (sc == NULL) 524 return; 525 bzero(sc, sizeof(struct fxp_softc)); 526 527 s = splimp(); 528 529 /* 530 * Map control/status registers. 531 */ 532 if (!pci_map_mem(config_id, FXP_PCI_MMBA, 533 (vm_offset_t *)&sc->csr, &pbase)) { 534 printf("fxp%d: couldn't map memory\n", unit); 535 goto fail; 536 } 537 538 /* 539 * Allocate our interrupt. 540 */ 541 if (!pci_map_int(config_id, fxp_intr, sc, &net_imask)) { 542 printf("fxp%d: couldn't map interrupt\n", unit); 543 goto fail; 544 } 545 546 /* Do generic parts of attach. */ 547 if (fxp_attach_common(sc, sc->arpcom.ac_enaddr)) { 548 /* Failed! */ 549 (void) pci_unmap_int(config_id); 550 goto fail; 551 } 552 553 printf("fxp%d: Ethernet address %6D%s\n", unit, 554 sc->arpcom.ac_enaddr, ":", sc->phy_10Mbps_only ? ", 10Mbps" : ""); 555 556 ifp = &sc->arpcom.ac_if; 557 ifp->if_unit = unit; 558 ifp->if_name = "fxp"; 559 ifp->if_output = ether_output; 560 ifp->if_baudrate = 100000000; 561 ifp->if_init = fxp_init; 562 ifp->if_softc = sc; 563 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 564 ifp->if_ioctl = fxp_ioctl; 565 ifp->if_start = fxp_start; 566 ifp->if_watchdog = fxp_watchdog; 567 568 /* 569 * Attach the interface. 570 */ 571 if_attach(ifp); 572 ether_ifattach(ifp); 573 #if NBPFILTER > 0 574 bpfattach(ifp, DLT_EN10MB, sizeof(struct ether_header)); 575 #endif 576 577 /* 578 * Add shutdown hook so that DMA is disabled prior to reboot. Not 579 * doing do could allow DMA to corrupt kernel memory during the 580 * reboot before the driver initializes. 581 */ 582 at_shutdown(fxp_shutdown, sc, SHUTDOWN_POST_SYNC); 583 584 splx(s); 585 return; 586 587 fail: 588 free(sc, M_DEVBUF); 589 splx(s); 590 } 591 592 /* 593 * Device shutdown routine. Called at system shutdown after sync. The 594 * main purpose of this routine is to shut off receiver DMA so that 595 * kernel memory doesn't get clobbered during warmboot. 596 */ 597 static void 598 fxp_shutdown(howto, sc) 599 int howto; 600 void *sc; 601 { 602 fxp_stop((struct fxp_softc *) sc); 603 } 604 605 #endif /* __NetBSD__ */ 606 607 /************************************************************* 608 * End of operating system-specific autoconfiguration glue 609 *************************************************************/ 610 611 /* 612 * Do generic parts of attach. 613 */ 614 static int 615 fxp_attach_common(sc, enaddr) 616 struct fxp_softc *sc; 617 u_int8_t *enaddr; 618 { 619 u_int16_t data; 620 int i, nmedia, defmedia; 621 const int *media; 622 623 /* 624 * Reset to a stable state. 625 */ 626 CSR_WRITE_4(sc, FXP_CSR_PORT, FXP_PORT_SELECTIVE_RESET); 627 DELAY(10); 628 629 sc->cbl_base = malloc(sizeof(struct fxp_cb_tx) * FXP_NTXCB, 630 M_DEVBUF, M_NOWAIT); 631 if (sc->cbl_base == NULL) 632 goto fail; 633 bzero(sc->cbl_base, sizeof(struct fxp_cb_tx) * FXP_NTXCB); 634 635 sc->fxp_stats = malloc(sizeof(struct fxp_stats), M_DEVBUF, M_NOWAIT); 636 if (sc->fxp_stats == NULL) 637 goto fail; 638 bzero(sc->fxp_stats, sizeof(struct fxp_stats)); 639 640 sc->mcsp = malloc(sizeof(struct fxp_cb_mcs), M_DEVBUF, M_NOWAIT); 641 if (sc->mcsp == NULL) 642 goto fail; 643 644 /* 645 * Pre-allocate our receive buffers. 646 */ 647 for (i = 0; i < FXP_NRFABUFS; i++) { 648 if (fxp_add_rfabuf(sc, NULL) != 0) { 649 goto fail; 650 } 651 } 652 653 /* 654 * Get info about the primary PHY 655 */ 656 fxp_read_eeprom(sc, (u_int16_t *)&data, 6, 1); 657 sc->phy_primary_addr = data & 0xff; 658 sc->phy_primary_device = (data >> 8) & 0x3f; 659 sc->phy_10Mbps_only = data >> 15; 660 661 /* 662 * Read MAC address. 663 */ 664 fxp_read_eeprom(sc, (u_int16_t *)enaddr, 0, 3); 665 666 /* 667 * Initialize the media structures. 668 */ 669 670 media = fxp_media_default; 671 nmedia = sizeof(fxp_media_default) / sizeof(fxp_media_default[0]); 672 defmedia = FXP_MEDIA_DEFAULT_DEFMEDIA; 673 674 for (i = 0; i < NFXPMEDIA; i++) { 675 if (sc->phy_primary_device == fxp_media[i].fsm_phy) { 676 media = fxp_media[i].fsm_media; 677 nmedia = fxp_media[i].fsm_nmedia; 678 defmedia = fxp_media[i].fsm_defmedia; 679 } 680 } 681 682 ifmedia_init(&sc->sc_media, 0, fxp_mediachange, fxp_mediastatus); 683 for (i = 0; i < nmedia; i++) { 684 if (IFM_SUBTYPE(media[i]) == IFM_100_TX && sc->phy_10Mbps_only) 685 continue; 686 ifmedia_add(&sc->sc_media, media[i], 0, NULL); 687 } 688 ifmedia_set(&sc->sc_media, defmedia); 689 690 return (0); 691 692 fail: 693 printf(FXP_FORMAT ": Failed to malloc memory\n", FXP_ARGS(sc)); 694 if (sc->cbl_base) 695 free(sc->cbl_base, M_DEVBUF); 696 if (sc->fxp_stats) 697 free(sc->fxp_stats, M_DEVBUF); 698 if (sc->mcsp) 699 free(sc->mcsp, M_DEVBUF); 700 /* frees entire chain */ 701 if (sc->rfa_headm) 702 m_freem(sc->rfa_headm); 703 704 return (ENOMEM); 705 } 706 707 /* 708 * Read from the serial EEPROM. Basically, you manually shift in 709 * the read opcode (one bit at a time) and then shift in the address, 710 * and then you shift out the data (all of this one bit at a time). 711 * The word size is 16 bits, so you have to provide the address for 712 * every 16 bits of data. 713 */ 714 static void 715 fxp_read_eeprom(sc, data, offset, words) 716 struct fxp_softc *sc; 717 u_short *data; 718 int offset; 719 int words; 720 { 721 u_int16_t reg; 722 int i, x; 723 724 for (i = 0; i < words; i++) { 725 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, FXP_EEPROM_EECS); 726 /* 727 * Shift in read opcode. 728 */ 729 for (x = 3; x > 0; x--) { 730 if (FXP_EEPROM_OPC_READ & (1 << (x - 1))) { 731 reg = FXP_EEPROM_EECS | FXP_EEPROM_EEDI; 732 } else { 733 reg = FXP_EEPROM_EECS; 734 } 735 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg); 736 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, 737 reg | FXP_EEPROM_EESK); 738 DELAY(1); 739 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg); 740 DELAY(1); 741 } 742 /* 743 * Shift in address. 744 */ 745 for (x = 6; x > 0; x--) { 746 if ((i + offset) & (1 << (x - 1))) { 747 reg = FXP_EEPROM_EECS | FXP_EEPROM_EEDI; 748 } else { 749 reg = FXP_EEPROM_EECS; 750 } 751 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg); 752 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, 753 reg | FXP_EEPROM_EESK); 754 DELAY(1); 755 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg); 756 DELAY(1); 757 } 758 reg = FXP_EEPROM_EECS; 759 data[i] = 0; 760 /* 761 * Shift out data. 762 */ 763 for (x = 16; x > 0; x--) { 764 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, 765 reg | FXP_EEPROM_EESK); 766 DELAY(1); 767 if (CSR_READ_2(sc, FXP_CSR_EEPROMCONTROL) & 768 FXP_EEPROM_EEDO) 769 data[i] |= (1 << (x - 1)); 770 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg); 771 DELAY(1); 772 } 773 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, 0); 774 DELAY(1); 775 } 776 } 777 778 /* 779 * Start packet transmission on the interface. 780 */ 781 static void 782 fxp_start(ifp) 783 struct ifnet *ifp; 784 { 785 struct fxp_softc *sc = ifp->if_softc; 786 struct fxp_cb_tx *txp; 787 struct mbuf *m, *mb_head; 788 int segment, first = 1; 789 790 txloop: 791 /* 792 * See if we're all filled up with buffers to transmit, or 793 * if we need to suspend xmit until the multicast filter 794 * has been reprogrammed (which can only be done at the 795 * head of the command chain). 796 */ 797 if (sc->tx_queued >= FXP_NTXCB || sc->need_mcsetup) 798 return; 799 800 /* 801 * Grab a packet to transmit. 802 */ 803 IF_DEQUEUE(&ifp->if_snd, mb_head); 804 if (mb_head == NULL) { 805 /* 806 * No more packets to send. 807 */ 808 return; 809 } 810 811 /* 812 * Get pointer to next available (unused) descriptor. 813 */ 814 txp = sc->cbl_last->next; 815 816 /* 817 * Go through each of the mbufs in the chain and initialize 818 * the transmit buffers descriptors with the physical address 819 * and size of the mbuf. 820 */ 821 tbdinit: 822 for (m = mb_head, segment = 0; m != NULL; m = m->m_next) { 823 if (m->m_len != 0) { 824 if (segment == FXP_NTXSEG) 825 break; 826 txp->tbd[segment].tb_addr = 827 vtophys(mtod(m, vm_offset_t)); 828 txp->tbd[segment].tb_size = m->m_len; 829 segment++; 830 } 831 } 832 if (m != NULL) { 833 struct mbuf *mn; 834 835 /* 836 * We ran out of segments. We have to recopy this mbuf 837 * chain first. 838 */ 839 MGETHDR(mn, M_DONTWAIT, MT_DATA); 840 if (mn == NULL) { 841 m_freem(mb_head); 842 return; 843 } 844 if (mb_head->m_pkthdr.len > MHLEN) { 845 MCLGET(mn, M_DONTWAIT); 846 if ((mn->m_flags & M_EXT) == 0) { 847 m_freem(mn); 848 m_freem(mb_head); 849 return; 850 } 851 } 852 m_copydata(mb_head, 0, mb_head->m_pkthdr.len, 853 mtod(mn, caddr_t)); 854 mn->m_pkthdr.len = mn->m_len = mb_head->m_pkthdr.len; 855 m_freem(mb_head); 856 mb_head = mn; 857 goto tbdinit; 858 } 859 860 txp->tbd_number = segment; 861 txp->mb_head = mb_head; 862 863 /* 864 * Finish the initialization of this TxCB. 865 */ 866 txp->cb_status = 0; 867 txp->cb_command = 868 FXP_CB_COMMAND_XMIT | FXP_CB_COMMAND_SF | FXP_CB_COMMAND_S; 869 txp->tx_threshold = tx_threshold; 870 871 /* 872 * Advance the end-of-list forward. 873 */ 874 sc->cbl_last->cb_command &= ~FXP_CB_COMMAND_S; 875 sc->cbl_last = txp; 876 877 /* 878 * Advance the beginning of the list forward if there are 879 * no other packets queued (when nothing is queued, cbl_first 880 * sits on the last TxCB that was sent out).. 881 */ 882 if (sc->tx_queued == 0) 883 sc->cbl_first = txp; 884 885 sc->tx_queued++; 886 887 /* 888 * Only need to wait prior to the first resume command. 889 */ 890 if (first) { 891 first--; 892 fxp_scb_wait(sc); 893 } 894 895 /* 896 * Resume transmission if suspended. 897 */ 898 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_RESUME); 899 900 #if NBPFILTER > 0 901 /* 902 * Pass packet to bpf if there is a listener. 903 */ 904 if (ifp->if_bpf) 905 bpf_mtap(FXP_BPFTAP_ARG(ifp), mb_head); 906 #endif 907 /* 908 * Set a 5 second timer just in case we don't hear from the 909 * card again. 910 */ 911 ifp->if_timer = 5; 912 913 goto txloop; 914 } 915 916 /* 917 * Process interface interrupts. 918 */ 919 static FXP_INTR_TYPE 920 fxp_intr(arg) 921 void *arg; 922 { 923 struct fxp_softc *sc = arg; 924 struct ifnet *ifp = &sc->sc_if; 925 u_int8_t statack; 926 #if defined(__NetBSD__) 927 int claimed = 0; 928 #endif 929 930 while ((statack = CSR_READ_1(sc, FXP_CSR_SCB_STATACK)) != 0) { 931 #if defined(__NetBSD__) 932 claimed = 1; 933 #endif 934 /* 935 * First ACK all the interrupts in this pass. 936 */ 937 CSR_WRITE_1(sc, FXP_CSR_SCB_STATACK, statack); 938 939 /* 940 * Process receiver interrupts. If a no-resource (RNR) 941 * condition exists, get whatever packets we can and 942 * re-start the receiver. 943 */ 944 if (statack & (FXP_SCB_STATACK_FR | FXP_SCB_STATACK_RNR)) { 945 struct mbuf *m; 946 struct fxp_rfa *rfa; 947 rcvloop: 948 m = sc->rfa_headm; 949 rfa = (struct fxp_rfa *)(m->m_ext.ext_buf + 950 RFA_ALIGNMENT_FUDGE); 951 952 if (rfa->rfa_status & FXP_RFA_STATUS_C) { 953 /* 954 * Remove first packet from the chain. 955 */ 956 sc->rfa_headm = m->m_next; 957 m->m_next = NULL; 958 959 /* 960 * Add a new buffer to the receive chain. 961 * If this fails, the old buffer is recycled 962 * instead. 963 */ 964 if (fxp_add_rfabuf(sc, m) == 0) { 965 struct ether_header *eh; 966 u_int16_t total_len; 967 968 total_len = rfa->actual_size & 969 (MCLBYTES - 1); 970 if (total_len < 971 sizeof(struct ether_header)) { 972 m_freem(m); 973 goto rcvloop; 974 } 975 m->m_pkthdr.rcvif = ifp; 976 m->m_pkthdr.len = m->m_len = 977 total_len ; 978 eh = mtod(m, struct ether_header *); 979 #if NBPFILTER > 0 980 if (ifp->if_bpf) 981 bpf_tap(FXP_BPFTAP_ARG(ifp), 982 mtod(m, caddr_t), 983 total_len); 984 #endif /* NBPFILTER > 0 */ 985 #ifdef BRIDGE 986 if (do_bridge) { 987 struct ifnet *bdg_ifp ; 988 bdg_ifp = bridge_in(m); 989 if (bdg_ifp == BDG_DROP) 990 goto dropit ; 991 if (bdg_ifp != BDG_LOCAL) 992 bdg_forward(&m, bdg_ifp); 993 if (bdg_ifp != BDG_LOCAL && 994 bdg_ifp != BDG_BCAST && 995 bdg_ifp != BDG_MCAST) 996 goto dropit ; 997 goto getit ; 998 } 999 #endif 1000 /* 1001 * Only pass this packet up 1002 * if it is for us. 1003 */ 1004 if ((ifp->if_flags & 1005 IFF_PROMISC) && 1006 (rfa->rfa_status & 1007 FXP_RFA_STATUS_IAMATCH) && 1008 (eh->ether_dhost[0] & 1) 1009 == 0) { 1010 dropit: 1011 if (m) 1012 m_freem(m); 1013 goto rcvloop; 1014 } 1015 getit: 1016 m->m_data += 1017 sizeof(struct ether_header); 1018 m->m_len -= 1019 sizeof(struct ether_header); 1020 m->m_pkthdr.len = m->m_len ; 1021 ether_input(ifp, eh, m); 1022 } 1023 goto rcvloop; 1024 } 1025 if (statack & FXP_SCB_STATACK_RNR) { 1026 fxp_scb_wait(sc); 1027 CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, 1028 vtophys(sc->rfa_headm->m_ext.ext_buf) + 1029 RFA_ALIGNMENT_FUDGE); 1030 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, 1031 FXP_SCB_COMMAND_RU_START); 1032 } 1033 } 1034 /* 1035 * Free any finished transmit mbuf chains. 1036 */ 1037 if (statack & FXP_SCB_STATACK_CNA) { 1038 struct fxp_cb_tx *txp; 1039 1040 for (txp = sc->cbl_first; sc->tx_queued && 1041 (txp->cb_status & FXP_CB_STATUS_C) != 0; 1042 txp = txp->next) { 1043 if (txp->mb_head != NULL) { 1044 m_freem(txp->mb_head); 1045 txp->mb_head = NULL; 1046 } 1047 sc->tx_queued--; 1048 } 1049 sc->cbl_first = txp; 1050 if (sc->tx_queued == 0) { 1051 ifp->if_timer = 0; 1052 if (sc->need_mcsetup) 1053 fxp_mc_setup(sc); 1054 } 1055 /* 1056 * Try to start more packets transmitting. 1057 */ 1058 if (ifp->if_snd.ifq_head != NULL) 1059 fxp_start(ifp); 1060 } 1061 } 1062 #if defined(__NetBSD__) 1063 return (claimed); 1064 #endif 1065 } 1066 1067 /* 1068 * Update packet in/out/collision statistics. The i82557 doesn't 1069 * allow you to access these counters without doing a fairly 1070 * expensive DMA to get _all_ of the statistics it maintains, so 1071 * we do this operation here only once per second. The statistics 1072 * counters in the kernel are updated from the previous dump-stats 1073 * DMA and then a new dump-stats DMA is started. The on-chip 1074 * counters are zeroed when the DMA completes. If we can't start 1075 * the DMA immediately, we don't wait - we just prepare to read 1076 * them again next time. 1077 */ 1078 void 1079 fxp_stats_update(arg) 1080 void *arg; 1081 { 1082 struct fxp_softc *sc = arg; 1083 struct ifnet *ifp = &sc->sc_if; 1084 struct fxp_stats *sp = sc->fxp_stats; 1085 int s; 1086 1087 ifp->if_opackets += sp->tx_good; 1088 ifp->if_collisions += sp->tx_total_collisions; 1089 if (sp->rx_good) { 1090 ifp->if_ipackets += sp->rx_good; 1091 sc->rx_idle_secs = 0; 1092 } else { 1093 sc->rx_idle_secs++; 1094 } 1095 ifp->if_ierrors += 1096 sp->rx_crc_errors + 1097 sp->rx_alignment_errors + 1098 sp->rx_rnr_errors + 1099 sp->rx_overrun_errors; 1100 /* 1101 * If any transmit underruns occured, bump up the transmit 1102 * threshold by another 512 bytes (64 * 8). 1103 */ 1104 if (sp->tx_underruns) { 1105 ifp->if_oerrors += sp->tx_underruns; 1106 if (tx_threshold < 192) 1107 tx_threshold += 64; 1108 } 1109 s = splimp(); 1110 /* 1111 * If we haven't received any packets in FXP_MAC_RX_IDLE seconds, 1112 * then assume the receiver has locked up and attempt to clear 1113 * the condition by reprogramming the multicast filter. This is 1114 * a work-around for a bug in the 82557 where the receiver locks 1115 * up if it gets certain types of garbage in the syncronization 1116 * bits prior to the packet header. This bug is supposed to only 1117 * occur in 10Mbps mode, but has been seen to occur in 100Mbps 1118 * mode as well (perhaps due to a 10/100 speed transition). 1119 */ 1120 if (sc->rx_idle_secs > FXP_MAX_RX_IDLE) { 1121 sc->rx_idle_secs = 0; 1122 fxp_mc_setup(sc); 1123 } 1124 /* 1125 * If there is no pending command, start another stats 1126 * dump. Otherwise punt for now. 1127 */ 1128 if (CSR_READ_1(sc, FXP_CSR_SCB_COMMAND) == 0) { 1129 /* 1130 * Start another stats dump. 1131 */ 1132 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, 1133 FXP_SCB_COMMAND_CU_DUMPRESET); 1134 } else { 1135 /* 1136 * A previous command is still waiting to be accepted. 1137 * Just zero our copy of the stats and wait for the 1138 * next timer event to update them. 1139 */ 1140 sp->tx_good = 0; 1141 sp->tx_underruns = 0; 1142 sp->tx_total_collisions = 0; 1143 1144 sp->rx_good = 0; 1145 sp->rx_crc_errors = 0; 1146 sp->rx_alignment_errors = 0; 1147 sp->rx_rnr_errors = 0; 1148 sp->rx_overrun_errors = 0; 1149 } 1150 splx(s); 1151 /* 1152 * Schedule another timeout one second from now. 1153 */ 1154 timeout(fxp_stats_update, sc, hz); 1155 } 1156 1157 /* 1158 * Stop the interface. Cancels the statistics updater and resets 1159 * the interface. 1160 */ 1161 static void 1162 fxp_stop(sc) 1163 struct fxp_softc *sc; 1164 { 1165 struct ifnet *ifp = &sc->sc_if; 1166 struct fxp_cb_tx *txp; 1167 int i; 1168 1169 /* 1170 * Cancel stats updater. 1171 */ 1172 untimeout(fxp_stats_update, sc); 1173 1174 /* 1175 * Issue software reset 1176 */ 1177 CSR_WRITE_4(sc, FXP_CSR_PORT, FXP_PORT_SELECTIVE_RESET); 1178 DELAY(10); 1179 1180 /* 1181 * Release any xmit buffers. 1182 */ 1183 txp = sc->cbl_base; 1184 if (txp != NULL) { 1185 for (i = 0; i < FXP_NTXCB; i++) { 1186 if (txp[i].mb_head != NULL) { 1187 m_freem(txp[i].mb_head); 1188 txp[i].mb_head = NULL; 1189 } 1190 } 1191 } 1192 sc->tx_queued = 0; 1193 1194 /* 1195 * Free all the receive buffers then reallocate/reinitialize 1196 */ 1197 if (sc->rfa_headm != NULL) 1198 m_freem(sc->rfa_headm); 1199 sc->rfa_headm = NULL; 1200 sc->rfa_tailm = NULL; 1201 for (i = 0; i < FXP_NRFABUFS; i++) { 1202 if (fxp_add_rfabuf(sc, NULL) != 0) { 1203 /* 1204 * This "can't happen" - we're at splimp() 1205 * and we just freed all the buffers we need 1206 * above. 1207 */ 1208 panic("fxp_stop: no buffers!"); 1209 } 1210 } 1211 1212 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 1213 ifp->if_timer = 0; 1214 } 1215 1216 /* 1217 * Watchdog/transmission transmit timeout handler. Called when a 1218 * transmission is started on the interface, but no interrupt is 1219 * received before the timeout. This usually indicates that the 1220 * card has wedged for some reason. 1221 */ 1222 static void 1223 fxp_watchdog(ifp) 1224 struct ifnet *ifp; 1225 { 1226 struct fxp_softc *sc = ifp->if_softc; 1227 1228 printf(FXP_FORMAT ": device timeout\n", FXP_ARGS(sc)); 1229 ifp->if_oerrors++; 1230 1231 fxp_init(sc); 1232 } 1233 1234 static void 1235 fxp_init(xsc) 1236 void *xsc; 1237 { 1238 struct fxp_softc *sc = xsc; 1239 struct ifnet *ifp = &sc->sc_if; 1240 struct fxp_cb_config *cbp; 1241 struct fxp_cb_ias *cb_ias; 1242 struct fxp_cb_tx *txp; 1243 int i, s, prm; 1244 1245 s = splimp(); 1246 /* 1247 * Cancel any pending I/O 1248 */ 1249 fxp_stop(sc); 1250 1251 prm = (ifp->if_flags & IFF_PROMISC) ? 1 : 0; 1252 sc->promisc_mode = prm; 1253 1254 /* 1255 * Initialize base of CBL and RFA memory. Loading with zero 1256 * sets it up for regular linear addressing. 1257 */ 1258 CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, 0); 1259 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_BASE); 1260 1261 fxp_scb_wait(sc); 1262 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_RU_BASE); 1263 1264 /* 1265 * Initialize base of dump-stats buffer. 1266 */ 1267 fxp_scb_wait(sc); 1268 CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, vtophys(sc->fxp_stats)); 1269 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_DUMP_ADR); 1270 1271 /* 1272 * We temporarily use memory that contains the TxCB list to 1273 * construct the config CB. The TxCB list memory is rebuilt 1274 * later. 1275 */ 1276 cbp = (struct fxp_cb_config *) sc->cbl_base; 1277 1278 /* 1279 * This bcopy is kind of disgusting, but there are a bunch of must be 1280 * zero and must be one bits in this structure and this is the easiest 1281 * way to initialize them all to proper values. 1282 */ 1283 bcopy(fxp_cb_config_template, (void *)&cbp->cb_status, 1284 sizeof(fxp_cb_config_template)); 1285 1286 cbp->cb_status = 0; 1287 cbp->cb_command = FXP_CB_COMMAND_CONFIG | FXP_CB_COMMAND_EL; 1288 cbp->link_addr = -1; /* (no) next command */ 1289 cbp->byte_count = 22; /* (22) bytes to config */ 1290 cbp->rx_fifo_limit = 8; /* rx fifo threshold (32 bytes) */ 1291 cbp->tx_fifo_limit = 0; /* tx fifo threshold (0 bytes) */ 1292 cbp->adaptive_ifs = 0; /* (no) adaptive interframe spacing */ 1293 cbp->rx_dma_bytecount = 0; /* (no) rx DMA max */ 1294 cbp->tx_dma_bytecount = 0; /* (no) tx DMA max */ 1295 cbp->dma_bce = 0; /* (disable) dma max counters */ 1296 cbp->late_scb = 0; /* (don't) defer SCB update */ 1297 cbp->tno_int = 0; /* (disable) tx not okay interrupt */ 1298 cbp->ci_int = 0; /* interrupt on CU not active */ 1299 cbp->save_bf = prm; /* save bad frames */ 1300 cbp->disc_short_rx = !prm; /* discard short packets */ 1301 cbp->underrun_retry = 1; /* retry mode (1) on DMA underrun */ 1302 cbp->mediatype = !sc->phy_10Mbps_only; /* interface mode */ 1303 cbp->nsai = 1; /* (don't) disable source addr insert */ 1304 cbp->preamble_length = 2; /* (7 byte) preamble */ 1305 cbp->loopback = 0; /* (don't) loopback */ 1306 cbp->linear_priority = 0; /* (normal CSMA/CD operation) */ 1307 cbp->linear_pri_mode = 0; /* (wait after xmit only) */ 1308 cbp->interfrm_spacing = 6; /* (96 bits of) interframe spacing */ 1309 cbp->promiscuous = prm; /* promiscuous mode */ 1310 cbp->bcast_disable = 0; /* (don't) disable broadcasts */ 1311 cbp->crscdt = 0; /* (CRS only) */ 1312 cbp->stripping = !prm; /* truncate rx packet to byte count */ 1313 cbp->padding = 1; /* (do) pad short tx packets */ 1314 cbp->rcv_crc_xfer = 0; /* (don't) xfer CRC to host */ 1315 cbp->force_fdx = 0; /* (don't) force full duplex */ 1316 cbp->fdx_pin_en = 1; /* (enable) FDX# pin */ 1317 cbp->multi_ia = 0; /* (don't) accept multiple IAs */ 1318 cbp->mc_all = sc->all_mcasts;/* accept all multicasts */ 1319 1320 /* 1321 * Start the config command/DMA. 1322 */ 1323 fxp_scb_wait(sc); 1324 CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, vtophys(&cbp->cb_status)); 1325 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_START); 1326 /* ...and wait for it to complete. */ 1327 while (!(cbp->cb_status & FXP_CB_STATUS_C)); 1328 1329 /* 1330 * Now initialize the station address. Temporarily use the TxCB 1331 * memory area like we did above for the config CB. 1332 */ 1333 cb_ias = (struct fxp_cb_ias *) sc->cbl_base; 1334 cb_ias->cb_status = 0; 1335 cb_ias->cb_command = FXP_CB_COMMAND_IAS | FXP_CB_COMMAND_EL; 1336 cb_ias->link_addr = -1; 1337 #if defined(__NetBSD__) 1338 bcopy(LLADDR(ifp->if_sadl), (void *)cb_ias->macaddr, 6); 1339 #else 1340 bcopy(sc->arpcom.ac_enaddr, (void *)cb_ias->macaddr, 1341 sizeof(sc->arpcom.ac_enaddr)); 1342 #endif /* __NetBSD__ */ 1343 1344 /* 1345 * Start the IAS (Individual Address Setup) command/DMA. 1346 */ 1347 fxp_scb_wait(sc); 1348 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_START); 1349 /* ...and wait for it to complete. */ 1350 while (!(cb_ias->cb_status & FXP_CB_STATUS_C)); 1351 1352 /* 1353 * Initialize transmit control block (TxCB) list. 1354 */ 1355 1356 txp = sc->cbl_base; 1357 bzero(txp, sizeof(struct fxp_cb_tx) * FXP_NTXCB); 1358 for (i = 0; i < FXP_NTXCB; i++) { 1359 txp[i].cb_status = FXP_CB_STATUS_C | FXP_CB_STATUS_OK; 1360 txp[i].cb_command = FXP_CB_COMMAND_NOP; 1361 txp[i].link_addr = vtophys(&txp[(i + 1) & FXP_TXCB_MASK].cb_status); 1362 txp[i].tbd_array_addr = vtophys(&txp[i].tbd[0]); 1363 txp[i].next = &txp[(i + 1) & FXP_TXCB_MASK]; 1364 } 1365 /* 1366 * Set the suspend flag on the first TxCB and start the control 1367 * unit. It will execute the NOP and then suspend. 1368 */ 1369 txp->cb_command = FXP_CB_COMMAND_NOP | FXP_CB_COMMAND_S; 1370 sc->cbl_first = sc->cbl_last = txp; 1371 sc->tx_queued = 1; 1372 1373 fxp_scb_wait(sc); 1374 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_START); 1375 1376 /* 1377 * Initialize receiver buffer area - RFA. 1378 */ 1379 fxp_scb_wait(sc); 1380 CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, 1381 vtophys(sc->rfa_headm->m_ext.ext_buf) + RFA_ALIGNMENT_FUDGE); 1382 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_RU_START); 1383 1384 /* 1385 * Set current media. 1386 */ 1387 fxp_set_media(sc, sc->sc_media.ifm_cur->ifm_media); 1388 1389 ifp->if_flags |= IFF_RUNNING; 1390 ifp->if_flags &= ~IFF_OACTIVE; 1391 splx(s); 1392 1393 /* 1394 * Start stats updater. 1395 */ 1396 timeout(fxp_stats_update, sc, hz); 1397 } 1398 1399 void 1400 fxp_set_media(sc, media) 1401 struct fxp_softc *sc; 1402 int media; 1403 { 1404 1405 switch (sc->phy_primary_device) { 1406 case FXP_PHY_DP83840: 1407 case FXP_PHY_DP83840A: 1408 fxp_mdi_write(sc, sc->phy_primary_addr, FXP_DP83840_PCR, 1409 fxp_mdi_read(sc, sc->phy_primary_addr, FXP_DP83840_PCR) | 1410 FXP_DP83840_PCR_LED4_MODE | /* LED4 always indicates duplex */ 1411 FXP_DP83840_PCR_F_CONNECT | /* force link disconnect bypass */ 1412 FXP_DP83840_PCR_BIT10); /* XXX I have no idea */ 1413 /* fall through */ 1414 case FXP_PHY_82553A: 1415 case FXP_PHY_82553C: /* untested */ 1416 case FXP_PHY_82555: 1417 case FXP_PHY_82555B: 1418 if (IFM_SUBTYPE(media) != IFM_AUTO) { 1419 int flags; 1420 1421 flags = (IFM_SUBTYPE(media) == IFM_100_TX) ? 1422 FXP_PHY_BMCR_SPEED_100M : 0; 1423 flags |= (media & IFM_FDX) ? 1424 FXP_PHY_BMCR_FULLDUPLEX : 0; 1425 fxp_mdi_write(sc, sc->phy_primary_addr, 1426 FXP_PHY_BMCR, 1427 (fxp_mdi_read(sc, sc->phy_primary_addr, 1428 FXP_PHY_BMCR) & 1429 ~(FXP_PHY_BMCR_AUTOEN | FXP_PHY_BMCR_SPEED_100M | 1430 FXP_PHY_BMCR_FULLDUPLEX)) | flags); 1431 } else { 1432 fxp_mdi_write(sc, sc->phy_primary_addr, 1433 FXP_PHY_BMCR, 1434 (fxp_mdi_read(sc, sc->phy_primary_addr, 1435 FXP_PHY_BMCR) | FXP_PHY_BMCR_AUTOEN)); 1436 } 1437 break; 1438 /* 1439 * The Seeq 80c24 doesn't have a PHY programming interface, so do 1440 * nothing. 1441 */ 1442 case FXP_PHY_80C24: 1443 break; 1444 default: 1445 printf(FXP_FORMAT 1446 ": warning: unsupported PHY, type = %d, addr = %d\n", 1447 FXP_ARGS(sc), sc->phy_primary_device, 1448 sc->phy_primary_addr); 1449 } 1450 } 1451 1452 /* 1453 * Change media according to request. 1454 */ 1455 int 1456 fxp_mediachange(ifp) 1457 struct ifnet *ifp; 1458 { 1459 struct fxp_softc *sc = ifp->if_softc; 1460 struct ifmedia *ifm = &sc->sc_media; 1461 1462 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER) 1463 return (EINVAL); 1464 1465 fxp_set_media(sc, ifm->ifm_media); 1466 return (0); 1467 } 1468 1469 /* 1470 * Notify the world which media we're using. 1471 */ 1472 void 1473 fxp_mediastatus(ifp, ifmr) 1474 struct ifnet *ifp; 1475 struct ifmediareq *ifmr; 1476 { 1477 struct fxp_softc *sc = ifp->if_softc; 1478 int flags; 1479 1480 switch (sc->phy_primary_device) { 1481 case FXP_PHY_DP83840: 1482 case FXP_PHY_DP83840A: 1483 case FXP_PHY_82555: 1484 flags = fxp_mdi_read(sc, sc->phy_primary_addr, FXP_PHY_BMCR); 1485 ifmr->ifm_active = IFM_ETHER; 1486 if (flags & FXP_PHY_BMCR_AUTOEN) 1487 ifmr->ifm_active |= IFM_AUTO; 1488 else { 1489 if (flags & FXP_PHY_BMCR_SPEED_100M) 1490 ifmr->ifm_active |= IFM_100_TX; 1491 else 1492 ifmr->ifm_active |= IFM_10_T; 1493 1494 if (flags & FXP_PHY_BMCR_FULLDUPLEX) 1495 ifmr->ifm_active |= IFM_FDX; 1496 } 1497 break; 1498 1499 case FXP_PHY_80C24: 1500 default: 1501 ifmr->ifm_active = IFM_ETHER|IFM_MANUAL; /* XXX IFM_AUTO ? */ 1502 } 1503 } 1504 1505 /* 1506 * Add a buffer to the end of the RFA buffer list. 1507 * Return 0 if successful, 1 for failure. A failure results in 1508 * adding the 'oldm' (if non-NULL) on to the end of the list - 1509 * tossing out it's old contents and recycling it. 1510 * The RFA struct is stuck at the beginning of mbuf cluster and the 1511 * data pointer is fixed up to point just past it. 1512 */ 1513 static int 1514 fxp_add_rfabuf(sc, oldm) 1515 struct fxp_softc *sc; 1516 struct mbuf *oldm; 1517 { 1518 u_int32_t v; 1519 struct mbuf *m; 1520 struct fxp_rfa *rfa, *p_rfa; 1521 1522 MGETHDR(m, M_DONTWAIT, MT_DATA); 1523 if (m != NULL) { 1524 MCLGET(m, M_DONTWAIT); 1525 if ((m->m_flags & M_EXT) == 0) { 1526 m_freem(m); 1527 if (oldm == NULL) 1528 return 1; 1529 m = oldm; 1530 m->m_data = m->m_ext.ext_buf; 1531 } 1532 } else { 1533 if (oldm == NULL) 1534 return 1; 1535 m = oldm; 1536 m->m_data = m->m_ext.ext_buf; 1537 } 1538 1539 /* 1540 * Move the data pointer up so that the incoming data packet 1541 * will be 32-bit aligned. 1542 */ 1543 m->m_data += RFA_ALIGNMENT_FUDGE; 1544 1545 /* 1546 * Get a pointer to the base of the mbuf cluster and move 1547 * data start past it. 1548 */ 1549 rfa = mtod(m, struct fxp_rfa *); 1550 m->m_data += sizeof(struct fxp_rfa); 1551 rfa->size = MCLBYTES - sizeof(struct fxp_rfa) - RFA_ALIGNMENT_FUDGE; 1552 1553 /* 1554 * Initialize the rest of the RFA. Note that since the RFA 1555 * is misaligned, we cannot store values directly. Instead, 1556 * we use an optimized, inline copy. 1557 */ 1558 rfa->rfa_status = 0; 1559 rfa->rfa_control = FXP_RFA_CONTROL_EL; 1560 rfa->actual_size = 0; 1561 1562 v = -1; 1563 fxp_lwcopy(&v, &rfa->link_addr); 1564 fxp_lwcopy(&v, &rfa->rbd_addr); 1565 1566 /* 1567 * If there are other buffers already on the list, attach this 1568 * one to the end by fixing up the tail to point to this one. 1569 */ 1570 if (sc->rfa_headm != NULL) { 1571 p_rfa = (struct fxp_rfa *) (sc->rfa_tailm->m_ext.ext_buf + 1572 RFA_ALIGNMENT_FUDGE); 1573 sc->rfa_tailm->m_next = m; 1574 v = vtophys(rfa); 1575 fxp_lwcopy(&v, &p_rfa->link_addr); 1576 p_rfa->rfa_control &= ~FXP_RFA_CONTROL_EL; 1577 } else { 1578 sc->rfa_headm = m; 1579 } 1580 sc->rfa_tailm = m; 1581 1582 return (m == oldm); 1583 } 1584 1585 static volatile int 1586 fxp_mdi_read(sc, phy, reg) 1587 struct fxp_softc *sc; 1588 int phy; 1589 int reg; 1590 { 1591 int count = 10000; 1592 int value; 1593 1594 CSR_WRITE_4(sc, FXP_CSR_MDICONTROL, 1595 (FXP_MDI_READ << 26) | (reg << 16) | (phy << 21)); 1596 1597 while (((value = CSR_READ_4(sc, FXP_CSR_MDICONTROL)) & 0x10000000) == 0 1598 && count--) 1599 DELAY(10); 1600 1601 if (count <= 0) 1602 printf(FXP_FORMAT ": fxp_mdi_read: timed out\n", 1603 FXP_ARGS(sc)); 1604 1605 return (value & 0xffff); 1606 } 1607 1608 static void 1609 fxp_mdi_write(sc, phy, reg, value) 1610 struct fxp_softc *sc; 1611 int phy; 1612 int reg; 1613 int value; 1614 { 1615 int count = 10000; 1616 1617 CSR_WRITE_4(sc, FXP_CSR_MDICONTROL, 1618 (FXP_MDI_WRITE << 26) | (reg << 16) | (phy << 21) | 1619 (value & 0xffff)); 1620 1621 while((CSR_READ_4(sc, FXP_CSR_MDICONTROL) & 0x10000000) == 0 && 1622 count--) 1623 DELAY(10); 1624 1625 if (count <= 0) 1626 printf(FXP_FORMAT ": fxp_mdi_write: timed out\n", 1627 FXP_ARGS(sc)); 1628 } 1629 1630 static int 1631 fxp_ioctl(ifp, command, data) 1632 struct ifnet *ifp; 1633 FXP_IOCTLCMD_TYPE command; 1634 caddr_t data; 1635 { 1636 struct fxp_softc *sc = ifp->if_softc; 1637 struct ifreq *ifr = (struct ifreq *)data; 1638 int s, error = 0; 1639 1640 s = splimp(); 1641 1642 switch (command) { 1643 1644 case SIOCSIFADDR: 1645 #if !defined(__NetBSD__) 1646 case SIOCGIFADDR: 1647 case SIOCSIFMTU: 1648 #endif 1649 error = ether_ioctl(ifp, command, data); 1650 break; 1651 1652 case SIOCSIFFLAGS: 1653 sc->all_mcasts = (ifp->if_flags & IFF_ALLMULTI) ? 1 : 0; 1654 1655 /* 1656 * If interface is marked up and not running, then start it. 1657 * If it is marked down and running, stop it. 1658 * XXX If it's up then re-initialize it. This is so flags 1659 * such as IFF_PROMISC are handled. 1660 */ 1661 if (ifp->if_flags & IFF_UP) { 1662 fxp_init(sc); 1663 } else { 1664 if (ifp->if_flags & IFF_RUNNING) 1665 fxp_stop(sc); 1666 } 1667 break; 1668 1669 case SIOCADDMULTI: 1670 case SIOCDELMULTI: 1671 sc->all_mcasts = (ifp->if_flags & IFF_ALLMULTI) ? 1 : 0; 1672 1673 error = (command == SIOCADDMULTI) ? 1674 ether_addmulti(ifr, &sc->arpcom) : 1675 ether_delmulti(ifr, &sc->arpcom); 1676 1677 if (error == ENETRESET) { 1678 /* 1679 * Multicast list has changed; set the hardware 1680 * filter accordingly. 1681 */ 1682 if (!sc->all_mcasts) 1683 fxp_mc_setup(sc); 1684 /* 1685 * fxp_mc_setup() can turn on all_mcasts if we run 1686 * out of space, so check it again rather than else {}. 1687 */ 1688 if (sc->all_mcasts) 1689 fxp_init(sc); 1690 error = 0; 1691 } 1692 break; 1693 1694 case SIOCSIFMEDIA: 1695 case SIOCGIFMEDIA: 1696 error = ifmedia_ioctl(ifp, ifr, &sc->sc_media, command); 1697 break; 1698 1699 default: 1700 error = EINVAL; 1701 } 1702 (void) splx(s); 1703 return (error); 1704 } 1705 1706 /* 1707 * Program the multicast filter. 1708 * 1709 * We have an artificial restriction that the multicast setup command 1710 * must be the first command in the chain, so we take steps to ensure 1711 * that. By requiring this, it allows us to keep the performance of 1712 * the pre-initialized command ring (esp. link pointers) by not actually 1713 * inserting the mcsetup command in the ring - i.e. it's link pointer 1714 * points to the TxCB ring, but the mcsetup descriptor itself is not part 1715 * of it. We then can do 'CU_START' on the mcsetup descriptor and have it 1716 * lead into the regular TxCB ring when it completes. 1717 * 1718 * This function must be called at splimp. 1719 */ 1720 static void 1721 fxp_mc_setup(sc) 1722 struct fxp_softc *sc; 1723 { 1724 struct fxp_cb_mcs *mcsp = sc->mcsp; 1725 struct ifnet *ifp = &sc->sc_if; 1726 int nmcasts; 1727 1728 if (sc->tx_queued) { 1729 sc->need_mcsetup = 1; 1730 return; 1731 } 1732 sc->need_mcsetup = 0; 1733 1734 /* 1735 * Initialize multicast setup descriptor. 1736 */ 1737 mcsp->next = sc->cbl_base; 1738 mcsp->mb_head = NULL; 1739 mcsp->cb_status = 0; 1740 mcsp->cb_command = FXP_CB_COMMAND_MCAS | FXP_CB_COMMAND_S; 1741 mcsp->link_addr = vtophys(&sc->cbl_base->cb_status); 1742 1743 nmcasts = 0; 1744 if (!sc->all_mcasts) { 1745 struct ether_multi *enm; 1746 struct ether_multistep step; 1747 1748 ETHER_FIRST_MULTI(step, &sc->arpcom, enm); 1749 while (enm != NULL) { 1750 if (nmcasts >= MAXMCADDR || 1751 bcmp(enm->enm_addrlo, enm->enm_addrhi, 6) != 0) { 1752 sc->all_mcasts = 1; 1753 nmcasts = 0; 1754 break; 1755 } 1756 bcopy(enm->enm_addrlo, 1757 (void *) &sc->mcsp->mc_addr[nmcasts][0], 6); 1758 nmcasts++; 1759 ETHER_NEXT_MULTI(step, enm); 1760 } 1761 } 1762 mcsp->mc_cnt = nmcasts * 6; 1763 sc->cbl_first = sc->cbl_last = (struct fxp_cb_tx *) mcsp; 1764 sc->tx_queued = 1; 1765 1766 /* 1767 * Wait until command unit is not active. This should never 1768 * be the case when nothing is queued, but make sure anyway. 1769 */ 1770 while ((CSR_READ_1(sc, FXP_CSR_SCB_RUSCUS) >> 6) == 1771 FXP_SCB_CUS_ACTIVE) ; 1772 1773 /* 1774 * Start the multicast setup command. 1775 */ 1776 fxp_scb_wait(sc); 1777 CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, vtophys(&mcsp->cb_status)); 1778 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_START); 1779 1780 ifp->if_timer = 5; 1781 return; 1782 }
Cache object: 2710797dd1238a2a4c71b9d1d1503838
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