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sys/pci/if_pn.c
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1 /* 2 * Copyright (c) 1997, 1998 3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 3. All advertising materials mentioning features or use of this software 14 * must display the following acknowledgement: 15 * This product includes software developed by Bill Paul. 16 * 4. Neither the name of the author nor the names of any co-contributors 17 * may be used to endorse or promote products derived from this software 18 * without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 30 * THE POSSIBILITY OF SUCH DAMAGE. 31 * 32 * $FreeBSD$ 33 */ 34 35 /* 36 * 82c168/82c169 PNIC fast ethernet PCI NIC driver 37 * 38 * Supports various network adapters based on the Lite-On PNIC 39 * PCI network controller chip including the LinkSys LNE100TX. 40 * 41 * Written by Bill Paul <wpaul@ctr.columbia.edu> 42 * Electrical Engineering Department 43 * Columbia University, New York City 44 */ 45 46 /* 47 * The PNIC chip is a DEC tulip clone. This driver uses much of the 48 * same code from the driver for the Winbond chip (which is also a 49 * tulip clone) except for the MII, EEPROM and filter programming. 50 * 51 * Technically we could merge support for this chip into the 'de' 52 * driver, but it's such a mess that I'm afraid to go near it. 53 * 54 * The PNIC appears to support both an external MII and an internal 55 * transceiver. I think most 100Mbps implementations use a PHY attached 56 * the the MII. The LinkSys board that I have uses a Myson MTD972 57 * 100BaseTX PHY. 58 */ 59 60 #include "bpfilter.h" 61 62 #include <sys/param.h> 63 #include <sys/systm.h> 64 #include <sys/sockio.h> 65 #include <sys/mbuf.h> 66 #include <sys/malloc.h> 67 #include <sys/kernel.h> 68 #include <sys/socket.h> 69 70 #include <net/if.h> 71 #include <net/if_arp.h> 72 #include <net/ethernet.h> 73 #include <net/if_dl.h> 74 #include <net/if_media.h> 75 76 #if NBPFILTER > 0 77 #include <net/bpf.h> 78 #endif 79 80 #include <vm/vm.h> /* for vtophys */ 81 #include <vm/pmap.h> /* for vtophys */ 82 #include <machine/clock.h> /* for DELAY */ 83 #include <machine/bus_pio.h> 84 #include <machine/bus_memio.h> 85 #include <machine/bus.h> 86 87 #include <pci/pcireg.h> 88 #include <pci/pcivar.h> 89 90 #define PN_USEIOSPACE 91 92 /* #define PN_BACKGROUND_AUTONEG */ 93 94 #define PN_RX_BUG_WAR 95 96 #include <pci/if_pnreg.h> 97 98 #ifndef lint 99 static const char rcsid[] = 100 "$FreeBSD$"; 101 #endif 102 103 /* 104 * Various supported device vendors/types and their names. 105 */ 106 static struct pn_type pn_devs[] = { 107 { PN_VENDORID, PN_DEVICEID_PNIC, 108 "82c168 PNIC 10/100BaseTX" }, 109 { PN_VENDORID, PN_DEVICEID_PNIC, 110 "82c169 PNIC 10/100BaseTX" }, 111 { 0, 0, NULL } 112 }; 113 114 /* 115 * Various supported PHY vendors/types and their names. Note that 116 * this driver will work with pretty much any MII-compliant PHY, 117 * so failure to positively identify the chip is not a fatal error. 118 */ 119 120 static struct pn_type pn_phys[] = { 121 { TI_PHY_VENDORID, TI_PHY_10BT, "<TI ThunderLAN 10BT (internal)>" }, 122 { TI_PHY_VENDORID, TI_PHY_100VGPMI, "<TI TNETE211 100VG Any-LAN>" }, 123 { NS_PHY_VENDORID, NS_PHY_83840A, "<National Semiconductor DP83840A>"}, 124 { LEVEL1_PHY_VENDORID, LEVEL1_PHY_LXT970, "<Level 1 LXT970>" }, 125 { INTEL_PHY_VENDORID, INTEL_PHY_82555, "<Intel 82555>" }, 126 { SEEQ_PHY_VENDORID, SEEQ_PHY_80220, "<SEEQ 80220>" }, 127 { 0, 0, "<MII-compliant physical interface>" } 128 }; 129 130 static unsigned long pn_count = 0; 131 static const char *pn_probe __P((pcici_t, pcidi_t)); 132 static void pn_attach __P((pcici_t, int)); 133 134 static int pn_newbuf __P((struct pn_softc *, 135 struct pn_chain_onefrag *)); 136 static int pn_encap __P((struct pn_softc *, struct pn_chain *, 137 struct mbuf *)); 138 139 #ifdef PN_RX_BUG_WAR 140 static void pn_rx_bug_war __P((struct pn_softc *, 141 struct pn_chain_onefrag *)); 142 #endif 143 static void pn_rxeof __P((struct pn_softc *)); 144 static void pn_rxeoc __P((struct pn_softc *)); 145 static void pn_txeof __P((struct pn_softc *)); 146 static void pn_txeoc __P((struct pn_softc *)); 147 static void pn_intr __P((void *)); 148 static void pn_start __P((struct ifnet *)); 149 static int pn_ioctl __P((struct ifnet *, u_long, caddr_t)); 150 static void pn_init __P((void *)); 151 static void pn_stop __P((struct pn_softc *)); 152 static void pn_watchdog __P((struct ifnet *)); 153 static void pn_shutdown __P((int, void *)); 154 static int pn_ifmedia_upd __P((struct ifnet *)); 155 static void pn_ifmedia_sts __P((struct ifnet *, struct ifmediareq *)); 156 157 static void pn_eeprom_getword __P((struct pn_softc *, u_int8_t, u_int16_t *)); 158 static void pn_read_eeprom __P((struct pn_softc *, caddr_t, int, 159 int, int)); 160 static u_int16_t pn_phy_readreg __P((struct pn_softc *, int)); 161 static void pn_phy_writereg __P((struct pn_softc *, u_int16_t, u_int16_t)); 162 163 static void pn_autoneg_xmit __P((struct pn_softc *)); 164 static void pn_autoneg_mii __P((struct pn_softc *, int, int)); 165 static void pn_setmode_mii __P((struct pn_softc *, int)); 166 static void pn_getmode_mii __P((struct pn_softc *)); 167 static void pn_autoneg __P((struct pn_softc *, int, int)); 168 static void pn_setmode __P((struct pn_softc *, int)); 169 static void pn_setcfg __P((struct pn_softc *, u_int32_t)); 170 static u_int32_t pn_calchash __P((u_int8_t *)); 171 static void pn_setfilt __P((struct pn_softc *)); 172 static void pn_reset __P((struct pn_softc *)); 173 static int pn_list_rx_init __P((struct pn_softc *)); 174 static int pn_list_tx_init __P((struct pn_softc *)); 175 176 #define PN_SETBIT(sc, reg, x) \ 177 CSR_WRITE_4(sc, reg, \ 178 CSR_READ_4(sc, reg) | (x)) 179 180 #define PN_CLRBIT(sc, reg, x) \ 181 CSR_WRITE_4(sc, reg, \ 182 CSR_READ_4(sc, reg) & ~(x)) 183 184 /* 185 * Read a word of data stored in the EEPROM at address 'addr.' 186 */ 187 static void pn_eeprom_getword(sc, addr, dest) 188 struct pn_softc *sc; 189 u_int8_t addr; 190 u_int16_t *dest; 191 { 192 register int i; 193 u_int32_t r; 194 195 CSR_WRITE_4(sc, PN_SIOCTL, PN_EE_READ|addr); 196 197 for (i = 0; i < PN_TIMEOUT; i++) { 198 DELAY(1); 199 r = CSR_READ_4(sc, PN_SIO); 200 if (!(r & PN_SIO_BUSY)) { 201 *dest = (u_int16_t)(r & 0x0000FFFF); 202 return; 203 } 204 } 205 206 return; 207 208 } 209 210 /* 211 * Read a sequence of words from the EEPROM. 212 */ 213 static void pn_read_eeprom(sc, dest, off, cnt, swap) 214 struct pn_softc *sc; 215 caddr_t dest; 216 int off; 217 int cnt; 218 int swap; 219 { 220 int i; 221 u_int16_t word = 0, *ptr; 222 223 for (i = 0; i < cnt; i++) { 224 pn_eeprom_getword(sc, off + i, &word); 225 ptr = (u_int16_t *)(dest + (i * 2)); 226 if (swap) 227 *ptr = ntohs(word); 228 else 229 *ptr = word; 230 } 231 232 return; 233 } 234 235 static u_int16_t pn_phy_readreg(sc, reg) 236 struct pn_softc *sc; 237 int reg; 238 { 239 int i; 240 u_int32_t rval; 241 242 CSR_WRITE_4(sc, PN_MII, 243 PN_MII_READ | (sc->pn_phy_addr << 23) | (reg << 18)); 244 245 for (i = 0; i < PN_TIMEOUT; i++) { 246 DELAY(1); 247 rval = CSR_READ_4(sc, PN_MII); 248 if (!(rval & PN_MII_BUSY)) { 249 if ((u_int16_t)(rval & 0x0000FFFF) == 0xFFFF) 250 return(0); 251 else 252 return((u_int16_t)(rval & 0x0000FFFF)); 253 } 254 } 255 256 return(0); 257 } 258 259 static void pn_phy_writereg(sc, reg, data) 260 struct pn_softc *sc; 261 u_int16_t reg; 262 u_int16_t data; 263 { 264 int i; 265 266 CSR_WRITE_4(sc, PN_MII, 267 PN_MII_WRITE | (sc->pn_phy_addr << 23) | (reg << 18) | data); 268 269 270 for (i = 0; i < PN_TIMEOUT; i++) { 271 if (!(CSR_READ_4(sc, PN_MII) & PN_MII_BUSY)) 272 break; 273 } 274 275 return; 276 } 277 278 #define PN_POLY 0xEDB88320 279 #define PN_BITS 9 280 281 static u_int32_t pn_calchash(addr) 282 u_int8_t *addr; 283 { 284 u_int32_t idx, bit, data, crc; 285 286 /* Compute CRC for the address value. */ 287 crc = 0xFFFFFFFF; /* initial value */ 288 289 for (idx = 0; idx < 6; idx++) { 290 for (data = *addr++, bit = 0; bit < 8; bit++, data >>= 1) 291 crc = (crc >> 1) ^ (((crc ^ data) & 1) ? PN_POLY : 0); 292 } 293 294 return (crc & ((1 << PN_BITS) - 1)); 295 } 296 297 /* 298 * Initiate an autonegotiation session. 299 */ 300 static void pn_autoneg_xmit(sc) 301 struct pn_softc *sc; 302 { 303 u_int16_t phy_sts; 304 305 pn_phy_writereg(sc, PHY_BMCR, PHY_BMCR_RESET); 306 DELAY(500); 307 while(pn_phy_readreg(sc, PHY_BMCR) 308 & PHY_BMCR_RESET); 309 310 phy_sts = pn_phy_readreg(sc, PHY_BMCR); 311 phy_sts |= PHY_BMCR_AUTONEGENBL|PHY_BMCR_AUTONEGRSTR; 312 pn_phy_writereg(sc, PHY_BMCR, phy_sts); 313 314 return; 315 } 316 317 /* 318 * Invoke autonegotiation on a PHY. 319 */ 320 static void pn_autoneg_mii(sc, flag, verbose) 321 struct pn_softc *sc; 322 int flag; 323 int verbose; 324 { 325 u_int16_t phy_sts = 0, media, advert, ability; 326 struct ifnet *ifp; 327 struct ifmedia *ifm; 328 329 ifm = &sc->ifmedia; 330 ifp = &sc->arpcom.ac_if; 331 332 ifm->ifm_media = IFM_ETHER | IFM_AUTO; 333 334 /* 335 * The 100baseT4 PHY on the 3c905-T4 has the 'autoneg supported' 336 * bit cleared in the status register, but has the 'autoneg enabled' 337 * bit set in the control register. This is a contradiction, and 338 * I'm not sure how to handle it. If you want to force an attempt 339 * to autoneg for 100baseT4 PHYs, #define FORCE_AUTONEG_TFOUR 340 * and see what happens. 341 */ 342 #ifndef FORCE_AUTONEG_TFOUR 343 /* 344 * First, see if autoneg is supported. If not, there's 345 * no point in continuing. 346 */ 347 phy_sts = pn_phy_readreg(sc, PHY_BMSR); 348 if (!(phy_sts & PHY_BMSR_CANAUTONEG)) { 349 if (verbose) 350 printf("pn%d: autonegotiation not supported\n", 351 sc->pn_unit); 352 ifm->ifm_media = IFM_ETHER|IFM_10_T|IFM_HDX; 353 return; 354 } 355 #endif 356 357 switch (flag) { 358 case PN_FLAG_FORCEDELAY: 359 /* 360 * XXX Never use this option anywhere but in the probe 361 * routine: making the kernel stop dead in its tracks 362 * for three whole seconds after we've gone multi-user 363 * is really bad manners. 364 */ 365 pn_autoneg_xmit(sc); 366 DELAY(5000000); 367 break; 368 case PN_FLAG_SCHEDDELAY: 369 /* 370 * Wait for the transmitter to go idle before starting 371 * an autoneg session, otherwise pn_start() may clobber 372 * our timeout, and we don't want to allow transmission 373 * during an autoneg session since that can screw it up. 374 */ 375 if (sc->pn_cdata.pn_tx_head != NULL) { 376 sc->pn_want_auto = 1; 377 return; 378 } 379 pn_autoneg_xmit(sc); 380 ifp->if_timer = 5; 381 sc->pn_autoneg = 1; 382 sc->pn_want_auto = 0; 383 return; 384 break; 385 case PN_FLAG_DELAYTIMEO: 386 ifp->if_timer = 0; 387 sc->pn_autoneg = 0; 388 break; 389 default: 390 printf("pn%d: invalid autoneg flag: %d\n", sc->pn_unit, flag); 391 return; 392 } 393 394 if (pn_phy_readreg(sc, PHY_BMSR) & PHY_BMSR_AUTONEGCOMP) { 395 if (verbose) 396 printf("pn%d: autoneg complete, ", sc->pn_unit); 397 phy_sts = pn_phy_readreg(sc, PHY_BMSR); 398 } else { 399 if (verbose) 400 printf("pn%d: autoneg not complete, ", sc->pn_unit); 401 } 402 403 media = pn_phy_readreg(sc, PHY_BMCR); 404 405 /* Link is good. Report modes and set duplex mode. */ 406 if (pn_phy_readreg(sc, PHY_BMSR) & PHY_BMSR_LINKSTAT) { 407 if (verbose) 408 printf("link status good "); 409 advert = pn_phy_readreg(sc, PHY_ANAR); 410 ability = pn_phy_readreg(sc, PHY_LPAR); 411 412 if (advert & PHY_ANAR_100BT4 && ability & PHY_ANAR_100BT4) { 413 ifm->ifm_media = IFM_ETHER|IFM_100_T4; 414 media |= PHY_BMCR_SPEEDSEL; 415 media &= ~PHY_BMCR_DUPLEX; 416 printf("(100baseT4)\n"); 417 } else if (advert & PHY_ANAR_100BTXFULL && 418 ability & PHY_ANAR_100BTXFULL) { 419 ifm->ifm_media = IFM_ETHER|IFM_100_TX|IFM_FDX; 420 media |= PHY_BMCR_SPEEDSEL; 421 media |= PHY_BMCR_DUPLEX; 422 printf("(full-duplex, 100Mbps)\n"); 423 } else if (advert & PHY_ANAR_100BTXHALF && 424 ability & PHY_ANAR_100BTXHALF) { 425 ifm->ifm_media = IFM_ETHER|IFM_100_TX|IFM_HDX; 426 media |= PHY_BMCR_SPEEDSEL; 427 media &= ~PHY_BMCR_DUPLEX; 428 printf("(half-duplex, 100Mbps)\n"); 429 } else if (advert & PHY_ANAR_10BTFULL && 430 ability & PHY_ANAR_10BTFULL) { 431 ifm->ifm_media = IFM_ETHER|IFM_10_T|IFM_FDX; 432 media &= ~PHY_BMCR_SPEEDSEL; 433 media |= PHY_BMCR_DUPLEX; 434 printf("(full-duplex, 10Mbps)\n"); 435 } else if (advert & PHY_ANAR_10BTHALF && 436 ability & PHY_ANAR_10BTHALF) { 437 ifm->ifm_media = IFM_ETHER|IFM_10_T|IFM_HDX; 438 media &= ~PHY_BMCR_SPEEDSEL; 439 media &= ~PHY_BMCR_DUPLEX; 440 printf("(half-duplex, 10Mbps)\n"); 441 } 442 443 media &= ~PHY_BMCR_AUTONEGENBL; 444 445 /* Set ASIC's duplex mode to match the PHY. */ 446 pn_setcfg(sc, ifm->ifm_media); 447 pn_phy_writereg(sc, PHY_BMCR, media); 448 } else { 449 if (verbose) 450 printf("no carrier\n"); 451 } 452 453 pn_init(sc); 454 455 if (sc->pn_tx_pend) { 456 sc->pn_autoneg = 0; 457 sc->pn_tx_pend = 0; 458 pn_start(ifp); 459 } 460 461 return; 462 } 463 464 static void pn_getmode_mii(sc) 465 struct pn_softc *sc; 466 { 467 u_int16_t bmsr; 468 struct ifnet *ifp; 469 470 ifp = &sc->arpcom.ac_if; 471 472 bmsr = pn_phy_readreg(sc, PHY_BMSR); 473 if (bootverbose) 474 printf("pn%d: PHY status word: %x\n", sc->pn_unit, bmsr); 475 476 /* fallback */ 477 sc->ifmedia.ifm_media = IFM_ETHER|IFM_10_T|IFM_HDX; 478 479 if (bmsr & PHY_BMSR_10BTHALF) { 480 if (bootverbose) 481 printf("pn%d: 10Mbps half-duplex mode supported\n", 482 sc->pn_unit); 483 ifmedia_add(&sc->ifmedia, 484 IFM_ETHER|IFM_10_T|IFM_HDX, 0, NULL); 485 ifmedia_add(&sc->ifmedia, IFM_ETHER|IFM_10_T, 0, NULL); 486 } 487 488 if (bmsr & PHY_BMSR_10BTFULL) { 489 if (bootverbose) 490 printf("pn%d: 10Mbps full-duplex mode supported\n", 491 sc->pn_unit); 492 ifmedia_add(&sc->ifmedia, 493 IFM_ETHER|IFM_10_T|IFM_FDX, 0, NULL); 494 sc->ifmedia.ifm_media = IFM_ETHER|IFM_10_T|IFM_FDX; 495 } 496 497 if (bmsr & PHY_BMSR_100BTXHALF) { 498 if (bootverbose) 499 printf("pn%d: 100Mbps half-duplex mode supported\n", 500 sc->pn_unit); 501 ifp->if_baudrate = 100000000; 502 ifmedia_add(&sc->ifmedia, IFM_ETHER|IFM_100_TX, 0, NULL); 503 ifmedia_add(&sc->ifmedia, 504 IFM_ETHER|IFM_100_TX|IFM_HDX, 0, NULL); 505 sc->ifmedia.ifm_media = IFM_ETHER|IFM_100_TX|IFM_HDX; 506 } 507 508 if (bmsr & PHY_BMSR_100BTXFULL) { 509 if (bootverbose) 510 printf("pn%d: 100Mbps full-duplex mode supported\n", 511 sc->pn_unit); 512 ifp->if_baudrate = 100000000; 513 ifmedia_add(&sc->ifmedia, 514 IFM_ETHER|IFM_100_TX|IFM_FDX, 0, NULL); 515 sc->ifmedia.ifm_media = IFM_ETHER|IFM_100_TX|IFM_FDX; 516 } 517 518 /* Some also support 100BaseT4. */ 519 if (bmsr & PHY_BMSR_100BT4) { 520 if (bootverbose) 521 printf("pn%d: 100baseT4 mode supported\n", sc->pn_unit); 522 ifp->if_baudrate = 100000000; 523 ifmedia_add(&sc->ifmedia, IFM_ETHER|IFM_100_T4, 0, NULL); 524 sc->ifmedia.ifm_media = IFM_ETHER|IFM_100_T4; 525 #ifdef FORCE_AUTONEG_TFOUR 526 if (bootverbose) 527 printf("pn%d: forcing on autoneg support for BT4\n", 528 sc->pn_unit); 529 ifmedia_add(&sc->ifmedia, IFM_ETHER|IFM_AUTO, 0 NULL): 530 sc->ifmedia.ifm_media = IFM_ETHER|IFM_AUTO; 531 #endif 532 } 533 534 if (bmsr & PHY_BMSR_CANAUTONEG) { 535 if (bootverbose) 536 printf("pn%d: autoneg supported\n", sc->pn_unit); 537 ifmedia_add(&sc->ifmedia, IFM_ETHER|IFM_AUTO, 0, NULL); 538 sc->ifmedia.ifm_media = IFM_ETHER|IFM_AUTO; 539 } 540 541 return; 542 } 543 544 static void pn_autoneg(sc, flag, verbose) 545 struct pn_softc *sc; 546 int flag; 547 int verbose; 548 { 549 u_int32_t nway = 0, ability; 550 struct ifnet *ifp; 551 struct ifmedia *ifm; 552 553 ifm = &sc->ifmedia; 554 ifp = &sc->arpcom.ac_if; 555 556 ifm->ifm_media = IFM_ETHER | IFM_AUTO; 557 558 switch (flag) { 559 case PN_FLAG_FORCEDELAY: 560 /* 561 * XXX Never use this option anywhere but in the probe 562 * routine: making the kernel stop dead in its tracks 563 * for three whole seconds after we've gone multi-user 564 * is really bad manners. 565 */ 566 CSR_WRITE_4(sc, PN_GEN, 567 PN_GEN_MUSTBEONE|PN_GEN_100TX_LOOP); 568 PN_CLRBIT(sc, PN_NWAY, PN_NWAY_AUTONEGRSTR); 569 PN_SETBIT(sc, PN_NWAY, PN_NWAY_AUTOENB); 570 DELAY(5000000); 571 break; 572 case PN_FLAG_SCHEDDELAY: 573 /* 574 * Wait for the transmitter to go idle before starting 575 * an autoneg session, otherwise pn_start() may clobber 576 * our timeout, and we don't want to allow transmission 577 * during an autoneg session since that can screw it up. 578 */ 579 if (sc->pn_cdata.pn_tx_head != NULL) { 580 sc->pn_want_auto = 1; 581 return; 582 } 583 CSR_WRITE_4(sc, PN_GEN, 584 PN_GEN_MUSTBEONE|PN_GEN_100TX_LOOP); 585 PN_CLRBIT(sc, PN_NWAY, PN_NWAY_AUTONEGRSTR); 586 PN_SETBIT(sc, PN_NWAY, PN_NWAY_AUTOENB); 587 ifp->if_timer = 5; 588 sc->pn_autoneg = 1; 589 sc->pn_want_auto = 0; 590 return; 591 break; 592 case PN_FLAG_DELAYTIMEO: 593 ifp->if_timer = 0; 594 sc->pn_autoneg = 0; 595 break; 596 default: 597 printf("pn%d: invalid autoneg flag: %d\n", sc->pn_unit, flag); 598 return; 599 } 600 601 if (CSR_READ_4(sc, PN_NWAY) & PN_NWAY_LPAR) { 602 if (verbose) 603 printf("pn%d: autoneg complete, ", sc->pn_unit); 604 } else { 605 if (verbose) 606 printf("pn%d: autoneg not complete, ", sc->pn_unit); 607 } 608 609 /* Link is good. Report modes and set duplex mode. */ 610 if (CSR_READ_4(sc, PN_ISR) & PN_ISR_LINKPASS) { 611 if (verbose) 612 printf("link status good "); 613 614 ability = CSR_READ_4(sc, PN_NWAY); 615 if (ability & PN_NWAY_LPAR100T4) { 616 ifm->ifm_media = IFM_ETHER|IFM_100_T4; 617 nway = PN_NWAY_MODE_100T4; 618 printf("(100baseT4)\n"); 619 } else if (ability & PN_NWAY_LPAR100FULL) { 620 ifm->ifm_media = IFM_ETHER|IFM_100_TX|IFM_FDX; 621 nway = PN_NWAY_MODE_100FD; 622 printf("(full-duplex, 100Mbps)\n"); 623 } else if (ability & PN_NWAY_LPAR100HALF) { 624 ifm->ifm_media = IFM_ETHER|IFM_100_TX|IFM_HDX; 625 nway = PN_NWAY_MODE_100HD; 626 printf("(half-duplex, 100Mbps)\n"); 627 } else if (ability & PN_NWAY_LPAR10FULL) { 628 ifm->ifm_media = IFM_ETHER|IFM_10_T|IFM_FDX; 629 nway = PN_NWAY_MODE_10FD; 630 printf("(full-duplex, 10Mbps)\n"); 631 } else if (ability & PN_NWAY_LPAR10HALF) { 632 ifm->ifm_media = IFM_ETHER|IFM_10_T|IFM_HDX; 633 nway = PN_NWAY_MODE_10HD; 634 printf("(half-duplex, 10Mbps)\n"); 635 } 636 637 /* Set ASIC's duplex mode to match the PHY. */ 638 pn_setcfg(sc, ifm->ifm_media); 639 CSR_WRITE_4(sc, PN_NWAY, nway); 640 } else { 641 if (verbose) 642 printf("no carrier\n"); 643 } 644 645 pn_init(sc); 646 647 if (sc->pn_tx_pend) { 648 sc->pn_autoneg = 0; 649 sc->pn_tx_pend = 0; 650 pn_start(ifp); 651 } 652 653 return; 654 } 655 656 static void pn_setmode(sc, media) 657 struct pn_softc *sc; 658 int media; 659 { 660 struct ifnet *ifp; 661 662 ifp = &sc->arpcom.ac_if; 663 664 /* 665 * If an autoneg session is in progress, stop it. 666 */ 667 if (sc->pn_autoneg) { 668 printf("pn%d: canceling autoneg session\n", sc->pn_unit); 669 ifp->if_timer = sc->pn_autoneg = sc->pn_want_auto = 0; 670 PN_CLRBIT(sc, PN_NWAY, PN_NWAY_AUTONEGRSTR); 671 } 672 673 printf("pn%d: selecting NWAY, ", sc->pn_unit); 674 675 if (IFM_SUBTYPE(media) == IFM_100_T4) { 676 printf("100Mbps/T4, half-duplex\n"); 677 } 678 679 if (IFM_SUBTYPE(media) == IFM_100_TX) { 680 printf("100Mbps, "); 681 } 682 683 if (IFM_SUBTYPE(media) == IFM_10_T) { 684 printf("10Mbps, "); 685 } 686 687 if ((media & IFM_GMASK) == IFM_FDX) { 688 printf("full duplex\n"); 689 } else { 690 printf("half duplex\n"); 691 } 692 693 pn_setcfg(sc, media); 694 695 return; 696 } 697 698 static void pn_setmode_mii(sc, media) 699 struct pn_softc *sc; 700 int media; 701 { 702 u_int16_t bmcr; 703 struct ifnet *ifp; 704 705 ifp = &sc->arpcom.ac_if; 706 707 /* 708 * If an autoneg session is in progress, stop it. 709 */ 710 if (sc->pn_autoneg) { 711 printf("pn%d: canceling autoneg session\n", sc->pn_unit); 712 ifp->if_timer = sc->pn_autoneg = sc->pn_want_auto = 0; 713 bmcr = pn_phy_readreg(sc, PHY_BMCR); 714 bmcr &= ~PHY_BMCR_AUTONEGENBL; 715 pn_phy_writereg(sc, PHY_BMCR, bmcr); 716 } 717 718 printf("pn%d: selecting MII, ", sc->pn_unit); 719 720 bmcr = pn_phy_readreg(sc, PHY_BMCR); 721 722 bmcr &= ~(PHY_BMCR_AUTONEGENBL|PHY_BMCR_SPEEDSEL| 723 PHY_BMCR_DUPLEX|PHY_BMCR_LOOPBK); 724 725 if (IFM_SUBTYPE(media) == IFM_100_T4) { 726 printf("100Mbps/T4, half-duplex\n"); 727 bmcr |= PHY_BMCR_SPEEDSEL; 728 bmcr &= ~PHY_BMCR_DUPLEX; 729 } 730 731 if (IFM_SUBTYPE(media) == IFM_100_TX) { 732 printf("100Mbps, "); 733 bmcr |= PHY_BMCR_SPEEDSEL; 734 } 735 736 if (IFM_SUBTYPE(media) == IFM_10_T) { 737 printf("10Mbps, "); 738 bmcr &= ~PHY_BMCR_SPEEDSEL; 739 } 740 741 if ((media & IFM_GMASK) == IFM_FDX) { 742 printf("full duplex\n"); 743 bmcr |= PHY_BMCR_DUPLEX; 744 } else { 745 printf("half duplex\n"); 746 bmcr &= ~PHY_BMCR_DUPLEX; 747 } 748 749 pn_setcfg(sc, media); 750 pn_phy_writereg(sc, PHY_BMCR, bmcr); 751 752 return; 753 } 754 755 /* 756 * Programming the receiver filter on the tulip/PNIC is gross. You 757 * have to construct a special setup frame and download it to the 758 * chip via the transmit DMA engine. This routine is also somewhat 759 * gross, as the setup frame is sent synchronously rather than putting 760 * on the transmit queue. The transmitter has to be stopped, then we 761 * can download the frame and wait for the 'owned' bit to clear. 762 * 763 * We always program the chip using 'hash perfect' mode, i.e. one perfect 764 * address (our node address) and a 512-bit hash filter for multicast 765 * frames. We also sneak the broadcast address into the hash filter since 766 * we need that too. 767 */ 768 void pn_setfilt(sc) 769 struct pn_softc *sc; 770 { 771 struct pn_desc *sframe; 772 u_int32_t h, *sp; 773 struct ifmultiaddr *ifma; 774 struct ifnet *ifp; 775 int i; 776 777 ifp = &sc->arpcom.ac_if; 778 779 PN_CLRBIT(sc, PN_NETCFG, PN_NETCFG_TX_ON); 780 PN_SETBIT(sc, PN_ISR, PN_ISR_TX_IDLE); 781 782 sframe = &sc->pn_cdata.pn_sframe; 783 sp = (u_int32_t *)&sc->pn_cdata.pn_sbuf; 784 bzero((char *)sp, PN_SFRAME_LEN); 785 786 sframe->pn_status = PN_TXSTAT_OWN; 787 sframe->pn_next = vtophys(&sc->pn_ldata->pn_tx_list[0]); 788 sframe->pn_data = vtophys(&sc->pn_cdata.pn_sbuf); 789 sframe->pn_ctl = PN_SFRAME_LEN | PN_TXCTL_TLINK | 790 PN_TXCTL_SETUP | PN_FILTER_HASHPERF; 791 792 /* If we want promiscuous mode, set the allframes bit. */ 793 if (ifp->if_flags & IFF_PROMISC) 794 PN_SETBIT(sc, PN_NETCFG, PN_NETCFG_RX_PROMISC); 795 else 796 PN_CLRBIT(sc, PN_NETCFG, PN_NETCFG_RX_PROMISC); 797 798 if (ifp->if_flags & IFF_ALLMULTI) 799 PN_SETBIT(sc, PN_NETCFG, PN_NETCFG_RX_ALLMULTI); 800 801 for (ifma = ifp->if_multiaddrs.lh_first; ifma != NULL; 802 ifma = ifma->ifma_link.le_next) { 803 if (ifma->ifma_addr->sa_family != AF_LINK) 804 continue; 805 h = pn_calchash(LLADDR((struct sockaddr_dl *)ifma->ifma_addr)); 806 sp[h >> 4] |= 1 << (h & 0xF); 807 } 808 809 if (ifp->if_flags & IFF_BROADCAST) { 810 h = pn_calchash(etherbroadcastaddr); 811 sp[h >> 4] |= 1 << (h & 0xF); 812 } 813 814 sp[39] = ((u_int16_t *)sc->arpcom.ac_enaddr)[0]; 815 sp[40] = ((u_int16_t *)sc->arpcom.ac_enaddr)[1]; 816 sp[41] = ((u_int16_t *)sc->arpcom.ac_enaddr)[2]; 817 818 CSR_WRITE_4(sc, PN_TXADDR, vtophys(sframe)); 819 PN_SETBIT(sc, PN_NETCFG, PN_NETCFG_TX_ON); 820 CSR_WRITE_4(sc, PN_TXSTART, 0xFFFFFFFF); 821 822 /* 823 * Wait for chip to clear the 'own' bit. 824 */ 825 for (i = 0; i < PN_TIMEOUT; i++) { 826 DELAY(10); 827 if (sframe->pn_status != PN_TXSTAT_OWN) 828 break; 829 } 830 831 if (i == PN_TIMEOUT) 832 printf("pn%d: failed to send setup frame\n", sc->pn_unit); 833 834 PN_SETBIT(sc, PN_ISR, PN_ISR_TX_NOBUF|PN_ISR_TX_IDLE); 835 836 return; 837 } 838 839 /* 840 * In order to fiddle with the 841 * 'full-duplex' and '100Mbps' bits in the netconfig register, we 842 * first have to put the transmit and/or receive logic in the idle state. 843 */ 844 static void pn_setcfg(sc, media) 845 struct pn_softc *sc; 846 u_int32_t media; 847 { 848 int i, restart = 0; 849 850 if (CSR_READ_4(sc, PN_NETCFG) & (PN_NETCFG_TX_ON|PN_NETCFG_RX_ON)) { 851 restart = 1; 852 PN_CLRBIT(sc, PN_NETCFG, (PN_NETCFG_TX_ON|PN_NETCFG_RX_ON)); 853 854 for (i = 0; i < PN_TIMEOUT; i++) { 855 DELAY(10); 856 if ((CSR_READ_4(sc, PN_ISR) & PN_ISR_TX_IDLE) && 857 (CSR_READ_4(sc, PN_ISR) & PN_ISR_RX_IDLE)) 858 break; 859 } 860 861 if (i == PN_TIMEOUT) 862 printf("pn%d: failed to force tx and " 863 "rx to idle state\n", sc->pn_unit); 864 865 } 866 867 if (IFM_SUBTYPE(media) == IFM_100_TX) { 868 PN_CLRBIT(sc, PN_NETCFG, PN_NETCFG_SPEEDSEL); 869 if (sc->pn_pinfo == NULL) { 870 CSR_WRITE_4(sc, PN_GEN, PN_GEN_MUSTBEONE| 871 PN_GEN_SPEEDSEL|PN_GEN_100TX_LOOP); 872 PN_SETBIT(sc, PN_NETCFG, PN_NETCFG_PCS| 873 PN_NETCFG_SCRAMBLER|PN_NETCFG_MIIENB); 874 PN_SETBIT(sc, PN_NWAY, PN_NWAY_SPEEDSEL); 875 } 876 } else { 877 PN_SETBIT(sc, PN_NETCFG, PN_NETCFG_SPEEDSEL); 878 if (sc->pn_pinfo == NULL) { 879 CSR_WRITE_4(sc, PN_GEN, 880 PN_GEN_MUSTBEONE|PN_GEN_100TX_LOOP); 881 PN_CLRBIT(sc, PN_NETCFG, PN_NETCFG_PCS| 882 PN_NETCFG_SCRAMBLER|PN_NETCFG_MIIENB); 883 PN_CLRBIT(sc, PN_NWAY, PN_NWAY_SPEEDSEL); 884 } 885 } 886 887 if ((media & IFM_GMASK) == IFM_FDX) { 888 PN_SETBIT(sc, PN_NETCFG, PN_NETCFG_FULLDUPLEX); 889 if (sc->pn_pinfo == NULL) 890 PN_SETBIT(sc, PN_NWAY, PN_NWAY_DUPLEX); 891 } else { 892 PN_CLRBIT(sc, PN_NETCFG, PN_NETCFG_FULLDUPLEX); 893 if (sc->pn_pinfo == NULL) 894 PN_CLRBIT(sc, PN_NWAY, PN_NWAY_DUPLEX); 895 } 896 897 if (restart) 898 PN_SETBIT(sc, PN_NETCFG, PN_NETCFG_TX_ON|PN_NETCFG_RX_ON); 899 900 return; 901 } 902 903 static void pn_reset(sc) 904 struct pn_softc *sc; 905 { 906 register int i; 907 908 PN_SETBIT(sc, PN_BUSCTL, PN_BUSCTL_RESET); 909 910 for (i = 0; i < PN_TIMEOUT; i++) { 911 DELAY(10); 912 if (!(CSR_READ_4(sc, PN_BUSCTL) & PN_BUSCTL_RESET)) 913 break; 914 } 915 if (i == PN_TIMEOUT) 916 printf("pn%d: reset never completed!\n", sc->pn_unit); 917 918 /* Wait a little while for the chip to get its brains in order. */ 919 DELAY(1000); 920 return; 921 } 922 923 /* 924 * Probe for a Lite-On PNIC chip. Check the PCI vendor and device 925 * IDs against our list and return a device name if we find a match. 926 */ 927 static const char * 928 pn_probe(config_id, device_id) 929 pcici_t config_id; 930 pcidi_t device_id; 931 { 932 struct pn_type *t; 933 u_int32_t rev; 934 935 t = pn_devs; 936 937 while(t->pn_name != NULL) { 938 if ((device_id & 0xFFFF) == t->pn_vid && 939 ((device_id >> 16) & 0xFFFF) == t->pn_did) { 940 if (t->pn_did == PN_DEVICEID_PNIC) { 941 rev = pci_conf_read(config_id, 942 PN_PCI_REVISION) & 0xFF; 943 switch(rev & PN_REVMASK) { 944 case PN_REVID_82C168: 945 return(t->pn_name); 946 break; 947 case PN_REVID_82C169: 948 t++; 949 return(t->pn_name); 950 default: 951 printf("unknown PNIC rev: %x\n", rev); 952 break; 953 } 954 } 955 return(t->pn_name); 956 } 957 t++; 958 } 959 960 return(NULL); 961 } 962 963 /* 964 * Attach the interface. Allocate softc structures, do ifmedia 965 * setup and ethernet/BPF attach. 966 */ 967 static void 968 pn_attach(config_id, unit) 969 pcici_t config_id; 970 int unit; 971 { 972 int s, i; 973 #ifndef PN_USEIOSPACE 974 vm_offset_t pbase, vbase; 975 #endif 976 u_char eaddr[ETHER_ADDR_LEN]; 977 u_int32_t command; 978 struct pn_softc *sc; 979 struct ifnet *ifp; 980 int media = IFM_ETHER|IFM_100_TX|IFM_FDX; 981 unsigned int round; 982 caddr_t roundptr; 983 struct pn_type *p; 984 u_int16_t phy_vid, phy_did, phy_sts; 985 #ifdef PN_RX_BUG_WAR 986 u_int32_t revision = 0; 987 #endif 988 989 s = splimp(); 990 991 sc = malloc(sizeof(struct pn_softc), M_DEVBUF, M_NOWAIT); 992 if (sc == NULL) { 993 printf("pn%d: no memory for softc struct!\n", unit); 994 return; 995 } 996 bzero(sc, sizeof(struct pn_softc)); 997 998 /* 999 * Handle power management nonsense. 1000 */ 1001 1002 command = pci_conf_read(config_id, PN_PCI_CAPID) & 0x000000FF; 1003 if (command == 0x01) { 1004 1005 command = pci_conf_read(config_id, PN_PCI_PWRMGMTCTRL); 1006 if (command & PN_PSTATE_MASK) { 1007 u_int32_t iobase, membase, irq; 1008 1009 /* Save important PCI config data. */ 1010 iobase = pci_conf_read(config_id, PN_PCI_LOIO); 1011 membase = pci_conf_read(config_id, PN_PCI_LOMEM); 1012 irq = pci_conf_read(config_id, PN_PCI_INTLINE); 1013 1014 /* Reset the power state. */ 1015 printf("pn%d: chip is in D%d power mode " 1016 "-- setting to D0\n", unit, command & PN_PSTATE_MASK); 1017 command &= 0xFFFFFFFC; 1018 pci_conf_write(config_id, PN_PCI_PWRMGMTCTRL, command); 1019 1020 /* Restore PCI config data. */ 1021 pci_conf_write(config_id, PN_PCI_LOIO, iobase); 1022 pci_conf_write(config_id, PN_PCI_LOMEM, membase); 1023 pci_conf_write(config_id, PN_PCI_INTLINE, irq); 1024 } 1025 } 1026 1027 /* 1028 * Map control/status registers. 1029 */ 1030 command = pci_conf_read(config_id, PCI_COMMAND_STATUS_REG); 1031 command |= (PCIM_CMD_PORTEN|PCIM_CMD_MEMEN|PCIM_CMD_BUSMASTEREN); 1032 pci_conf_write(config_id, PCI_COMMAND_STATUS_REG, command); 1033 command = pci_conf_read(config_id, PCI_COMMAND_STATUS_REG); 1034 1035 #ifdef PN_USEIOSPACE 1036 if (!(command & PCIM_CMD_PORTEN)) { 1037 printf("pn%d: failed to enable I/O ports!\n", unit); 1038 free(sc, M_DEVBUF); 1039 goto fail; 1040 } 1041 1042 if (!pci_map_port(config_id, PN_PCI_LOIO, 1043 (u_short *)&(sc->pn_bhandle))) { 1044 printf ("pn%d: couldn't map ports\n", unit); 1045 goto fail; 1046 } 1047 #ifdef __i386__ 1048 sc->pn_btag = I386_BUS_SPACE_IO; 1049 #endif 1050 #ifdef __alpha__ 1051 sc->pn_btag = ALPHA_BUS_SPACE_IO; 1052 #endif 1053 #else 1054 if (!(command & PCIM_CMD_MEMEN)) { 1055 printf("pn%d: failed to enable memory mapping!\n", unit); 1056 goto fail; 1057 } 1058 1059 if (!pci_map_mem(config_id, PN_PCI_LOMEM, &vbase, &pbase)) { 1060 printf ("pn%d: couldn't map memory\n", unit); 1061 goto fail; 1062 } 1063 sc->pn_bhandle = vbase; 1064 #ifdef __i386__ 1065 sc->pn_btag = I386_BUS_SPACE_MEM; 1066 #endif 1067 #ifdef __alpha__ 1068 sc->pn_btag = ALPHA_BUS_SPACE_MEM; 1069 #endif 1070 #endif 1071 1072 /* Allocate interrupt */ 1073 if (!pci_map_int(config_id, pn_intr, sc, &net_imask)) { 1074 printf("pn%d: couldn't map interrupt\n", unit); 1075 goto fail; 1076 } 1077 1078 /* Save the cache line size. */ 1079 sc->pn_cachesize = pci_conf_read(config_id, PN_PCI_CACHELEN) & 0xFF; 1080 1081 /* Reset the adapter. */ 1082 pn_reset(sc); 1083 1084 /* 1085 * Get station address from the EEPROM. 1086 */ 1087 pn_read_eeprom(sc, (caddr_t)&eaddr, 0, 3, 1); 1088 1089 /* 1090 * A PNIC chip was detected. Inform the world. 1091 */ 1092 printf("pn%d: Ethernet address: %6D\n", unit, eaddr, ":"); 1093 1094 sc->pn_unit = unit; 1095 bcopy(eaddr, (char *)&sc->arpcom.ac_enaddr, ETHER_ADDR_LEN); 1096 1097 sc->pn_ldata_ptr = malloc(sizeof(struct pn_list_data) + 8, 1098 M_DEVBUF, M_NOWAIT); 1099 if (sc->pn_ldata_ptr == NULL) { 1100 free(sc, M_DEVBUF); 1101 printf("pn%d: no memory for list buffers!\n", unit); 1102 goto fail; 1103 } 1104 1105 sc->pn_ldata = (struct pn_list_data *)sc->pn_ldata_ptr; 1106 round = (unsigned int)sc->pn_ldata_ptr & 0xF; 1107 roundptr = sc->pn_ldata_ptr; 1108 for (i = 0; i < 8; i++) { 1109 if (round % 8) { 1110 round++; 1111 roundptr++; 1112 } else 1113 break; 1114 } 1115 sc->pn_ldata = (struct pn_list_data *)roundptr; 1116 bzero(sc->pn_ldata, sizeof(struct pn_list_data)); 1117 1118 #ifdef PN_RX_BUG_WAR 1119 revision = pci_conf_read(config_id, PN_PCI_REVISION) & 0x000000FF; 1120 if (revision == PN_169B_REV || revision == PN_169_REV || 1121 (revision & 0xF0) == PN_168_REV) { 1122 sc->pn_rx_war = 1; 1123 sc->pn_rx_buf = malloc(PN_RXLEN * 5, M_DEVBUF, M_NOWAIT); 1124 if (sc->pn_rx_buf == NULL) { 1125 printf("pn%d: no memory for workaround buffer\n", unit); 1126 goto fail; 1127 } 1128 } else { 1129 sc->pn_rx_war = 0; 1130 } 1131 #endif 1132 1133 ifp = &sc->arpcom.ac_if; 1134 ifp->if_softc = sc; 1135 ifp->if_unit = unit; 1136 ifp->if_name = "pn"; 1137 ifp->if_mtu = ETHERMTU; 1138 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 1139 ifp->if_ioctl = pn_ioctl; 1140 ifp->if_output = ether_output; 1141 ifp->if_start = pn_start; 1142 ifp->if_watchdog = pn_watchdog; 1143 ifp->if_init = pn_init; 1144 ifp->if_baudrate = 10000000; 1145 ifp->if_snd.ifq_maxlen = PN_TX_LIST_CNT - 1; 1146 1147 ifmedia_init(&sc->ifmedia, 0, pn_ifmedia_upd, pn_ifmedia_sts); 1148 1149 if (bootverbose) 1150 printf("pn%d: probing for a PHY\n", sc->pn_unit); 1151 for (i = PN_PHYADDR_MIN; i < PN_PHYADDR_MAX + 1; i++) { 1152 if (bootverbose) 1153 printf("pn%d: checking address: %d\n", 1154 sc->pn_unit, i); 1155 sc->pn_phy_addr = i; 1156 pn_phy_writereg(sc, PHY_BMCR, PHY_BMCR_RESET); 1157 DELAY(500); 1158 while(pn_phy_readreg(sc, PHY_BMCR) 1159 & PHY_BMCR_RESET); 1160 if ((phy_sts = pn_phy_readreg(sc, PHY_BMSR))) 1161 break; 1162 } 1163 if (phy_sts) { 1164 phy_vid = pn_phy_readreg(sc, PHY_VENID); 1165 phy_did = pn_phy_readreg(sc, PHY_DEVID); 1166 if (bootverbose) 1167 printf("pn%d: found PHY at address %d, ", 1168 sc->pn_unit, sc->pn_phy_addr); 1169 if (bootverbose) 1170 printf("vendor id: %x device id: %x\n", 1171 phy_vid, phy_did); 1172 p = pn_phys; 1173 while(p->pn_vid) { 1174 if (phy_vid == p->pn_vid && 1175 (phy_did | 0x000F) == p->pn_did) { 1176 sc->pn_pinfo = p; 1177 break; 1178 } 1179 p++; 1180 } 1181 if (sc->pn_pinfo == NULL) 1182 sc->pn_pinfo = &pn_phys[PHY_UNKNOWN]; 1183 if (bootverbose) 1184 printf("pn%d: PHY type: %s\n", 1185 sc->pn_unit, sc->pn_pinfo->pn_name); 1186 1187 pn_getmode_mii(sc); 1188 pn_autoneg_mii(sc, PN_FLAG_FORCEDELAY, 1); 1189 } else { 1190 ifmedia_add(&sc->ifmedia, IFM_ETHER|IFM_10_T, 0, NULL); 1191 ifmedia_add(&sc->ifmedia, IFM_ETHER|IFM_10_T|IFM_HDX, 0, NULL); 1192 ifmedia_add(&sc->ifmedia, IFM_ETHER|IFM_10_T|IFM_FDX, 0, NULL); 1193 ifmedia_add(&sc->ifmedia, IFM_ETHER|IFM_100_TX, 0, NULL); 1194 ifmedia_add(&sc->ifmedia, 1195 IFM_ETHER|IFM_100_TX|IFM_HDX, 0, NULL); 1196 ifmedia_add(&sc->ifmedia, 1197 IFM_ETHER|IFM_100_TX|IFM_FDX, 0, NULL); 1198 ifmedia_add(&sc->ifmedia, IFM_ETHER|IFM_100_T4, 0, NULL); 1199 ifmedia_add(&sc->ifmedia, IFM_ETHER|IFM_AUTO, 0, NULL); 1200 pn_autoneg(sc, PN_FLAG_FORCEDELAY, 1); 1201 } 1202 1203 media = sc->ifmedia.ifm_media; 1204 pn_stop(sc); 1205 ifmedia_set(&sc->ifmedia, media); 1206 1207 /* 1208 * Call MI attach routines. 1209 */ 1210 if_attach(ifp); 1211 ether_ifattach(ifp); 1212 1213 #if NBPFILTER > 0 1214 bpfattach(ifp, DLT_EN10MB, sizeof(struct ether_header)); 1215 #endif 1216 at_shutdown(pn_shutdown, sc, SHUTDOWN_POST_SYNC); 1217 1218 fail: 1219 splx(s); 1220 return; 1221 } 1222 1223 /* 1224 * Initialize the transmit descriptors. 1225 */ 1226 static int pn_list_tx_init(sc) 1227 struct pn_softc *sc; 1228 { 1229 struct pn_chain_data *cd; 1230 struct pn_list_data *ld; 1231 int i; 1232 1233 cd = &sc->pn_cdata; 1234 ld = sc->pn_ldata; 1235 for (i = 0; i < PN_TX_LIST_CNT; i++) { 1236 cd->pn_tx_chain[i].pn_ptr = &ld->pn_tx_list[i]; 1237 if (i == (PN_TX_LIST_CNT - 1)) 1238 cd->pn_tx_chain[i].pn_nextdesc = 1239 &cd->pn_tx_chain[0]; 1240 else 1241 cd->pn_tx_chain[i].pn_nextdesc = 1242 &cd->pn_tx_chain[i + 1]; 1243 } 1244 1245 cd->pn_tx_free = &cd->pn_tx_chain[0]; 1246 cd->pn_tx_tail = cd->pn_tx_head = NULL; 1247 1248 return(0); 1249 } 1250 1251 1252 /* 1253 * Initialize the RX descriptors and allocate mbufs for them. Note that 1254 * we arrange the descriptors in a closed ring, so that the last descriptor 1255 * points back to the first. 1256 */ 1257 static int pn_list_rx_init(sc) 1258 struct pn_softc *sc; 1259 { 1260 struct pn_chain_data *cd; 1261 struct pn_list_data *ld; 1262 int i; 1263 1264 cd = &sc->pn_cdata; 1265 ld = sc->pn_ldata; 1266 1267 for (i = 0; i < PN_RX_LIST_CNT; i++) { 1268 cd->pn_rx_chain[i].pn_ptr = 1269 (struct pn_desc *)&ld->pn_rx_list[i]; 1270 if (pn_newbuf(sc, &cd->pn_rx_chain[i]) == ENOBUFS) 1271 return(ENOBUFS); 1272 if (i == (PN_RX_LIST_CNT - 1)) { 1273 cd->pn_rx_chain[i].pn_nextdesc = &cd->pn_rx_chain[0]; 1274 ld->pn_rx_list[i].pn_next = 1275 vtophys(&ld->pn_rx_list[0]); 1276 } else { 1277 cd->pn_rx_chain[i].pn_nextdesc = &cd->pn_rx_chain[i + 1]; 1278 ld->pn_rx_list[i].pn_next = 1279 vtophys(&ld->pn_rx_list[i + 1]); 1280 } 1281 } 1282 1283 cd->pn_rx_head = &cd->pn_rx_chain[0]; 1284 1285 return(0); 1286 } 1287 1288 /* 1289 * Initialize an RX descriptor and attach an MBUF cluster. 1290 * Note: the length fields are only 11 bits wide, which means the 1291 * largest size we can specify is 2047. This is important because 1292 * MCLBYTES is 2048, so we have to subtract one otherwise we'll 1293 * overflow the field and make a mess. 1294 */ 1295 static int pn_newbuf(sc, c) 1296 struct pn_softc *sc; 1297 struct pn_chain_onefrag *c; 1298 { 1299 struct mbuf *m_new = NULL; 1300 1301 MGETHDR(m_new, M_DONTWAIT, MT_DATA); 1302 if (m_new == NULL) { 1303 printf("pn%d: no memory for rx list -- packet dropped!\n", 1304 sc->pn_unit); 1305 return(ENOBUFS); 1306 } 1307 1308 MCLGET(m_new, M_DONTWAIT); 1309 if (!(m_new->m_flags & M_EXT)) { 1310 printf("pn%d: no memory for rx list -- packet dropped!\n", 1311 sc->pn_unit); 1312 m_freem(m_new); 1313 return(ENOBUFS); 1314 } 1315 1316 /* 1317 * Zero the buffer. This is part of the workaround for the 1318 * promiscuous mode bug in the revision 33 PNIC chips. 1319 */ 1320 bzero((char *)mtod(m_new, char *), MCLBYTES); 1321 m_new->m_len = m_new->m_pkthdr.len = MCLBYTES; 1322 1323 c->pn_mbuf = m_new; 1324 c->pn_ptr->pn_status = PN_RXSTAT; 1325 c->pn_ptr->pn_data = vtophys(mtod(m_new, caddr_t)); 1326 c->pn_ptr->pn_ctl = PN_RXCTL_RLINK | PN_RXLEN; 1327 1328 return(0); 1329 } 1330 1331 #ifdef PN_RX_BUG_WAR 1332 /* 1333 * Grrrrr. 1334 * The PNIC chip has a terrible bug in it that manifests itself during 1335 * periods of heavy activity. The exact mode of failure if difficult to 1336 * pinpoint: sometimes it only happens in promiscuous mode, sometimes it 1337 * will happen on slow machines. The bug is that sometimes instead of 1338 * uploading one complete frame during reception, it uploads what looks 1339 * like the entire contents of its FIFO memory. The frame we want is at 1340 * the end of the whole mess, but we never know exactly how much data has 1341 * been uploaded, so salvaging the frame is hard. 1342 * 1343 * There is only one way to do it reliably, and it's disgusting. 1344 * Here's what we know: 1345 * 1346 * - We know there will always be somewhere between one and three extra 1347 * descriptors uploaded. 1348 * 1349 * - We know the desired received frame will always be at the end of the 1350 * total data upload. 1351 * 1352 * - We know the size of the desired received frame because it will be 1353 * provided in the length field of the status word in the last descriptor. 1354 * 1355 * Here's what we do: 1356 * 1357 * - When we allocate buffers for the receive ring, we bzero() them. 1358 * This means that we know that the buffer contents should be all 1359 * zeros, except for data uploaded by the chip. 1360 * 1361 * - We also force the PNIC chip to upload frames that include the 1362 * ethernet CRC at the end. 1363 * 1364 * - We gather all of the bogus frame data into a single buffer. 1365 * 1366 * - We then position a pointer at the end of this buffer and scan 1367 * backwards until we encounter the first non-zero byte of data. 1368 * This is the end of the received frame. We know we will encounter 1369 * some data at the end of the frame because the CRC will always be 1370 * there, so even if the sender transmits a packet of all zeros, 1371 * we won't be fooled. 1372 * 1373 * - We know the size of the actual received frame, so we subtract 1374 * that value from the current pointer location. This brings us 1375 * to the start of the actual received packet. 1376 * 1377 * - We copy this into an mbuf and pass it on, along with the actual 1378 * frame length. 1379 * 1380 * The performance hit is tremendous, but it beats dropping frames all 1381 * the time. 1382 */ 1383 1384 #define PN_WHOLEFRAME (PN_RXSTAT_FIRSTFRAG|PN_RXSTAT_LASTFRAG) 1385 static void pn_rx_bug_war(sc, cur_rx) 1386 struct pn_softc *sc; 1387 struct pn_chain_onefrag *cur_rx; 1388 { 1389 struct pn_chain_onefrag *c; 1390 unsigned char *ptr; 1391 int total_len; 1392 u_int32_t rxstat = 0; 1393 1394 c = sc->pn_rx_bug_save; 1395 ptr = sc->pn_rx_buf; 1396 bzero(ptr, sizeof(PN_RXLEN * 5)); 1397 1398 /* Copy all the bytes from the bogus buffers. */ 1399 while ((c->pn_ptr->pn_status & PN_WHOLEFRAME) != PN_WHOLEFRAME) { 1400 rxstat = c->pn_ptr->pn_status; 1401 m_copydata(c->pn_mbuf, 0, PN_RXLEN, ptr); 1402 ptr += PN_RXLEN; 1403 if (c == cur_rx) 1404 break; 1405 if (rxstat & PN_RXSTAT_LASTFRAG) 1406 break; 1407 c->pn_ptr->pn_status = PN_RXSTAT; 1408 c->pn_ptr->pn_ctl = PN_RXCTL_RLINK | PN_RXLEN; 1409 bzero((char *)mtod(c->pn_mbuf, char *), MCLBYTES); 1410 c = c->pn_nextdesc; 1411 } 1412 1413 /* Find the length of the actual receive frame. */ 1414 total_len = PN_RXBYTES(rxstat); 1415 1416 /* Scan backwards until we hit a non-zero byte. */ 1417 while(*ptr == 0x00) 1418 ptr--; 1419 1420 /* Round off. */ 1421 if ((u_int32_t)(ptr) & 0x3) 1422 ptr -= 1; 1423 1424 /* Now find the start of the frame. */ 1425 ptr -= total_len; 1426 if (ptr < sc->pn_rx_buf) 1427 ptr = sc->pn_rx_buf; 1428 1429 /* 1430 * Now copy the salvaged frame to the last mbuf and fake up 1431 * the status word to make it look like a successful 1432 * frame reception. 1433 */ 1434 m_copyback(cur_rx->pn_mbuf, 0, total_len, ptr); 1435 cur_rx->pn_mbuf->m_len = c->pn_mbuf->m_pkthdr.len = MCLBYTES; 1436 cur_rx->pn_ptr->pn_status |= PN_RXSTAT_FIRSTFRAG; 1437 1438 return; 1439 } 1440 #endif 1441 1442 /* 1443 * A frame has been uploaded: pass the resulting mbuf chain up to 1444 * the higher level protocols. 1445 */ 1446 static void pn_rxeof(sc) 1447 struct pn_softc *sc; 1448 { 1449 struct ether_header *eh; 1450 struct mbuf *m; 1451 struct ifnet *ifp; 1452 struct pn_chain_onefrag *cur_rx; 1453 int total_len = 0; 1454 u_int32_t rxstat; 1455 1456 ifp = &sc->arpcom.ac_if; 1457 1458 while(!((rxstat = sc->pn_cdata.pn_rx_head->pn_ptr->pn_status) & 1459 PN_RXSTAT_OWN)) { 1460 #ifdef __alpha__ 1461 struct mbuf *m0 = NULL; 1462 #endif 1463 cur_rx = sc->pn_cdata.pn_rx_head; 1464 sc->pn_cdata.pn_rx_head = cur_rx->pn_nextdesc; 1465 1466 #ifdef PN_RX_BUG_WAR 1467 /* 1468 * XXX The PNIC has a nasty receiver bug that manifests 1469 * under certain conditions (sometimes only in promiscuous 1470 * mode, sometimes only on slow machines even when not in 1471 * promiscuous mode). We have to keep an eye out for the 1472 * failure condition and employ a workaround to recover 1473 * any mangled frames. 1474 */ 1475 if (sc->pn_rx_war) { 1476 if ((rxstat & PN_WHOLEFRAME) != PN_WHOLEFRAME) { 1477 if (rxstat & PN_RXSTAT_FIRSTFRAG) 1478 sc->pn_rx_bug_save = cur_rx; 1479 if ((rxstat & PN_RXSTAT_LASTFRAG) == 0) 1480 continue; 1481 pn_rx_bug_war(sc, cur_rx); 1482 rxstat = cur_rx->pn_ptr->pn_status; 1483 } 1484 } 1485 #endif 1486 1487 /* 1488 * If an error occurs, update stats, clear the 1489 * status word and leave the mbuf cluster in place: 1490 * it should simply get re-used next time this descriptor 1491 * comes up in the ring. 1492 */ 1493 if (rxstat & PN_RXSTAT_RXERR) { 1494 ifp->if_ierrors++; 1495 if (rxstat & PN_RXSTAT_COLLSEEN) 1496 ifp->if_collisions++; 1497 cur_rx->pn_ptr->pn_status = PN_RXSTAT; 1498 cur_rx->pn_ptr->pn_ctl = PN_RXCTL_RLINK | PN_RXLEN; 1499 bzero((char *)mtod(cur_rx->pn_mbuf, char *), MCLBYTES); 1500 continue; 1501 } 1502 1503 /* No errors; receive the packet. */ 1504 m = cur_rx->pn_mbuf; 1505 total_len = PN_RXBYTES(cur_rx->pn_ptr->pn_status); 1506 1507 /* Trim off the CRC. */ 1508 total_len -= ETHER_CRC_LEN; 1509 1510 /* 1511 * Try to conjure up a new mbuf cluster. If that 1512 * fails, it means we have an out of memory condition and 1513 * should leave the buffer in place and continue. This will 1514 * result in a lost packet, but there's little else we 1515 * can do in this situation. 1516 */ 1517 if (pn_newbuf(sc, cur_rx) == ENOBUFS) { 1518 ifp->if_ierrors++; 1519 cur_rx->pn_ptr->pn_status = PN_RXSTAT; 1520 cur_rx->pn_ptr->pn_ctl = PN_RXCTL_RLINK | PN_RXLEN; 1521 bzero((char *)mtod(cur_rx->pn_mbuf, char *), MCLBYTES); 1522 continue; 1523 } 1524 1525 #ifdef __alpha__ 1526 /* 1527 * Grrrr! On the alpha platform, the start of the 1528 * packet data must be longword aligned so that ip_input() 1529 * doesn't perform any unaligned accesses when it tries 1530 * to fiddle with the IP header. But the PNIC is stupid 1531 * and wants RX buffers to start on longword boundaries. 1532 * So we can't just shift the DMA address over a few 1533 * bytes to alter the payload alignment. Instead, we 1534 * have to chop out ethernet and IP header parts of 1535 * the packet and place then in a separate mbuf with 1536 * the alignment fixed up properly. 1537 * 1538 * As if this chip wasn't broken enough already. 1539 */ 1540 MGETHDR(m0, M_DONTWAIT, MT_DATA); 1541 if (m0 == NULL) { 1542 ifp->if_ierrors++; 1543 cur_rx->pn_ptr->pn_status = PN_RXSTAT; 1544 cur_rx->pn_ptr->pn_ctl = PN_RXCTL_RLINK | PN_RXLEN; 1545 bzero((char *)mtod(cur_rx->pn_mbuf, char *), MCLBYTES); 1546 continue; 1547 } 1548 1549 m0->m_data += 2; 1550 if (total_len <= (MHLEN - 2)) { 1551 bcopy(mtod(m, caddr_t), mtod(m0, caddr_t), total_len); 1552 m_freem(m); 1553 m = m0; 1554 m->m_pkthdr.len = m->m_len = total_len; 1555 } else { 1556 bcopy(mtod(m, caddr_t), mtod(m0, caddr_t), (MHLEN - 2)); 1557 m->m_len = total_len - (MHLEN - 2); 1558 m->m_data += (MHLEN - 2); 1559 m0->m_next = m; 1560 m0->m_len = (MHLEN - 2); 1561 m = m0; 1562 m->m_pkthdr.len = total_len; 1563 } 1564 #else 1565 m->m_pkthdr.len = m->m_len = total_len; 1566 #endif 1567 ifp->if_ipackets++; 1568 eh = mtod(m, struct ether_header *); 1569 m->m_pkthdr.rcvif = ifp; 1570 1571 #if NBPFILTER > 0 1572 /* 1573 * Handle BPF listeners. Let the BPF user see the packet, but 1574 * don't pass it up to the ether_input() layer unless it's 1575 * a broadcast packet, multicast packet, matches our ethernet 1576 * address or the interface is in promiscuous mode. 1577 */ 1578 if (ifp->if_bpf) { 1579 bpf_mtap(ifp, m); 1580 if (ifp->if_flags & IFF_PROMISC && 1581 (bcmp(eh->ether_dhost, sc->arpcom.ac_enaddr, 1582 ETHER_ADDR_LEN) && 1583 (eh->ether_dhost[0] & 1) == 0)) { 1584 m_freem(m); 1585 continue; 1586 } 1587 } 1588 #endif 1589 /* Remove header from mbuf and pass it on. */ 1590 m_adj(m, sizeof(struct ether_header)); 1591 ether_input(ifp, eh, m); 1592 } 1593 1594 return; 1595 } 1596 1597 void pn_rxeoc(sc) 1598 struct pn_softc *sc; 1599 { 1600 1601 pn_rxeof(sc); 1602 PN_CLRBIT(sc, PN_NETCFG, PN_NETCFG_RX_ON); 1603 CSR_WRITE_4(sc, PN_RXADDR, vtophys(sc->pn_cdata.pn_rx_head->pn_ptr)); 1604 PN_SETBIT(sc, PN_NETCFG, PN_NETCFG_RX_ON); 1605 CSR_WRITE_4(sc, PN_RXSTART, 0xFFFFFFFF); 1606 1607 return; 1608 } 1609 1610 /* 1611 * A frame was downloaded to the chip. It's safe for us to clean up 1612 * the list buffers. 1613 */ 1614 1615 static void pn_txeof(sc) 1616 struct pn_softc *sc; 1617 { 1618 struct pn_chain *cur_tx; 1619 struct ifnet *ifp; 1620 1621 ifp = &sc->arpcom.ac_if; 1622 1623 /* Clear the timeout timer. */ 1624 ifp->if_timer = 0; 1625 1626 if (sc->pn_cdata.pn_tx_head == NULL) 1627 return; 1628 1629 /* 1630 * Go through our tx list and free mbufs for those 1631 * frames that have been transmitted. 1632 */ 1633 while(sc->pn_cdata.pn_tx_head->pn_mbuf != NULL) { 1634 u_int32_t txstat; 1635 1636 cur_tx = sc->pn_cdata.pn_tx_head; 1637 txstat = PN_TXSTATUS(cur_tx); 1638 1639 if (txstat & PN_TXSTAT_OWN) 1640 break; 1641 1642 if (txstat & PN_TXSTAT_ERRSUM) { 1643 ifp->if_oerrors++; 1644 if (txstat & PN_TXSTAT_EXCESSCOLL) 1645 ifp->if_collisions++; 1646 if (txstat & PN_TXSTAT_LATECOLL) 1647 ifp->if_collisions++; 1648 } 1649 1650 ifp->if_collisions += (txstat & PN_TXSTAT_COLLCNT) >> 3; 1651 1652 1653 ifp->if_opackets++; 1654 m_freem(cur_tx->pn_mbuf); 1655 cur_tx->pn_mbuf = NULL; 1656 1657 if (sc->pn_cdata.pn_tx_head == sc->pn_cdata.pn_tx_tail) { 1658 sc->pn_cdata.pn_tx_head = NULL; 1659 sc->pn_cdata.pn_tx_tail = NULL; 1660 break; 1661 } 1662 1663 sc->pn_cdata.pn_tx_head = cur_tx->pn_nextdesc; 1664 } 1665 1666 return; 1667 } 1668 1669 /* 1670 * TX 'end of channel' interrupt handler. 1671 */ 1672 static void pn_txeoc(sc) 1673 struct pn_softc *sc; 1674 { 1675 struct ifnet *ifp; 1676 1677 ifp = &sc->arpcom.ac_if; 1678 1679 ifp->if_timer = 0; 1680 1681 if (sc->pn_cdata.pn_tx_head == NULL) { 1682 ifp->if_flags &= ~IFF_OACTIVE; 1683 sc->pn_cdata.pn_tx_tail = NULL; 1684 if (sc->pn_want_auto) { 1685 if (sc->pn_pinfo == NULL) 1686 pn_autoneg(sc, PN_FLAG_SCHEDDELAY, 1); 1687 else 1688 pn_autoneg_mii(sc, PN_FLAG_SCHEDDELAY, 1); 1689 } 1690 1691 } 1692 1693 return; 1694 } 1695 1696 static void pn_intr(arg) 1697 void *arg; 1698 { 1699 struct pn_softc *sc; 1700 struct ifnet *ifp; 1701 u_int32_t status; 1702 1703 sc = arg; 1704 ifp = &sc->arpcom.ac_if; 1705 1706 /* Supress unwanted interrupts. */ 1707 if (!(ifp->if_flags & IFF_UP)) { 1708 pn_stop(sc); 1709 return; 1710 } 1711 1712 /* Disable interrupts. */ 1713 CSR_WRITE_4(sc, PN_IMR, 0x00000000); 1714 1715 for (;;) { 1716 status = CSR_READ_4(sc, PN_ISR); 1717 if (status) 1718 CSR_WRITE_4(sc, PN_ISR, status); 1719 1720 if ((status & PN_INTRS) == 0) 1721 break; 1722 1723 if (status & PN_ISR_RX_OK) 1724 pn_rxeof(sc); 1725 1726 if ((status & PN_ISR_RX_WATCHDOG) || (status & PN_ISR_RX_IDLE) 1727 || (status & PN_ISR_RX_NOBUF)) 1728 pn_rxeoc(sc); 1729 1730 if (status & PN_ISR_TX_OK) 1731 pn_txeof(sc); 1732 1733 if (status & PN_ISR_TX_NOBUF) 1734 pn_txeoc(sc); 1735 1736 if (status & PN_ISR_TX_IDLE) { 1737 pn_txeof(sc); 1738 if (sc->pn_cdata.pn_tx_head != NULL) { 1739 PN_SETBIT(sc, PN_NETCFG, PN_NETCFG_TX_ON); 1740 CSR_WRITE_4(sc, PN_TXSTART, 0xFFFFFFFF); 1741 } 1742 } 1743 1744 if (status & PN_ISR_TX_UNDERRUN) { 1745 ifp->if_oerrors++; 1746 pn_txeof(sc); 1747 if (sc->pn_cdata.pn_tx_head != NULL) { 1748 PN_SETBIT(sc, PN_NETCFG, PN_NETCFG_TX_ON); 1749 CSR_WRITE_4(sc, PN_TXSTART, 0xFFFFFFFF); 1750 } 1751 } 1752 1753 if (status & PN_ISR_BUS_ERR) { 1754 pn_reset(sc); 1755 pn_init(sc); 1756 } 1757 } 1758 1759 /* Re-enable interrupts. */ 1760 CSR_WRITE_4(sc, PN_IMR, PN_INTRS); 1761 1762 if (ifp->if_snd.ifq_head != NULL) { 1763 pn_start(ifp); 1764 } 1765 1766 return; 1767 } 1768 1769 /* 1770 * Encapsulate an mbuf chain in a descriptor by coupling the mbuf data 1771 * pointers to the fragment pointers. 1772 */ 1773 static int pn_encap(sc, c, m_head) 1774 struct pn_softc *sc; 1775 struct pn_chain *c; 1776 struct mbuf *m_head; 1777 { 1778 int frag = 0; 1779 struct pn_desc *f = NULL; 1780 int total_len; 1781 struct mbuf *m; 1782 1783 /* 1784 * Start packing the mbufs in this chain into 1785 * the fragment pointers. Stop when we run out 1786 * of fragments or hit the end of the mbuf chain. 1787 */ 1788 m = m_head; 1789 total_len = 0; 1790 1791 for (m = m_head, frag = 0; m != NULL; m = m->m_next) { 1792 if (m->m_len != 0) { 1793 if (frag == PN_MAXFRAGS) 1794 break; 1795 total_len += m->m_len; 1796 f = &c->pn_ptr->pn_frag[frag]; 1797 f->pn_ctl = PN_TXCTL_TLINK | m->m_len; 1798 if (frag == 0) { 1799 f->pn_ctl |= PN_TXCTL_FIRSTFRAG; 1800 f->pn_status = 0; 1801 } else 1802 f->pn_status = PN_TXSTAT_OWN; 1803 f->pn_data = vtophys(mtod(m, vm_offset_t)); 1804 f->pn_next = vtophys(&c->pn_ptr->pn_frag[frag + 1]); 1805 frag++; 1806 } 1807 } 1808 1809 /* 1810 * Handle special case: we used up all 16 fragments, 1811 * but we have more mbufs left in the chain. Copy the 1812 * data into an mbuf cluster. Note that we don't 1813 * bother clearing the values in the other fragment 1814 * pointers/counters; it wouldn't gain us anything, 1815 * and would waste cycles. 1816 */ 1817 if (m != NULL) { 1818 struct mbuf *m_new = NULL; 1819 1820 MGETHDR(m_new, M_DONTWAIT, MT_DATA); 1821 if (m_new == NULL) { 1822 printf("pn%d: no memory for tx list", sc->pn_unit); 1823 return(1); 1824 } 1825 if (m_head->m_pkthdr.len > MHLEN) { 1826 MCLGET(m_new, M_DONTWAIT); 1827 if (!(m_new->m_flags & M_EXT)) { 1828 m_freem(m_new); 1829 printf("pn%d: no memory for tx list", 1830 sc->pn_unit); 1831 return(1); 1832 } 1833 } 1834 m_copydata(m_head, 0, m_head->m_pkthdr.len, 1835 mtod(m_new, caddr_t)); 1836 m_new->m_pkthdr.len = m_new->m_len = m_head->m_pkthdr.len; 1837 m_freem(m_head); 1838 m_head = m_new; 1839 f = &c->pn_ptr->pn_frag[0]; 1840 f->pn_data = vtophys(mtod(m_new, caddr_t)); 1841 f->pn_ctl = total_len = m_new->m_len; 1842 f->pn_ctl |= PN_TXCTL_TLINK|PN_TXCTL_FIRSTFRAG; 1843 frag = 1; 1844 } 1845 1846 1847 c->pn_mbuf = m_head; 1848 c->pn_lastdesc = frag - 1; 1849 PN_TXCTL(c) |= PN_TXCTL_LASTFRAG|PN_TXCTL_FINT; 1850 PN_TXNEXT(c) = vtophys(&c->pn_nextdesc->pn_ptr->pn_frag[0]); 1851 1852 return(0); 1853 } 1854 1855 /* 1856 * Main transmit routine. To avoid having to do mbuf copies, we put pointers 1857 * to the mbuf data regions directly in the transmit lists. We also save a 1858 * copy of the pointers since the transmit list fragment pointers are 1859 * physical addresses. 1860 */ 1861 1862 static void pn_start(ifp) 1863 struct ifnet *ifp; 1864 { 1865 struct pn_softc *sc; 1866 struct mbuf *m_head = NULL; 1867 struct pn_chain *cur_tx = NULL, *start_tx; 1868 1869 sc = ifp->if_softc; 1870 1871 if (sc->pn_autoneg) { 1872 sc->pn_tx_pend = 1; 1873 return; 1874 } 1875 1876 /* 1877 * Check for an available queue slot. If there are none, 1878 * punt. 1879 */ 1880 if (sc->pn_cdata.pn_tx_free->pn_mbuf != NULL) { 1881 ifp->if_flags |= IFF_OACTIVE; 1882 return; 1883 } 1884 1885 start_tx = sc->pn_cdata.pn_tx_free; 1886 1887 while(sc->pn_cdata.pn_tx_free->pn_mbuf == NULL) { 1888 IF_DEQUEUE(&ifp->if_snd, m_head); 1889 if (m_head == NULL) 1890 break; 1891 1892 /* Pick a descriptor off the free list. */ 1893 cur_tx = sc->pn_cdata.pn_tx_free; 1894 sc->pn_cdata.pn_tx_free = cur_tx->pn_nextdesc; 1895 1896 /* Pack the data into the descriptor. */ 1897 pn_encap(sc, cur_tx, m_head); 1898 1899 if (cur_tx != start_tx) 1900 PN_TXOWN(cur_tx) = PN_TXSTAT_OWN; 1901 1902 #if NBPFILTER > 0 1903 /* 1904 * If there's a BPF listener, bounce a copy of this frame 1905 * to him. 1906 */ 1907 if (ifp->if_bpf) 1908 bpf_mtap(ifp, cur_tx->pn_mbuf); 1909 #endif 1910 PN_TXOWN(cur_tx) = PN_TXSTAT_OWN; 1911 CSR_WRITE_4(sc, PN_TXSTART, 0xFFFFFFFF); 1912 } 1913 1914 /* 1915 * If there are no packets queued, bail. 1916 */ 1917 if (cur_tx == NULL) 1918 return; 1919 1920 sc->pn_cdata.pn_tx_tail = cur_tx; 1921 1922 if (sc->pn_cdata.pn_tx_head == NULL) 1923 sc->pn_cdata.pn_tx_head = start_tx; 1924 1925 /* 1926 * Set a timeout in case the chip goes out to lunch. 1927 */ 1928 ifp->if_timer = 5; 1929 1930 return; 1931 } 1932 1933 static void pn_init(xsc) 1934 void *xsc; 1935 { 1936 struct pn_softc *sc = xsc; 1937 struct ifnet *ifp = &sc->arpcom.ac_if; 1938 u_int16_t phy_bmcr = 0; 1939 int s; 1940 1941 if (sc->pn_autoneg) 1942 return; 1943 1944 s = splimp(); 1945 1946 if (sc->pn_pinfo != NULL) 1947 phy_bmcr = pn_phy_readreg(sc, PHY_BMCR); 1948 1949 /* 1950 * Cancel pending I/O and free all RX/TX buffers. 1951 */ 1952 pn_stop(sc); 1953 pn_reset(sc); 1954 1955 /* 1956 * Set cache alignment and burst length. 1957 */ 1958 CSR_WRITE_4(sc, PN_BUSCTL, PN_BUSCTL_MUSTBEONE|PN_BUSCTL_ARBITRATION); 1959 PN_SETBIT(sc, PN_BUSCTL, PN_BURSTLEN_16LONG); 1960 switch(sc->pn_cachesize) { 1961 case 32: 1962 PN_SETBIT(sc, PN_BUSCTL, PN_CACHEALIGN_32LONG); 1963 break; 1964 case 16: 1965 PN_SETBIT(sc, PN_BUSCTL, PN_CACHEALIGN_16LONG); 1966 break; 1967 case 8: 1968 PN_SETBIT(sc, PN_BUSCTL, PN_CACHEALIGN_8LONG); 1969 break; 1970 case 0: 1971 default: 1972 PN_SETBIT(sc, PN_BUSCTL, PN_CACHEALIGN_NONE); 1973 break; 1974 } 1975 1976 PN_CLRBIT(sc, PN_NETCFG, PN_NETCFG_TX_IMMEDIATE); 1977 PN_CLRBIT(sc, PN_NETCFG, PN_NETCFG_NO_RXCRC); 1978 PN_CLRBIT(sc, PN_NETCFG, PN_NETCFG_HEARTBEAT); 1979 PN_CLRBIT(sc, PN_NETCFG, PN_NETCFG_STORENFWD); 1980 PN_CLRBIT(sc, PN_NETCFG, PN_NETCFG_TX_BACKOFF); 1981 1982 PN_CLRBIT(sc, PN_NETCFG, PN_NETCFG_TX_THRESH); 1983 PN_SETBIT(sc, PN_NETCFG, PN_TXTHRESH_72BYTES); 1984 1985 if (sc->pn_pinfo == NULL) { 1986 PN_CLRBIT(sc, PN_NETCFG, PN_NETCFG_MIIENB); 1987 PN_SETBIT(sc, PN_NETCFG, PN_NETCFG_TX_BACKOFF); 1988 } else { 1989 PN_SETBIT(sc, PN_NETCFG, PN_NETCFG_MIIENB); 1990 PN_SETBIT(sc, PN_ENDEC, PN_ENDEC_JABBERDIS); 1991 } 1992 1993 pn_setcfg(sc, sc->ifmedia.ifm_media); 1994 1995 /* Init circular RX list. */ 1996 if (pn_list_rx_init(sc) == ENOBUFS) { 1997 printf("pn%d: initialization failed: no " 1998 "memory for rx buffers\n", sc->pn_unit); 1999 pn_stop(sc); 2000 (void)splx(s); 2001 return; 2002 } 2003 2004 /* 2005 * Init tx descriptors. 2006 */ 2007 pn_list_tx_init(sc); 2008 2009 /* 2010 * Load the address of the RX list. 2011 */ 2012 CSR_WRITE_4(sc, PN_RXADDR, vtophys(sc->pn_cdata.pn_rx_head->pn_ptr)); 2013 2014 /* 2015 * Load the RX/multicast filter. 2016 */ 2017 pn_setfilt(sc); 2018 2019 /* 2020 * Enable interrupts. 2021 */ 2022 CSR_WRITE_4(sc, PN_IMR, PN_INTRS); 2023 CSR_WRITE_4(sc, PN_ISR, 0xFFFFFFFF); 2024 2025 /* Enable receiver and transmitter. */ 2026 PN_SETBIT(sc, PN_NETCFG, PN_NETCFG_TX_ON|PN_NETCFG_RX_ON); 2027 CSR_WRITE_4(sc, PN_RXSTART, 0xFFFFFFFF); 2028 2029 /* Restore state of BMCR */ 2030 if (sc->pn_pinfo != NULL) 2031 pn_phy_writereg(sc, PHY_BMCR, phy_bmcr); 2032 2033 ifp->if_flags |= IFF_RUNNING; 2034 ifp->if_flags &= ~IFF_OACTIVE; 2035 2036 (void)splx(s); 2037 2038 return; 2039 } 2040 2041 /* 2042 * Set media options. 2043 */ 2044 static int pn_ifmedia_upd(ifp) 2045 struct ifnet *ifp; 2046 { 2047 struct pn_softc *sc; 2048 struct ifmedia *ifm; 2049 2050 sc = ifp->if_softc; 2051 ifm = &sc->ifmedia; 2052 2053 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER) 2054 return(EINVAL); 2055 2056 if (IFM_SUBTYPE(ifm->ifm_media) == IFM_AUTO) { 2057 if (sc->pn_pinfo == NULL) 2058 pn_autoneg(sc, PN_FLAG_SCHEDDELAY, 1); 2059 else 2060 pn_autoneg_mii(sc, PN_FLAG_SCHEDDELAY, 1); 2061 } else { 2062 if (sc->pn_pinfo == NULL) 2063 pn_setmode(sc, ifm->ifm_media); 2064 else 2065 pn_setmode_mii(sc, ifm->ifm_media); 2066 } 2067 2068 return(0); 2069 } 2070 2071 /* 2072 * Report current media status. 2073 */ 2074 static void pn_ifmedia_sts(ifp, ifmr) 2075 struct ifnet *ifp; 2076 struct ifmediareq *ifmr; 2077 { 2078 struct pn_softc *sc; 2079 u_int16_t advert = 0, ability = 0; 2080 2081 sc = ifp->if_softc; 2082 2083 ifmr->ifm_active = IFM_ETHER; 2084 2085 if (sc->pn_pinfo == NULL) { 2086 if (CSR_READ_4(sc, PN_NETCFG) & PN_NETCFG_SPEEDSEL) 2087 ifmr->ifm_active = IFM_ETHER|IFM_10_T; 2088 else 2089 ifmr->ifm_active = IFM_ETHER|IFM_100_TX; 2090 if (CSR_READ_4(sc, PN_NETCFG) & PN_NETCFG_FULLDUPLEX) 2091 ifmr->ifm_active |= IFM_FDX; 2092 else 2093 ifmr->ifm_active |= IFM_HDX; 2094 return; 2095 } 2096 2097 if (!(pn_phy_readreg(sc, PHY_BMCR) & PHY_BMCR_AUTONEGENBL)) { 2098 if (pn_phy_readreg(sc, PHY_BMCR) & PHY_BMCR_SPEEDSEL) 2099 ifmr->ifm_active = IFM_ETHER|IFM_100_TX; 2100 else 2101 ifmr->ifm_active = IFM_ETHER|IFM_10_T; 2102 if (pn_phy_readreg(sc, PHY_BMCR) & PHY_BMCR_DUPLEX) 2103 ifmr->ifm_active |= IFM_FDX; 2104 else 2105 ifmr->ifm_active |= IFM_HDX; 2106 return; 2107 } 2108 2109 ability = pn_phy_readreg(sc, PHY_LPAR); 2110 advert = pn_phy_readreg(sc, PHY_ANAR); 2111 if (advert & PHY_ANAR_100BT4 && 2112 ability & PHY_ANAR_100BT4) { 2113 ifmr->ifm_active = IFM_ETHER|IFM_100_T4; 2114 } else if (advert & PHY_ANAR_100BTXFULL && 2115 ability & PHY_ANAR_100BTXFULL) { 2116 ifmr->ifm_active = IFM_ETHER|IFM_100_TX|IFM_FDX; 2117 } else if (advert & PHY_ANAR_100BTXHALF && 2118 ability & PHY_ANAR_100BTXHALF) { 2119 ifmr->ifm_active = IFM_ETHER|IFM_100_TX|IFM_HDX; 2120 } else if (advert & PHY_ANAR_10BTFULL && 2121 ability & PHY_ANAR_10BTFULL) { 2122 ifmr->ifm_active = IFM_ETHER|IFM_10_T|IFM_FDX; 2123 } else if (advert & PHY_ANAR_10BTHALF && 2124 ability & PHY_ANAR_10BTHALF) { 2125 ifmr->ifm_active = IFM_ETHER|IFM_10_T|IFM_HDX; 2126 } 2127 2128 return; 2129 } 2130 2131 static int pn_ioctl(ifp, command, data) 2132 struct ifnet *ifp; 2133 u_long command; 2134 caddr_t data; 2135 { 2136 struct pn_softc *sc = ifp->if_softc; 2137 struct ifreq *ifr = (struct ifreq *) data; 2138 int s, error = 0; 2139 2140 s = splimp(); 2141 2142 switch(command) { 2143 case SIOCSIFADDR: 2144 case SIOCGIFADDR: 2145 case SIOCSIFMTU: 2146 error = ether_ioctl(ifp, command, data); 2147 break; 2148 case SIOCSIFFLAGS: 2149 if (ifp->if_flags & IFF_UP) { 2150 pn_init(sc); 2151 } else { 2152 if (ifp->if_flags & IFF_RUNNING) 2153 pn_stop(sc); 2154 } 2155 error = 0; 2156 break; 2157 case SIOCADDMULTI: 2158 case SIOCDELMULTI: 2159 pn_init(sc); 2160 error = 0; 2161 break; 2162 case SIOCGIFMEDIA: 2163 case SIOCSIFMEDIA: 2164 error = ifmedia_ioctl(ifp, ifr, &sc->ifmedia, command); 2165 break; 2166 default: 2167 error = EINVAL; 2168 break; 2169 } 2170 2171 (void)splx(s); 2172 2173 return(error); 2174 } 2175 2176 static void pn_watchdog(ifp) 2177 struct ifnet *ifp; 2178 { 2179 struct pn_softc *sc; 2180 2181 sc = ifp->if_softc; 2182 2183 if (sc->pn_autoneg) { 2184 if (sc->pn_pinfo == NULL) 2185 pn_autoneg(sc, PN_FLAG_DELAYTIMEO, 1); 2186 else 2187 pn_autoneg_mii(sc, PN_FLAG_DELAYTIMEO, 1); 2188 return; 2189 } 2190 2191 ifp->if_oerrors++; 2192 printf("pn%d: watchdog timeout\n", sc->pn_unit); 2193 2194 if (!(pn_phy_readreg(sc, PHY_BMSR) & PHY_BMSR_LINKSTAT)) 2195 printf("pn%d: no carrier - transceiver cable problem?\n", 2196 sc->pn_unit); 2197 pn_stop(sc); 2198 pn_reset(sc); 2199 pn_init(sc); 2200 2201 if (ifp->if_snd.ifq_head != NULL) 2202 pn_start(ifp); 2203 2204 return; 2205 } 2206 2207 /* 2208 * Stop the adapter and free any mbufs allocated to the 2209 * RX and TX lists. 2210 */ 2211 static void pn_stop(sc) 2212 struct pn_softc *sc; 2213 { 2214 register int i; 2215 struct ifnet *ifp; 2216 2217 ifp = &sc->arpcom.ac_if; 2218 ifp->if_timer = 0; 2219 2220 PN_CLRBIT(sc, PN_NETCFG, (PN_NETCFG_RX_ON|PN_NETCFG_TX_ON)); 2221 CSR_WRITE_4(sc, PN_IMR, 0x00000000); 2222 CSR_WRITE_4(sc, PN_TXADDR, 0x00000000); 2223 CSR_WRITE_4(sc, PN_RXADDR, 0x00000000); 2224 2225 /* 2226 * Free data in the RX lists. 2227 */ 2228 for (i = 0; i < PN_RX_LIST_CNT; i++) { 2229 if (sc->pn_cdata.pn_rx_chain[i].pn_mbuf != NULL) { 2230 m_freem(sc->pn_cdata.pn_rx_chain[i].pn_mbuf); 2231 sc->pn_cdata.pn_rx_chain[i].pn_mbuf = NULL; 2232 } 2233 } 2234 bzero((char *)&sc->pn_ldata->pn_rx_list, 2235 sizeof(sc->pn_ldata->pn_rx_list)); 2236 2237 /* 2238 * Free the TX list buffers. 2239 */ 2240 for (i = 0; i < PN_TX_LIST_CNT; i++) { 2241 if (sc->pn_cdata.pn_tx_chain[i].pn_mbuf != NULL) { 2242 m_freem(sc->pn_cdata.pn_tx_chain[i].pn_mbuf); 2243 sc->pn_cdata.pn_tx_chain[i].pn_mbuf = NULL; 2244 } 2245 } 2246 2247 bzero((char *)&sc->pn_ldata->pn_tx_list, 2248 sizeof(sc->pn_ldata->pn_tx_list)); 2249 2250 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 2251 2252 return; 2253 } 2254 2255 /* 2256 * Stop all chip I/O so that the kernel's probe routines don't 2257 * get confused by errant DMAs when rebooting. 2258 */ 2259 static void pn_shutdown(howto, arg) 2260 int howto; 2261 void *arg; 2262 { 2263 struct pn_softc *sc = (struct pn_softc *)arg; 2264 2265 pn_stop(sc); 2266 2267 return; 2268 } 2269 2270 static struct pci_device pn_device = { 2271 "pn", 2272 pn_probe, 2273 pn_attach, 2274 &pn_count, 2275 NULL 2276 }; 2277 DATA_SET(pcidevice_set, pn_device);
Cache object: 806d4c6ba90fcd1f5eb89a74e0e385bd
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