The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/pci/if_sf.c

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    1 /*-
    2  * Copyright (c) 1997, 1998, 1999
    3  *      Bill Paul <wpaul@ctr.columbia.edu>.  All rights reserved.
    4  *
    5  * Redistribution and use in source and binary forms, with or without
    6  * modification, are permitted provided that the following conditions
    7  * are met:
    8  * 1. Redistributions of source code must retain the above copyright
    9  *    notice, this list of conditions and the following disclaimer.
   10  * 2. Redistributions in binary form must reproduce the above copyright
   11  *    notice, this list of conditions and the following disclaimer in the
   12  *    documentation and/or other materials provided with the distribution.
   13  * 3. All advertising materials mentioning features or use of this software
   14  *    must display the following acknowledgement:
   15  *      This product includes software developed by Bill Paul.
   16  * 4. Neither the name of the author nor the names of any co-contributors
   17  *    may be used to endorse or promote products derived from this software
   18  *    without specific prior written permission.
   19  *
   20  * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
   21  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   22  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   23  * ARE DISCLAIMED.  IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
   24  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
   25  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
   26  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
   27  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
   28  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
   29  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
   30  * THE POSSIBILITY OF SUCH DAMAGE.
   31  */
   32 
   33 #include <sys/cdefs.h>
   34 __FBSDID("$FreeBSD$");
   35 
   36 /*
   37  * Adaptec AIC-6915 "Starfire" PCI fast ethernet driver for FreeBSD.
   38  * Programming manual is available from:
   39  * http://download.adaptec.com/pdfs/user_guides/aic6915_pg.pdf.
   40  *
   41  * Written by Bill Paul <wpaul@ctr.columbia.edu>
   42  * Department of Electical Engineering
   43  * Columbia University, New York City
   44  */
   45 /*
   46  * The Adaptec AIC-6915 "Starfire" is a 64-bit 10/100 PCI ethernet
   47  * controller designed with flexibility and reducing CPU load in mind.
   48  * The Starfire offers high and low priority buffer queues, a
   49  * producer/consumer index mechanism and several different buffer
   50  * queue and completion queue descriptor types. Any one of a number
   51  * of different driver designs can be used, depending on system and
   52  * OS requirements. This driver makes use of type0 transmit frame
   53  * descriptors (since BSD fragments packets across an mbuf chain)
   54  * and two RX buffer queues prioritized on size (one queue for small
   55  * frames that will fit into a single mbuf, another with full size
   56  * mbuf clusters for everything else). The producer/consumer indexes
   57  * and completion queues are also used.
   58  *
   59  * One downside to the Starfire has to do with alignment: buffer
   60  * queues must be aligned on 256-byte boundaries, and receive buffers
   61  * must be aligned on longword boundaries. The receive buffer alignment
   62  * causes problems on the Alpha platform, where the packet payload
   63  * should be longword aligned. There is no simple way around this.
   64  *
   65  * For receive filtering, the Starfire offers 16 perfect filter slots
   66  * and a 512-bit hash table.
   67  *
   68  * The Starfire has no internal transceiver, relying instead on an
   69  * external MII-based transceiver. Accessing registers on external
   70  * PHYs is done through a special register map rather than with the
   71  * usual bitbang MDIO method.
   72  *
   73  * Acesssing the registers on the Starfire is a little tricky. The
   74  * Starfire has a 512K internal register space. When programmed for
   75  * PCI memory mapped mode, the entire register space can be accessed
   76  * directly. However in I/O space mode, only 256 bytes are directly
   77  * mapped into PCI I/O space. The other registers can be accessed
   78  * indirectly using the SF_INDIRECTIO_ADDR and SF_INDIRECTIO_DATA
   79  * registers inside the 256-byte I/O window.
   80  */
   81 
   82 #include <sys/param.h>
   83 #include <sys/systm.h>
   84 #include <sys/sockio.h>
   85 #include <sys/mbuf.h>
   86 #include <sys/malloc.h>
   87 #include <sys/kernel.h>
   88 #include <sys/module.h>
   89 #include <sys/socket.h>
   90 
   91 #include <net/if.h>
   92 #include <net/if_arp.h>
   93 #include <net/ethernet.h>
   94 #include <net/if_dl.h>
   95 #include <net/if_media.h>
   96 
   97 #include <net/bpf.h>
   98 
   99 #include <vm/vm.h>              /* for vtophys */
  100 #include <vm/pmap.h>            /* for vtophys */
  101 #include <machine/bus_pio.h>
  102 #include <machine/bus_memio.h>
  103 #include <machine/bus.h>
  104 #include <machine/resource.h>
  105 #include <sys/bus.h>
  106 #include <sys/rman.h>
  107 
  108 #include <dev/mii/mii.h>
  109 #include <dev/mii/miivar.h>
  110 
  111 /* "controller miibus0" required.  See GENERIC if you get errors here. */
  112 #include "miibus_if.h"
  113 
  114 #include <dev/pci/pcireg.h>
  115 #include <dev/pci/pcivar.h>
  116 
  117 #define SF_USEIOSPACE
  118 
  119 #include <pci/if_sfreg.h>
  120 
  121 MODULE_DEPEND(sf, pci, 1, 1, 1);
  122 MODULE_DEPEND(sf, ether, 1, 1, 1);
  123 MODULE_DEPEND(sf, miibus, 1, 1, 1);
  124 
  125 static struct sf_type sf_devs[] = {
  126         { AD_VENDORID, AD_DEVICEID_STARFIRE,
  127                 "Adaptec AIC-6915 10/100BaseTX" },
  128         { 0, 0, NULL }
  129 };
  130 
  131 static int sf_probe(device_t);
  132 static int sf_attach(device_t);
  133 static int sf_detach(device_t);
  134 static void sf_intr(void *);
  135 static void sf_stats_update(void *);
  136 static void sf_rxeof(struct sf_softc *);
  137 static void sf_txeof(struct sf_softc *);
  138 static int sf_encap(struct sf_softc *, struct sf_tx_bufdesc_type0 *,
  139                 struct mbuf *);
  140 static void sf_start(struct ifnet *);
  141 static int sf_ioctl(struct ifnet *, u_long, caddr_t);
  142 static void sf_init(void *);
  143 static void sf_stop(struct sf_softc *);
  144 static void sf_watchdog(struct ifnet *);
  145 static void sf_shutdown(device_t);
  146 static int sf_ifmedia_upd(struct ifnet *);
  147 static void sf_ifmedia_sts(struct ifnet *, struct ifmediareq *);
  148 static void sf_reset(struct sf_softc *);
  149 static int sf_init_rx_ring(struct sf_softc *);
  150 static void sf_init_tx_ring(struct sf_softc *);
  151 static int sf_newbuf(struct sf_softc *, struct sf_rx_bufdesc_type0 *,
  152                 struct mbuf *);
  153 static void sf_setmulti(struct sf_softc *);
  154 static int sf_setperf(struct sf_softc *, int, caddr_t);
  155 static int sf_sethash(struct sf_softc *, caddr_t, int);
  156 #ifdef notdef
  157 static int sf_setvlan(struct sf_softc *, int, u_int32_t);
  158 #endif
  159 
  160 static u_int8_t sf_read_eeprom(struct sf_softc *, int);
  161 
  162 static int sf_miibus_readreg(device_t, int, int);
  163 static int sf_miibus_writereg(device_t, int, int, int);
  164 static void sf_miibus_statchg(device_t);
  165 #ifdef DEVICE_POLLING
  166 static void sf_poll(struct ifnet *ifp, enum poll_cmd cmd,
  167                                  int count);
  168 static void sf_poll_locked(struct ifnet *ifp, enum poll_cmd cmd,
  169                                  int count);
  170 #endif /* DEVICE_POLLING */
  171 
  172 static u_int32_t csr_read_4(struct sf_softc *, int);
  173 static void csr_write_4(struct sf_softc *, int, u_int32_t);
  174 static void sf_txthresh_adjust(struct sf_softc *);
  175 
  176 #ifdef SF_USEIOSPACE
  177 #define SF_RES                  SYS_RES_IOPORT
  178 #define SF_RID                  SF_PCI_LOIO
  179 #else
  180 #define SF_RES                  SYS_RES_MEMORY
  181 #define SF_RID                  SF_PCI_LOMEM
  182 #endif
  183 
  184 static device_method_t sf_methods[] = {
  185         /* Device interface */
  186         DEVMETHOD(device_probe,         sf_probe),
  187         DEVMETHOD(device_attach,        sf_attach),
  188         DEVMETHOD(device_detach,        sf_detach),
  189         DEVMETHOD(device_shutdown,      sf_shutdown),
  190 
  191         /* bus interface */
  192         DEVMETHOD(bus_print_child,      bus_generic_print_child),
  193         DEVMETHOD(bus_driver_added,     bus_generic_driver_added),
  194 
  195         /* MII interface */
  196         DEVMETHOD(miibus_readreg,       sf_miibus_readreg),
  197         DEVMETHOD(miibus_writereg,      sf_miibus_writereg),
  198         DEVMETHOD(miibus_statchg,       sf_miibus_statchg),
  199 
  200         { 0, 0 }
  201 };
  202 
  203 static driver_t sf_driver = {
  204         "sf",
  205         sf_methods,
  206         sizeof(struct sf_softc),
  207 };
  208 
  209 static devclass_t sf_devclass;
  210 
  211 DRIVER_MODULE(sf, pci, sf_driver, sf_devclass, 0, 0);
  212 DRIVER_MODULE(miibus, sf, miibus_driver, miibus_devclass, 0, 0);
  213 
  214 #define SF_SETBIT(sc, reg, x)   \
  215         csr_write_4(sc, reg, csr_read_4(sc, reg) | (x))
  216 
  217 #define SF_CLRBIT(sc, reg, x)                           \
  218         csr_write_4(sc, reg, csr_read_4(sc, reg) & ~(x))
  219 
  220 static u_int32_t
  221 csr_read_4(sc, reg)
  222         struct sf_softc         *sc;
  223         int                     reg;
  224 {
  225         u_int32_t               val;
  226 
  227 #ifdef SF_USEIOSPACE
  228         CSR_WRITE_4(sc, SF_INDIRECTIO_ADDR, reg + SF_RMAP_INTREG_BASE);
  229         val = CSR_READ_4(sc, SF_INDIRECTIO_DATA);
  230 #else
  231         val = CSR_READ_4(sc, (reg + SF_RMAP_INTREG_BASE));
  232 #endif
  233 
  234         return(val);
  235 }
  236 
  237 static u_int8_t
  238 sf_read_eeprom(sc, reg)
  239         struct sf_softc         *sc;
  240         int                     reg;
  241 {
  242         u_int8_t                val;
  243 
  244         val = (csr_read_4(sc, SF_EEADDR_BASE +
  245             (reg & 0xFFFFFFFC)) >> (8 * (reg & 3))) & 0xFF;
  246 
  247         return(val);
  248 }
  249 
  250 static void
  251 csr_write_4(sc, reg, val)
  252         struct sf_softc         *sc;
  253         int                     reg;
  254         u_int32_t               val;
  255 {
  256 #ifdef SF_USEIOSPACE
  257         CSR_WRITE_4(sc, SF_INDIRECTIO_ADDR, reg + SF_RMAP_INTREG_BASE);
  258         CSR_WRITE_4(sc, SF_INDIRECTIO_DATA, val);
  259 #else
  260         CSR_WRITE_4(sc, (reg + SF_RMAP_INTREG_BASE), val);
  261 #endif
  262 }
  263 
  264 /*
  265  * Copy the address 'mac' into the perfect RX filter entry at
  266  * offset 'idx.' The perfect filter only has 16 entries so do
  267  * some sanity tests.
  268  */
  269 static int
  270 sf_setperf(sc, idx, mac)
  271         struct sf_softc         *sc;
  272         int                     idx;
  273         caddr_t                 mac;
  274 {
  275         u_int16_t               *p;
  276 
  277         if (idx < 0 || idx > SF_RXFILT_PERFECT_CNT)
  278                 return(EINVAL);
  279 
  280         if (mac == NULL)
  281                 return(EINVAL);
  282 
  283         p = (u_int16_t *)mac;
  284 
  285         csr_write_4(sc, SF_RXFILT_PERFECT_BASE +
  286             (idx * SF_RXFILT_PERFECT_SKIP), htons(p[2]));
  287         csr_write_4(sc, SF_RXFILT_PERFECT_BASE +
  288             (idx * SF_RXFILT_PERFECT_SKIP) + 4, htons(p[1]));
  289         csr_write_4(sc, SF_RXFILT_PERFECT_BASE +
  290             (idx * SF_RXFILT_PERFECT_SKIP) + 8, htons(p[0]));
  291 
  292         return(0);
  293 }
  294 
  295 /*
  296  * Set the bit in the 512-bit hash table that corresponds to the
  297  * specified mac address 'mac.' If 'prio' is nonzero, update the
  298  * priority hash table instead of the filter hash table.
  299  */
  300 static int
  301 sf_sethash(sc, mac, prio)
  302         struct sf_softc         *sc;
  303         caddr_t                 mac;
  304         int                     prio;
  305 {
  306         u_int32_t               h;
  307 
  308         if (mac == NULL)
  309                 return(EINVAL);
  310 
  311         h = ether_crc32_be(mac, ETHER_ADDR_LEN) >> 23;
  312 
  313         if (prio) {
  314                 SF_SETBIT(sc, SF_RXFILT_HASH_BASE + SF_RXFILT_HASH_PRIOOFF +
  315                     (SF_RXFILT_HASH_SKIP * (h >> 4)), (1 << (h & 0xF)));
  316         } else {
  317                 SF_SETBIT(sc, SF_RXFILT_HASH_BASE + SF_RXFILT_HASH_ADDROFF +
  318                     (SF_RXFILT_HASH_SKIP * (h >> 4)), (1 << (h & 0xF)));
  319         }
  320 
  321         return(0);
  322 }
  323 
  324 #ifdef notdef
  325 /*
  326  * Set a VLAN tag in the receive filter.
  327  */
  328 static int
  329 sf_setvlan(sc, idx, vlan)
  330         struct sf_softc         *sc;
  331         int                     idx;
  332         u_int32_t               vlan;
  333 {
  334         if (idx < 0 || idx >> SF_RXFILT_HASH_CNT)
  335                 return(EINVAL);
  336 
  337         csr_write_4(sc, SF_RXFILT_HASH_BASE +
  338             (idx * SF_RXFILT_HASH_SKIP) + SF_RXFILT_HASH_VLANOFF, vlan);
  339 
  340         return(0);
  341 }
  342 #endif
  343 
  344 static int
  345 sf_miibus_readreg(dev, phy, reg)
  346         device_t                dev;
  347         int                     phy, reg;
  348 {
  349         struct sf_softc         *sc;
  350         int                     i;
  351         u_int32_t               val = 0;
  352 
  353         sc = device_get_softc(dev);
  354 
  355         for (i = 0; i < SF_TIMEOUT; i++) {
  356                 val = csr_read_4(sc, SF_PHY_REG(phy, reg));
  357                 if (val & SF_MII_DATAVALID)
  358                         break;
  359         }
  360 
  361         if (i == SF_TIMEOUT)
  362                 return(0);
  363 
  364         if ((val & 0x0000FFFF) == 0xFFFF)
  365                 return(0);
  366 
  367         return(val & 0x0000FFFF);
  368 }
  369 
  370 static int
  371 sf_miibus_writereg(dev, phy, reg, val)
  372         device_t                dev;
  373         int                     phy, reg, val;
  374 {
  375         struct sf_softc         *sc;
  376         int                     i;
  377         int                     busy;
  378 
  379         sc = device_get_softc(dev);
  380 
  381         csr_write_4(sc, SF_PHY_REG(phy, reg), val);
  382 
  383         for (i = 0; i < SF_TIMEOUT; i++) {
  384                 busy = csr_read_4(sc, SF_PHY_REG(phy, reg));
  385                 if (!(busy & SF_MII_BUSY))
  386                         break;
  387         }
  388 
  389         return(0);
  390 }
  391 
  392 static void
  393 sf_miibus_statchg(dev)
  394         device_t                dev;
  395 {
  396         struct sf_softc         *sc;
  397         struct mii_data         *mii;
  398 
  399         sc = device_get_softc(dev);
  400         mii = device_get_softc(sc->sf_miibus);
  401 
  402         if ((mii->mii_media_active & IFM_GMASK) == IFM_FDX) {
  403                 SF_SETBIT(sc, SF_MACCFG_1, SF_MACCFG1_FULLDUPLEX);
  404                 csr_write_4(sc, SF_BKTOBKIPG, SF_IPGT_FDX);
  405         } else {
  406                 SF_CLRBIT(sc, SF_MACCFG_1, SF_MACCFG1_FULLDUPLEX);
  407                 csr_write_4(sc, SF_BKTOBKIPG, SF_IPGT_HDX);
  408         }
  409 }
  410 
  411 static void
  412 sf_setmulti(sc)
  413         struct sf_softc         *sc;
  414 {
  415         struct ifnet            *ifp;
  416         int                     i;
  417         struct ifmultiaddr      *ifma;
  418         u_int8_t                dummy[] = { 0, 0, 0, 0, 0, 0 };
  419 
  420         ifp = &sc->arpcom.ac_if;
  421 
  422         /* First zot all the existing filters. */
  423         for (i = 1; i < SF_RXFILT_PERFECT_CNT; i++)
  424                 sf_setperf(sc, i, (char *)&dummy);
  425         for (i = SF_RXFILT_HASH_BASE;
  426             i < (SF_RXFILT_HASH_MAX + 1); i += 4)
  427                 csr_write_4(sc, i, 0);
  428         SF_CLRBIT(sc, SF_RXFILT, SF_RXFILT_ALLMULTI);
  429 
  430         /* Now program new ones. */
  431         if (ifp->if_flags & IFF_ALLMULTI || ifp->if_flags & IFF_PROMISC) {
  432                 SF_SETBIT(sc, SF_RXFILT, SF_RXFILT_ALLMULTI);
  433         } else {
  434                 i = 1;
  435                 IF_ADDR_LOCK(ifp);
  436                 TAILQ_FOREACH_REVERSE(ifma, &ifp->if_multiaddrs, ifmultihead, ifma_link) {
  437                         if (ifma->ifma_addr->sa_family != AF_LINK)
  438                                 continue;
  439                         /*
  440                          * Program the first 15 multicast groups
  441                          * into the perfect filter. For all others,
  442                          * use the hash table.
  443                          */
  444                         if (i < SF_RXFILT_PERFECT_CNT) {
  445                                 sf_setperf(sc, i,
  446                         LLADDR((struct sockaddr_dl *)ifma->ifma_addr));
  447                                 i++;
  448                                 continue;
  449                         }
  450 
  451                         sf_sethash(sc,
  452                             LLADDR((struct sockaddr_dl *)ifma->ifma_addr), 0);
  453                 }
  454                 IF_ADDR_UNLOCK(ifp);
  455         }
  456 }
  457 
  458 /*
  459  * Set media options.
  460  */
  461 static int
  462 sf_ifmedia_upd(ifp)
  463         struct ifnet            *ifp;
  464 {
  465         struct sf_softc         *sc;
  466         struct mii_data         *mii;
  467 
  468         sc = ifp->if_softc;
  469         mii = device_get_softc(sc->sf_miibus);
  470         sc->sf_link = 0;
  471         if (mii->mii_instance) {
  472                 struct mii_softc        *miisc;
  473                 LIST_FOREACH(miisc, &mii->mii_phys, mii_list)
  474                         mii_phy_reset(miisc);
  475         }
  476         mii_mediachg(mii);
  477 
  478         return(0);
  479 }
  480 
  481 /*
  482  * Report current media status.
  483  */
  484 static void
  485 sf_ifmedia_sts(ifp, ifmr)
  486         struct ifnet            *ifp;
  487         struct ifmediareq       *ifmr;
  488 {
  489         struct sf_softc         *sc;
  490         struct mii_data         *mii;
  491 
  492         sc = ifp->if_softc;
  493         mii = device_get_softc(sc->sf_miibus);
  494 
  495         mii_pollstat(mii);
  496         ifmr->ifm_active = mii->mii_media_active;
  497         ifmr->ifm_status = mii->mii_media_status;
  498 }
  499 
  500 static int
  501 sf_ioctl(ifp, command, data)
  502         struct ifnet            *ifp;
  503         u_long                  command;
  504         caddr_t                 data;
  505 {
  506         struct sf_softc         *sc = ifp->if_softc;
  507         struct ifreq            *ifr = (struct ifreq *) data;
  508         struct mii_data         *mii;
  509         int                     error = 0;
  510 
  511         SF_LOCK(sc);
  512 
  513         switch(command) {
  514         case SIOCSIFFLAGS:
  515                 if (ifp->if_flags & IFF_UP) {
  516                         if (ifp->if_flags & IFF_RUNNING &&
  517                             ifp->if_flags & IFF_PROMISC &&
  518                             !(sc->sf_if_flags & IFF_PROMISC)) {
  519                                 SF_SETBIT(sc, SF_RXFILT, SF_RXFILT_PROMISC);
  520                         } else if (ifp->if_flags & IFF_RUNNING &&
  521                             !(ifp->if_flags & IFF_PROMISC) &&
  522                             sc->sf_if_flags & IFF_PROMISC) {
  523                                 SF_CLRBIT(sc, SF_RXFILT, SF_RXFILT_PROMISC);
  524                         } else if (!(ifp->if_flags & IFF_RUNNING))
  525                                 sf_init(sc);
  526                 } else {
  527                         if (ifp->if_flags & IFF_RUNNING)
  528                                 sf_stop(sc);
  529                 }
  530                 sc->sf_if_flags = ifp->if_flags;
  531                 error = 0;
  532                 break;
  533         case SIOCADDMULTI:
  534         case SIOCDELMULTI:
  535                 sf_setmulti(sc);
  536                 error = 0;
  537                 break;
  538         case SIOCGIFMEDIA:
  539         case SIOCSIFMEDIA:
  540                 mii = device_get_softc(sc->sf_miibus);
  541                 error = ifmedia_ioctl(ifp, ifr, &mii->mii_media, command);
  542                 break;
  543         case SIOCSIFCAP:
  544                 ifp->if_capenable &= ~IFCAP_POLLING;
  545                 ifp->if_capenable |= ifr->ifr_reqcap & IFCAP_POLLING;
  546                 break;
  547         default:
  548                 error = ether_ioctl(ifp, command, data);
  549                 break;
  550         }
  551 
  552         SF_UNLOCK(sc);
  553 
  554         return(error);
  555 }
  556 
  557 static void
  558 sf_reset(sc)
  559         struct sf_softc         *sc;
  560 {
  561         register int            i;
  562 
  563         csr_write_4(sc, SF_GEN_ETH_CTL, 0);
  564         SF_SETBIT(sc, SF_MACCFG_1, SF_MACCFG1_SOFTRESET);
  565         DELAY(1000);
  566         SF_CLRBIT(sc, SF_MACCFG_1, SF_MACCFG1_SOFTRESET);
  567 
  568         SF_SETBIT(sc, SF_PCI_DEVCFG, SF_PCIDEVCFG_RESET);
  569 
  570         for (i = 0; i < SF_TIMEOUT; i++) {
  571                 DELAY(10);
  572                 if (!(csr_read_4(sc, SF_PCI_DEVCFG) & SF_PCIDEVCFG_RESET))
  573                         break;
  574         }
  575 
  576         if (i == SF_TIMEOUT)
  577                 printf("sf%d: reset never completed!\n", sc->sf_unit);
  578 
  579         /* Wait a little while for the chip to get its brains in order. */
  580         DELAY(1000);
  581 }
  582 
  583 /*
  584  * Probe for an Adaptec AIC-6915 chip. Check the PCI vendor and device
  585  * IDs against our list and return a device name if we find a match.
  586  * We also check the subsystem ID so that we can identify exactly which
  587  * NIC has been found, if possible.
  588  */
  589 static int
  590 sf_probe(dev)
  591         device_t                dev;
  592 {
  593         struct sf_type          *t;
  594 
  595         t = sf_devs;
  596 
  597         while(t->sf_name != NULL) {
  598                 if ((pci_get_vendor(dev) == t->sf_vid) &&
  599                     (pci_get_device(dev) == t->sf_did)) {
  600                         switch((pci_read_config(dev,
  601                             SF_PCI_SUBVEN_ID, 4) >> 16) & 0xFFFF) {
  602                         case AD_SUBSYSID_62011_REV0:
  603                         case AD_SUBSYSID_62011_REV1:
  604                                 device_set_desc(dev,
  605                                     "Adaptec ANA-62011 10/100BaseTX");
  606                                 return (BUS_PROBE_DEFAULT);
  607                         case AD_SUBSYSID_62022:
  608                                 device_set_desc(dev,
  609                                     "Adaptec ANA-62022 10/100BaseTX");
  610                                 return (BUS_PROBE_DEFAULT);
  611                         case AD_SUBSYSID_62044_REV0:
  612                         case AD_SUBSYSID_62044_REV1:
  613                                 device_set_desc(dev,
  614                                     "Adaptec ANA-62044 10/100BaseTX");
  615                                 return (BUS_PROBE_DEFAULT);
  616                         case AD_SUBSYSID_62020:
  617                                 device_set_desc(dev,
  618                                     "Adaptec ANA-62020 10/100BaseFX");
  619                                 return (BUS_PROBE_DEFAULT);
  620                         case AD_SUBSYSID_69011:
  621                                 device_set_desc(dev,
  622                                     "Adaptec ANA-69011 10/100BaseTX");
  623                                 return (BUS_PROBE_DEFAULT);
  624                         default:
  625                                 device_set_desc(dev, t->sf_name);
  626                                 return (BUS_PROBE_DEFAULT);
  627                                 break;
  628                         }
  629                 }
  630                 t++;
  631         }
  632 
  633         return(ENXIO);
  634 }
  635 
  636 /*
  637  * Attach the interface. Allocate softc structures, do ifmedia
  638  * setup and ethernet/BPF attach.
  639  */
  640 static int
  641 sf_attach(dev)
  642         device_t                dev;
  643 {
  644         int                     i;
  645         struct sf_softc         *sc;
  646         struct ifnet            *ifp;
  647         int                     unit, rid, error = 0;
  648 
  649         sc = device_get_softc(dev);
  650         unit = device_get_unit(dev);
  651 
  652         mtx_init(&sc->sf_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK,
  653             MTX_DEF | MTX_RECURSE);
  654         /*
  655          * Map control/status registers.
  656          */
  657         pci_enable_busmaster(dev);
  658 
  659         rid = SF_RID;
  660         sc->sf_res = bus_alloc_resource_any(dev, SF_RES, &rid, RF_ACTIVE);
  661 
  662         if (sc->sf_res == NULL) {
  663                 printf ("sf%d: couldn't map ports\n", unit);
  664                 error = ENXIO;
  665                 goto fail;
  666         }
  667 
  668         sc->sf_btag = rman_get_bustag(sc->sf_res);
  669         sc->sf_bhandle = rman_get_bushandle(sc->sf_res);
  670 
  671         /* Allocate interrupt */
  672         rid = 0;
  673         sc->sf_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
  674             RF_SHAREABLE | RF_ACTIVE);
  675 
  676         if (sc->sf_irq == NULL) {
  677                 printf("sf%d: couldn't map interrupt\n", unit);
  678                 error = ENXIO;
  679                 goto fail;
  680         }
  681 
  682         callout_handle_init(&sc->sf_stat_ch);
  683         /* Reset the adapter. */
  684         sf_reset(sc);
  685 
  686         /*
  687          * Get station address from the EEPROM.
  688          */
  689         for (i = 0; i < ETHER_ADDR_LEN; i++)
  690                 sc->arpcom.ac_enaddr[i] =
  691                     sf_read_eeprom(sc, SF_EE_NODEADDR + ETHER_ADDR_LEN - i);
  692 
  693         sc->sf_unit = unit;
  694 
  695         /* Allocate the descriptor queues. */
  696         sc->sf_ldata = contigmalloc(sizeof(struct sf_list_data), M_DEVBUF,
  697             M_NOWAIT, 0, 0xffffffff, PAGE_SIZE, 0);
  698 
  699         if (sc->sf_ldata == NULL) {
  700                 printf("sf%d: no memory for list buffers!\n", unit);
  701                 error = ENXIO;
  702                 goto fail;
  703         }
  704 
  705         bzero(sc->sf_ldata, sizeof(struct sf_list_data));
  706 
  707         /* Do MII setup. */
  708         if (mii_phy_probe(dev, &sc->sf_miibus,
  709             sf_ifmedia_upd, sf_ifmedia_sts)) {
  710                 printf("sf%d: MII without any phy!\n", sc->sf_unit);
  711                 error = ENXIO;
  712                 goto fail;
  713         }
  714 
  715         ifp = &sc->arpcom.ac_if;
  716         ifp->if_softc = sc;
  717         if_initname(ifp, device_get_name(dev), device_get_unit(dev));
  718         ifp->if_mtu = ETHERMTU;
  719         ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST |
  720             IFF_NEEDSGIANT;
  721         ifp->if_ioctl = sf_ioctl;
  722         ifp->if_start = sf_start;
  723         ifp->if_watchdog = sf_watchdog;
  724         ifp->if_init = sf_init;
  725         ifp->if_baudrate = 10000000;
  726         IFQ_SET_MAXLEN(&ifp->if_snd, SF_TX_DLIST_CNT - 1);
  727         ifp->if_snd.ifq_drv_maxlen = SF_TX_DLIST_CNT - 1;
  728         IFQ_SET_READY(&ifp->if_snd);
  729 #ifdef DEVICE_POLLING
  730         ifp->if_capabilities |= IFCAP_POLLING;
  731 #endif /* DEVICE_POLLING */
  732         ifp->if_capenable = ifp->if_capabilities;
  733 
  734         /*
  735          * Call MI attach routine.
  736          */
  737         ether_ifattach(ifp, sc->arpcom.ac_enaddr);
  738 
  739         /* Hook interrupt last to avoid having to lock softc */
  740         error = bus_setup_intr(dev, sc->sf_irq, INTR_TYPE_NET,
  741             sf_intr, sc, &sc->sf_intrhand);
  742 
  743         if (error) {
  744                 printf("sf%d: couldn't set up irq\n", unit);
  745                 ether_ifdetach(ifp);
  746                 goto fail;
  747         }
  748 
  749 fail:
  750         if (error)
  751                 sf_detach(dev);
  752 
  753         return(error);
  754 }
  755 
  756 /*
  757  * Shutdown hardware and free up resources. This can be called any
  758  * time after the mutex has been initialized. It is called in both
  759  * the error case in attach and the normal detach case so it needs
  760  * to be careful about only freeing resources that have actually been
  761  * allocated.
  762  */
  763 static int
  764 sf_detach(dev)
  765         device_t                dev;
  766 {
  767         struct sf_softc         *sc;
  768         struct ifnet            *ifp;
  769 
  770         sc = device_get_softc(dev);
  771         KASSERT(mtx_initialized(&sc->sf_mtx), ("sf mutex not initialized"));
  772         SF_LOCK(sc);
  773         ifp = &sc->arpcom.ac_if;
  774 
  775         /* These should only be active if attach succeeded */
  776         if (device_is_attached(dev)) {
  777                 sf_stop(sc);
  778                 ether_ifdetach(ifp);
  779         }
  780         if (sc->sf_miibus)
  781                 device_delete_child(dev, sc->sf_miibus);
  782         bus_generic_detach(dev);
  783 
  784         if (sc->sf_intrhand)
  785                 bus_teardown_intr(dev, sc->sf_irq, sc->sf_intrhand);
  786         if (sc->sf_irq)
  787                 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->sf_irq);
  788         if (sc->sf_res)
  789                 bus_release_resource(dev, SF_RES, SF_RID, sc->sf_res);
  790 
  791         if (sc->sf_ldata)
  792                 contigfree(sc->sf_ldata, sizeof(struct sf_list_data), M_DEVBUF);
  793 
  794         SF_UNLOCK(sc);
  795         mtx_destroy(&sc->sf_mtx);
  796 
  797         return(0);
  798 }
  799 
  800 static int
  801 sf_init_rx_ring(sc)
  802         struct sf_softc         *sc;
  803 {
  804         struct sf_list_data     *ld;
  805         int                     i;
  806 
  807         ld = sc->sf_ldata;
  808 
  809         bzero((char *)ld->sf_rx_dlist_big,
  810             sizeof(struct sf_rx_bufdesc_type0) * SF_RX_DLIST_CNT);
  811         bzero((char *)ld->sf_rx_clist,
  812             sizeof(struct sf_rx_cmpdesc_type3) * SF_RX_CLIST_CNT);
  813 
  814         for (i = 0; i < SF_RX_DLIST_CNT; i++) {
  815                 if (sf_newbuf(sc, &ld->sf_rx_dlist_big[i], NULL) == ENOBUFS)
  816                         return(ENOBUFS);
  817         }
  818 
  819         return(0);
  820 }
  821 
  822 static void
  823 sf_init_tx_ring(sc)
  824         struct sf_softc         *sc;
  825 {
  826         struct sf_list_data     *ld;
  827         int                     i;
  828 
  829         ld = sc->sf_ldata;
  830 
  831         bzero((char *)ld->sf_tx_dlist,
  832             sizeof(struct sf_tx_bufdesc_type0) * SF_TX_DLIST_CNT);
  833         bzero((char *)ld->sf_tx_clist,
  834             sizeof(struct sf_tx_cmpdesc_type0) * SF_TX_CLIST_CNT);
  835 
  836         for (i = 0; i < SF_TX_DLIST_CNT; i++)
  837                 ld->sf_tx_dlist[i].sf_id = SF_TX_BUFDESC_ID;
  838         for (i = 0; i < SF_TX_CLIST_CNT; i++)
  839                 ld->sf_tx_clist[i].sf_type = SF_TXCMPTYPE_TX;
  840 
  841         ld->sf_tx_dlist[SF_TX_DLIST_CNT - 1].sf_end = 1;
  842         sc->sf_tx_cnt = 0;
  843 }
  844 
  845 static int
  846 sf_newbuf(sc, c, m)
  847         struct sf_softc         *sc;
  848         struct sf_rx_bufdesc_type0      *c;
  849         struct mbuf             *m;
  850 {
  851         struct mbuf             *m_new = NULL;
  852 
  853         if (m == NULL) {
  854                 MGETHDR(m_new, M_DONTWAIT, MT_DATA);
  855                 if (m_new == NULL)
  856                         return(ENOBUFS);
  857 
  858                 MCLGET(m_new, M_DONTWAIT);
  859                 if (!(m_new->m_flags & M_EXT)) {
  860                         m_freem(m_new);
  861                         return(ENOBUFS);
  862                 }
  863                 m_new->m_len = m_new->m_pkthdr.len = MCLBYTES;
  864         } else {
  865                 m_new = m;
  866                 m_new->m_len = m_new->m_pkthdr.len = MCLBYTES;
  867                 m_new->m_data = m_new->m_ext.ext_buf;
  868         }
  869 
  870         m_adj(m_new, sizeof(u_int64_t));
  871 
  872         c->sf_mbuf = m_new;
  873         c->sf_addrlo = SF_RX_HOSTADDR(vtophys(mtod(m_new, caddr_t)));
  874         c->sf_valid = 1;
  875 
  876         return(0);
  877 }
  878 
  879 /*
  880  * The starfire is programmed to use 'normal' mode for packet reception,
  881  * which means we use the consumer/producer model for both the buffer
  882  * descriptor queue and the completion descriptor queue. The only problem
  883  * with this is that it involves a lot of register accesses: we have to
  884  * read the RX completion consumer and producer indexes and the RX buffer
  885  * producer index, plus the RX completion consumer and RX buffer producer
  886  * indexes have to be updated. It would have been easier if Adaptec had
  887  * put each index in a separate register, especially given that the damn
  888  * NIC has a 512K register space.
  889  *
  890  * In spite of all the lovely features that Adaptec crammed into the 6915,
  891  * it is marred by one truly stupid design flaw, which is that receive
  892  * buffer addresses must be aligned on a longword boundary. This forces
  893  * the packet payload to be unaligned, which is suboptimal on the x86 and
  894  * completely unuseable on the Alpha. Our only recourse is to copy received
  895  * packets into properly aligned buffers before handing them off.
  896  */
  897 
  898 static void
  899 sf_rxeof(sc)
  900         struct sf_softc         *sc;
  901 {
  902         struct mbuf             *m;
  903         struct ifnet            *ifp;
  904         struct sf_rx_bufdesc_type0      *desc;
  905         struct sf_rx_cmpdesc_type3      *cur_rx;
  906         u_int32_t               rxcons, rxprod;
  907         int                     cmpprodidx, cmpconsidx, bufprodidx;
  908 
  909         SF_LOCK_ASSERT(sc);
  910 
  911         ifp = &sc->arpcom.ac_if;
  912 
  913         rxcons = csr_read_4(sc, SF_CQ_CONSIDX);
  914         rxprod = csr_read_4(sc, SF_RXDQ_PTR_Q1);
  915         cmpprodidx = SF_IDX_LO(csr_read_4(sc, SF_CQ_PRODIDX));
  916         cmpconsidx = SF_IDX_LO(rxcons);
  917         bufprodidx = SF_IDX_LO(rxprod);
  918 
  919         while (cmpconsidx != cmpprodidx) {
  920                 struct mbuf             *m0;
  921 
  922 #ifdef DEVICE_POLLING
  923                 if (ifp->if_flags & IFF_POLLING) {
  924                         if (sc->rxcycles <= 0)
  925                                 break;
  926                         sc->rxcycles--;
  927                 }
  928 #endif /* DEVICE_POLLING */
  929 
  930                 cur_rx = &sc->sf_ldata->sf_rx_clist[cmpconsidx];
  931                 desc = &sc->sf_ldata->sf_rx_dlist_big[cur_rx->sf_endidx];
  932                 m = desc->sf_mbuf;
  933                 SF_INC(cmpconsidx, SF_RX_CLIST_CNT);
  934                 SF_INC(bufprodidx, SF_RX_DLIST_CNT);
  935 
  936                 if (!(cur_rx->sf_status1 & SF_RXSTAT1_OK)) {
  937                         ifp->if_ierrors++;
  938                         sf_newbuf(sc, desc, m);
  939                         continue;
  940                 }
  941 
  942                 m0 = m_devget(mtod(m, char *), cur_rx->sf_len, ETHER_ALIGN,
  943                     ifp, NULL);
  944                 sf_newbuf(sc, desc, m);
  945                 if (m0 == NULL) {
  946                         ifp->if_ierrors++;
  947                         continue;
  948                 }
  949                 m = m0;
  950 
  951                 ifp->if_ipackets++;
  952                 SF_UNLOCK(sc);
  953                 (*ifp->if_input)(ifp, m);
  954                 SF_LOCK(sc);
  955         }
  956 
  957         csr_write_4(sc, SF_CQ_CONSIDX,
  958             (rxcons & ~SF_CQ_CONSIDX_RXQ1) | cmpconsidx);
  959         csr_write_4(sc, SF_RXDQ_PTR_Q1,
  960             (rxprod & ~SF_RXDQ_PRODIDX) | bufprodidx);
  961 }
  962 
  963 /*
  964  * Read the transmit status from the completion queue and release
  965  * mbufs. Note that the buffer descriptor index in the completion
  966  * descriptor is an offset from the start of the transmit buffer
  967  * descriptor list in bytes. This is important because the manual
  968  * gives the impression that it should match the producer/consumer
  969  * index, which is the offset in 8 byte blocks.
  970  */
  971 static void
  972 sf_txeof(sc)
  973         struct sf_softc         *sc;
  974 {
  975         int                     txcons, cmpprodidx, cmpconsidx;
  976         struct sf_tx_cmpdesc_type1 *cur_cmp;
  977         struct sf_tx_bufdesc_type0 *cur_tx;
  978         struct ifnet            *ifp;
  979 
  980         ifp = &sc->arpcom.ac_if;
  981 
  982         txcons = csr_read_4(sc, SF_CQ_CONSIDX);
  983         cmpprodidx = SF_IDX_HI(csr_read_4(sc, SF_CQ_PRODIDX));
  984         cmpconsidx = SF_IDX_HI(txcons);
  985 
  986         while (cmpconsidx != cmpprodidx) {
  987                 cur_cmp = &sc->sf_ldata->sf_tx_clist[cmpconsidx];
  988                 cur_tx = &sc->sf_ldata->sf_tx_dlist[cur_cmp->sf_index >> 7];
  989 
  990                 if (cur_cmp->sf_txstat & SF_TXSTAT_TX_OK)
  991                         ifp->if_opackets++;
  992                 else {
  993                         if (cur_cmp->sf_txstat & SF_TXSTAT_TX_UNDERRUN)
  994                                 sf_txthresh_adjust(sc);
  995                         ifp->if_oerrors++;
  996                 }
  997 
  998                 sc->sf_tx_cnt--;
  999                 if (cur_tx->sf_mbuf != NULL) {
 1000                         m_freem(cur_tx->sf_mbuf);
 1001                         cur_tx->sf_mbuf = NULL;
 1002                 } else
 1003                         break;
 1004                 SF_INC(cmpconsidx, SF_TX_CLIST_CNT);
 1005         }
 1006 
 1007         ifp->if_timer = 0;
 1008         ifp->if_flags &= ~IFF_OACTIVE;
 1009 
 1010         csr_write_4(sc, SF_CQ_CONSIDX,
 1011             (txcons & ~SF_CQ_CONSIDX_TXQ) |
 1012             ((cmpconsidx << 16) & 0xFFFF0000));
 1013 }
 1014 
 1015 static void
 1016 sf_txthresh_adjust(sc)
 1017         struct sf_softc         *sc;
 1018 {
 1019         u_int32_t               txfctl;
 1020         u_int8_t                txthresh;
 1021 
 1022         txfctl = csr_read_4(sc, SF_TX_FRAMCTL);
 1023         txthresh = txfctl & SF_TXFRMCTL_TXTHRESH;
 1024         if (txthresh < 0xFF) {
 1025                 txthresh++;
 1026                 txfctl &= ~SF_TXFRMCTL_TXTHRESH;
 1027                 txfctl |= txthresh;
 1028 #ifdef DIAGNOSTIC
 1029                 printf("sf%d: tx underrun, increasing "
 1030                     "tx threshold to %d bytes\n",
 1031                     sc->sf_unit, txthresh * 4);
 1032 #endif
 1033                 csr_write_4(sc, SF_TX_FRAMCTL, txfctl);
 1034         }
 1035 }
 1036 
 1037 #ifdef DEVICE_POLLING
 1038 static void
 1039 sf_poll(struct ifnet *ifp, enum poll_cmd cmd, int count)
 1040 {
 1041         struct sf_softc *sc = ifp->if_softc;
 1042 
 1043         SF_LOCK(sc);
 1044         sf_poll_locked(ifp, cmd, count);
 1045         SF_UNLOCK(sc);
 1046 }
 1047 
 1048 static void
 1049 sf_poll_locked(struct ifnet *ifp, enum poll_cmd cmd, int count)
 1050 {
 1051         struct sf_softc *sc = ifp->if_softc;
 1052 
 1053         SF_LOCK_ASSERT(sc);
 1054 
 1055         if (!(ifp->if_capenable & IFCAP_POLLING)) {
 1056                 ether_poll_deregister(ifp);
 1057                 cmd = POLL_DEREGISTER;
 1058         }
 1059 
 1060         if (cmd == POLL_DEREGISTER) {
 1061                 /* Final call, enable interrupts. */
 1062                 csr_write_4(sc, SF_IMR, SF_INTRS);
 1063                 return;
 1064         }
 1065 
 1066         sc->rxcycles = count;
 1067         sf_rxeof(sc);
 1068         sf_txeof(sc);
 1069         if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd))
 1070                 sf_start(ifp);
 1071 
 1072         if (cmd == POLL_AND_CHECK_STATUS) {
 1073                 u_int32_t status;
 1074 
 1075                 status = csr_read_4(sc, SF_ISR);
 1076                 if (status)
 1077                         csr_write_4(sc, SF_ISR, status);
 1078 
 1079                 if (status & SF_ISR_TX_LOFIFO)
 1080                         sf_txthresh_adjust(sc);
 1081 
 1082                 if (status & SF_ISR_ABNORMALINTR) {
 1083                         if (status & SF_ISR_STATSOFLOW) {
 1084                                 untimeout(sf_stats_update, sc,
 1085                                     sc->sf_stat_ch);
 1086                                 sf_stats_update(sc);
 1087                         } else
 1088                                 sf_init(sc);
 1089                 }
 1090         }
 1091 }
 1092 #endif /* DEVICE_POLLING */
 1093 
 1094 static void
 1095 sf_intr(arg)
 1096         void                    *arg;
 1097 {
 1098         struct sf_softc         *sc;
 1099         struct ifnet            *ifp;
 1100         u_int32_t               status;
 1101 
 1102         sc = arg;
 1103         SF_LOCK(sc);
 1104 
 1105         ifp = &sc->arpcom.ac_if;
 1106 
 1107 #ifdef DEVICE_POLLING
 1108         if (ifp->if_flags & IFF_POLLING)
 1109                 goto done_locked;
 1110 
 1111         if ((ifp->if_capenable & IFCAP_POLLING) &&
 1112             ether_poll_register(sf_poll, ifp)) {
 1113                 /* OK, disable interrupts. */
 1114                 csr_write_4(sc, SF_IMR, 0x00000000);
 1115                 sf_poll_locked(ifp, 0, 1);
 1116                 goto done_locked;
 1117         }
 1118 #endif /* DEVICE_POLLING */
 1119 
 1120         if (!(csr_read_4(sc, SF_ISR_SHADOW) & SF_ISR_PCIINT_ASSERTED)) {
 1121                 SF_UNLOCK(sc);
 1122                 return;
 1123         }
 1124 
 1125         /* Disable interrupts. */
 1126         csr_write_4(sc, SF_IMR, 0x00000000);
 1127 
 1128         for (;;) {
 1129                 status = csr_read_4(sc, SF_ISR);
 1130                 if (status)
 1131                         csr_write_4(sc, SF_ISR, status);
 1132 
 1133                 if (!(status & SF_INTRS))
 1134                         break;
 1135 
 1136                 if (status & SF_ISR_RXDQ1_DMADONE)
 1137                         sf_rxeof(sc);
 1138 
 1139                 if (status & SF_ISR_TX_TXDONE ||
 1140                     status & SF_ISR_TX_DMADONE ||
 1141                     status & SF_ISR_TX_QUEUEDONE)
 1142                         sf_txeof(sc);
 1143 
 1144                 if (status & SF_ISR_TX_LOFIFO)
 1145                         sf_txthresh_adjust(sc);
 1146 
 1147                 if (status & SF_ISR_ABNORMALINTR) {
 1148                         if (status & SF_ISR_STATSOFLOW) {
 1149                                 untimeout(sf_stats_update, sc,
 1150                                     sc->sf_stat_ch);
 1151                                 sf_stats_update(sc);
 1152                         } else
 1153                                 sf_init(sc);
 1154                 }
 1155         }
 1156 
 1157         /* Re-enable interrupts. */
 1158         csr_write_4(sc, SF_IMR, SF_INTRS);
 1159 
 1160         if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd))
 1161                 sf_start(ifp);
 1162 
 1163 #ifdef DEVICE_POLLING
 1164 done_locked:
 1165 #endif /* DEVICE_POLLING */
 1166         SF_UNLOCK(sc);
 1167 }
 1168 
 1169 static void
 1170 sf_init(xsc)
 1171         void                    *xsc;
 1172 {
 1173         struct sf_softc         *sc;
 1174         struct ifnet            *ifp;
 1175         struct mii_data         *mii;
 1176         int                     i;
 1177 
 1178         sc = xsc;
 1179         SF_LOCK(sc);
 1180         ifp = &sc->arpcom.ac_if;
 1181         mii = device_get_softc(sc->sf_miibus);
 1182 
 1183         sf_stop(sc);
 1184         sf_reset(sc);
 1185 
 1186         /* Init all the receive filter registers */
 1187         for (i = SF_RXFILT_PERFECT_BASE;
 1188             i < (SF_RXFILT_HASH_MAX + 1); i += 4)
 1189                 csr_write_4(sc, i, 0);
 1190 
 1191         /* Empty stats counter registers. */
 1192         for (i = 0; i < sizeof(struct sf_stats)/sizeof(u_int32_t); i++)
 1193                 csr_write_4(sc, SF_STATS_BASE +
 1194                     (i + sizeof(u_int32_t)), 0);
 1195 
 1196         /* Init our MAC address */
 1197         csr_write_4(sc, SF_PAR0, *(u_int32_t *)(&sc->arpcom.ac_enaddr[0]));
 1198         csr_write_4(sc, SF_PAR1, *(u_int32_t *)(&sc->arpcom.ac_enaddr[4]));
 1199         sf_setperf(sc, 0, (caddr_t)&sc->arpcom.ac_enaddr);
 1200 
 1201         if (sf_init_rx_ring(sc) == ENOBUFS) {
 1202                 printf("sf%d: initialization failed: no "
 1203                     "memory for rx buffers\n", sc->sf_unit);
 1204                 SF_UNLOCK(sc);
 1205                 return;
 1206         }
 1207 
 1208         sf_init_tx_ring(sc);
 1209 
 1210         csr_write_4(sc, SF_RXFILT, SF_PERFMODE_NORMAL|SF_HASHMODE_WITHVLAN);
 1211 
 1212         /* If we want promiscuous mode, set the allframes bit. */
 1213         if (ifp->if_flags & IFF_PROMISC) {
 1214                 SF_SETBIT(sc, SF_RXFILT, SF_RXFILT_PROMISC);
 1215         } else {
 1216                 SF_CLRBIT(sc, SF_RXFILT, SF_RXFILT_PROMISC);
 1217         }
 1218 
 1219         if (ifp->if_flags & IFF_BROADCAST) {
 1220                 SF_SETBIT(sc, SF_RXFILT, SF_RXFILT_BROAD);
 1221         } else {
 1222                 SF_CLRBIT(sc, SF_RXFILT, SF_RXFILT_BROAD);
 1223         }
 1224 
 1225         /*
 1226          * Load the multicast filter.
 1227          */
 1228         sf_setmulti(sc);
 1229 
 1230         /* Init the completion queue indexes */
 1231         csr_write_4(sc, SF_CQ_CONSIDX, 0);
 1232         csr_write_4(sc, SF_CQ_PRODIDX, 0);
 1233 
 1234         /* Init the RX completion queue */
 1235         csr_write_4(sc, SF_RXCQ_CTL_1,
 1236             vtophys(sc->sf_ldata->sf_rx_clist) & SF_RXCQ_ADDR);
 1237         SF_SETBIT(sc, SF_RXCQ_CTL_1, SF_RXCQTYPE_3);
 1238 
 1239         /* Init RX DMA control. */
 1240         SF_SETBIT(sc, SF_RXDMA_CTL, SF_RXDMA_REPORTBADPKTS);
 1241 
 1242         /* Init the RX buffer descriptor queue. */
 1243         csr_write_4(sc, SF_RXDQ_ADDR_Q1,
 1244             vtophys(sc->sf_ldata->sf_rx_dlist_big));
 1245         csr_write_4(sc, SF_RXDQ_CTL_1, (MCLBYTES << 16) | SF_DESCSPACE_16BYTES);
 1246         csr_write_4(sc, SF_RXDQ_PTR_Q1, SF_RX_DLIST_CNT - 1);
 1247 
 1248         /* Init the TX completion queue */
 1249         csr_write_4(sc, SF_TXCQ_CTL,
 1250             vtophys(sc->sf_ldata->sf_tx_clist) & SF_RXCQ_ADDR);
 1251 
 1252         /* Init the TX buffer descriptor queue. */
 1253         csr_write_4(sc, SF_TXDQ_ADDR_HIPRIO,
 1254                 vtophys(sc->sf_ldata->sf_tx_dlist));
 1255         SF_SETBIT(sc, SF_TX_FRAMCTL, SF_TXFRMCTL_CPLAFTERTX);
 1256         csr_write_4(sc, SF_TXDQ_CTL,
 1257             SF_TXBUFDESC_TYPE0|SF_TXMINSPACE_128BYTES|SF_TXSKIPLEN_8BYTES);
 1258         SF_SETBIT(sc, SF_TXDQ_CTL, SF_TXDQCTL_NODMACMP);
 1259 
 1260         /* Enable autopadding of short TX frames. */
 1261         SF_SETBIT(sc, SF_MACCFG_1, SF_MACCFG1_AUTOPAD);
 1262 
 1263 #ifdef DEVICE_POLLING
 1264         /* Disable interrupts if we are polling. */
 1265         if (ifp->if_flags & IFF_POLLING)
 1266                 csr_write_4(sc, SF_IMR, 0x00000000);
 1267         else
 1268 #endif /* DEVICE_POLLING */
 1269 
 1270         /* Enable interrupts. */
 1271         csr_write_4(sc, SF_IMR, SF_INTRS);
 1272         SF_SETBIT(sc, SF_PCI_DEVCFG, SF_PCIDEVCFG_INTR_ENB);
 1273 
 1274         /* Enable the RX and TX engines. */
 1275         SF_SETBIT(sc, SF_GEN_ETH_CTL, SF_ETHCTL_RX_ENB|SF_ETHCTL_RXDMA_ENB);
 1276         SF_SETBIT(sc, SF_GEN_ETH_CTL, SF_ETHCTL_TX_ENB|SF_ETHCTL_TXDMA_ENB);
 1277 
 1278         /*mii_mediachg(mii);*/
 1279         sf_ifmedia_upd(ifp);
 1280 
 1281         ifp->if_flags |= IFF_RUNNING;
 1282         ifp->if_flags &= ~IFF_OACTIVE;
 1283 
 1284         sc->sf_stat_ch = timeout(sf_stats_update, sc, hz);
 1285 
 1286         SF_UNLOCK(sc);
 1287 }
 1288 
 1289 static int
 1290 sf_encap(sc, c, m_head)
 1291         struct sf_softc         *sc;
 1292         struct sf_tx_bufdesc_type0 *c;
 1293         struct mbuf             *m_head;
 1294 {
 1295         int                     frag = 0;
 1296         struct sf_frag          *f = NULL;
 1297         struct mbuf             *m;
 1298 
 1299         m = m_head;
 1300 
 1301         for (m = m_head, frag = 0; m != NULL; m = m->m_next) {
 1302                 if (m->m_len != 0) {
 1303                         if (frag == SF_MAXFRAGS)
 1304                                 break;
 1305                         f = &c->sf_frags[frag];
 1306                         if (frag == 0)
 1307                                 f->sf_pktlen = m_head->m_pkthdr.len;
 1308                         f->sf_fraglen = m->m_len;
 1309                         f->sf_addr = vtophys(mtod(m, vm_offset_t));
 1310                         frag++;
 1311                 }
 1312         }
 1313 
 1314         if (m != NULL) {
 1315                 struct mbuf             *m_new = NULL;
 1316 
 1317                 MGETHDR(m_new, M_DONTWAIT, MT_DATA);
 1318                 if (m_new == NULL) {
 1319                         printf("sf%d: no memory for tx list\n", sc->sf_unit);
 1320                         return(1);
 1321                 }
 1322 
 1323                 if (m_head->m_pkthdr.len > MHLEN) {
 1324                         MCLGET(m_new, M_DONTWAIT);
 1325                         if (!(m_new->m_flags & M_EXT)) {
 1326                                 m_freem(m_new);
 1327                                 printf("sf%d: no memory for tx list\n",
 1328                                     sc->sf_unit);
 1329                                 return(1);
 1330                         }
 1331                 }
 1332                 m_copydata(m_head, 0, m_head->m_pkthdr.len,
 1333                     mtod(m_new, caddr_t));
 1334                 m_new->m_pkthdr.len = m_new->m_len = m_head->m_pkthdr.len;
 1335                 m_freem(m_head);
 1336                 m_head = m_new;
 1337                 f = &c->sf_frags[0];
 1338                 f->sf_fraglen = f->sf_pktlen = m_head->m_pkthdr.len;
 1339                 f->sf_addr = vtophys(mtod(m_head, caddr_t));
 1340                 frag = 1;
 1341         }
 1342 
 1343         c->sf_mbuf = m_head;
 1344         c->sf_id = SF_TX_BUFDESC_ID;
 1345         c->sf_fragcnt = frag;
 1346         c->sf_intr = 1;
 1347         c->sf_caltcp = 0;
 1348         c->sf_crcen = 1;
 1349 
 1350         return(0);
 1351 }
 1352 
 1353 static void
 1354 sf_start(ifp)
 1355         struct ifnet            *ifp;
 1356 {
 1357         struct sf_softc         *sc;
 1358         struct sf_tx_bufdesc_type0 *cur_tx = NULL;
 1359         struct mbuf             *m_head = NULL;
 1360         int                     i, txprod;
 1361 
 1362         sc = ifp->if_softc;
 1363         SF_LOCK(sc);
 1364 
 1365         if (!sc->sf_link && ifp->if_snd.ifq_len < 10) {
 1366                 SF_UNLOCK(sc);
 1367                 return;
 1368         }
 1369 
 1370         if (ifp->if_flags & IFF_OACTIVE) {
 1371                 SF_UNLOCK(sc);
 1372                 return;
 1373         }
 1374 
 1375         txprod = csr_read_4(sc, SF_TXDQ_PRODIDX);
 1376         i = SF_IDX_HI(txprod) >> 4;
 1377 
 1378         if (sc->sf_ldata->sf_tx_dlist[i].sf_mbuf != NULL) {
 1379                 printf("sf%d: TX ring full, resetting\n", sc->sf_unit);
 1380                 sf_init(sc);
 1381                 txprod = csr_read_4(sc, SF_TXDQ_PRODIDX);
 1382                 i = SF_IDX_HI(txprod) >> 4;
 1383         }
 1384 
 1385         while(sc->sf_ldata->sf_tx_dlist[i].sf_mbuf == NULL) {
 1386                 if (sc->sf_tx_cnt >= (SF_TX_DLIST_CNT - 5)) {
 1387                         ifp->if_flags |= IFF_OACTIVE;
 1388                         cur_tx = NULL;
 1389                         break;
 1390                 }
 1391                 IFQ_DRV_DEQUEUE(&ifp->if_snd, m_head);
 1392                 if (m_head == NULL)
 1393                         break;
 1394 
 1395                 cur_tx = &sc->sf_ldata->sf_tx_dlist[i];
 1396                 if (sf_encap(sc, cur_tx, m_head)) {
 1397                         IFQ_DRV_PREPEND(&ifp->if_snd, m_head);
 1398                         ifp->if_flags |= IFF_OACTIVE;
 1399                         cur_tx = NULL;
 1400                         break;
 1401                 }
 1402 
 1403                 /*
 1404                  * If there's a BPF listener, bounce a copy of this frame
 1405                  * to him.
 1406                  */
 1407                 BPF_MTAP(ifp, m_head);
 1408 
 1409                 SF_INC(i, SF_TX_DLIST_CNT);
 1410                 sc->sf_tx_cnt++;
 1411                 /*
 1412                  * Don't get the TX DMA queue get too full.
 1413                  */
 1414                 if (sc->sf_tx_cnt > 64)
 1415                         break;
 1416         }
 1417 
 1418         if (cur_tx == NULL) {
 1419                 SF_UNLOCK(sc);
 1420                 return;
 1421         }
 1422 
 1423         /* Transmit */
 1424         csr_write_4(sc, SF_TXDQ_PRODIDX,
 1425             (txprod & ~SF_TXDQ_PRODIDX_HIPRIO) |
 1426             ((i << 20) & 0xFFFF0000));
 1427 
 1428         ifp->if_timer = 5;
 1429 
 1430         SF_UNLOCK(sc);
 1431 }
 1432 
 1433 static void
 1434 sf_stop(sc)
 1435         struct sf_softc         *sc;
 1436 {
 1437         int                     i;
 1438         struct ifnet            *ifp;
 1439 
 1440         SF_LOCK(sc);
 1441 
 1442         ifp = &sc->arpcom.ac_if;
 1443 
 1444         untimeout(sf_stats_update, sc, sc->sf_stat_ch);
 1445 
 1446 #ifdef DEVICE_POLLING
 1447         ether_poll_deregister(ifp);
 1448 #endif /* DEVICE_POLLING */
 1449         
 1450         csr_write_4(sc, SF_GEN_ETH_CTL, 0);
 1451         csr_write_4(sc, SF_CQ_CONSIDX, 0);
 1452         csr_write_4(sc, SF_CQ_PRODIDX, 0);
 1453         csr_write_4(sc, SF_RXDQ_ADDR_Q1, 0);
 1454         csr_write_4(sc, SF_RXDQ_CTL_1, 0);
 1455         csr_write_4(sc, SF_RXDQ_PTR_Q1, 0);
 1456         csr_write_4(sc, SF_TXCQ_CTL, 0);
 1457         csr_write_4(sc, SF_TXDQ_ADDR_HIPRIO, 0);
 1458         csr_write_4(sc, SF_TXDQ_CTL, 0);
 1459         sf_reset(sc);
 1460 
 1461         sc->sf_link = 0;
 1462 
 1463         for (i = 0; i < SF_RX_DLIST_CNT; i++) {
 1464                 if (sc->sf_ldata->sf_rx_dlist_big[i].sf_mbuf != NULL) {
 1465                         m_freem(sc->sf_ldata->sf_rx_dlist_big[i].sf_mbuf);
 1466                         sc->sf_ldata->sf_rx_dlist_big[i].sf_mbuf = NULL;
 1467                 }
 1468         }
 1469 
 1470         for (i = 0; i < SF_TX_DLIST_CNT; i++) {
 1471                 if (sc->sf_ldata->sf_tx_dlist[i].sf_mbuf != NULL) {
 1472                         m_freem(sc->sf_ldata->sf_tx_dlist[i].sf_mbuf);
 1473                         sc->sf_ldata->sf_tx_dlist[i].sf_mbuf = NULL;
 1474                 }
 1475         }
 1476 
 1477         ifp->if_flags &= ~(IFF_RUNNING|IFF_OACTIVE);
 1478         SF_UNLOCK(sc);
 1479 }
 1480 
 1481 /*
 1482  * Note: it is important that this function not be interrupted. We
 1483  * use a two-stage register access scheme: if we are interrupted in
 1484  * between setting the indirect address register and reading from the
 1485  * indirect data register, the contents of the address register could
 1486  * be changed out from under us.
 1487  */
 1488 static void
 1489 sf_stats_update(xsc)
 1490         void                    *xsc;
 1491 {
 1492         struct sf_softc         *sc;
 1493         struct ifnet            *ifp;
 1494         struct mii_data         *mii;
 1495         struct sf_stats         stats;
 1496         u_int32_t               *ptr;
 1497         int                     i;
 1498 
 1499         sc = xsc;
 1500         SF_LOCK(sc);
 1501         ifp = &sc->arpcom.ac_if;
 1502         mii = device_get_softc(sc->sf_miibus);
 1503 
 1504         ptr = (u_int32_t *)&stats;
 1505         for (i = 0; i < sizeof(stats)/sizeof(u_int32_t); i++)
 1506                 ptr[i] = csr_read_4(sc, SF_STATS_BASE +
 1507                     (i + sizeof(u_int32_t)));
 1508 
 1509         for (i = 0; i < sizeof(stats)/sizeof(u_int32_t); i++)
 1510                 csr_write_4(sc, SF_STATS_BASE +
 1511                     (i + sizeof(u_int32_t)), 0);
 1512 
 1513         ifp->if_collisions += stats.sf_tx_single_colls +
 1514             stats.sf_tx_multi_colls + stats.sf_tx_excess_colls;
 1515 
 1516         mii_tick(mii);
 1517 
 1518         if (!sc->sf_link && mii->mii_media_status & IFM_ACTIVE &&
 1519             IFM_SUBTYPE(mii->mii_media_active) != IFM_NONE) {
 1520                 sc->sf_link++;
 1521                 if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd))
 1522                         sf_start(ifp);
 1523         }
 1524 
 1525         sc->sf_stat_ch = timeout(sf_stats_update, sc, hz);
 1526 
 1527         SF_UNLOCK(sc);
 1528 }
 1529 
 1530 static void
 1531 sf_watchdog(ifp)
 1532         struct ifnet            *ifp;
 1533 {
 1534         struct sf_softc         *sc;
 1535 
 1536         sc = ifp->if_softc;
 1537 
 1538         SF_LOCK(sc);
 1539 
 1540         ifp->if_oerrors++;
 1541         printf("sf%d: watchdog timeout\n", sc->sf_unit);
 1542 
 1543         sf_stop(sc);
 1544         sf_reset(sc);
 1545         sf_init(sc);
 1546 
 1547         if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd))
 1548                 sf_start(ifp);
 1549 
 1550         SF_UNLOCK(sc);
 1551 }
 1552 
 1553 static void
 1554 sf_shutdown(dev)
 1555         device_t                dev;
 1556 {
 1557         struct sf_softc         *sc;
 1558 
 1559         sc = device_get_softc(dev);
 1560 
 1561         sf_stop(sc);
 1562 }

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