FreeBSD/Linux Kernel Cross Reference
sys/pci/if_vr.c
1 /*-
2 * Copyright (c) 1997, 1998
3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. All advertising materials mentioning features or use of this software
14 * must display the following acknowledgement:
15 * This product includes software developed by Bill Paul.
16 * 4. Neither the name of the author nor the names of any co-contributors
17 * may be used to endorse or promote products derived from this software
18 * without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30 * THE POSSIBILITY OF SUCH DAMAGE.
31 */
32
33 #include <sys/cdefs.h>
34 __FBSDID("$FreeBSD: releng/5.4/sys/pci/if_vr.c 142884 2005-03-01 08:11:52Z imp $");
35
36 /*
37 * VIA Rhine fast ethernet PCI NIC driver
38 *
39 * Supports various network adapters based on the VIA Rhine
40 * and Rhine II PCI controllers, including the D-Link DFE530TX.
41 * Datasheets are available at http://www.via.com.tw.
42 *
43 * Written by Bill Paul <wpaul@ctr.columbia.edu>
44 * Electrical Engineering Department
45 * Columbia University, New York City
46 */
47
48 /*
49 * The VIA Rhine controllers are similar in some respects to the
50 * the DEC tulip chips, except less complicated. The controller
51 * uses an MII bus and an external physical layer interface. The
52 * receiver has a one entry perfect filter and a 64-bit hash table
53 * multicast filter. Transmit and receive descriptors are similar
54 * to the tulip.
55 *
56 * The Rhine has a serious flaw in its transmit DMA mechanism:
57 * transmit buffers must be longword aligned. Unfortunately,
58 * FreeBSD doesn't guarantee that mbufs will be filled in starting
59 * at longword boundaries, so we have to do a buffer copy before
60 * transmission.
61 */
62
63 #include <sys/param.h>
64 #include <sys/systm.h>
65 #include <sys/sockio.h>
66 #include <sys/mbuf.h>
67 #include <sys/malloc.h>
68 #include <sys/kernel.h>
69 #include <sys/module.h>
70 #include <sys/socket.h>
71
72 #include <net/if.h>
73 #include <net/if_arp.h>
74 #include <net/ethernet.h>
75 #include <net/if_dl.h>
76 #include <net/if_media.h>
77
78 #include <net/bpf.h>
79
80 #include <vm/vm.h> /* for vtophys */
81 #include <vm/pmap.h> /* for vtophys */
82 #include <machine/bus_pio.h>
83 #include <machine/bus_memio.h>
84 #include <machine/bus.h>
85 #include <machine/resource.h>
86 #include <sys/bus.h>
87 #include <sys/rman.h>
88
89 #include <dev/mii/mii.h>
90 #include <dev/mii/miivar.h>
91
92 #include <dev/pci/pcireg.h>
93 #include <dev/pci/pcivar.h>
94
95 #define VR_USEIOSPACE
96
97 #include <pci/if_vrreg.h>
98
99 MODULE_DEPEND(vr, pci, 1, 1, 1);
100 MODULE_DEPEND(vr, ether, 1, 1, 1);
101 MODULE_DEPEND(vr, miibus, 1, 1, 1);
102
103 /* "controller miibus0" required. See GENERIC if you get errors here. */
104 #include "miibus_if.h"
105
106 #undef VR_USESWSHIFT
107
108 /*
109 * Various supported device vendors/types and their names.
110 */
111 static struct vr_type vr_devs[] = {
112 { VIA_VENDORID, VIA_DEVICEID_RHINE,
113 "VIA VT3043 Rhine I 10/100BaseTX" },
114 { VIA_VENDORID, VIA_DEVICEID_RHINE_II,
115 "VIA VT86C100A Rhine II 10/100BaseTX" },
116 { VIA_VENDORID, VIA_DEVICEID_RHINE_II_2,
117 "VIA VT6102 Rhine II 10/100BaseTX" },
118 { VIA_VENDORID, VIA_DEVICEID_RHINE_III,
119 "VIA VT6105 Rhine III 10/100BaseTX" },
120 { VIA_VENDORID, VIA_DEVICEID_RHINE_III_M,
121 "VIA VT6105M Rhine III 10/100BaseTX" },
122 { DELTA_VENDORID, DELTA_DEVICEID_RHINE_II,
123 "Delta Electronics Rhine II 10/100BaseTX" },
124 { ADDTRON_VENDORID, ADDTRON_DEVICEID_RHINE_II,
125 "Addtron Technology Rhine II 10/100BaseTX" },
126 { 0, 0, NULL }
127 };
128
129 static int vr_probe(device_t);
130 static int vr_attach(device_t);
131 static int vr_detach(device_t);
132
133 static int vr_newbuf(struct vr_softc *, struct vr_chain_onefrag *,
134 struct mbuf *);
135 static int vr_encap(struct vr_softc *, struct vr_chain *, struct mbuf * );
136
137 static void vr_rxeof(struct vr_softc *);
138 static void vr_rxeoc(struct vr_softc *);
139 static void vr_txeof(struct vr_softc *);
140 static void vr_tick(void *);
141 static void vr_intr(void *);
142 static void vr_start(struct ifnet *);
143 static void vr_start_locked(struct ifnet *);
144 static int vr_ioctl(struct ifnet *, u_long, caddr_t);
145 static void vr_init(void *);
146 static void vr_init_locked(struct vr_softc *);
147 static void vr_stop(struct vr_softc *);
148 static void vr_watchdog(struct ifnet *);
149 static void vr_shutdown(device_t);
150 static int vr_ifmedia_upd(struct ifnet *);
151 static void vr_ifmedia_sts(struct ifnet *, struct ifmediareq *);
152
153 #ifdef VR_USESWSHIFT
154 static void vr_mii_sync(struct vr_softc *);
155 static void vr_mii_send(struct vr_softc *, uint32_t, int);
156 #endif
157 static int vr_mii_readreg(struct vr_softc *, struct vr_mii_frame *);
158 static int vr_mii_writereg(struct vr_softc *, struct vr_mii_frame *);
159 static int vr_miibus_readreg(device_t, uint16_t, uint16_t);
160 static int vr_miibus_writereg(device_t, uint16_t, uint16_t, uint16_t);
161 static void vr_miibus_statchg(device_t);
162
163 static void vr_setcfg(struct vr_softc *, int);
164 static void vr_setmulti(struct vr_softc *);
165 static void vr_reset(struct vr_softc *);
166 static int vr_list_rx_init(struct vr_softc *);
167 static int vr_list_tx_init(struct vr_softc *);
168
169 #ifdef VR_USEIOSPACE
170 #define VR_RES SYS_RES_IOPORT
171 #define VR_RID VR_PCI_LOIO
172 #else
173 #define VR_RES SYS_RES_MEMORY
174 #define VR_RID VR_PCI_LOMEM
175 #endif
176
177 static device_method_t vr_methods[] = {
178 /* Device interface */
179 DEVMETHOD(device_probe, vr_probe),
180 DEVMETHOD(device_attach, vr_attach),
181 DEVMETHOD(device_detach, vr_detach),
182 DEVMETHOD(device_shutdown, vr_shutdown),
183
184 /* bus interface */
185 DEVMETHOD(bus_print_child, bus_generic_print_child),
186 DEVMETHOD(bus_driver_added, bus_generic_driver_added),
187
188 /* MII interface */
189 DEVMETHOD(miibus_readreg, vr_miibus_readreg),
190 DEVMETHOD(miibus_writereg, vr_miibus_writereg),
191 DEVMETHOD(miibus_statchg, vr_miibus_statchg),
192
193 { 0, 0 }
194 };
195
196 static driver_t vr_driver = {
197 "vr",
198 vr_methods,
199 sizeof(struct vr_softc)
200 };
201
202 static devclass_t vr_devclass;
203
204 DRIVER_MODULE(vr, pci, vr_driver, vr_devclass, 0, 0);
205 DRIVER_MODULE(miibus, vr, miibus_driver, miibus_devclass, 0, 0);
206
207 #define VR_SETBIT(sc, reg, x) \
208 CSR_WRITE_1(sc, reg, \
209 CSR_READ_1(sc, reg) | (x))
210
211 #define VR_CLRBIT(sc, reg, x) \
212 CSR_WRITE_1(sc, reg, \
213 CSR_READ_1(sc, reg) & ~(x))
214
215 #define VR_SETBIT16(sc, reg, x) \
216 CSR_WRITE_2(sc, reg, \
217 CSR_READ_2(sc, reg) | (x))
218
219 #define VR_CLRBIT16(sc, reg, x) \
220 CSR_WRITE_2(sc, reg, \
221 CSR_READ_2(sc, reg) & ~(x))
222
223 #define VR_SETBIT32(sc, reg, x) \
224 CSR_WRITE_4(sc, reg, \
225 CSR_READ_4(sc, reg) | (x))
226
227 #define VR_CLRBIT32(sc, reg, x) \
228 CSR_WRITE_4(sc, reg, \
229 CSR_READ_4(sc, reg) & ~(x))
230
231 #define SIO_SET(x) \
232 CSR_WRITE_1(sc, VR_MIICMD, \
233 CSR_READ_1(sc, VR_MIICMD) | (x))
234
235 #define SIO_CLR(x) \
236 CSR_WRITE_1(sc, VR_MIICMD, \
237 CSR_READ_1(sc, VR_MIICMD) & ~(x))
238
239 #ifdef VR_USESWSHIFT
240 /*
241 * Sync the PHYs by setting data bit and strobing the clock 32 times.
242 */
243 static void
244 vr_mii_sync(struct vr_softc *sc)
245 {
246 register int i;
247
248 SIO_SET(VR_MIICMD_DIR|VR_MIICMD_DATAIN);
249
250 for (i = 0; i < 32; i++) {
251 SIO_SET(VR_MIICMD_CLK);
252 DELAY(1);
253 SIO_CLR(VR_MIICMD_CLK);
254 DELAY(1);
255 }
256 }
257
258 /*
259 * Clock a series of bits through the MII.
260 */
261 static void
262 vr_mii_send(struct vr_softc *sc, uint32_t bits, int cnt)
263 {
264 int i;
265
266 SIO_CLR(VR_MIICMD_CLK);
267
268 for (i = (0x1 << (cnt - 1)); i; i >>= 1) {
269 if (bits & i) {
270 SIO_SET(VR_MIICMD_DATAIN);
271 } else {
272 SIO_CLR(VR_MIICMD_DATAIN);
273 }
274 DELAY(1);
275 SIO_CLR(VR_MIICMD_CLK);
276 DELAY(1);
277 SIO_SET(VR_MIICMD_CLK);
278 }
279 }
280 #endif
281
282 /*
283 * Read an PHY register through the MII.
284 */
285 static int
286 vr_mii_readreg(struct vr_softc *sc, struct vr_mii_frame *frame)
287 #ifdef VR_USESWSHIFT
288 {
289 int i, ack;
290
291 /* Set up frame for RX. */
292 frame->mii_stdelim = VR_MII_STARTDELIM;
293 frame->mii_opcode = VR_MII_READOP;
294 frame->mii_turnaround = 0;
295 frame->mii_data = 0;
296
297 CSR_WRITE_1(sc, VR_MIICMD, 0);
298 VR_SETBIT(sc, VR_MIICMD, VR_MIICMD_DIRECTPGM);
299
300 /* Turn on data xmit. */
301 SIO_SET(VR_MIICMD_DIR);
302
303 vr_mii_sync(sc);
304
305 /* Send command/address info. */
306 vr_mii_send(sc, frame->mii_stdelim, 2);
307 vr_mii_send(sc, frame->mii_opcode, 2);
308 vr_mii_send(sc, frame->mii_phyaddr, 5);
309 vr_mii_send(sc, frame->mii_regaddr, 5);
310
311 /* Idle bit. */
312 SIO_CLR((VR_MIICMD_CLK|VR_MIICMD_DATAIN));
313 DELAY(1);
314 SIO_SET(VR_MIICMD_CLK);
315 DELAY(1);
316
317 /* Turn off xmit. */
318 SIO_CLR(VR_MIICMD_DIR);
319
320 /* Check for ack */
321 SIO_CLR(VR_MIICMD_CLK);
322 DELAY(1);
323 ack = CSR_READ_4(sc, VR_MIICMD) & VR_MIICMD_DATAOUT;
324 SIO_SET(VR_MIICMD_CLK);
325 DELAY(1);
326
327 /*
328 * Now try reading data bits. If the ack failed, we still
329 * need to clock through 16 cycles to keep the PHY(s) in sync.
330 */
331 if (ack) {
332 for(i = 0; i < 16; i++) {
333 SIO_CLR(VR_MIICMD_CLK);
334 DELAY(1);
335 SIO_SET(VR_MIICMD_CLK);
336 DELAY(1);
337 }
338 goto fail;
339 }
340
341 for (i = 0x8000; i; i >>= 1) {
342 SIO_CLR(VR_MIICMD_CLK);
343 DELAY(1);
344 if (!ack) {
345 if (CSR_READ_4(sc, VR_MIICMD) & VR_MIICMD_DATAOUT)
346 frame->mii_data |= i;
347 DELAY(1);
348 }
349 SIO_SET(VR_MIICMD_CLK);
350 DELAY(1);
351 }
352
353 fail:
354 SIO_CLR(VR_MIICMD_CLK);
355 DELAY(1);
356 SIO_SET(VR_MIICMD_CLK);
357 DELAY(1);
358
359 if (ack)
360 return (1);
361 return (0);
362 }
363 #else
364 {
365 int i;
366
367 /* Set the PHY address. */
368 CSR_WRITE_1(sc, VR_PHYADDR, (CSR_READ_1(sc, VR_PHYADDR)& 0xe0)|
369 frame->mii_phyaddr);
370
371 /* Set the register address. */
372 CSR_WRITE_1(sc, VR_MIIADDR, frame->mii_regaddr);
373 VR_SETBIT(sc, VR_MIICMD, VR_MIICMD_READ_ENB);
374
375 for (i = 0; i < 10000; i++) {
376 if ((CSR_READ_1(sc, VR_MIICMD) & VR_MIICMD_READ_ENB) == 0)
377 break;
378 DELAY(1);
379 }
380 frame->mii_data = CSR_READ_2(sc, VR_MIIDATA);
381
382 return (0);
383 }
384 #endif
385
386
387 /*
388 * Write to a PHY register through the MII.
389 */
390 static int
391 vr_mii_writereg(struct vr_softc *sc, struct vr_mii_frame *frame)
392 #ifdef VR_USESWSHIFT
393 {
394 CSR_WRITE_1(sc, VR_MIICMD, 0);
395 VR_SETBIT(sc, VR_MIICMD, VR_MIICMD_DIRECTPGM);
396
397 /* Set up frame for TX. */
398 frame->mii_stdelim = VR_MII_STARTDELIM;
399 frame->mii_opcode = VR_MII_WRITEOP;
400 frame->mii_turnaround = VR_MII_TURNAROUND;
401
402 /* Turn on data output. */
403 SIO_SET(VR_MIICMD_DIR);
404
405 vr_mii_sync(sc);
406
407 vr_mii_send(sc, frame->mii_stdelim, 2);
408 vr_mii_send(sc, frame->mii_opcode, 2);
409 vr_mii_send(sc, frame->mii_phyaddr, 5);
410 vr_mii_send(sc, frame->mii_regaddr, 5);
411 vr_mii_send(sc, frame->mii_turnaround, 2);
412 vr_mii_send(sc, frame->mii_data, 16);
413
414 /* Idle bit. */
415 SIO_SET(VR_MIICMD_CLK);
416 DELAY(1);
417 SIO_CLR(VR_MIICMD_CLK);
418 DELAY(1);
419
420 /* Turn off xmit. */
421 SIO_CLR(VR_MIICMD_DIR);
422
423 return (0);
424 }
425 #else
426 {
427 int i;
428
429 /* Set the PHY address. */
430 CSR_WRITE_1(sc, VR_PHYADDR, (CSR_READ_1(sc, VR_PHYADDR)& 0xe0)|
431 frame->mii_phyaddr);
432
433 /* Set the register address and data to write. */
434 CSR_WRITE_1(sc, VR_MIIADDR, frame->mii_regaddr);
435 CSR_WRITE_2(sc, VR_MIIDATA, frame->mii_data);
436
437 VR_SETBIT(sc, VR_MIICMD, VR_MIICMD_WRITE_ENB);
438
439 for (i = 0; i < 10000; i++) {
440 if ((CSR_READ_1(sc, VR_MIICMD) & VR_MIICMD_WRITE_ENB) == 0)
441 break;
442 DELAY(1);
443 }
444
445 return (0);
446 }
447 #endif
448
449 static int
450 vr_miibus_readreg(device_t dev, uint16_t phy, uint16_t reg)
451 {
452 struct vr_mii_frame frame;
453 struct vr_softc *sc = device_get_softc(dev);
454
455 switch (sc->vr_revid) {
456 case REV_ID_VT6102_APOLLO:
457 if (phy != 1) {
458 frame.mii_data = 0;
459 goto out;
460 }
461 default:
462 break;
463 }
464
465 bzero((char *)&frame, sizeof(frame));
466 frame.mii_phyaddr = phy;
467 frame.mii_regaddr = reg;
468 vr_mii_readreg(sc, &frame);
469
470 out:
471 return (frame.mii_data);
472 }
473
474 static int
475 vr_miibus_writereg(device_t dev, uint16_t phy, uint16_t reg, uint16_t data)
476 {
477 struct vr_mii_frame frame;
478 struct vr_softc *sc = device_get_softc(dev);
479
480 switch (sc->vr_revid) {
481 case REV_ID_VT6102_APOLLO:
482 if (phy != 1)
483 return (0);
484 default:
485 break;
486 }
487
488 bzero((char *)&frame, sizeof(frame));
489 frame.mii_phyaddr = phy;
490 frame.mii_regaddr = reg;
491 frame.mii_data = data;
492 vr_mii_writereg(sc, &frame);
493
494 return (0);
495 }
496
497 static void
498 vr_miibus_statchg(device_t dev)
499 {
500 struct mii_data *mii;
501 struct vr_softc *sc = device_get_softc(dev);
502
503 mii = device_get_softc(sc->vr_miibus);
504 vr_setcfg(sc, mii->mii_media_active);
505 }
506
507 /*
508 * Program the 64-bit multicast hash filter.
509 */
510 static void
511 vr_setmulti(struct vr_softc *sc)
512 {
513 struct ifnet *ifp = &sc->arpcom.ac_if;
514 int h = 0;
515 uint32_t hashes[2] = { 0, 0 };
516 struct ifmultiaddr *ifma;
517 uint8_t rxfilt;
518 int mcnt = 0;
519
520 VR_LOCK_ASSERT(sc);
521
522 rxfilt = CSR_READ_1(sc, VR_RXCFG);
523
524 if (ifp->if_flags & IFF_ALLMULTI || ifp->if_flags & IFF_PROMISC) {
525 rxfilt |= VR_RXCFG_RX_MULTI;
526 CSR_WRITE_1(sc, VR_RXCFG, rxfilt);
527 CSR_WRITE_4(sc, VR_MAR0, 0xFFFFFFFF);
528 CSR_WRITE_4(sc, VR_MAR1, 0xFFFFFFFF);
529 return;
530 }
531
532 /* First, zero out all the existing hash bits. */
533 CSR_WRITE_4(sc, VR_MAR0, 0);
534 CSR_WRITE_4(sc, VR_MAR1, 0);
535
536 /* Now program new ones. */
537 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
538 if (ifma->ifma_addr->sa_family != AF_LINK)
539 continue;
540 h = ether_crc32_be(LLADDR((struct sockaddr_dl *)
541 ifma->ifma_addr), ETHER_ADDR_LEN) >> 26;
542 if (h < 32)
543 hashes[0] |= (1 << h);
544 else
545 hashes[1] |= (1 << (h - 32));
546 mcnt++;
547 }
548
549 if (mcnt)
550 rxfilt |= VR_RXCFG_RX_MULTI;
551 else
552 rxfilt &= ~VR_RXCFG_RX_MULTI;
553
554 CSR_WRITE_4(sc, VR_MAR0, hashes[0]);
555 CSR_WRITE_4(sc, VR_MAR1, hashes[1]);
556 CSR_WRITE_1(sc, VR_RXCFG, rxfilt);
557 }
558
559 /*
560 * In order to fiddle with the
561 * 'full-duplex' and '100Mbps' bits in the netconfig register, we
562 * first have to put the transmit and/or receive logic in the idle state.
563 */
564 static void
565 vr_setcfg(struct vr_softc *sc, int media)
566 {
567 int restart = 0;
568
569 VR_LOCK_ASSERT(sc);
570
571 if (CSR_READ_2(sc, VR_COMMAND) & (VR_CMD_TX_ON|VR_CMD_RX_ON)) {
572 restart = 1;
573 VR_CLRBIT16(sc, VR_COMMAND, (VR_CMD_TX_ON|VR_CMD_RX_ON));
574 }
575
576 if ((media & IFM_GMASK) == IFM_FDX)
577 VR_SETBIT16(sc, VR_COMMAND, VR_CMD_FULLDUPLEX);
578 else
579 VR_CLRBIT16(sc, VR_COMMAND, VR_CMD_FULLDUPLEX);
580
581 if (restart)
582 VR_SETBIT16(sc, VR_COMMAND, VR_CMD_TX_ON|VR_CMD_RX_ON);
583 }
584
585 static void
586 vr_reset(struct vr_softc *sc)
587 {
588 register int i;
589
590 /*VR_LOCK_ASSERT(sc);*/ /* XXX: Called during detach w/o lock. */
591
592 VR_SETBIT16(sc, VR_COMMAND, VR_CMD_RESET);
593
594 for (i = 0; i < VR_TIMEOUT; i++) {
595 DELAY(10);
596 if (!(CSR_READ_2(sc, VR_COMMAND) & VR_CMD_RESET))
597 break;
598 }
599 if (i == VR_TIMEOUT) {
600 if (sc->vr_revid < REV_ID_VT3065_A)
601 printf("vr%d: reset never completed!\n", sc->vr_unit);
602 else {
603 /* Use newer force reset command */
604 printf("vr%d: Using force reset command.\n",
605 sc->vr_unit);
606 VR_SETBIT(sc, VR_MISC_CR1, VR_MISCCR1_FORSRST);
607 }
608 }
609
610 /* Wait a little while for the chip to get its brains in order. */
611 DELAY(1000);
612 }
613
614 /*
615 * Probe for a VIA Rhine chip. Check the PCI vendor and device
616 * IDs against our list and return a device name if we find a match.
617 */
618 static int
619 vr_probe(device_t dev)
620 {
621 struct vr_type *t = vr_devs;
622
623 while (t->vr_name != NULL) {
624 if ((pci_get_vendor(dev) == t->vr_vid) &&
625 (pci_get_device(dev) == t->vr_did)) {
626 device_set_desc(dev, t->vr_name);
627 return (BUS_PROBE_DEFAULT);
628 }
629 t++;
630 }
631
632 return (ENXIO);
633 }
634
635 /*
636 * Attach the interface. Allocate softc structures, do ifmedia
637 * setup and ethernet/BPF attach.
638 */
639 static int
640 vr_attach(dev)
641 device_t dev;
642 {
643 int i;
644 u_char eaddr[ETHER_ADDR_LEN];
645 struct vr_softc *sc;
646 struct ifnet *ifp;
647 int unit, error = 0, rid;
648
649 sc = device_get_softc(dev);
650 unit = device_get_unit(dev);
651
652 mtx_init(&sc->vr_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK,
653 MTX_DEF);
654 /*
655 * Map control/status registers.
656 */
657 pci_enable_busmaster(dev);
658 sc->vr_revid = pci_read_config(dev, VR_PCI_REVID, 4) & 0x000000FF;
659
660 rid = VR_RID;
661 sc->vr_res = bus_alloc_resource_any(dev, VR_RES, &rid, RF_ACTIVE);
662
663 if (sc->vr_res == NULL) {
664 printf("vr%d: couldn't map ports/memory\n", unit);
665 error = ENXIO;
666 goto fail;
667 }
668
669 sc->vr_btag = rman_get_bustag(sc->vr_res);
670 sc->vr_bhandle = rman_get_bushandle(sc->vr_res);
671
672 /* Allocate interrupt */
673 rid = 0;
674 sc->vr_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
675 RF_SHAREABLE | RF_ACTIVE);
676
677 if (sc->vr_irq == NULL) {
678 printf("vr%d: couldn't map interrupt\n", unit);
679 error = ENXIO;
680 goto fail;
681 }
682
683 /*
684 * Windows may put the chip in suspend mode when it
685 * shuts down. Be sure to kick it in the head to wake it
686 * up again.
687 */
688 VR_CLRBIT(sc, VR_STICKHW, (VR_STICKHW_DS0|VR_STICKHW_DS1));
689
690 /* Reset the adapter. */
691 vr_reset(sc);
692
693 /*
694 * Turn on bit2 (MIION) in PCI configuration register 0x53 during
695 * initialization and disable AUTOPOLL.
696 */
697 pci_write_config(dev, VR_PCI_MODE,
698 pci_read_config(dev, VR_PCI_MODE, 4) | (VR_MODE3_MIION << 24), 4);
699 VR_CLRBIT(sc, VR_MIICMD, VR_MIICMD_AUTOPOLL);
700
701 /*
702 * Get station address. The way the Rhine chips work,
703 * you're not allowed to directly access the EEPROM once
704 * they've been programmed a special way. Consequently,
705 * we need to read the node address from the PAR0 and PAR1
706 * registers.
707 */
708 VR_SETBIT(sc, VR_EECSR, VR_EECSR_LOAD);
709 DELAY(200);
710 for (i = 0; i < ETHER_ADDR_LEN; i++)
711 eaddr[i] = CSR_READ_1(sc, VR_PAR0 + i);
712
713 sc->vr_unit = unit;
714 bcopy(eaddr, (char *)&sc->arpcom.ac_enaddr, ETHER_ADDR_LEN);
715
716 sc->vr_ldata = contigmalloc(sizeof(struct vr_list_data), M_DEVBUF,
717 M_NOWAIT, 0, 0xffffffff, PAGE_SIZE, 0);
718
719 if (sc->vr_ldata == NULL) {
720 printf("vr%d: no memory for list buffers!\n", unit);
721 error = ENXIO;
722 goto fail;
723 }
724
725 bzero(sc->vr_ldata, sizeof(struct vr_list_data));
726
727 ifp = &sc->arpcom.ac_if;
728 ifp->if_softc = sc;
729 if_initname(ifp, device_get_name(dev), device_get_unit(dev));
730 ifp->if_mtu = ETHERMTU;
731 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
732 ifp->if_ioctl = vr_ioctl;
733 ifp->if_start = vr_start;
734 ifp->if_watchdog = vr_watchdog;
735 ifp->if_init = vr_init;
736 ifp->if_baudrate = 10000000;
737 IFQ_SET_MAXLEN(&ifp->if_snd, VR_TX_LIST_CNT - 1);
738 ifp->if_snd.ifq_maxlen = VR_TX_LIST_CNT - 1;
739 IFQ_SET_READY(&ifp->if_snd);
740 #ifdef DEVICE_POLLING
741 ifp->if_capabilities |= IFCAP_POLLING;
742 #endif
743 ifp->if_capenable = ifp->if_capabilities;
744
745 /* Do MII setup. */
746 if (mii_phy_probe(dev, &sc->vr_miibus,
747 vr_ifmedia_upd, vr_ifmedia_sts)) {
748 printf("vr%d: MII without any phy!\n", sc->vr_unit);
749 error = ENXIO;
750 goto fail;
751 }
752
753 callout_handle_init(&sc->vr_stat_ch);
754
755 /* Call MI attach routine. */
756 ether_ifattach(ifp, eaddr);
757
758 sc->suspended = 0;
759
760 /* Hook interrupt last to avoid having to lock softc */
761 error = bus_setup_intr(dev, sc->vr_irq, INTR_TYPE_NET | INTR_MPSAFE,
762 vr_intr, sc, &sc->vr_intrhand);
763
764 if (error) {
765 printf("vr%d: couldn't set up irq\n", unit);
766 ether_ifdetach(ifp);
767 goto fail;
768 }
769
770 fail:
771 if (error)
772 vr_detach(dev);
773
774 return (error);
775 }
776
777 /*
778 * Shutdown hardware and free up resources. This can be called any
779 * time after the mutex has been initialized. It is called in both
780 * the error case in attach and the normal detach case so it needs
781 * to be careful about only freeing resources that have actually been
782 * allocated.
783 */
784 static int
785 vr_detach(device_t dev)
786 {
787 struct vr_softc *sc = device_get_softc(dev);
788 struct ifnet *ifp = &sc->arpcom.ac_if;
789
790 KASSERT(mtx_initialized(&sc->vr_mtx), ("vr mutex not initialized"));
791
792 VR_LOCK(sc);
793
794 sc->suspended = 1;
795
796 /* These should only be active if attach succeeded */
797 if (device_is_attached(dev)) {
798 vr_stop(sc);
799 VR_UNLOCK(sc); /* XXX: Avoid recursive acquire. */
800 ether_ifdetach(ifp);
801 VR_LOCK(sc);
802 }
803 if (sc->vr_miibus)
804 device_delete_child(dev, sc->vr_miibus);
805 bus_generic_detach(dev);
806
807 if (sc->vr_intrhand)
808 bus_teardown_intr(dev, sc->vr_irq, sc->vr_intrhand);
809 if (sc->vr_irq)
810 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->vr_irq);
811 if (sc->vr_res)
812 bus_release_resource(dev, VR_RES, VR_RID, sc->vr_res);
813
814 if (sc->vr_ldata)
815 contigfree(sc->vr_ldata, sizeof(struct vr_list_data), M_DEVBUF);
816
817 VR_UNLOCK(sc);
818 mtx_destroy(&sc->vr_mtx);
819
820 return (0);
821 }
822
823 /*
824 * Initialize the transmit descriptors.
825 */
826 static int
827 vr_list_tx_init(struct vr_softc *sc)
828 {
829 struct vr_chain_data *cd;
830 struct vr_list_data *ld;
831 int i;
832
833 cd = &sc->vr_cdata;
834 ld = sc->vr_ldata;
835 for (i = 0; i < VR_TX_LIST_CNT; i++) {
836 cd->vr_tx_chain[i].vr_ptr = &ld->vr_tx_list[i];
837 if (i == (VR_TX_LIST_CNT - 1))
838 cd->vr_tx_chain[i].vr_nextdesc =
839 &cd->vr_tx_chain[0];
840 else
841 cd->vr_tx_chain[i].vr_nextdesc =
842 &cd->vr_tx_chain[i + 1];
843 }
844 cd->vr_tx_cons = cd->vr_tx_prod = &cd->vr_tx_chain[0];
845
846 return (0);
847 }
848
849
850 /*
851 * Initialize the RX descriptors and allocate mbufs for them. Note that
852 * we arrange the descriptors in a closed ring, so that the last descriptor
853 * points back to the first.
854 */
855 static int
856 vr_list_rx_init(struct vr_softc *sc)
857 {
858 struct vr_chain_data *cd;
859 struct vr_list_data *ld;
860 int i;
861
862 VR_LOCK_ASSERT(sc);
863
864 cd = &sc->vr_cdata;
865 ld = sc->vr_ldata;
866
867 for (i = 0; i < VR_RX_LIST_CNT; i++) {
868 cd->vr_rx_chain[i].vr_ptr =
869 (struct vr_desc *)&ld->vr_rx_list[i];
870 if (vr_newbuf(sc, &cd->vr_rx_chain[i], NULL) == ENOBUFS)
871 return (ENOBUFS);
872 if (i == (VR_RX_LIST_CNT - 1)) {
873 cd->vr_rx_chain[i].vr_nextdesc =
874 &cd->vr_rx_chain[0];
875 ld->vr_rx_list[i].vr_next =
876 vtophys(&ld->vr_rx_list[0]);
877 } else {
878 cd->vr_rx_chain[i].vr_nextdesc =
879 &cd->vr_rx_chain[i + 1];
880 ld->vr_rx_list[i].vr_next =
881 vtophys(&ld->vr_rx_list[i + 1]);
882 }
883 }
884
885 cd->vr_rx_head = &cd->vr_rx_chain[0];
886
887 return (0);
888 }
889
890 /*
891 * Initialize an RX descriptor and attach an MBUF cluster.
892 * Note: the length fields are only 11 bits wide, which means the
893 * largest size we can specify is 2047. This is important because
894 * MCLBYTES is 2048, so we have to subtract one otherwise we'll
895 * overflow the field and make a mess.
896 */
897 static int
898 vr_newbuf(struct vr_softc *sc, struct vr_chain_onefrag *c, struct mbuf *m)
899 {
900 struct mbuf *m_new = NULL;
901
902 if (m == NULL) {
903 MGETHDR(m_new, M_DONTWAIT, MT_DATA);
904 if (m_new == NULL)
905 return (ENOBUFS);
906
907 MCLGET(m_new, M_DONTWAIT);
908 if (!(m_new->m_flags & M_EXT)) {
909 m_freem(m_new);
910 return (ENOBUFS);
911 }
912 m_new->m_len = m_new->m_pkthdr.len = MCLBYTES;
913 } else {
914 m_new = m;
915 m_new->m_len = m_new->m_pkthdr.len = MCLBYTES;
916 m_new->m_data = m_new->m_ext.ext_buf;
917 }
918
919 m_adj(m_new, sizeof(uint64_t));
920
921 c->vr_mbuf = m_new;
922 c->vr_ptr->vr_status = VR_RXSTAT;
923 c->vr_ptr->vr_data = vtophys(mtod(m_new, caddr_t));
924 c->vr_ptr->vr_ctl = VR_RXCTL | VR_RXLEN;
925
926 return (0);
927 }
928
929 /*
930 * A frame has been uploaded: pass the resulting mbuf chain up to
931 * the higher level protocols.
932 */
933 static void
934 vr_rxeof(struct vr_softc *sc)
935 {
936 struct mbuf *m, *m0;
937 struct ifnet *ifp;
938 struct vr_chain_onefrag *cur_rx;
939 int total_len = 0;
940 uint32_t rxstat;
941
942 VR_LOCK_ASSERT(sc);
943 ifp = &sc->arpcom.ac_if;
944
945 while (!((rxstat = sc->vr_cdata.vr_rx_head->vr_ptr->vr_status) &
946 VR_RXSTAT_OWN)) {
947 #ifdef DEVICE_POLLING
948 if (ifp->if_flags & IFF_POLLING) {
949 if (sc->rxcycles <= 0)
950 break;
951 sc->rxcycles--;
952 }
953 #endif /* DEVICE_POLLING */
954 m0 = NULL;
955 cur_rx = sc->vr_cdata.vr_rx_head;
956 sc->vr_cdata.vr_rx_head = cur_rx->vr_nextdesc;
957 m = cur_rx->vr_mbuf;
958
959 /*
960 * If an error occurs, update stats, clear the
961 * status word and leave the mbuf cluster in place:
962 * it should simply get re-used next time this descriptor
963 * comes up in the ring.
964 */
965 if (rxstat & VR_RXSTAT_RXERR) {
966 ifp->if_ierrors++;
967 printf("vr%d: rx error (%02x):", sc->vr_unit,
968 rxstat & 0x000000ff);
969 if (rxstat & VR_RXSTAT_CRCERR)
970 printf(" crc error");
971 if (rxstat & VR_RXSTAT_FRAMEALIGNERR)
972 printf(" frame alignment error\n");
973 if (rxstat & VR_RXSTAT_FIFOOFLOW)
974 printf(" FIFO overflow");
975 if (rxstat & VR_RXSTAT_GIANT)
976 printf(" received giant packet");
977 if (rxstat & VR_RXSTAT_RUNT)
978 printf(" received runt packet");
979 if (rxstat & VR_RXSTAT_BUSERR)
980 printf(" system bus error");
981 if (rxstat & VR_RXSTAT_BUFFERR)
982 printf("rx buffer error");
983 printf("\n");
984 vr_newbuf(sc, cur_rx, m);
985 continue;
986 }
987
988 /* No errors; receive the packet. */
989 total_len = VR_RXBYTES(cur_rx->vr_ptr->vr_status);
990
991 /*
992 * XXX The VIA Rhine chip includes the CRC with every
993 * received frame, and there's no way to turn this
994 * behavior off (at least, I can't find anything in
995 * the manual that explains how to do it) so we have
996 * to trim off the CRC manually.
997 */
998 total_len -= ETHER_CRC_LEN;
999
1000 m0 = m_devget(mtod(m, char *), total_len, ETHER_ALIGN, ifp,
1001 NULL);
1002 vr_newbuf(sc, cur_rx, m);
1003 if (m0 == NULL) {
1004 ifp->if_ierrors++;
1005 continue;
1006 }
1007 m = m0;
1008
1009 ifp->if_ipackets++;
1010 VR_UNLOCK(sc);
1011 (*ifp->if_input)(ifp, m);
1012 VR_LOCK(sc);
1013 }
1014 }
1015
1016 static void
1017 vr_rxeoc(struct vr_softc *sc)
1018 {
1019 struct ifnet *ifp = &sc->arpcom.ac_if;
1020 int i;
1021
1022 VR_LOCK_ASSERT(sc);
1023
1024 ifp->if_ierrors++;
1025
1026 VR_CLRBIT16(sc, VR_COMMAND, VR_CMD_RX_ON);
1027 DELAY(10000);
1028
1029 /* Wait for receiver to stop */
1030 for (i = 0x400;
1031 i && (CSR_READ_2(sc, VR_COMMAND) & VR_CMD_RX_ON);
1032 i--) {
1033 ;
1034 }
1035
1036 if (!i) {
1037 printf("vr%d: rx shutdown error!\n", sc->vr_unit);
1038 sc->vr_flags |= VR_F_RESTART;
1039 return;
1040 }
1041
1042 vr_rxeof(sc);
1043
1044 CSR_WRITE_4(sc, VR_RXADDR, vtophys(sc->vr_cdata.vr_rx_head->vr_ptr));
1045 VR_SETBIT16(sc, VR_COMMAND, VR_CMD_RX_ON);
1046 VR_SETBIT16(sc, VR_COMMAND, VR_CMD_RX_GO);
1047 }
1048
1049 /*
1050 * A frame was downloaded to the chip. It's safe for us to clean up
1051 * the list buffers.
1052 */
1053 static void
1054 vr_txeof(struct vr_softc *sc)
1055 {
1056 struct vr_chain *cur_tx;
1057 struct ifnet *ifp = &sc->arpcom.ac_if;
1058
1059 VR_LOCK_ASSERT(sc);
1060
1061 /*
1062 * Go through our tx list and free mbufs for those
1063 * frames that have been transmitted.
1064 */
1065 cur_tx = sc->vr_cdata.vr_tx_cons;
1066 while (cur_tx->vr_mbuf != NULL) {
1067 uint32_t txstat;
1068 int i;
1069
1070 txstat = cur_tx->vr_ptr->vr_status;
1071
1072 if ((txstat & VR_TXSTAT_ABRT) ||
1073 (txstat & VR_TXSTAT_UDF)) {
1074 for (i = 0x400;
1075 i && (CSR_READ_2(sc, VR_COMMAND) & VR_CMD_TX_ON);
1076 i--)
1077 ; /* Wait for chip to shutdown */
1078 if (!i) {
1079 printf("vr%d: tx shutdown timeout\n",
1080 sc->vr_unit);
1081 sc->vr_flags |= VR_F_RESTART;
1082 break;
1083 }
1084 VR_TXOWN(cur_tx) = VR_TXSTAT_OWN;
1085 CSR_WRITE_4(sc, VR_TXADDR, vtophys(cur_tx->vr_ptr));
1086 break;
1087 }
1088
1089 if (txstat & VR_TXSTAT_OWN)
1090 break;
1091
1092 if (txstat & VR_TXSTAT_ERRSUM) {
1093 ifp->if_oerrors++;
1094 if (txstat & VR_TXSTAT_DEFER)
1095 ifp->if_collisions++;
1096 if (txstat & VR_TXSTAT_LATECOLL)
1097 ifp->if_collisions++;
1098 }
1099
1100 ifp->if_collisions +=(txstat & VR_TXSTAT_COLLCNT) >> 3;
1101
1102 ifp->if_opackets++;
1103 m_freem(cur_tx->vr_mbuf);
1104 cur_tx->vr_mbuf = NULL;
1105 ifp->if_flags &= ~IFF_OACTIVE;
1106
1107 cur_tx = cur_tx->vr_nextdesc;
1108 }
1109 sc->vr_cdata.vr_tx_cons = cur_tx;
1110 if (cur_tx->vr_mbuf == NULL)
1111 ifp->if_timer = 0;
1112 }
1113
1114 static void
1115 vr_tick(void *xsc)
1116 {
1117 struct vr_softc *sc = xsc;
1118 struct mii_data *mii;
1119
1120 VR_LOCK(sc);
1121
1122 if (sc->vr_flags & VR_F_RESTART) {
1123 printf("vr%d: restarting\n", sc->vr_unit);
1124 vr_stop(sc);
1125 vr_reset(sc);
1126 vr_init_locked(sc);
1127 sc->vr_flags &= ~VR_F_RESTART;
1128 }
1129
1130 mii = device_get_softc(sc->vr_miibus);
1131 mii_tick(mii);
1132 sc->vr_stat_ch = timeout(vr_tick, sc, hz);
1133
1134 VR_UNLOCK(sc);
1135 }
1136
1137 #ifdef DEVICE_POLLING
1138 static poll_handler_t vr_poll;
1139 static poll_handler_t vr_poll_locked;
1140
1141 static void
1142 vr_poll(struct ifnet *ifp, enum poll_cmd cmd, int count)
1143 {
1144 struct vr_softc *sc = ifp->if_softc;
1145
1146 VR_LOCK(sc);
1147 vr_poll_locked(ifp, cmd, count);
1148 VR_UNLOCK(sc);
1149 }
1150
1151 static void
1152 vr_poll_locked(struct ifnet *ifp, enum poll_cmd cmd, int count)
1153 {
1154 struct vr_softc *sc = ifp->if_softc;
1155
1156 VR_LOCK_ASSERT(sc);
1157
1158 if (!(ifp->if_capenable & IFCAP_POLLING)) {
1159 ether_poll_deregister(ifp);
1160 cmd = POLL_DEREGISTER;
1161 }
1162
1163 if (cmd == POLL_DEREGISTER) {
1164 /* Final call, enable interrupts. */
1165 CSR_WRITE_2(sc, VR_IMR, VR_INTRS);
1166 return;
1167 }
1168
1169 sc->rxcycles = count;
1170 vr_rxeof(sc);
1171 vr_txeof(sc);
1172 if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd))
1173 vr_start_locked(ifp);
1174
1175 if (cmd == POLL_AND_CHECK_STATUS) {
1176 uint16_t status;
1177
1178 /* Also check status register. */
1179 status = CSR_READ_2(sc, VR_ISR);
1180 if (status)
1181 CSR_WRITE_2(sc, VR_ISR, status);
1182
1183 if ((status & VR_INTRS) == 0)
1184 return;
1185
1186 if (status & VR_ISR_RX_DROPPED) {
1187 printf("vr%d: rx packet lost\n", sc->vr_unit);
1188 ifp->if_ierrors++;
1189 }
1190
1191 if ((status & VR_ISR_RX_ERR) || (status & VR_ISR_RX_NOBUF) ||
1192 (status & VR_ISR_RX_NOBUF) || (status & VR_ISR_RX_OFLOW)) {
1193 printf("vr%d: receive error (%04x)",
1194 sc->vr_unit, status);
1195 if (status & VR_ISR_RX_NOBUF)
1196 printf(" no buffers");
1197 if (status & VR_ISR_RX_OFLOW)
1198 printf(" overflow");
1199 if (status & VR_ISR_RX_DROPPED)
1200 printf(" packet lost");
1201 printf("\n");
1202 vr_rxeoc(sc);
1203 }
1204
1205 if ((status & VR_ISR_BUSERR) ||
1206 (status & VR_ISR_TX_UNDERRUN)) {
1207 vr_reset(sc);
1208 vr_init_locked(sc);
1209 return;
1210 }
1211
1212 if ((status & VR_ISR_UDFI) ||
1213 (status & VR_ISR_TX_ABRT2) ||
1214 (status & VR_ISR_TX_ABRT)) {
1215 ifp->if_oerrors++;
1216 if (sc->vr_cdata.vr_tx_cons->vr_mbuf != NULL) {
1217 VR_SETBIT16(sc, VR_COMMAND, VR_CMD_TX_ON);
1218 VR_SETBIT16(sc, VR_COMMAND, VR_CMD_TX_GO);
1219 }
1220 }
1221 }
1222 }
1223 #endif /* DEVICE_POLLING */
1224
1225 static void
1226 vr_intr(void *arg)
1227 {
1228 struct vr_softc *sc = arg;
1229 struct ifnet *ifp = &sc->arpcom.ac_if;
1230 uint16_t status;
1231
1232 VR_LOCK(sc);
1233
1234 if (sc->suspended) {
1235 /*
1236 * Forcibly disable interrupts.
1237 * XXX: Mobile VIA based platforms may need
1238 * interrupt re-enable on resume.
1239 */
1240 CSR_WRITE_2(sc, VR_IMR, 0x0000);
1241 goto done_locked;
1242 }
1243
1244 #ifdef DEVICE_POLLING
1245 if (ifp->if_flags & IFF_POLLING)
1246 goto done_locked;
1247
1248 if ((ifp->if_capenable & IFCAP_POLLING) &&
1249 ether_poll_register(vr_poll, ifp)) {
1250 /* OK, disable interrupts. */
1251 CSR_WRITE_2(sc, VR_IMR, 0x0000);
1252 vr_poll_locked(ifp, 0, 1);
1253 goto done_locked;
1254 }
1255 #endif /* DEVICE_POLLING */
1256
1257 /* Suppress unwanted interrupts. */
1258 if (!(ifp->if_flags & IFF_UP)) {
1259 vr_stop(sc);
1260 goto done_locked;
1261 }
1262
1263 /* Disable interrupts. */
1264 CSR_WRITE_2(sc, VR_IMR, 0x0000);
1265
1266 for (;;) {
1267 status = CSR_READ_2(sc, VR_ISR);
1268 if (status)
1269 CSR_WRITE_2(sc, VR_ISR, status);
1270
1271 if ((status & VR_INTRS) == 0)
1272 break;
1273
1274 if (status & VR_ISR_RX_OK)
1275 vr_rxeof(sc);
1276
1277 if (status & VR_ISR_RX_DROPPED) {
1278 printf("vr%d: rx packet lost\n", sc->vr_unit);
1279 ifp->if_ierrors++;
1280 }
1281
1282 if ((status & VR_ISR_RX_ERR) || (status & VR_ISR_RX_NOBUF) ||
1283 (status & VR_ISR_RX_NOBUF) || (status & VR_ISR_RX_OFLOW)) {
1284 printf("vr%d: receive error (%04x)",
1285 sc->vr_unit, status);
1286 if (status & VR_ISR_RX_NOBUF)
1287 printf(" no buffers");
1288 if (status & VR_ISR_RX_OFLOW)
1289 printf(" overflow");
1290 if (status & VR_ISR_RX_DROPPED)
1291 printf(" packet lost");
1292 printf("\n");
1293 vr_rxeoc(sc);
1294 }
1295
1296 if ((status & VR_ISR_BUSERR) || (status & VR_ISR_TX_UNDERRUN)) {
1297 vr_reset(sc);
1298 vr_init_locked(sc);
1299 break;
1300 }
1301
1302 if ((status & VR_ISR_TX_OK) || (status & VR_ISR_TX_ABRT) ||
1303 (status & VR_ISR_TX_ABRT2) || (status & VR_ISR_UDFI)) {
1304 vr_txeof(sc);
1305 if ((status & VR_ISR_UDFI) ||
1306 (status & VR_ISR_TX_ABRT2) ||
1307 (status & VR_ISR_TX_ABRT)) {
1308 ifp->if_oerrors++;
1309 if (sc->vr_cdata.vr_tx_cons->vr_mbuf != NULL) {
1310 VR_SETBIT16(sc, VR_COMMAND,
1311 VR_CMD_TX_ON);
1312 VR_SETBIT16(sc, VR_COMMAND,
1313 VR_CMD_TX_GO);
1314 }
1315 }
1316 }
1317 }
1318
1319 /* Re-enable interrupts. */
1320 CSR_WRITE_2(sc, VR_IMR, VR_INTRS);
1321
1322 if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd))
1323 vr_start_locked(ifp);
1324
1325 done_locked:
1326 VR_UNLOCK(sc);
1327 }
1328
1329 /*
1330 * Encapsulate an mbuf chain in a descriptor by coupling the mbuf data
1331 * pointers to the fragment pointers.
1332 */
1333 static int
1334 vr_encap(struct vr_softc *sc, struct vr_chain *c, struct mbuf *m_head)
1335 {
1336 struct vr_desc *f = NULL;
1337 struct mbuf *m;
1338
1339 VR_LOCK_ASSERT(sc);
1340 /*
1341 * The VIA Rhine wants packet buffers to be longword
1342 * aligned, but very often our mbufs aren't. Rather than
1343 * waste time trying to decide when to copy and when not
1344 * to copy, just do it all the time.
1345 */
1346 m = m_defrag(m_head, M_DONTWAIT);
1347 if (m == NULL)
1348 return (1);
1349
1350 /*
1351 * The Rhine chip doesn't auto-pad, so we have to make
1352 * sure to pad short frames out to the minimum frame length
1353 * ourselves.
1354 */
1355 if (m->m_len < VR_MIN_FRAMELEN) {
1356 m->m_pkthdr.len += VR_MIN_FRAMELEN - m->m_len;
1357 m->m_len = m->m_pkthdr.len;
1358 }
1359
1360 c->vr_mbuf = m;
1361 f = c->vr_ptr;
1362 f->vr_data = vtophys(mtod(m, caddr_t));
1363 f->vr_ctl = m->m_len;
1364 f->vr_ctl |= VR_TXCTL_TLINK|VR_TXCTL_FIRSTFRAG;
1365 f->vr_status = 0;
1366 f->vr_ctl |= VR_TXCTL_LASTFRAG|VR_TXCTL_FINT;
1367 f->vr_next = vtophys(c->vr_nextdesc->vr_ptr);
1368
1369 return (0);
1370 }
1371
1372 /*
1373 * Main transmit routine. To avoid having to do mbuf copies, we put pointers
1374 * to the mbuf data regions directly in the transmit lists. We also save a
1375 * copy of the pointers since the transmit list fragment pointers are
1376 * physical addresses.
1377 */
1378
1379 static void
1380 vr_start(struct ifnet *ifp)
1381 {
1382 struct vr_softc *sc = ifp->if_softc;
1383
1384 VR_LOCK(sc);
1385 vr_start_locked(ifp);
1386 VR_UNLOCK(sc);
1387 }
1388
1389 static void
1390 vr_start_locked(struct ifnet *ifp)
1391 {
1392 struct vr_softc *sc = ifp->if_softc;
1393 struct mbuf *m_head;
1394 struct vr_chain *cur_tx;
1395
1396 if (ifp->if_flags & IFF_OACTIVE)
1397 return;
1398
1399 cur_tx = sc->vr_cdata.vr_tx_prod;
1400 while (cur_tx->vr_mbuf == NULL) {
1401 IFQ_DRV_DEQUEUE(&ifp->if_snd, m_head);
1402 if (m_head == NULL)
1403 break;
1404
1405 /* Pack the data into the descriptor. */
1406 if (vr_encap(sc, cur_tx, m_head)) {
1407 /* Rollback, send what we were able to encap. */
1408 IFQ_DRV_PREPEND(&ifp->if_snd, m_head);
1409 break;
1410 }
1411
1412 VR_TXOWN(cur_tx) = VR_TXSTAT_OWN;
1413
1414 /*
1415 * If there's a BPF listener, bounce a copy of this frame
1416 * to him.
1417 */
1418 BPF_MTAP(ifp, cur_tx->vr_mbuf);
1419
1420 cur_tx = cur_tx->vr_nextdesc;
1421 }
1422 if (cur_tx != sc->vr_cdata.vr_tx_prod || cur_tx->vr_mbuf != NULL) {
1423 sc->vr_cdata.vr_tx_prod = cur_tx;
1424
1425 /* Tell the chip to start transmitting. */
1426 VR_SETBIT16(sc, VR_COMMAND, /*VR_CMD_TX_ON|*/ VR_CMD_TX_GO);
1427
1428 /* Set a timeout in case the chip goes out to lunch. */
1429 ifp->if_timer = 5;
1430
1431 if (cur_tx->vr_mbuf != NULL)
1432 ifp->if_flags |= IFF_OACTIVE;
1433 }
1434 }
1435
1436 static void
1437 vr_init(void *xsc)
1438 {
1439 struct vr_softc *sc = xsc;
1440
1441 VR_LOCK(sc);
1442 vr_init_locked(sc);
1443 VR_UNLOCK(sc);
1444 }
1445
1446 static void
1447 vr_init_locked(struct vr_softc *sc)
1448 {
1449 struct ifnet *ifp = &sc->arpcom.ac_if;
1450 struct mii_data *mii;
1451 int i;
1452
1453 VR_LOCK_ASSERT(sc);
1454
1455 mii = device_get_softc(sc->vr_miibus);
1456
1457 /* Cancel pending I/O and free all RX/TX buffers. */
1458 vr_stop(sc);
1459 vr_reset(sc);
1460
1461 /* Set our station address. */
1462 for (i = 0; i < ETHER_ADDR_LEN; i++)
1463 CSR_WRITE_1(sc, VR_PAR0 + i, sc->arpcom.ac_enaddr[i]);
1464
1465 /* Set DMA size. */
1466 VR_CLRBIT(sc, VR_BCR0, VR_BCR0_DMA_LENGTH);
1467 VR_SETBIT(sc, VR_BCR0, VR_BCR0_DMA_STORENFWD);
1468
1469 /*
1470 * BCR0 and BCR1 can override the RXCFG and TXCFG registers,
1471 * so we must set both.
1472 */
1473 VR_CLRBIT(sc, VR_BCR0, VR_BCR0_RX_THRESH);
1474 VR_SETBIT(sc, VR_BCR0, VR_BCR0_RXTHRESH128BYTES);
1475
1476 VR_CLRBIT(sc, VR_BCR1, VR_BCR1_TX_THRESH);
1477 VR_SETBIT(sc, VR_BCR1, VR_BCR1_TXTHRESHSTORENFWD);
1478
1479 VR_CLRBIT(sc, VR_RXCFG, VR_RXCFG_RX_THRESH);
1480 VR_SETBIT(sc, VR_RXCFG, VR_RXTHRESH_128BYTES);
1481
1482 VR_CLRBIT(sc, VR_TXCFG, VR_TXCFG_TX_THRESH);
1483 VR_SETBIT(sc, VR_TXCFG, VR_TXTHRESH_STORENFWD);
1484
1485 /* Init circular RX list. */
1486 if (vr_list_rx_init(sc) == ENOBUFS) {
1487 printf(
1488 "vr%d: initialization failed: no memory for rx buffers\n", sc->vr_unit);
1489 vr_stop(sc);
1490 return;
1491 }
1492
1493 /* Init tx descriptors. */
1494 vr_list_tx_init(sc);
1495
1496 /* If we want promiscuous mode, set the allframes bit. */
1497 if (ifp->if_flags & IFF_PROMISC)
1498 VR_SETBIT(sc, VR_RXCFG, VR_RXCFG_RX_PROMISC);
1499 else
1500 VR_CLRBIT(sc, VR_RXCFG, VR_RXCFG_RX_PROMISC);
1501
1502 /* Set capture broadcast bit to capture broadcast frames. */
1503 if (ifp->if_flags & IFF_BROADCAST)
1504 VR_SETBIT(sc, VR_RXCFG, VR_RXCFG_RX_BROAD);
1505 else
1506 VR_CLRBIT(sc, VR_RXCFG, VR_RXCFG_RX_BROAD);
1507
1508 /*
1509 * Program the multicast filter, if necessary.
1510 */
1511 vr_setmulti(sc);
1512
1513 /*
1514 * Load the address of the RX list.
1515 */
1516 CSR_WRITE_4(sc, VR_RXADDR, vtophys(sc->vr_cdata.vr_rx_head->vr_ptr));
1517
1518 /* Enable receiver and transmitter. */
1519 CSR_WRITE_2(sc, VR_COMMAND, VR_CMD_TX_NOPOLL|VR_CMD_START|
1520 VR_CMD_TX_ON|VR_CMD_RX_ON|
1521 VR_CMD_RX_GO);
1522
1523 CSR_WRITE_4(sc, VR_TXADDR, vtophys(&sc->vr_ldata->vr_tx_list[0]));
1524
1525 CSR_WRITE_2(sc, VR_ISR, 0xFFFF);
1526 #ifdef DEVICE_POLLING
1527 /*
1528 * Disable interrupts if we are polling.
1529 */
1530 if (ifp->if_flags & IFF_POLLING)
1531 CSR_WRITE_2(sc, VR_IMR, 0);
1532 else
1533 #endif /* DEVICE_POLLING */
1534 /*
1535 * Enable interrupts.
1536 */
1537 CSR_WRITE_2(sc, VR_IMR, VR_INTRS);
1538
1539 mii_mediachg(mii);
1540
1541 ifp->if_flags |= IFF_RUNNING;
1542 ifp->if_flags &= ~IFF_OACTIVE;
1543
1544 sc->vr_stat_ch = timeout(vr_tick, sc, hz);
1545 }
1546
1547 /*
1548 * Set media options.
1549 */
1550 static int
1551 vr_ifmedia_upd(struct ifnet *ifp)
1552 {
1553 struct vr_softc *sc = ifp->if_softc;
1554
1555 if (ifp->if_flags & IFF_UP)
1556 vr_init(sc);
1557
1558 return (0);
1559 }
1560
1561 /*
1562 * Report current media status.
1563 */
1564 static void
1565 vr_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
1566 {
1567 struct vr_softc *sc = ifp->if_softc;
1568 struct mii_data *mii;
1569
1570 mii = device_get_softc(sc->vr_miibus);
1571 VR_LOCK(sc);
1572 mii_pollstat(mii);
1573 VR_UNLOCK(sc);
1574 ifmr->ifm_active = mii->mii_media_active;
1575 ifmr->ifm_status = mii->mii_media_status;
1576 }
1577
1578 static int
1579 vr_ioctl(struct ifnet *ifp, u_long command, caddr_t data)
1580 {
1581 struct vr_softc *sc = ifp->if_softc;
1582 struct ifreq *ifr = (struct ifreq *) data;
1583 struct mii_data *mii;
1584 int error = 0;
1585
1586 switch (command) {
1587 case SIOCSIFFLAGS:
1588 VR_LOCK(sc);
1589 if (ifp->if_flags & IFF_UP) {
1590 vr_init_locked(sc);
1591 } else {
1592 if (ifp->if_flags & IFF_RUNNING)
1593 vr_stop(sc);
1594 }
1595 VR_UNLOCK(sc);
1596 error = 0;
1597 break;
1598 case SIOCADDMULTI:
1599 case SIOCDELMULTI:
1600 VR_LOCK(sc);
1601 vr_setmulti(sc);
1602 VR_UNLOCK(sc);
1603 error = 0;
1604 break;
1605 case SIOCGIFMEDIA:
1606 case SIOCSIFMEDIA:
1607 mii = device_get_softc(sc->vr_miibus);
1608 error = ifmedia_ioctl(ifp, ifr, &mii->mii_media, command);
1609 break;
1610 case SIOCSIFCAP:
1611 ifp->if_capenable = ifr->ifr_reqcap;
1612 break;
1613 default:
1614 error = ether_ioctl(ifp, command, data);
1615 break;
1616 }
1617
1618 return (error);
1619 }
1620
1621 static void
1622 vr_watchdog(struct ifnet *ifp)
1623 {
1624 struct vr_softc *sc = ifp->if_softc;
1625
1626 VR_LOCK(sc);
1627
1628 ifp->if_oerrors++;
1629 printf("vr%d: watchdog timeout\n", sc->vr_unit);
1630
1631 vr_stop(sc);
1632 vr_reset(sc);
1633 vr_init_locked(sc);
1634
1635 if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd))
1636 vr_start_locked(ifp);
1637
1638 VR_UNLOCK(sc);
1639 }
1640
1641 /*
1642 * Stop the adapter and free any mbufs allocated to the
1643 * RX and TX lists.
1644 */
1645 static void
1646 vr_stop(struct vr_softc *sc)
1647 {
1648 register int i;
1649 struct ifnet *ifp;
1650
1651 VR_LOCK_ASSERT(sc);
1652
1653 ifp = &sc->arpcom.ac_if;
1654 ifp->if_timer = 0;
1655
1656 untimeout(vr_tick, sc, sc->vr_stat_ch);
1657 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
1658 #ifdef DEVICE_POLLING
1659 ether_poll_deregister(ifp);
1660 #endif /* DEVICE_POLLING */
1661
1662 VR_SETBIT16(sc, VR_COMMAND, VR_CMD_STOP);
1663 VR_CLRBIT16(sc, VR_COMMAND, (VR_CMD_RX_ON|VR_CMD_TX_ON));
1664 CSR_WRITE_2(sc, VR_IMR, 0x0000);
1665 CSR_WRITE_4(sc, VR_TXADDR, 0x00000000);
1666 CSR_WRITE_4(sc, VR_RXADDR, 0x00000000);
1667
1668 /*
1669 * Free data in the RX lists.
1670 */
1671 for (i = 0; i < VR_RX_LIST_CNT; i++) {
1672 if (sc->vr_cdata.vr_rx_chain[i].vr_mbuf != NULL) {
1673 m_freem(sc->vr_cdata.vr_rx_chain[i].vr_mbuf);
1674 sc->vr_cdata.vr_rx_chain[i].vr_mbuf = NULL;
1675 }
1676 }
1677 bzero((char *)&sc->vr_ldata->vr_rx_list,
1678 sizeof(sc->vr_ldata->vr_rx_list));
1679
1680 /*
1681 * Free the TX list buffers.
1682 */
1683 for (i = 0; i < VR_TX_LIST_CNT; i++) {
1684 if (sc->vr_cdata.vr_tx_chain[i].vr_mbuf != NULL) {
1685 m_freem(sc->vr_cdata.vr_tx_chain[i].vr_mbuf);
1686 sc->vr_cdata.vr_tx_chain[i].vr_mbuf = NULL;
1687 }
1688 }
1689 bzero((char *)&sc->vr_ldata->vr_tx_list,
1690 sizeof(sc->vr_ldata->vr_tx_list));
1691 }
1692
1693 /*
1694 * Stop all chip I/O so that the kernel's probe routines don't
1695 * get confused by errant DMAs when rebooting.
1696 */
1697 static void
1698 vr_shutdown(device_t dev)
1699 {
1700
1701 vr_detach(dev);
1702 }
Cache object: 1d5ca029aca32a375450e91772c233be
|