FreeBSD/Linux Kernel Cross Reference
sys/pci/if_vr.c
1 /*-
2 * Copyright (c) 1997, 1998
3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. All advertising materials mentioning features or use of this software
14 * must display the following acknowledgement:
15 * This product includes software developed by Bill Paul.
16 * 4. Neither the name of the author nor the names of any co-contributors
17 * may be used to endorse or promote products derived from this software
18 * without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30 * THE POSSIBILITY OF SUCH DAMAGE.
31 */
32
33 #include <sys/cdefs.h>
34 __FBSDID("$FreeBSD: releng/6.2/sys/pci/if_vr.c 156820 2006-03-17 21:30:57Z glebius $");
35
36 /*
37 * VIA Rhine fast ethernet PCI NIC driver
38 *
39 * Supports various network adapters based on the VIA Rhine
40 * and Rhine II PCI controllers, including the D-Link DFE530TX.
41 * Datasheets are available at http://www.via.com.tw.
42 *
43 * Written by Bill Paul <wpaul@ctr.columbia.edu>
44 * Electrical Engineering Department
45 * Columbia University, New York City
46 */
47
48 /*
49 * The VIA Rhine controllers are similar in some respects to the
50 * the DEC tulip chips, except less complicated. The controller
51 * uses an MII bus and an external physical layer interface. The
52 * receiver has a one entry perfect filter and a 64-bit hash table
53 * multicast filter. Transmit and receive descriptors are similar
54 * to the tulip.
55 *
56 * The Rhine has a serious flaw in its transmit DMA mechanism:
57 * transmit buffers must be longword aligned. Unfortunately,
58 * FreeBSD doesn't guarantee that mbufs will be filled in starting
59 * at longword boundaries, so we have to do a buffer copy before
60 * transmission.
61 */
62
63 #ifdef HAVE_KERNEL_OPTION_HEADERS
64 #include "opt_device_polling.h"
65 #endif
66
67 #include <sys/param.h>
68 #include <sys/systm.h>
69 #include <sys/sockio.h>
70 #include <sys/mbuf.h>
71 #include <sys/malloc.h>
72 #include <sys/kernel.h>
73 #include <sys/module.h>
74 #include <sys/socket.h>
75
76 #include <net/if.h>
77 #include <net/if_arp.h>
78 #include <net/ethernet.h>
79 #include <net/if_dl.h>
80 #include <net/if_media.h>
81 #include <net/if_types.h>
82
83 #include <net/bpf.h>
84
85 #include <vm/vm.h> /* for vtophys */
86 #include <vm/pmap.h> /* for vtophys */
87 #include <machine/bus.h>
88 #include <machine/resource.h>
89 #include <sys/bus.h>
90 #include <sys/rman.h>
91
92 #include <dev/mii/mii.h>
93 #include <dev/mii/miivar.h>
94
95 #include <dev/pci/pcireg.h>
96 #include <dev/pci/pcivar.h>
97
98 #define VR_USEIOSPACE
99
100 #include <pci/if_vrreg.h>
101
102 MODULE_DEPEND(vr, pci, 1, 1, 1);
103 MODULE_DEPEND(vr, ether, 1, 1, 1);
104 MODULE_DEPEND(vr, miibus, 1, 1, 1);
105
106 /* "controller miibus0" required. See GENERIC if you get errors here. */
107 #include "miibus_if.h"
108
109 #undef VR_USESWSHIFT
110
111 /*
112 * Various supported device vendors/types and their names.
113 */
114 static struct vr_type vr_devs[] = {
115 { VIA_VENDORID, VIA_DEVICEID_RHINE,
116 "VIA VT3043 Rhine I 10/100BaseTX" },
117 { VIA_VENDORID, VIA_DEVICEID_RHINE_II,
118 "VIA VT86C100A Rhine II 10/100BaseTX" },
119 { VIA_VENDORID, VIA_DEVICEID_RHINE_II_2,
120 "VIA VT6102 Rhine II 10/100BaseTX" },
121 { VIA_VENDORID, VIA_DEVICEID_RHINE_III,
122 "VIA VT6105 Rhine III 10/100BaseTX" },
123 { VIA_VENDORID, VIA_DEVICEID_RHINE_III_M,
124 "VIA VT6105M Rhine III 10/100BaseTX" },
125 { DELTA_VENDORID, DELTA_DEVICEID_RHINE_II,
126 "Delta Electronics Rhine II 10/100BaseTX" },
127 { ADDTRON_VENDORID, ADDTRON_DEVICEID_RHINE_II,
128 "Addtron Technology Rhine II 10/100BaseTX" },
129 { 0, 0, NULL }
130 };
131
132 static int vr_probe(device_t);
133 static int vr_attach(device_t);
134 static int vr_detach(device_t);
135
136 static int vr_newbuf(struct vr_softc *, struct vr_chain_onefrag *,
137 struct mbuf *);
138 static int vr_encap(struct vr_softc *, struct vr_chain *, struct mbuf * );
139
140 static void vr_rxeof(struct vr_softc *);
141 static void vr_rxeoc(struct vr_softc *);
142 static void vr_txeof(struct vr_softc *);
143 static void vr_tick(void *);
144 static void vr_intr(void *);
145 static void vr_start(struct ifnet *);
146 static void vr_start_locked(struct ifnet *);
147 static int vr_ioctl(struct ifnet *, u_long, caddr_t);
148 static void vr_init(void *);
149 static void vr_init_locked(struct vr_softc *);
150 static void vr_stop(struct vr_softc *);
151 static void vr_watchdog(struct ifnet *);
152 static void vr_shutdown(device_t);
153 static int vr_ifmedia_upd(struct ifnet *);
154 static void vr_ifmedia_sts(struct ifnet *, struct ifmediareq *);
155
156 #ifdef VR_USESWSHIFT
157 static void vr_mii_sync(struct vr_softc *);
158 static void vr_mii_send(struct vr_softc *, uint32_t, int);
159 #endif
160 static int vr_mii_readreg(struct vr_softc *, struct vr_mii_frame *);
161 static int vr_mii_writereg(struct vr_softc *, struct vr_mii_frame *);
162 static int vr_miibus_readreg(device_t, uint16_t, uint16_t);
163 static int vr_miibus_writereg(device_t, uint16_t, uint16_t, uint16_t);
164 static void vr_miibus_statchg(device_t);
165
166 static void vr_setcfg(struct vr_softc *, int);
167 static void vr_setmulti(struct vr_softc *);
168 static void vr_reset(struct vr_softc *);
169 static int vr_list_rx_init(struct vr_softc *);
170 static int vr_list_tx_init(struct vr_softc *);
171
172 #ifdef VR_USEIOSPACE
173 #define VR_RES SYS_RES_IOPORT
174 #define VR_RID VR_PCI_LOIO
175 #else
176 #define VR_RES SYS_RES_MEMORY
177 #define VR_RID VR_PCI_LOMEM
178 #endif
179
180 static device_method_t vr_methods[] = {
181 /* Device interface */
182 DEVMETHOD(device_probe, vr_probe),
183 DEVMETHOD(device_attach, vr_attach),
184 DEVMETHOD(device_detach, vr_detach),
185 DEVMETHOD(device_shutdown, vr_shutdown),
186
187 /* bus interface */
188 DEVMETHOD(bus_print_child, bus_generic_print_child),
189 DEVMETHOD(bus_driver_added, bus_generic_driver_added),
190
191 /* MII interface */
192 DEVMETHOD(miibus_readreg, vr_miibus_readreg),
193 DEVMETHOD(miibus_writereg, vr_miibus_writereg),
194 DEVMETHOD(miibus_statchg, vr_miibus_statchg),
195
196 { 0, 0 }
197 };
198
199 static driver_t vr_driver = {
200 "vr",
201 vr_methods,
202 sizeof(struct vr_softc)
203 };
204
205 static devclass_t vr_devclass;
206
207 DRIVER_MODULE(vr, pci, vr_driver, vr_devclass, 0, 0);
208 DRIVER_MODULE(miibus, vr, miibus_driver, miibus_devclass, 0, 0);
209
210 #define VR_SETBIT(sc, reg, x) \
211 CSR_WRITE_1(sc, reg, \
212 CSR_READ_1(sc, reg) | (x))
213
214 #define VR_CLRBIT(sc, reg, x) \
215 CSR_WRITE_1(sc, reg, \
216 CSR_READ_1(sc, reg) & ~(x))
217
218 #define VR_SETBIT16(sc, reg, x) \
219 CSR_WRITE_2(sc, reg, \
220 CSR_READ_2(sc, reg) | (x))
221
222 #define VR_CLRBIT16(sc, reg, x) \
223 CSR_WRITE_2(sc, reg, \
224 CSR_READ_2(sc, reg) & ~(x))
225
226 #define VR_SETBIT32(sc, reg, x) \
227 CSR_WRITE_4(sc, reg, \
228 CSR_READ_4(sc, reg) | (x))
229
230 #define VR_CLRBIT32(sc, reg, x) \
231 CSR_WRITE_4(sc, reg, \
232 CSR_READ_4(sc, reg) & ~(x))
233
234 #define SIO_SET(x) \
235 CSR_WRITE_1(sc, VR_MIICMD, \
236 CSR_READ_1(sc, VR_MIICMD) | (x))
237
238 #define SIO_CLR(x) \
239 CSR_WRITE_1(sc, VR_MIICMD, \
240 CSR_READ_1(sc, VR_MIICMD) & ~(x))
241
242 #ifdef VR_USESWSHIFT
243 /*
244 * Sync the PHYs by setting data bit and strobing the clock 32 times.
245 */
246 static void
247 vr_mii_sync(struct vr_softc *sc)
248 {
249 register int i;
250
251 SIO_SET(VR_MIICMD_DIR|VR_MIICMD_DATAIN);
252
253 for (i = 0; i < 32; i++) {
254 SIO_SET(VR_MIICMD_CLK);
255 DELAY(1);
256 SIO_CLR(VR_MIICMD_CLK);
257 DELAY(1);
258 }
259 }
260
261 /*
262 * Clock a series of bits through the MII.
263 */
264 static void
265 vr_mii_send(struct vr_softc *sc, uint32_t bits, int cnt)
266 {
267 int i;
268
269 SIO_CLR(VR_MIICMD_CLK);
270
271 for (i = (0x1 << (cnt - 1)); i; i >>= 1) {
272 if (bits & i) {
273 SIO_SET(VR_MIICMD_DATAIN);
274 } else {
275 SIO_CLR(VR_MIICMD_DATAIN);
276 }
277 DELAY(1);
278 SIO_CLR(VR_MIICMD_CLK);
279 DELAY(1);
280 SIO_SET(VR_MIICMD_CLK);
281 }
282 }
283 #endif
284
285 /*
286 * Read an PHY register through the MII.
287 */
288 static int
289 vr_mii_readreg(struct vr_softc *sc, struct vr_mii_frame *frame)
290 #ifdef VR_USESWSHIFT
291 {
292 int i, ack;
293
294 /* Set up frame for RX. */
295 frame->mii_stdelim = VR_MII_STARTDELIM;
296 frame->mii_opcode = VR_MII_READOP;
297 frame->mii_turnaround = 0;
298 frame->mii_data = 0;
299
300 CSR_WRITE_1(sc, VR_MIICMD, 0);
301 VR_SETBIT(sc, VR_MIICMD, VR_MIICMD_DIRECTPGM);
302
303 /* Turn on data xmit. */
304 SIO_SET(VR_MIICMD_DIR);
305
306 vr_mii_sync(sc);
307
308 /* Send command/address info. */
309 vr_mii_send(sc, frame->mii_stdelim, 2);
310 vr_mii_send(sc, frame->mii_opcode, 2);
311 vr_mii_send(sc, frame->mii_phyaddr, 5);
312 vr_mii_send(sc, frame->mii_regaddr, 5);
313
314 /* Idle bit. */
315 SIO_CLR((VR_MIICMD_CLK|VR_MIICMD_DATAIN));
316 DELAY(1);
317 SIO_SET(VR_MIICMD_CLK);
318 DELAY(1);
319
320 /* Turn off xmit. */
321 SIO_CLR(VR_MIICMD_DIR);
322
323 /* Check for ack */
324 SIO_CLR(VR_MIICMD_CLK);
325 DELAY(1);
326 ack = CSR_READ_4(sc, VR_MIICMD) & VR_MIICMD_DATAOUT;
327 SIO_SET(VR_MIICMD_CLK);
328 DELAY(1);
329
330 /*
331 * Now try reading data bits. If the ack failed, we still
332 * need to clock through 16 cycles to keep the PHY(s) in sync.
333 */
334 if (ack) {
335 for(i = 0; i < 16; i++) {
336 SIO_CLR(VR_MIICMD_CLK);
337 DELAY(1);
338 SIO_SET(VR_MIICMD_CLK);
339 DELAY(1);
340 }
341 goto fail;
342 }
343
344 for (i = 0x8000; i; i >>= 1) {
345 SIO_CLR(VR_MIICMD_CLK);
346 DELAY(1);
347 if (!ack) {
348 if (CSR_READ_4(sc, VR_MIICMD) & VR_MIICMD_DATAOUT)
349 frame->mii_data |= i;
350 DELAY(1);
351 }
352 SIO_SET(VR_MIICMD_CLK);
353 DELAY(1);
354 }
355
356 fail:
357 SIO_CLR(VR_MIICMD_CLK);
358 DELAY(1);
359 SIO_SET(VR_MIICMD_CLK);
360 DELAY(1);
361
362 if (ack)
363 return (1);
364 return (0);
365 }
366 #else
367 {
368 int i;
369
370 /* Set the PHY address. */
371 CSR_WRITE_1(sc, VR_PHYADDR, (CSR_READ_1(sc, VR_PHYADDR)& 0xe0)|
372 frame->mii_phyaddr);
373
374 /* Set the register address. */
375 CSR_WRITE_1(sc, VR_MIIADDR, frame->mii_regaddr);
376 VR_SETBIT(sc, VR_MIICMD, VR_MIICMD_READ_ENB);
377
378 for (i = 0; i < 10000; i++) {
379 if ((CSR_READ_1(sc, VR_MIICMD) & VR_MIICMD_READ_ENB) == 0)
380 break;
381 DELAY(1);
382 }
383 frame->mii_data = CSR_READ_2(sc, VR_MIIDATA);
384
385 return (0);
386 }
387 #endif
388
389
390 /*
391 * Write to a PHY register through the MII.
392 */
393 static int
394 vr_mii_writereg(struct vr_softc *sc, struct vr_mii_frame *frame)
395 #ifdef VR_USESWSHIFT
396 {
397 CSR_WRITE_1(sc, VR_MIICMD, 0);
398 VR_SETBIT(sc, VR_MIICMD, VR_MIICMD_DIRECTPGM);
399
400 /* Set up frame for TX. */
401 frame->mii_stdelim = VR_MII_STARTDELIM;
402 frame->mii_opcode = VR_MII_WRITEOP;
403 frame->mii_turnaround = VR_MII_TURNAROUND;
404
405 /* Turn on data output. */
406 SIO_SET(VR_MIICMD_DIR);
407
408 vr_mii_sync(sc);
409
410 vr_mii_send(sc, frame->mii_stdelim, 2);
411 vr_mii_send(sc, frame->mii_opcode, 2);
412 vr_mii_send(sc, frame->mii_phyaddr, 5);
413 vr_mii_send(sc, frame->mii_regaddr, 5);
414 vr_mii_send(sc, frame->mii_turnaround, 2);
415 vr_mii_send(sc, frame->mii_data, 16);
416
417 /* Idle bit. */
418 SIO_SET(VR_MIICMD_CLK);
419 DELAY(1);
420 SIO_CLR(VR_MIICMD_CLK);
421 DELAY(1);
422
423 /* Turn off xmit. */
424 SIO_CLR(VR_MIICMD_DIR);
425
426 return (0);
427 }
428 #else
429 {
430 int i;
431
432 /* Set the PHY address. */
433 CSR_WRITE_1(sc, VR_PHYADDR, (CSR_READ_1(sc, VR_PHYADDR)& 0xe0)|
434 frame->mii_phyaddr);
435
436 /* Set the register address and data to write. */
437 CSR_WRITE_1(sc, VR_MIIADDR, frame->mii_regaddr);
438 CSR_WRITE_2(sc, VR_MIIDATA, frame->mii_data);
439
440 VR_SETBIT(sc, VR_MIICMD, VR_MIICMD_WRITE_ENB);
441
442 for (i = 0; i < 10000; i++) {
443 if ((CSR_READ_1(sc, VR_MIICMD) & VR_MIICMD_WRITE_ENB) == 0)
444 break;
445 DELAY(1);
446 }
447
448 return (0);
449 }
450 #endif
451
452 static int
453 vr_miibus_readreg(device_t dev, uint16_t phy, uint16_t reg)
454 {
455 struct vr_mii_frame frame;
456 struct vr_softc *sc = device_get_softc(dev);
457
458 switch (sc->vr_revid) {
459 case REV_ID_VT6102_APOLLO:
460 if (phy != 1) {
461 frame.mii_data = 0;
462 goto out;
463 }
464 default:
465 break;
466 }
467
468 bzero((char *)&frame, sizeof(frame));
469 frame.mii_phyaddr = phy;
470 frame.mii_regaddr = reg;
471 vr_mii_readreg(sc, &frame);
472
473 out:
474 return (frame.mii_data);
475 }
476
477 static int
478 vr_miibus_writereg(device_t dev, uint16_t phy, uint16_t reg, uint16_t data)
479 {
480 struct vr_mii_frame frame;
481 struct vr_softc *sc = device_get_softc(dev);
482
483 switch (sc->vr_revid) {
484 case REV_ID_VT6102_APOLLO:
485 if (phy != 1)
486 return (0);
487 default:
488 break;
489 }
490
491 bzero((char *)&frame, sizeof(frame));
492 frame.mii_phyaddr = phy;
493 frame.mii_regaddr = reg;
494 frame.mii_data = data;
495 vr_mii_writereg(sc, &frame);
496
497 return (0);
498 }
499
500 static void
501 vr_miibus_statchg(device_t dev)
502 {
503 struct mii_data *mii;
504 struct vr_softc *sc = device_get_softc(dev);
505
506 mii = device_get_softc(sc->vr_miibus);
507 vr_setcfg(sc, mii->mii_media_active);
508 }
509
510 /*
511 * Program the 64-bit multicast hash filter.
512 */
513 static void
514 vr_setmulti(struct vr_softc *sc)
515 {
516 struct ifnet *ifp = sc->vr_ifp;
517 int h = 0;
518 uint32_t hashes[2] = { 0, 0 };
519 struct ifmultiaddr *ifma;
520 uint8_t rxfilt;
521 int mcnt = 0;
522
523 VR_LOCK_ASSERT(sc);
524
525 rxfilt = CSR_READ_1(sc, VR_RXCFG);
526
527 if (ifp->if_flags & IFF_ALLMULTI || ifp->if_flags & IFF_PROMISC) {
528 rxfilt |= VR_RXCFG_RX_MULTI;
529 CSR_WRITE_1(sc, VR_RXCFG, rxfilt);
530 CSR_WRITE_4(sc, VR_MAR0, 0xFFFFFFFF);
531 CSR_WRITE_4(sc, VR_MAR1, 0xFFFFFFFF);
532 return;
533 }
534
535 /* First, zero out all the existing hash bits. */
536 CSR_WRITE_4(sc, VR_MAR0, 0);
537 CSR_WRITE_4(sc, VR_MAR1, 0);
538
539 /* Now program new ones. */
540 IF_ADDR_LOCK(ifp);
541 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
542 if (ifma->ifma_addr->sa_family != AF_LINK)
543 continue;
544 h = ether_crc32_be(LLADDR((struct sockaddr_dl *)
545 ifma->ifma_addr), ETHER_ADDR_LEN) >> 26;
546 if (h < 32)
547 hashes[0] |= (1 << h);
548 else
549 hashes[1] |= (1 << (h - 32));
550 mcnt++;
551 }
552 IF_ADDR_UNLOCK(ifp);
553
554 if (mcnt)
555 rxfilt |= VR_RXCFG_RX_MULTI;
556 else
557 rxfilt &= ~VR_RXCFG_RX_MULTI;
558
559 CSR_WRITE_4(sc, VR_MAR0, hashes[0]);
560 CSR_WRITE_4(sc, VR_MAR1, hashes[1]);
561 CSR_WRITE_1(sc, VR_RXCFG, rxfilt);
562 }
563
564 /*
565 * In order to fiddle with the
566 * 'full-duplex' and '100Mbps' bits in the netconfig register, we
567 * first have to put the transmit and/or receive logic in the idle state.
568 */
569 static void
570 vr_setcfg(struct vr_softc *sc, int media)
571 {
572 int restart = 0;
573
574 VR_LOCK_ASSERT(sc);
575
576 if (CSR_READ_2(sc, VR_COMMAND) & (VR_CMD_TX_ON|VR_CMD_RX_ON)) {
577 restart = 1;
578 VR_CLRBIT16(sc, VR_COMMAND, (VR_CMD_TX_ON|VR_CMD_RX_ON));
579 }
580
581 if ((media & IFM_GMASK) == IFM_FDX)
582 VR_SETBIT16(sc, VR_COMMAND, VR_CMD_FULLDUPLEX);
583 else
584 VR_CLRBIT16(sc, VR_COMMAND, VR_CMD_FULLDUPLEX);
585
586 if (restart)
587 VR_SETBIT16(sc, VR_COMMAND, VR_CMD_TX_ON|VR_CMD_RX_ON);
588 }
589
590 static void
591 vr_reset(struct vr_softc *sc)
592 {
593 register int i;
594
595 /*VR_LOCK_ASSERT(sc);*/ /* XXX: Called during attach w/o lock. */
596
597 VR_SETBIT16(sc, VR_COMMAND, VR_CMD_RESET);
598
599 for (i = 0; i < VR_TIMEOUT; i++) {
600 DELAY(10);
601 if (!(CSR_READ_2(sc, VR_COMMAND) & VR_CMD_RESET))
602 break;
603 }
604 if (i == VR_TIMEOUT) {
605 if (sc->vr_revid < REV_ID_VT3065_A)
606 if_printf(sc->vr_ifp, "reset never completed!\n");
607 else {
608 /* Use newer force reset command */
609 if_printf(sc->vr_ifp, "Using force reset command.\n");
610 VR_SETBIT(sc, VR_MISC_CR1, VR_MISCCR1_FORSRST);
611 }
612 }
613
614 /* Wait a little while for the chip to get its brains in order. */
615 DELAY(1000);
616 }
617
618 /*
619 * Probe for a VIA Rhine chip. Check the PCI vendor and device
620 * IDs against our list and return a device name if we find a match.
621 */
622 static int
623 vr_probe(device_t dev)
624 {
625 struct vr_type *t = vr_devs;
626
627 while (t->vr_name != NULL) {
628 if ((pci_get_vendor(dev) == t->vr_vid) &&
629 (pci_get_device(dev) == t->vr_did)) {
630 device_set_desc(dev, t->vr_name);
631 return (BUS_PROBE_DEFAULT);
632 }
633 t++;
634 }
635
636 return (ENXIO);
637 }
638
639 /*
640 * Attach the interface. Allocate softc structures, do ifmedia
641 * setup and ethernet/BPF attach.
642 */
643 static int
644 vr_attach(dev)
645 device_t dev;
646 {
647 int i;
648 u_char eaddr[ETHER_ADDR_LEN];
649 struct vr_softc *sc;
650 struct ifnet *ifp;
651 int unit, error = 0, rid;
652
653 sc = device_get_softc(dev);
654 unit = device_get_unit(dev);
655
656 mtx_init(&sc->vr_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK,
657 MTX_DEF);
658 callout_init_mtx(&sc->vr_stat_callout, &sc->vr_mtx, 0);
659
660 /*
661 * Map control/status registers.
662 */
663 pci_enable_busmaster(dev);
664 sc->vr_revid = pci_read_config(dev, VR_PCI_REVID, 4) & 0x000000FF;
665
666 rid = VR_RID;
667 sc->vr_res = bus_alloc_resource_any(dev, VR_RES, &rid, RF_ACTIVE);
668
669 if (sc->vr_res == NULL) {
670 device_printf(dev, "couldn't map ports/memory\n");
671 error = ENXIO;
672 goto fail;
673 }
674
675 sc->vr_btag = rman_get_bustag(sc->vr_res);
676 sc->vr_bhandle = rman_get_bushandle(sc->vr_res);
677
678 /* Allocate interrupt */
679 rid = 0;
680 sc->vr_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
681 RF_SHAREABLE | RF_ACTIVE);
682
683 if (sc->vr_irq == NULL) {
684 device_printf(dev, "couldn't map interrupt\n");
685 error = ENXIO;
686 goto fail;
687 }
688
689 /* Allocate ifnet structure. */
690 ifp = sc->vr_ifp = if_alloc(IFT_ETHER);
691 if (ifp == NULL) {
692 device_printf(dev, "can not if_alloc()\n");
693 error = ENOSPC;
694 goto fail;
695 }
696 ifp->if_softc = sc;
697 if_initname(ifp, device_get_name(dev), device_get_unit(dev));
698 ifp->if_mtu = ETHERMTU;
699 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
700 ifp->if_ioctl = vr_ioctl;
701 ifp->if_start = vr_start;
702 ifp->if_watchdog = vr_watchdog;
703 ifp->if_init = vr_init;
704 IFQ_SET_MAXLEN(&ifp->if_snd, VR_TX_LIST_CNT - 1);
705 ifp->if_snd.ifq_maxlen = VR_TX_LIST_CNT - 1;
706 IFQ_SET_READY(&ifp->if_snd);
707 ifp->if_capenable = ifp->if_capabilities;
708 #ifdef DEVICE_POLLING
709 ifp->if_capabilities |= IFCAP_POLLING;
710 #endif
711
712 /*
713 * Windows may put the chip in suspend mode when it
714 * shuts down. Be sure to kick it in the head to wake it
715 * up again.
716 */
717 VR_CLRBIT(sc, VR_STICKHW, (VR_STICKHW_DS0|VR_STICKHW_DS1));
718
719 /* Reset the adapter. */
720 vr_reset(sc);
721
722 /*
723 * Turn on bit2 (MIION) in PCI configuration register 0x53 during
724 * initialization and disable AUTOPOLL.
725 */
726 pci_write_config(dev, VR_PCI_MODE,
727 pci_read_config(dev, VR_PCI_MODE, 4) | (VR_MODE3_MIION << 24), 4);
728 VR_CLRBIT(sc, VR_MIICMD, VR_MIICMD_AUTOPOLL);
729
730 /*
731 * Get station address. The way the Rhine chips work,
732 * you're not allowed to directly access the EEPROM once
733 * they've been programmed a special way. Consequently,
734 * we need to read the node address from the PAR0 and PAR1
735 * registers.
736 */
737 VR_SETBIT(sc, VR_EECSR, VR_EECSR_LOAD);
738 DELAY(200);
739 for (i = 0; i < ETHER_ADDR_LEN; i++)
740 eaddr[i] = CSR_READ_1(sc, VR_PAR0 + i);
741
742 sc->vr_ldata = contigmalloc(sizeof(struct vr_list_data), M_DEVBUF,
743 M_NOWAIT | M_ZERO, 0, 0xffffffff, PAGE_SIZE, 0);
744
745 if (sc->vr_ldata == NULL) {
746 device_printf(dev, "no memory for list buffers!\n");
747 error = ENXIO;
748 goto fail;
749 }
750
751 /* Do MII setup. */
752 if (mii_phy_probe(dev, &sc->vr_miibus,
753 vr_ifmedia_upd, vr_ifmedia_sts)) {
754 device_printf(dev, "MII without any phy!\n");
755 error = ENXIO;
756 goto fail;
757 }
758
759 /* Call MI attach routine. */
760 ether_ifattach(ifp, eaddr);
761
762 sc->suspended = 0;
763
764 /* Hook interrupt last to avoid having to lock softc */
765 error = bus_setup_intr(dev, sc->vr_irq, INTR_TYPE_NET | INTR_MPSAFE,
766 vr_intr, sc, &sc->vr_intrhand);
767
768 if (error) {
769 device_printf(dev, "couldn't set up irq\n");
770 ether_ifdetach(ifp);
771 goto fail;
772 }
773
774 fail:
775 if (error)
776 vr_detach(dev);
777
778 return (error);
779 }
780
781 /*
782 * Shutdown hardware and free up resources. This can be called any
783 * time after the mutex has been initialized. It is called in both
784 * the error case in attach and the normal detach case so it needs
785 * to be careful about only freeing resources that have actually been
786 * allocated.
787 */
788 static int
789 vr_detach(device_t dev)
790 {
791 struct vr_softc *sc = device_get_softc(dev);
792 struct ifnet *ifp = sc->vr_ifp;
793
794 KASSERT(mtx_initialized(&sc->vr_mtx), ("vr mutex not initialized"));
795
796 #ifdef DEVICE_POLLING
797 if (ifp->if_capenable & IFCAP_POLLING)
798 ether_poll_deregister(ifp);
799 #endif
800
801 /* These should only be active if attach succeeded */
802 if (device_is_attached(dev)) {
803 VR_LOCK(sc);
804 sc->suspended = 1;
805 vr_stop(sc);
806 VR_UNLOCK(sc);
807 callout_drain(&sc->vr_stat_callout);
808 ether_ifdetach(ifp);
809 }
810 if (ifp)
811 if_free(ifp);
812 if (sc->vr_miibus)
813 device_delete_child(dev, sc->vr_miibus);
814 bus_generic_detach(dev);
815
816 if (sc->vr_intrhand)
817 bus_teardown_intr(dev, sc->vr_irq, sc->vr_intrhand);
818 if (sc->vr_irq)
819 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->vr_irq);
820 if (sc->vr_res)
821 bus_release_resource(dev, VR_RES, VR_RID, sc->vr_res);
822
823 if (sc->vr_ldata)
824 contigfree(sc->vr_ldata, sizeof(struct vr_list_data), M_DEVBUF);
825
826 mtx_destroy(&sc->vr_mtx);
827
828 return (0);
829 }
830
831 /*
832 * Initialize the transmit descriptors.
833 */
834 static int
835 vr_list_tx_init(struct vr_softc *sc)
836 {
837 struct vr_chain_data *cd;
838 struct vr_list_data *ld;
839 int i;
840
841 cd = &sc->vr_cdata;
842 ld = sc->vr_ldata;
843 for (i = 0; i < VR_TX_LIST_CNT; i++) {
844 cd->vr_tx_chain[i].vr_ptr = &ld->vr_tx_list[i];
845 if (i == (VR_TX_LIST_CNT - 1))
846 cd->vr_tx_chain[i].vr_nextdesc =
847 &cd->vr_tx_chain[0];
848 else
849 cd->vr_tx_chain[i].vr_nextdesc =
850 &cd->vr_tx_chain[i + 1];
851 }
852 cd->vr_tx_cons = cd->vr_tx_prod = &cd->vr_tx_chain[0];
853
854 return (0);
855 }
856
857
858 /*
859 * Initialize the RX descriptors and allocate mbufs for them. Note that
860 * we arrange the descriptors in a closed ring, so that the last descriptor
861 * points back to the first.
862 */
863 static int
864 vr_list_rx_init(struct vr_softc *sc)
865 {
866 struct vr_chain_data *cd;
867 struct vr_list_data *ld;
868 int i;
869
870 VR_LOCK_ASSERT(sc);
871
872 cd = &sc->vr_cdata;
873 ld = sc->vr_ldata;
874
875 for (i = 0; i < VR_RX_LIST_CNT; i++) {
876 cd->vr_rx_chain[i].vr_ptr =
877 (struct vr_desc *)&ld->vr_rx_list[i];
878 if (vr_newbuf(sc, &cd->vr_rx_chain[i], NULL) == ENOBUFS)
879 return (ENOBUFS);
880 if (i == (VR_RX_LIST_CNT - 1)) {
881 cd->vr_rx_chain[i].vr_nextdesc =
882 &cd->vr_rx_chain[0];
883 ld->vr_rx_list[i].vr_next =
884 vtophys(&ld->vr_rx_list[0]);
885 } else {
886 cd->vr_rx_chain[i].vr_nextdesc =
887 &cd->vr_rx_chain[i + 1];
888 ld->vr_rx_list[i].vr_next =
889 vtophys(&ld->vr_rx_list[i + 1]);
890 }
891 }
892
893 cd->vr_rx_head = &cd->vr_rx_chain[0];
894
895 return (0);
896 }
897
898 /*
899 * Initialize an RX descriptor and attach an MBUF cluster.
900 * Note: the length fields are only 11 bits wide, which means the
901 * largest size we can specify is 2047. This is important because
902 * MCLBYTES is 2048, so we have to subtract one otherwise we'll
903 * overflow the field and make a mess.
904 */
905 static int
906 vr_newbuf(struct vr_softc *sc, struct vr_chain_onefrag *c, struct mbuf *m)
907 {
908 struct mbuf *m_new = NULL;
909
910 if (m == NULL) {
911 MGETHDR(m_new, M_DONTWAIT, MT_DATA);
912 if (m_new == NULL)
913 return (ENOBUFS);
914
915 MCLGET(m_new, M_DONTWAIT);
916 if (!(m_new->m_flags & M_EXT)) {
917 m_freem(m_new);
918 return (ENOBUFS);
919 }
920 m_new->m_len = m_new->m_pkthdr.len = MCLBYTES;
921 } else {
922 m_new = m;
923 m_new->m_len = m_new->m_pkthdr.len = MCLBYTES;
924 m_new->m_data = m_new->m_ext.ext_buf;
925 }
926
927 m_adj(m_new, sizeof(uint64_t));
928
929 c->vr_mbuf = m_new;
930 c->vr_ptr->vr_status = VR_RXSTAT;
931 c->vr_ptr->vr_data = vtophys(mtod(m_new, caddr_t));
932 c->vr_ptr->vr_ctl = VR_RXCTL | VR_RXLEN;
933
934 return (0);
935 }
936
937 /*
938 * A frame has been uploaded: pass the resulting mbuf chain up to
939 * the higher level protocols.
940 */
941 static void
942 vr_rxeof(struct vr_softc *sc)
943 {
944 struct mbuf *m, *m0;
945 struct ifnet *ifp;
946 struct vr_chain_onefrag *cur_rx;
947 int total_len = 0;
948 uint32_t rxstat;
949
950 VR_LOCK_ASSERT(sc);
951 ifp = sc->vr_ifp;
952
953 while (!((rxstat = sc->vr_cdata.vr_rx_head->vr_ptr->vr_status) &
954 VR_RXSTAT_OWN)) {
955 #ifdef DEVICE_POLLING
956 if (ifp->if_capenable & IFCAP_POLLING) {
957 if (sc->rxcycles <= 0)
958 break;
959 sc->rxcycles--;
960 }
961 #endif
962 m0 = NULL;
963 cur_rx = sc->vr_cdata.vr_rx_head;
964 sc->vr_cdata.vr_rx_head = cur_rx->vr_nextdesc;
965 m = cur_rx->vr_mbuf;
966
967 /*
968 * If an error occurs, update stats, clear the
969 * status word and leave the mbuf cluster in place:
970 * it should simply get re-used next time this descriptor
971 * comes up in the ring.
972 */
973 if (rxstat & VR_RXSTAT_RXERR) {
974 ifp->if_ierrors++;
975 if_printf(ifp, "rx error (%02x):", rxstat & 0x000000ff);
976 if (rxstat & VR_RXSTAT_CRCERR)
977 printf(" crc error");
978 if (rxstat & VR_RXSTAT_FRAMEALIGNERR)
979 printf(" frame alignment error\n");
980 if (rxstat & VR_RXSTAT_FIFOOFLOW)
981 printf(" FIFO overflow");
982 if (rxstat & VR_RXSTAT_GIANT)
983 printf(" received giant packet");
984 if (rxstat & VR_RXSTAT_RUNT)
985 printf(" received runt packet");
986 if (rxstat & VR_RXSTAT_BUSERR)
987 printf(" system bus error");
988 if (rxstat & VR_RXSTAT_BUFFERR)
989 printf("rx buffer error");
990 printf("\n");
991 vr_newbuf(sc, cur_rx, m);
992 continue;
993 }
994
995 /* No errors; receive the packet. */
996 total_len = VR_RXBYTES(cur_rx->vr_ptr->vr_status);
997
998 /*
999 * XXX The VIA Rhine chip includes the CRC with every
1000 * received frame, and there's no way to turn this
1001 * behavior off (at least, I can't find anything in
1002 * the manual that explains how to do it) so we have
1003 * to trim off the CRC manually.
1004 */
1005 total_len -= ETHER_CRC_LEN;
1006
1007 m0 = m_devget(mtod(m, char *), total_len, ETHER_ALIGN, ifp,
1008 NULL);
1009 vr_newbuf(sc, cur_rx, m);
1010 if (m0 == NULL) {
1011 ifp->if_ierrors++;
1012 continue;
1013 }
1014 m = m0;
1015
1016 ifp->if_ipackets++;
1017 VR_UNLOCK(sc);
1018 (*ifp->if_input)(ifp, m);
1019 VR_LOCK(sc);
1020 }
1021 }
1022
1023 static void
1024 vr_rxeoc(struct vr_softc *sc)
1025 {
1026 struct ifnet *ifp = sc->vr_ifp;
1027 int i;
1028
1029 VR_LOCK_ASSERT(sc);
1030
1031 ifp->if_ierrors++;
1032
1033 VR_CLRBIT16(sc, VR_COMMAND, VR_CMD_RX_ON);
1034 DELAY(10000);
1035
1036 /* Wait for receiver to stop */
1037 for (i = 0x400;
1038 i && (CSR_READ_2(sc, VR_COMMAND) & VR_CMD_RX_ON);
1039 i--) {
1040 ;
1041 }
1042
1043 if (!i) {
1044 if_printf(ifp, "rx shutdown error!\n");
1045 sc->vr_flags |= VR_F_RESTART;
1046 return;
1047 }
1048
1049 vr_rxeof(sc);
1050
1051 CSR_WRITE_4(sc, VR_RXADDR, vtophys(sc->vr_cdata.vr_rx_head->vr_ptr));
1052 VR_SETBIT16(sc, VR_COMMAND, VR_CMD_RX_ON);
1053 VR_SETBIT16(sc, VR_COMMAND, VR_CMD_RX_GO);
1054 }
1055
1056 /*
1057 * A frame was downloaded to the chip. It's safe for us to clean up
1058 * the list buffers.
1059 */
1060 static void
1061 vr_txeof(struct vr_softc *sc)
1062 {
1063 struct vr_chain *cur_tx;
1064 struct ifnet *ifp = sc->vr_ifp;
1065
1066 VR_LOCK_ASSERT(sc);
1067
1068 /*
1069 * Go through our tx list and free mbufs for those
1070 * frames that have been transmitted.
1071 */
1072 cur_tx = sc->vr_cdata.vr_tx_cons;
1073 while (cur_tx->vr_mbuf != NULL) {
1074 uint32_t txstat;
1075 int i;
1076
1077 txstat = cur_tx->vr_ptr->vr_status;
1078
1079 if ((txstat & VR_TXSTAT_ABRT) ||
1080 (txstat & VR_TXSTAT_UDF)) {
1081 for (i = 0x400;
1082 i && (CSR_READ_2(sc, VR_COMMAND) & VR_CMD_TX_ON);
1083 i--)
1084 ; /* Wait for chip to shutdown */
1085 if (!i) {
1086 if_printf(ifp, "tx shutdown timeout\n");
1087 sc->vr_flags |= VR_F_RESTART;
1088 break;
1089 }
1090 VR_TXOWN(cur_tx) = VR_TXSTAT_OWN;
1091 CSR_WRITE_4(sc, VR_TXADDR, vtophys(cur_tx->vr_ptr));
1092 break;
1093 }
1094
1095 if (txstat & VR_TXSTAT_OWN)
1096 break;
1097
1098 if (txstat & VR_TXSTAT_ERRSUM) {
1099 ifp->if_oerrors++;
1100 if (txstat & VR_TXSTAT_DEFER)
1101 ifp->if_collisions++;
1102 if (txstat & VR_TXSTAT_LATECOLL)
1103 ifp->if_collisions++;
1104 }
1105
1106 ifp->if_collisions +=(txstat & VR_TXSTAT_COLLCNT) >> 3;
1107
1108 ifp->if_opackets++;
1109 m_freem(cur_tx->vr_mbuf);
1110 cur_tx->vr_mbuf = NULL;
1111 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
1112
1113 cur_tx = cur_tx->vr_nextdesc;
1114 }
1115 sc->vr_cdata.vr_tx_cons = cur_tx;
1116 if (cur_tx->vr_mbuf == NULL)
1117 ifp->if_timer = 0;
1118 }
1119
1120 static void
1121 vr_tick(void *xsc)
1122 {
1123 struct vr_softc *sc = xsc;
1124 struct mii_data *mii;
1125
1126 VR_LOCK_ASSERT(sc);
1127
1128 if (sc->vr_flags & VR_F_RESTART) {
1129 if_printf(sc->vr_ifp, "restarting\n");
1130 vr_stop(sc);
1131 vr_reset(sc);
1132 vr_init_locked(sc);
1133 sc->vr_flags &= ~VR_F_RESTART;
1134 }
1135
1136 mii = device_get_softc(sc->vr_miibus);
1137 mii_tick(mii);
1138 callout_reset(&sc->vr_stat_callout, hz, vr_tick, sc);
1139 }
1140
1141 #ifdef DEVICE_POLLING
1142 static poll_handler_t vr_poll;
1143 static poll_handler_t vr_poll_locked;
1144
1145 static void
1146 vr_poll(struct ifnet *ifp, enum poll_cmd cmd, int count)
1147 {
1148 struct vr_softc *sc = ifp->if_softc;
1149
1150 VR_LOCK(sc);
1151 if (ifp->if_drv_flags & IFF_DRV_RUNNING)
1152 vr_poll_locked(ifp, cmd, count);
1153 VR_UNLOCK(sc);
1154 }
1155
1156 static void
1157 vr_poll_locked(struct ifnet *ifp, enum poll_cmd cmd, int count)
1158 {
1159 struct vr_softc *sc = ifp->if_softc;
1160
1161 VR_LOCK_ASSERT(sc);
1162
1163 sc->rxcycles = count;
1164 vr_rxeof(sc);
1165 vr_txeof(sc);
1166 if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd))
1167 vr_start_locked(ifp);
1168
1169 if (cmd == POLL_AND_CHECK_STATUS) {
1170 uint16_t status;
1171
1172 /* Also check status register. */
1173 status = CSR_READ_2(sc, VR_ISR);
1174 if (status)
1175 CSR_WRITE_2(sc, VR_ISR, status);
1176
1177 if ((status & VR_INTRS) == 0)
1178 return;
1179
1180 if (status & VR_ISR_RX_DROPPED) {
1181 if_printf(ifp, "rx packet lost\n");
1182 ifp->if_ierrors++;
1183 }
1184
1185 if ((status & VR_ISR_RX_ERR) || (status & VR_ISR_RX_NOBUF) ||
1186 (status & VR_ISR_RX_NOBUF) || (status & VR_ISR_RX_OFLOW)) {
1187 if_printf(ifp, "receive error (%04x)", status);
1188 if (status & VR_ISR_RX_NOBUF)
1189 printf(" no buffers");
1190 if (status & VR_ISR_RX_OFLOW)
1191 printf(" overflow");
1192 if (status & VR_ISR_RX_DROPPED)
1193 printf(" packet lost");
1194 printf("\n");
1195 vr_rxeoc(sc);
1196 }
1197
1198 if ((status & VR_ISR_BUSERR) ||
1199 (status & VR_ISR_TX_UNDERRUN)) {
1200 vr_reset(sc);
1201 vr_init_locked(sc);
1202 return;
1203 }
1204
1205 if ((status & VR_ISR_UDFI) ||
1206 (status & VR_ISR_TX_ABRT2) ||
1207 (status & VR_ISR_TX_ABRT)) {
1208 ifp->if_oerrors++;
1209 if (sc->vr_cdata.vr_tx_cons->vr_mbuf != NULL) {
1210 VR_SETBIT16(sc, VR_COMMAND, VR_CMD_TX_ON);
1211 VR_SETBIT16(sc, VR_COMMAND, VR_CMD_TX_GO);
1212 }
1213 }
1214 }
1215 }
1216 #endif /* DEVICE_POLLING */
1217
1218 static void
1219 vr_intr(void *arg)
1220 {
1221 struct vr_softc *sc = arg;
1222 struct ifnet *ifp = sc->vr_ifp;
1223 uint16_t status;
1224
1225 VR_LOCK(sc);
1226
1227 if (sc->suspended) {
1228 /*
1229 * Forcibly disable interrupts.
1230 * XXX: Mobile VIA based platforms may need
1231 * interrupt re-enable on resume.
1232 */
1233 CSR_WRITE_2(sc, VR_IMR, 0x0000);
1234 goto done_locked;
1235 }
1236
1237 #ifdef DEVICE_POLLING
1238 if (ifp->if_capenable & IFCAP_POLLING)
1239 goto done_locked;
1240 #endif
1241
1242 /* Suppress unwanted interrupts. */
1243 if (!(ifp->if_flags & IFF_UP)) {
1244 vr_stop(sc);
1245 goto done_locked;
1246 }
1247
1248 /* Disable interrupts. */
1249 CSR_WRITE_2(sc, VR_IMR, 0x0000);
1250
1251 for (;;) {
1252 status = CSR_READ_2(sc, VR_ISR);
1253 if (status)
1254 CSR_WRITE_2(sc, VR_ISR, status);
1255
1256 if ((status & VR_INTRS) == 0)
1257 break;
1258
1259 if (status & VR_ISR_RX_OK)
1260 vr_rxeof(sc);
1261
1262 if (status & VR_ISR_RX_DROPPED) {
1263 if_printf(ifp, "rx packet lost\n");
1264 ifp->if_ierrors++;
1265 }
1266
1267 if ((status & VR_ISR_RX_ERR) || (status & VR_ISR_RX_NOBUF) ||
1268 (status & VR_ISR_RX_NOBUF) || (status & VR_ISR_RX_OFLOW)) {
1269 if_printf(ifp, "receive error (%04x)", status);
1270 if (status & VR_ISR_RX_NOBUF)
1271 printf(" no buffers");
1272 if (status & VR_ISR_RX_OFLOW)
1273 printf(" overflow");
1274 if (status & VR_ISR_RX_DROPPED)
1275 printf(" packet lost");
1276 printf("\n");
1277 vr_rxeoc(sc);
1278 }
1279
1280 if ((status & VR_ISR_BUSERR) || (status & VR_ISR_TX_UNDERRUN)) {
1281 vr_reset(sc);
1282 vr_init_locked(sc);
1283 break;
1284 }
1285
1286 if ((status & VR_ISR_TX_OK) || (status & VR_ISR_TX_ABRT) ||
1287 (status & VR_ISR_TX_ABRT2) || (status & VR_ISR_UDFI)) {
1288 vr_txeof(sc);
1289 if ((status & VR_ISR_UDFI) ||
1290 (status & VR_ISR_TX_ABRT2) ||
1291 (status & VR_ISR_TX_ABRT)) {
1292 ifp->if_oerrors++;
1293 if (sc->vr_cdata.vr_tx_cons->vr_mbuf != NULL) {
1294 VR_SETBIT16(sc, VR_COMMAND,
1295 VR_CMD_TX_ON);
1296 VR_SETBIT16(sc, VR_COMMAND,
1297 VR_CMD_TX_GO);
1298 }
1299 }
1300 }
1301 }
1302
1303 /* Re-enable interrupts. */
1304 CSR_WRITE_2(sc, VR_IMR, VR_INTRS);
1305
1306 if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd))
1307 vr_start_locked(ifp);
1308
1309 done_locked:
1310 VR_UNLOCK(sc);
1311 }
1312
1313 /*
1314 * Encapsulate an mbuf chain in a descriptor by coupling the mbuf data
1315 * pointers to the fragment pointers.
1316 */
1317 static int
1318 vr_encap(struct vr_softc *sc, struct vr_chain *c, struct mbuf *m_head)
1319 {
1320 struct vr_desc *f = NULL;
1321 struct mbuf *m;
1322
1323 VR_LOCK_ASSERT(sc);
1324 /*
1325 * The VIA Rhine wants packet buffers to be longword
1326 * aligned, but very often our mbufs aren't. Rather than
1327 * waste time trying to decide when to copy and when not
1328 * to copy, just do it all the time.
1329 */
1330 m = m_defrag(m_head, M_DONTWAIT);
1331 if (m == NULL)
1332 return (1);
1333
1334 /*
1335 * The Rhine chip doesn't auto-pad, so we have to make
1336 * sure to pad short frames out to the minimum frame length
1337 * ourselves.
1338 */
1339 if (m->m_len < VR_MIN_FRAMELEN) {
1340 m->m_pkthdr.len += VR_MIN_FRAMELEN - m->m_len;
1341 m->m_len = m->m_pkthdr.len;
1342 }
1343
1344 c->vr_mbuf = m;
1345 f = c->vr_ptr;
1346 f->vr_data = vtophys(mtod(m, caddr_t));
1347 f->vr_ctl = m->m_len;
1348 f->vr_ctl |= VR_TXCTL_TLINK|VR_TXCTL_FIRSTFRAG;
1349 f->vr_status = 0;
1350 f->vr_ctl |= VR_TXCTL_LASTFRAG|VR_TXCTL_FINT;
1351 f->vr_next = vtophys(c->vr_nextdesc->vr_ptr);
1352
1353 return (0);
1354 }
1355
1356 /*
1357 * Main transmit routine. To avoid having to do mbuf copies, we put pointers
1358 * to the mbuf data regions directly in the transmit lists. We also save a
1359 * copy of the pointers since the transmit list fragment pointers are
1360 * physical addresses.
1361 */
1362
1363 static void
1364 vr_start(struct ifnet *ifp)
1365 {
1366 struct vr_softc *sc = ifp->if_softc;
1367
1368 VR_LOCK(sc);
1369 vr_start_locked(ifp);
1370 VR_UNLOCK(sc);
1371 }
1372
1373 static void
1374 vr_start_locked(struct ifnet *ifp)
1375 {
1376 struct vr_softc *sc = ifp->if_softc;
1377 struct mbuf *m_head;
1378 struct vr_chain *cur_tx;
1379
1380 if (ifp->if_drv_flags & IFF_DRV_OACTIVE)
1381 return;
1382
1383 cur_tx = sc->vr_cdata.vr_tx_prod;
1384 while (cur_tx->vr_mbuf == NULL) {
1385 IFQ_DRV_DEQUEUE(&ifp->if_snd, m_head);
1386 if (m_head == NULL)
1387 break;
1388
1389 /* Pack the data into the descriptor. */
1390 if (vr_encap(sc, cur_tx, m_head)) {
1391 /* Rollback, send what we were able to encap. */
1392 IFQ_DRV_PREPEND(&ifp->if_snd, m_head);
1393 break;
1394 }
1395
1396 VR_TXOWN(cur_tx) = VR_TXSTAT_OWN;
1397
1398 /*
1399 * If there's a BPF listener, bounce a copy of this frame
1400 * to him.
1401 */
1402 BPF_MTAP(ifp, cur_tx->vr_mbuf);
1403
1404 cur_tx = cur_tx->vr_nextdesc;
1405 }
1406 if (cur_tx != sc->vr_cdata.vr_tx_prod || cur_tx->vr_mbuf != NULL) {
1407 sc->vr_cdata.vr_tx_prod = cur_tx;
1408
1409 /* Tell the chip to start transmitting. */
1410 VR_SETBIT16(sc, VR_COMMAND, /*VR_CMD_TX_ON|*/ VR_CMD_TX_GO);
1411
1412 /* Set a timeout in case the chip goes out to lunch. */
1413 ifp->if_timer = 5;
1414
1415 if (cur_tx->vr_mbuf != NULL)
1416 ifp->if_drv_flags |= IFF_DRV_OACTIVE;
1417 }
1418 }
1419
1420 static void
1421 vr_init(void *xsc)
1422 {
1423 struct vr_softc *sc = xsc;
1424
1425 VR_LOCK(sc);
1426 vr_init_locked(sc);
1427 VR_UNLOCK(sc);
1428 }
1429
1430 static void
1431 vr_init_locked(struct vr_softc *sc)
1432 {
1433 struct ifnet *ifp = sc->vr_ifp;
1434 struct mii_data *mii;
1435 int i;
1436
1437 VR_LOCK_ASSERT(sc);
1438
1439 mii = device_get_softc(sc->vr_miibus);
1440
1441 /* Cancel pending I/O and free all RX/TX buffers. */
1442 vr_stop(sc);
1443 vr_reset(sc);
1444
1445 /* Set our station address. */
1446 for (i = 0; i < ETHER_ADDR_LEN; i++)
1447 CSR_WRITE_1(sc, VR_PAR0 + i, IFP2ENADDR(sc->vr_ifp)[i]);
1448
1449 /* Set DMA size. */
1450 VR_CLRBIT(sc, VR_BCR0, VR_BCR0_DMA_LENGTH);
1451 VR_SETBIT(sc, VR_BCR0, VR_BCR0_DMA_STORENFWD);
1452
1453 /*
1454 * BCR0 and BCR1 can override the RXCFG and TXCFG registers,
1455 * so we must set both.
1456 */
1457 VR_CLRBIT(sc, VR_BCR0, VR_BCR0_RX_THRESH);
1458 VR_SETBIT(sc, VR_BCR0, VR_BCR0_RXTHRESH128BYTES);
1459
1460 VR_CLRBIT(sc, VR_BCR1, VR_BCR1_TX_THRESH);
1461 VR_SETBIT(sc, VR_BCR1, VR_BCR1_TXTHRESHSTORENFWD);
1462
1463 VR_CLRBIT(sc, VR_RXCFG, VR_RXCFG_RX_THRESH);
1464 VR_SETBIT(sc, VR_RXCFG, VR_RXTHRESH_128BYTES);
1465
1466 VR_CLRBIT(sc, VR_TXCFG, VR_TXCFG_TX_THRESH);
1467 VR_SETBIT(sc, VR_TXCFG, VR_TXTHRESH_STORENFWD);
1468
1469 /* Init circular RX list. */
1470 if (vr_list_rx_init(sc) == ENOBUFS) {
1471 if_printf(ifp,
1472 "initialization failed: no memory for rx buffers\n");
1473 vr_stop(sc);
1474 return;
1475 }
1476
1477 /* Init tx descriptors. */
1478 vr_list_tx_init(sc);
1479
1480 /* If we want promiscuous mode, set the allframes bit. */
1481 if (ifp->if_flags & IFF_PROMISC)
1482 VR_SETBIT(sc, VR_RXCFG, VR_RXCFG_RX_PROMISC);
1483 else
1484 VR_CLRBIT(sc, VR_RXCFG, VR_RXCFG_RX_PROMISC);
1485
1486 /* Set capture broadcast bit to capture broadcast frames. */
1487 if (ifp->if_flags & IFF_BROADCAST)
1488 VR_SETBIT(sc, VR_RXCFG, VR_RXCFG_RX_BROAD);
1489 else
1490 VR_CLRBIT(sc, VR_RXCFG, VR_RXCFG_RX_BROAD);
1491
1492 /*
1493 * Program the multicast filter, if necessary.
1494 */
1495 vr_setmulti(sc);
1496
1497 /*
1498 * Load the address of the RX list.
1499 */
1500 CSR_WRITE_4(sc, VR_RXADDR, vtophys(sc->vr_cdata.vr_rx_head->vr_ptr));
1501
1502 /* Enable receiver and transmitter. */
1503 CSR_WRITE_2(sc, VR_COMMAND, VR_CMD_TX_NOPOLL|VR_CMD_START|
1504 VR_CMD_TX_ON|VR_CMD_RX_ON|
1505 VR_CMD_RX_GO);
1506
1507 CSR_WRITE_4(sc, VR_TXADDR, vtophys(&sc->vr_ldata->vr_tx_list[0]));
1508
1509 CSR_WRITE_2(sc, VR_ISR, 0xFFFF);
1510 #ifdef DEVICE_POLLING
1511 /*
1512 * Disable interrupts if we are polling.
1513 */
1514 if (ifp->if_capenable & IFCAP_POLLING)
1515 CSR_WRITE_2(sc, VR_IMR, 0);
1516 else
1517 #endif
1518 /*
1519 * Enable interrupts.
1520 */
1521 CSR_WRITE_2(sc, VR_IMR, VR_INTRS);
1522
1523 mii_mediachg(mii);
1524
1525 ifp->if_drv_flags |= IFF_DRV_RUNNING;
1526 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
1527
1528 callout_reset(&sc->vr_stat_callout, hz, vr_tick, sc);
1529 }
1530
1531 /*
1532 * Set media options.
1533 */
1534 static int
1535 vr_ifmedia_upd(struct ifnet *ifp)
1536 {
1537 struct vr_softc *sc = ifp->if_softc;
1538
1539 if (ifp->if_flags & IFF_UP)
1540 vr_init(sc);
1541
1542 return (0);
1543 }
1544
1545 /*
1546 * Report current media status.
1547 */
1548 static void
1549 vr_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
1550 {
1551 struct vr_softc *sc = ifp->if_softc;
1552 struct mii_data *mii;
1553
1554 mii = device_get_softc(sc->vr_miibus);
1555 VR_LOCK(sc);
1556 mii_pollstat(mii);
1557 VR_UNLOCK(sc);
1558 ifmr->ifm_active = mii->mii_media_active;
1559 ifmr->ifm_status = mii->mii_media_status;
1560 }
1561
1562 static int
1563 vr_ioctl(struct ifnet *ifp, u_long command, caddr_t data)
1564 {
1565 struct vr_softc *sc = ifp->if_softc;
1566 struct ifreq *ifr = (struct ifreq *) data;
1567 struct mii_data *mii;
1568 int error = 0;
1569
1570 switch (command) {
1571 case SIOCSIFFLAGS:
1572 VR_LOCK(sc);
1573 if (ifp->if_flags & IFF_UP) {
1574 vr_init_locked(sc);
1575 } else {
1576 if (ifp->if_drv_flags & IFF_DRV_RUNNING)
1577 vr_stop(sc);
1578 }
1579 VR_UNLOCK(sc);
1580 error = 0;
1581 break;
1582 case SIOCADDMULTI:
1583 case SIOCDELMULTI:
1584 VR_LOCK(sc);
1585 vr_setmulti(sc);
1586 VR_UNLOCK(sc);
1587 error = 0;
1588 break;
1589 case SIOCGIFMEDIA:
1590 case SIOCSIFMEDIA:
1591 mii = device_get_softc(sc->vr_miibus);
1592 error = ifmedia_ioctl(ifp, ifr, &mii->mii_media, command);
1593 break;
1594 case SIOCSIFCAP:
1595 #ifdef DEVICE_POLLING
1596 if (ifr->ifr_reqcap & IFCAP_POLLING &&
1597 !(ifp->if_capenable & IFCAP_POLLING)) {
1598 error = ether_poll_register(vr_poll, ifp);
1599 if (error)
1600 return(error);
1601 VR_LOCK(sc);
1602 /* Disable interrupts */
1603 CSR_WRITE_2(sc, VR_IMR, 0x0000);
1604 ifp->if_capenable |= IFCAP_POLLING;
1605 VR_UNLOCK(sc);
1606 return (error);
1607
1608 }
1609 if (!(ifr->ifr_reqcap & IFCAP_POLLING) &&
1610 ifp->if_capenable & IFCAP_POLLING) {
1611 error = ether_poll_deregister(ifp);
1612 /* Enable interrupts. */
1613 VR_LOCK(sc);
1614 CSR_WRITE_2(sc, VR_IMR, VR_INTRS);
1615 ifp->if_capenable &= ~IFCAP_POLLING;
1616 VR_UNLOCK(sc);
1617 return (error);
1618 }
1619 #endif /* DEVICE_POLLING */
1620 break;
1621 default:
1622 error = ether_ioctl(ifp, command, data);
1623 break;
1624 }
1625
1626 return (error);
1627 }
1628
1629 static void
1630 vr_watchdog(struct ifnet *ifp)
1631 {
1632 struct vr_softc *sc = ifp->if_softc;
1633
1634 VR_LOCK(sc);
1635
1636 ifp->if_oerrors++;
1637 if_printf(ifp, "watchdog timeout\n");
1638
1639 vr_stop(sc);
1640 vr_reset(sc);
1641 vr_init_locked(sc);
1642
1643 if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd))
1644 vr_start_locked(ifp);
1645
1646 VR_UNLOCK(sc);
1647 }
1648
1649 /*
1650 * Stop the adapter and free any mbufs allocated to the
1651 * RX and TX lists.
1652 */
1653 static void
1654 vr_stop(struct vr_softc *sc)
1655 {
1656 register int i;
1657 struct ifnet *ifp;
1658
1659 VR_LOCK_ASSERT(sc);
1660
1661 ifp = sc->vr_ifp;
1662 ifp->if_timer = 0;
1663
1664 callout_stop(&sc->vr_stat_callout);
1665 ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
1666
1667 VR_SETBIT16(sc, VR_COMMAND, VR_CMD_STOP);
1668 VR_CLRBIT16(sc, VR_COMMAND, (VR_CMD_RX_ON|VR_CMD_TX_ON));
1669 CSR_WRITE_2(sc, VR_IMR, 0x0000);
1670 CSR_WRITE_4(sc, VR_TXADDR, 0x00000000);
1671 CSR_WRITE_4(sc, VR_RXADDR, 0x00000000);
1672
1673 /*
1674 * Free data in the RX lists.
1675 */
1676 for (i = 0; i < VR_RX_LIST_CNT; i++) {
1677 if (sc->vr_cdata.vr_rx_chain[i].vr_mbuf != NULL) {
1678 m_freem(sc->vr_cdata.vr_rx_chain[i].vr_mbuf);
1679 sc->vr_cdata.vr_rx_chain[i].vr_mbuf = NULL;
1680 }
1681 }
1682 bzero((char *)&sc->vr_ldata->vr_rx_list,
1683 sizeof(sc->vr_ldata->vr_rx_list));
1684
1685 /*
1686 * Free the TX list buffers.
1687 */
1688 for (i = 0; i < VR_TX_LIST_CNT; i++) {
1689 if (sc->vr_cdata.vr_tx_chain[i].vr_mbuf != NULL) {
1690 m_freem(sc->vr_cdata.vr_tx_chain[i].vr_mbuf);
1691 sc->vr_cdata.vr_tx_chain[i].vr_mbuf = NULL;
1692 }
1693 }
1694 bzero((char *)&sc->vr_ldata->vr_tx_list,
1695 sizeof(sc->vr_ldata->vr_tx_list));
1696 }
1697
1698 /*
1699 * Stop all chip I/O so that the kernel's probe routines don't
1700 * get confused by errant DMAs when rebooting.
1701 */
1702 static void
1703 vr_shutdown(device_t dev)
1704 {
1705
1706 vr_detach(dev);
1707 }
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