FreeBSD/Linux Kernel Cross Reference
sys/pci/pci.c
1 /**************************************************************************
2 **
3 ** $FreeBSD: src/sys/pci/pci.c,v 1.57.2.10 1999/09/05 08:21:21 peter Exp $
4 **
5 ** General subroutines for the PCI bus.
6 ** pci_configure ()
7 **
8 ** FreeBSD
9 **
10 **-------------------------------------------------------------------------
11 **
12 ** Copyright (c) 1994 Wolfgang Stanglmeier. All rights reserved.
13 **
14 ** Redistribution and use in source and binary forms, with or without
15 ** modification, are permitted provided that the following conditions
16 ** are met:
17 ** 1. Redistributions of source code must retain the above copyright
18 ** notice, this list of conditions and the following disclaimer.
19 ** 2. Redistributions in binary form must reproduce the above copyright
20 ** notice, this list of conditions and the following disclaimer in the
21 ** documentation and/or other materials provided with the distribution.
22 ** 3. The name of the author may not be used to endorse or promote products
23 ** derived from this software without specific prior written permission.
24 **
25 ** THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
26 ** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
27 ** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
28 ** IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
29 ** INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
30 ** NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
31 ** DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
32 ** THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
33 ** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
34 ** THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35 **
36 ***************************************************************************
37 */
38
39 #include "pci.h"
40 #if NPCI > 0
41
42 /*========================================================
43 **
44 ** #includes and declarations
45 **
46 **========================================================
47 */
48
49 #include <sys/param.h>
50 #include <sys/systm.h>
51 #include <sys/malloc.h>
52 #include <sys/errno.h>
53 #include <sys/kernel.h>
54 #include <sys/proc.h> /* declaration of wakeup(), used by vm.h */
55 #include <sys/conf.h>
56 #ifdef DEVFS
57 #include <sys/devfsext.h>
58 #endif /* DEVFS */
59 #include <sys/fcntl.h>
60
61 #include <vm/vm.h>
62 #include <vm/vm_param.h>
63 #include <vm/pmap.h>
64
65
66 #include <i386/isa/isa_device.h> /* XXX inthand2_t */
67
68 #include <pci/pcivar.h>
69 #include <pci/pcireg.h>
70 #include <pci/pcibus.h>
71 #include <pci/pci_ioctl.h>
72
73 #define PCI_MAX_IRQ (16)
74
75
76 /*========================================================
77 **
78 ** Structs and Functions
79 **
80 **========================================================
81 */
82
83 struct pcicb {
84 struct pcicb *pcicb_next;
85 struct pcicb *pcicb_up;
86 struct pcicb *pcicb_down;
87 pcici_t pcicb_bridge;
88
89 u_char pcicb_bus;
90 u_char pcicb_subordinate;
91 u_int pcicb_mfrom;
92 u_int pcicb_mupto;
93 u_int pcicb_mamount;
94 u_short pcicb_pfrom;
95 u_short pcicb_pupto;
96 u_short pcicb_pamount;
97 u_char pcicb_bfrom;
98 u_char pcicb_bupto;
99
100 u_long pcicb_iobase;
101 u_long pcicb_iolimit;
102 u_long pcicb_membase;
103 u_long pcicb_memlimit;
104 u_long pcicb_p_membase;
105 u_long pcicb_p_memlimit;
106 };
107
108 struct pci_lkm {
109 struct pci_device *dvp;
110 struct pci_lkm *next;
111 };
112
113 static void
114 not_supported (pcici_t tag, u_long type);
115
116 static void
117 pci_bus_config (void);
118
119 static void
120 pci_rescan (void);
121
122 static void pci_attach (int bus, int dev, int func,
123 struct pci_device *dvp, const char *name);
124
125 static int
126 pci_bridge_config (void);
127
128 static int
129 pci_mfdev (int bus, int device);
130
131 static void pci_remember (int bus, int dev, int func, struct pci_device *dvp);
132
133 /*========================================================
134 **
135 ** Variables
136 **
137 **========================================================
138 */
139
140 /*
141 ** log2 of safe burst len (in words)
142 */
143
144 unsigned pci_max_burst_len = 3; /* 2=16Byte, 3=32Byte, 4=64Byte, ... */
145 unsigned pci_mechanism = 0;
146 unsigned pci_maxdevice = 0;
147 unsigned pciroots = 0; /* XXX pcisupport.c increments this
148 * for the Orion host to PCI bridge
149 * UGLY hack ... :( Will be changed :)
150 */
151 /*--------------------------------------------------------
152 **
153 ** Local variables.
154 **
155 **--------------------------------------------------------
156 */
157
158 static struct pcibus *pcibus;
159
160 static int pci_conf_count;
161 static int pci_info_done;
162 static int pcibusmax;
163 static struct pcicb *pcicb;
164
165 static struct pci_conf *pci_dev_list;
166 static unsigned pci_dev_list_count;
167 static unsigned pci_dev_list_size;
168
169 static struct pci_lkm *pci_lkm_head;
170
171 /*-----------------------------------------------------------------
172 **
173 ** The following functions are provided for the device driver
174 ** to read/write the configuration space.
175 **
176 ** pci_conf_read():
177 ** Read a long word from the pci configuration space.
178 ** Requires a tag (from pcitag) and the register
179 ** number (should be a long word alligned one).
180 **
181 ** pci_conf_write():
182 ** Writes a long word to the pci configuration space.
183 ** Requires a tag (from pcitag), the register number
184 ** (should be a long word alligned one), and a value.
185 **
186 **-----------------------------------------------------------------
187 */
188
189 u_long
190 pci_conf_read (pcici_t tag, u_long reg)
191 {
192 return (pcibus->pb_read (tag, reg));
193 }
194
195 void
196 pci_conf_write (pcici_t tag, u_long reg, u_long data)
197 {
198 pcibus->pb_write (tag, reg, data);
199 }
200
201 /*========================================================
202 **
203 ** Subroutines for configuration.
204 **
205 **========================================================
206 */
207
208 static void
209 pci_register_io (struct pcicb * cb, u_int base, u_int limit)
210 {
211 #ifdef PCI_BRIDGE_DEBUG
212 if (bootverbose)
213 printf ("register_io: bus=%d base=%x limit=%x\n",
214 cb->pcicb_bus, base, limit);
215 #endif
216
217 if (!cb->pcicb_pfrom || base < cb->pcicb_pfrom)
218 cb->pcicb_pfrom = base;
219 if (limit > cb->pcicb_pupto)
220 cb->pcicb_pupto = limit;
221
222 /*
223 ** XXX should set bridge io mapping here
224 ** but it can be mapped in 4k blocks only,
225 ** leading to conflicts with isa/eisa ..
226 */
227 }
228
229 static void
230 pci_register_memory (struct pcicb * cb, u_int base, u_int limit)
231 {
232 #ifdef PCI_BRIDGE_DEBUG
233 if (bootverbose)
234 printf ("register_mem: bus=%d base=%x limit=%x\n",
235 cb->pcicb_bus, base, limit);
236 #endif
237
238 if (!cb->pcicb_mfrom || base < cb->pcicb_mfrom)
239 cb->pcicb_mfrom = base;
240 if (limit > cb->pcicb_mupto)
241 cb->pcicb_mupto = limit;
242 /*
243 ** set the bridges mapping
244 **
245 ** XXX should handle the 1Mb granularity.
246 */
247 if (cb->pcicb_bridge.tag) {
248 pci_conf_write(cb->pcicb_bridge,
249 PCI_PCI_BRIDGE_MEM_REG,
250 (cb->pcicb_memlimit & 0xffff0000) |
251 (cb->pcicb_membase >> 16));
252 if (bootverbose)
253 printf ("\t[pci%d uses memory from %x to %x]\n",
254 cb->pcicb_bus,
255 (unsigned) cb->pcicb_membase,
256 (unsigned) cb->pcicb_memlimit);
257 }
258 }
259
260 /*
261 ** XXX This function is neither complete nor tested.
262 ** It's only used if the bios hasn't done it's job
263 ** of mapping the pci devices in the physical memory.
264 */
265
266 static u_int
267 pci_memalloc (struct pcicb * cb, u_int addr, u_int size)
268 {
269 u_int result = 0, limit=0, newbase=0;
270 #ifdef PCI_BRIDGE_DEBUG
271 if (bootverbose)
272 printf ("memalloc: bus=%d addr=%x size=%x ..\n",
273 cb->pcicb_bus, addr, size);
274 #endif
275
276 if (!cb) goto done;
277
278 if (!cb->pcicb_membase) {
279 printf ("memalloc: bus%d: membase not set.\n",
280 cb->pcicb_bus);
281 goto done;
282 }
283
284 /*
285 ** get upper allocation limit
286 */
287 limit = cb->pcicb_memlimit;
288 if (cb->pcicb_mfrom && cb->pcicb_mfrom <= limit)
289 limit = cb->pcicb_mfrom-1;
290
291 /*
292 ** address fixed, and impossible to allocate ?
293 */
294 if (addr && addr+size-1 > limit)
295 goto done;
296
297 /*
298 ** get possible address
299 */
300
301 result = addr;
302 if (!result) result = ((limit + 1) / size - 1) * size;
303
304 /*
305 ** if not local available, request from parent.
306 */
307
308 if (result < cb->pcicb_membase) {
309 newbase = pci_memalloc (cb->pcicb_up, result, size);
310 if (newbase) cb->pcicb_membase = result;
311 else result=0;
312 }
313 done:
314 if (result)
315 pci_register_memory (cb, result, result+size-1);
316
317 #ifdef PCI_BRIDGE_DEBUG
318 printf ("memalloc: bus=%d addr=%x size=%x --> %x (limit=%x).\n",
319 cb->pcicb_bus, addr, size, result, limit);
320 #endif
321
322 return (result);
323 }
324
325 /*========================================================
326 **
327 ** pci_bridge_config()
328 **
329 ** Configuration of a pci bridge.
330 **
331 **========================================================
332 */
333
334 static int
335 pci_bridge_config (void)
336 {
337 pcici_t tag;
338 struct pcicb* parent;
339
340 tag = pcicb->pcicb_bridge;
341 if (tag.tag) {
342
343 if (!pcicb->pcicb_bus) {
344 u_int data;
345 /*
346 ** Get the lowest available bus number.
347 */
348 pcicb->pcicb_bus = ++pcibusmax;
349
350 /*
351 ** and configure the bridge
352 */
353 data = pci_conf_read (tag, PCI_PCI_BRIDGE_BUS_REG);
354 data = PCI_PRIMARY_BUS_INSERT(data, pcicb->pcicb_up->pcicb_bus);
355 data = PCI_SECONDARY_BUS_INSERT(data, pcicb->pcicb_bus);
356 data = PCI_SUBORDINATE_BUS_INSERT(data, pcicb->pcicb_bus);
357 pci_conf_write (tag, PCI_PCI_BRIDGE_BUS_REG, data);
358
359 /*
360 ** Propagate the new upper bus number limit.
361 */
362 for (parent = pcicb->pcicb_up; parent != NULL;
363 parent = parent->pcicb_up)
364 {
365 if (parent->pcicb_subordinate >= pcicb->pcicb_bus)
366 continue;
367 parent->pcicb_subordinate = pcicb->pcicb_bus;
368 if (!parent->pcicb_bridge.tag)
369 continue;
370 data = pci_conf_read
371 (parent->pcicb_bridge, PCI_PCI_BRIDGE_BUS_REG);
372 data = PCI_SUBORDINATE_BUS_INSERT
373 (data, pcicb->pcicb_bus);
374 pci_conf_write (parent->pcicb_bridge,
375 PCI_PCI_BRIDGE_BUS_REG, data);
376 }
377 }
378
379 if (!pcicb->pcicb_membase) {
380 u_int size = 0x100000;
381 pcicb->pcicb_membase = pci_memalloc (pcicb->pcicb_up, 0, size);
382 if (pcicb->pcicb_membase)
383 pcicb->pcicb_memlimit = pcicb->pcicb_membase+size-1;
384 }
385 }
386 return pcicb->pcicb_bus;
387 }
388
389 /*========================================================
390 **
391 ** pci_attach()
392 **
393 ** Attach one device
394 **
395 **========================================================
396 */
397
398 static void pci_attach (int bus, int dev, int func,
399 struct pci_device *dvp, const char *name)
400 {
401 u_long data;
402 int unit;
403 u_char reg;
404 u_char pciint;
405 int irq;
406 pcici_t tag = pcibus->pb_tag (bus, dev, func);
407
408 /*
409 ** Get and increment the unit.
410 */
411
412 unit = (*dvp->pd_count)++;
413
414 /*
415 ** Announce this device
416 */
417
418 printf ("%s%d <%s> rev %d", dvp->pd_name, unit, name,
419 (unsigned) pci_conf_read (tag, PCI_CLASS_REG) & 0xff);
420
421 /*
422 ** Get the int pin number (pci interrupt number a-d)
423 ** from the pci configuration space.
424 */
425
426 data = pci_conf_read (tag, PCI_INTERRUPT_REG);
427 pciint = PCI_INTERRUPT_PIN_EXTRACT(data);
428
429 if (pciint) {
430
431 printf (" int %c irq ", 0x60+pciint);
432
433 irq = PCI_INTERRUPT_LINE_EXTRACT(data);
434
435 /*
436 ** If it's zero, the isa irq number is unknown,
437 ** and we cannot bind the pci interrupt.
438 */
439
440 if (irq && (irq != 0xff))
441 printf ("%d", irq);
442 else
443 printf ("??");
444 };
445
446 printf (" on pci%d:%d:%d\n", bus, dev, func);
447
448 /*
449 ** Read the current mapping,
450 ** and update the pcicb fields.
451 */
452
453 for (reg=PCI_MAP_REG_START;reg<PCI_MAP_REG_END;reg+=4) {
454 u_int map, addr, size;
455
456 data = pci_conf_read(tag, PCI_CLASS_REG);
457 switch (data & (PCI_CLASS_MASK|PCI_SUBCLASS_MASK)) {
458 case PCI_CLASS_BRIDGE|PCI_SUBCLASS_BRIDGE_PCI:
459 continue;
460 };
461
462 map = pci_conf_read (tag, reg);
463 if (!(map & PCI_MAP_MEMORY_ADDRESS_MASK))
464 continue;
465
466 pci_conf_write (tag, reg, 0xffffffff);
467 data = pci_conf_read (tag, reg);
468 pci_conf_write (tag, reg, map);
469
470 switch (data & 7) {
471
472 default:
473 continue;
474 case 1:
475 case 5:
476 addr = map & PCI_MAP_IO_ADDRESS_MASK;
477 size = -(data & PCI_MAP_IO_ADDRESS_MASK);
478 size &= ~(addr ^ -addr);
479
480 pci_register_io (pcicb, addr, addr+size-1);
481 pcicb->pcicb_pamount += size;
482 break;
483
484 case 0:
485 case 2:
486 case 4:
487 size = -(data & PCI_MAP_MEMORY_ADDRESS_MASK);
488 addr = map & PCI_MAP_MEMORY_ADDRESS_MASK;
489 if (addr >= 0x100000) {
490 pci_register_memory (pcicb, addr, addr+size-1);
491 pcicb->pcicb_mamount += size;
492 };
493 break;
494 };
495 if (bootverbose)
496 printf ("\tmapreg[%02x] type=%d addr=%08x size=%04x.\n",
497 reg, map&7, addr, size);
498 };
499
500 /*
501 ** attach device
502 ** may produce additional log messages,
503 ** i.e. when installing subdevices.
504 */
505
506 (*dvp->pd_attach) (tag, unit);
507
508 /*
509 ** Special processing of certain classes
510 */
511
512 data = pci_conf_read(tag, PCI_CLASS_REG);
513
514 switch (data & (PCI_CLASS_MASK|PCI_SUBCLASS_MASK)) {
515 struct pcicb *this, **link;
516 unsigned char primary, secondary, subordinate;
517 u_int command;
518
519 case PCI_CLASS_BRIDGE|PCI_SUBCLASS_BRIDGE_PCI:
520
521 /*
522 ** get current configuration of the bridge.
523 */
524 data = pci_conf_read (tag, PCI_PCI_BRIDGE_BUS_REG);
525 primary = PCI_PRIMARY_BUS_EXTRACT (data);
526 secondary = PCI_SECONDARY_BUS_EXTRACT(data);
527 subordinate = PCI_SUBORDINATE_BUS_EXTRACT(data);
528 #ifndef PCI_QUIET
529 if (bootverbose) {
530 printf ("\tbridge from pci%d to pci%d through %d.\n",
531 primary, secondary, subordinate);
532 printf ("\tmapping regs: io:%08lx mem:%08lx pmem:%08lx\n",
533 pci_conf_read (tag, PCI_PCI_BRIDGE_IO_REG),
534 pci_conf_read (tag, PCI_PCI_BRIDGE_MEM_REG),
535 pci_conf_read (tag, PCI_PCI_BRIDGE_PMEM_REG));
536 }
537 #endif
538 /*
539 ** check for uninitialized bridge.
540 */
541 if (!(primary < secondary
542 && secondary <= subordinate
543 && bus == primary)) {
544
545 printf ("\tINCORRECTLY or NEVER CONFIGURED.\n");
546 /*
547 ** disable this bridge
548 */
549 pci_conf_write (tag, PCI_COMMAND_STATUS_REG, 0xffff0000);
550 secondary = 0;
551 subordinate = 0;
552 };
553
554 /*
555 ** allocate bus descriptor for bus behind the bridge
556 */
557 link = &pcicb->pcicb_down;
558 while (*link && (*link)->pcicb_bus < secondary)
559 link = &(*link)->pcicb_next;
560
561 this = malloc (sizeof (*this), M_DEVBUF, M_WAITOK);
562
563 /*
564 ** Initialize this descriptor so far.
565 ** (the initialization is completed just before
566 ** scanning the bus behind the bridge.
567 */
568 bzero (this, sizeof(*this));
569 this->pcicb_next = *link;
570 this->pcicb_up = pcicb;
571 this->pcicb_bridge = tag;
572 this->pcicb_bus = secondary;
573 this->pcicb_subordinate = subordinate;
574
575 command = pci_conf_read(tag,PCI_COMMAND_STATUS_REG);
576
577 if (command & PCI_COMMAND_IO_ENABLE){
578 /*
579 ** Bridge was configured by the bios.
580 ** Read out the mapped io region.
581 */
582 unsigned reg;
583
584 reg = pci_conf_read (tag, PCI_PCI_BRIDGE_IO_REG);
585 this->pcicb_iobase = PCI_PPB_IOBASE_EXTRACT (reg);
586 this->pcicb_iolimit = PCI_PPB_IOLIMIT_EXTRACT(reg);
587
588 /*
589 ** Note the used io space.
590 */
591 pci_register_io (pcicb, this->pcicb_iobase,
592 this->pcicb_iolimit);
593
594 };
595
596 if (command & PCI_COMMAND_MEM_ENABLE) {
597 /*
598 ** Bridge was configured by the bios.
599 ** Read out the mapped memory regions.
600 */
601 unsigned reg;
602
603 /*
604 ** non prefetchable memory
605 */
606 reg = pci_conf_read (tag, PCI_PCI_BRIDGE_MEM_REG);
607 this->pcicb_membase = PCI_PPB_MEMBASE_EXTRACT (reg);
608 this->pcicb_memlimit = PCI_PPB_MEMLIMIT_EXTRACT(reg);
609
610 /*
611 ** Register used memory space.
612 */
613 pci_register_memory (pcicb,
614 this->pcicb_membase,
615 this->pcicb_memlimit);
616
617 /*
618 ** prefetchable memory
619 */
620 reg = pci_conf_read (tag, PCI_PCI_BRIDGE_PMEM_REG);
621 this->pcicb_p_membase = PCI_PPB_MEMBASE_EXTRACT (reg);
622 this->pcicb_p_memlimit = PCI_PPB_MEMLIMIT_EXTRACT(reg);
623
624 /*
625 ** Register used memory space.
626 */
627 pci_register_memory (pcicb,
628 this->pcicb_p_membase,
629 this->pcicb_p_memlimit);
630 }
631
632 /*
633 ** Link it in chain.
634 */
635 *link=this;
636
637 /*
638 ** Update mapping info of parent bus.
639 */
640 if (!pcicb->pcicb_bfrom||secondary< pcicb->pcicb_bfrom)
641 pcicb->pcicb_bfrom = secondary;
642 if (subordinate > pcicb->pcicb_bupto)
643 pcicb->pcicb_bupto = subordinate;
644 }
645 }
646
647 /*========================================================
648 **
649 ** pci_bus_config()
650 **
651 ** Autoconfiguration of one pci bus.
652 **
653 **========================================================
654 */
655
656 static int
657 pci_mfdev (int bus, int device)
658 {
659 pcici_t tag;
660
661 /*
662 ** Detect a multi-function device that complies to the PCI 2.0 spec
663 */
664 tag = pcibus->pb_tag (bus, device, 0);
665 if (pci_conf_read (tag, PCI_HEADER_MISC) & PCI_HEADER_MULTIFUNCTION)
666 return 1;
667 return 0;
668 }
669
670 static void
671 pci_bus_config (void)
672 {
673 int bus_no;
674 u_char device;
675 u_char reg;
676 pcici_t tag, mtag;
677 pcidi_t type;
678
679 struct pci_device *dvp;
680
681 /*
682 ** first initialize the bridge (bus controller chip)
683 */
684 bus_no = pci_bridge_config ();
685
686 printf ("Probing for devices on PCI bus %d:\n", bus_no);
687 #ifndef PCI_QUIET
688 if (bootverbose && !pci_info_done) {
689 pci_info_done=1;
690 printf ("\tconfiguration mode %d allows %d devices.\n",
691 pci_mechanism, pci_maxdevice);
692 };
693 #endif
694 for (device=0; device<pci_maxdevice; device ++) {
695 char *name = NULL;
696 struct pci_device **dvpp;
697 int func, maxfunc = 0;
698
699 for (func=0; func <= maxfunc; func++) {
700 tag = pcibus->pb_tag (bus_no, device, func);
701 type = pci_conf_read (tag, PCI_ID_REG);
702
703 if ((!type) || (type==0xfffffffful)) continue;
704
705 /*
706 ** lookup device in ioconfiguration:
707 */
708
709 dvpp = (struct pci_device **)pcidevice_set.ls_items;
710
711 while (dvp = *dvpp++) {
712 if (dvp->pd_probe) {
713 if (name = (*dvp->pd_probe)(tag, type))
714 break;
715 }
716 };
717 /*
718 ** check for mirrored devices.
719 */
720 if (func != 0) {
721 goto real_device;
722 }
723 if (device & 0x10) {
724 mtag=pcibus->pb_tag (bus_no,
725 (u_char)(device & ~0x10), 0);
726 } else if (device & 0x08) {
727 mtag=pcibus->pb_tag (bus_no,
728 (u_char)(device & ~0x08), 0);
729 } else goto real_device;
730
731 if (type!=pci_conf_read (mtag, PCI_ID_REG))
732 goto real_device;
733
734 for (reg=PCI_MAP_REG_START;reg<PCI_MAP_REG_END;reg+=4)
735 if (pci_conf_read(tag,reg)!=pci_conf_read(mtag,reg))
736 goto real_device;
737
738 #ifndef PCI_QUIET
739 if (dvp==NULL) continue;
740 if (bootverbose)
741 printf ("%s? <%s> mirrored on pci%d:%d\n",
742 dvp->pd_name, name, bus_no, device);
743 #endif
744 continue;
745
746 real_device:
747
748 #ifndef PCI_QUIET
749 #ifdef PCI_BRIDGE_DEBUG
750 if (bootverbose) {
751 printf ("\tconfig header: 0x%08x 0x%08x 0x%08x 0x%08x\n",
752 pci_conf_read (tag, 0),
753 pci_conf_read (tag, 4),
754 pci_conf_read (tag, 8),
755 pci_conf_read (tag, 12));
756 }
757 #endif
758 #endif
759
760 if (func == 0 && pci_mfdev (bus_no, device)) {
761 maxfunc = 7;
762 }
763
764 pci_remember(bus_no, device, func, dvp);
765
766 if (dvp==NULL) {
767 #ifndef PCI_QUIET
768 if (pci_conf_count)
769 continue;
770
771 if (maxfunc == 0)
772 printf("%s%d:%d: ",
773 pcibus->pb_name, bus_no, device);
774 else
775 printf("%s%d:%d:%d: ",
776 pcibus->pb_name, bus_no, device, func);
777 not_supported (tag, type);
778 #endif
779 continue;
780 };
781
782 if (*name) {
783 pci_attach (bus_no, device, func, dvp, name);
784 }
785 }
786 }
787
788 #ifndef PCI_QUIET
789 if (bootverbose) {
790 if (pcicb->pcicb_mamount)
791 printf ("%s%d: uses %u bytes of memory from %x upto %x.\n",
792 pcibus->pb_name, bus_no,
793 pcicb->pcicb_mamount,
794 pcicb->pcicb_mfrom, pcicb->pcicb_mupto);
795 if (pcicb->pcicb_pamount)
796 printf ("%s%d: uses %u bytes of I/O space from %x upto %x.\n",
797 pcibus->pb_name, bus_no,
798 pcicb->pcicb_pamount,
799 pcicb->pcicb_pfrom, pcicb->pcicb_pupto);
800 if (pcicb->pcicb_bfrom)
801 printf ("%s%d: subordinate busses from %x upto %x.\n",
802 pcibus->pb_name, bus_no,
803 pcicb->pcicb_bfrom, pcicb->pcicb_bupto);
804 }
805 #endif
806 }
807
808 /*========================================================
809 **
810 ** pci_configure ()
811 **
812 ** Autoconfiguration of pci devices.
813 **
814 ** Has to take care of mirrored devices, which are
815 ** entailed by incomplete decoding of pci address lines.
816 **
817 **========================================================
818 */
819
820 void pci_configure()
821 {
822 struct pcibus **pbp = (struct pcibus**) pcibus_set.ls_items;
823
824 /*
825 ** check pci bus present
826 */
827
828 while (!pci_maxdevice && (pcibus = *pbp++)) {
829 (*pcibus->pb_setup)();
830 }
831
832 if (!pci_maxdevice) return;
833
834 /*
835 ** hello world ..
836 */
837
838 pciroots = 1;
839 while (pciroots--) {
840
841 pcicb = malloc (sizeof (struct pcicb), M_DEVBUF, M_WAITOK);
842 if (pcicb == NULL) {
843 return;
844 }
845 bzero (pcicb, sizeof (struct pcicb));
846 pcicb->pcicb_bus = pcibusmax;
847 pcicb->pcicb_iolimit = 0xffff;
848 pcicb->pcicb_membase = 0x02000000;
849 pcicb->pcicb_p_membase = 0x02000000;
850 pcicb->pcicb_memlimit = 0xffffffff;
851 pcicb->pcicb_p_memlimit = 0xffffffff;
852
853 while (pcicb != NULL) {
854 pci_bus_config ();
855
856 if (pcibusmax < pcicb->pcicb_bus)
857 (pcibusmax = pcicb->pcicb_bus);
858
859 if (pcicb->pcicb_down) {
860 pcicb = pcicb->pcicb_down;
861 continue;
862 };
863
864 while (pcicb && !pcicb->pcicb_next)
865 pcicb = pcicb->pcicb_up;
866
867 if (pcicb)
868 pcicb = pcicb->pcicb_next;
869 }
870 pcibusmax++;
871 }
872 pci_conf_count++;
873 }
874
875 /*========================================================
876 **
877 ** pci_rescan ()
878 **
879 ** try to find lkm driver for device
880 **
881 ** May be called more than once.
882 ** Any device is attached only once.
883 **
884 **========================================================
885 */
886
887 static void pci_rescan()
888 {
889 int i;
890 for (i = 0; i < pci_dev_list_count; i++)
891 {
892 struct pci_lkm *lkm;
893 pcici_t tag;
894 struct pci_device *dvp;
895 pcidi_t type = pci_dev_list[i].pc_devid;
896 char *name = NULL;
897 int bus, dev, func;
898
899 if (pci_dev_list[i].pc_dvp)
900 continue;
901
902 bus = pci_dev_list[i].pc_sel.pc_bus;
903 dev = pci_dev_list[i].pc_sel.pc_dev;
904 func = pci_dev_list[i].pc_sel.pc_func;
905
906 tag = pcibus->pb_tag (bus, dev, func);
907
908 for (lkm = pci_lkm_head; lkm; lkm = lkm->next) {
909 dvp = lkm->dvp;
910 if (name = (*dvp->pd_probe)(tag, type))
911 break;
912 }
913 if (name && *name) {
914 pcicb = pci_dev_list[i].pc_cb;
915 pci_attach (bus, dev, func, dvp, name);
916 pci_dev_list[i].pc_dvp = dvp;
917 }
918 }
919 }
920
921 /*========================================================
922 **
923 ** pci_register_lkm ()
924 **
925 ** Add LKM PCI driver's struct pci_device to pci_lkm chain
926 **
927 **========================================================
928 */
929
930 int pci_register_lkm (struct pci_device *dvp, int if_revision)
931 {
932 struct pci_lkm *lkm;
933
934 if (if_revision != 0) {
935 return -1;
936 }
937
938 if (!dvp || !dvp->pd_probe || !dvp->pd_attach) {
939 return -1;
940 }
941
942 lkm = malloc (sizeof (*lkm), M_DEVBUF, M_WAITOK);
943 if (!lkm) {
944 return -1;
945 }
946
947 lkm->dvp = dvp;
948 lkm->next = pci_lkm_head;
949 pci_lkm_head = lkm;
950 pci_rescan();
951 return 0;
952 }
953
954 /*-----------------------------------------------------------------------
955 **
956 ** Map device into port space.
957 **
958 ** Actually the device should have been mapped by the bios.
959 ** This function only reads and verifies the value.
960 **
961 ** PCI-Specification: 6.2.5.1: address maps
962 **
963 **-----------------------------------------------------------------------
964 */
965
966 int pci_map_port (pcici_t tag, u_long reg, u_short* pa)
967 {
968 unsigned data, ioaddr, iosize;
969 struct pcicb *link = pcicb;
970
971 /*
972 ** sanity check
973 */
974
975 if (reg < PCI_MAP_REG_START || reg >= PCI_MAP_REG_END || (reg & 3)) {
976 printf ("pci_map_port failed: bad register=0x%x\n",
977 (unsigned)reg);
978 return (0);
979 };
980
981 /*
982 ** get size and type of port
983 **
984 ** type is in the lowest two bits.
985 ** If device requires 2^n bytes, the next
986 ** n-2 bits are hardwired as 0.
987 */
988
989 ioaddr = pci_conf_read (tag, reg) & PCI_MAP_IO_ADDRESS_MASK;
990 if (!ioaddr) {
991 printf ("pci_map_port failed: not configured by bios.\n");
992 return (0);
993 };
994
995 pci_conf_write (tag, reg, 0xfffffffful);
996 data = pci_conf_read (tag, reg);
997 pci_conf_write (tag, reg, ioaddr);
998
999 if ((data & 0x03) != PCI_MAP_IO) {
1000 printf ("pci_map_port failed: bad port type=0x%x\n",
1001 (unsigned) data);
1002 return (0);
1003 };
1004 iosize = -(data & PCI_MAP_IO_ADDRESS_MASK);
1005 iosize &= ~(ioaddr ^ -ioaddr);
1006 if (ioaddr < pcicb->pcicb_iobase
1007 || ioaddr + iosize -1 > pcicb->pcicb_iolimit) {
1008 printf ("pci_map_port failed: device's iorange 0x%x-0x%x "
1009 "is incompatible with its bridge's range 0x%x-0x%x\n",
1010 (unsigned) ioaddr, (unsigned) ioaddr + iosize - 1,
1011 (unsigned) pcicb->pcicb_iobase,
1012 (unsigned) pcicb->pcicb_iolimit);
1013 return (0);
1014 }
1015
1016 #ifndef PCI_QUIET
1017 if (bootverbose)
1018 printf ("\treg%d: ioaddr=0x%x size=0x%x\n",
1019 (unsigned) reg, (unsigned) ioaddr, (unsigned) iosize);
1020 #endif
1021 /*
1022 ** set the configuration register of and
1023 ** return the address to the driver.
1024 ** Make sure to enable each upstream bridge
1025 ** so I/O and DMA can go all the way.
1026 */
1027
1028 for (;;) {
1029 data = pci_conf_read (tag, PCI_COMMAND_STATUS_REG) & 0xffff;
1030 data |= PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MASTER_ENABLE;
1031 (void) pci_conf_write(tag, PCI_COMMAND_STATUS_REG, data);
1032 if ((link = link->pcicb_up) == NULL)
1033 break;
1034 tag = link->pcicb_bridge;
1035 }
1036
1037 *pa = ioaddr;
1038
1039 return (1);
1040 }
1041
1042 /*-----------------------------------------------------------------------
1043 **
1044 ** Map device into virtual and physical space
1045 **
1046 ** Actually the device should have been mapped by the bios.
1047 ** This function only reads and verifies the value.
1048 **
1049 ** PCI-Specification: 6.2.5.1: address maps
1050 **
1051 **-----------------------------------------------------------------------
1052 */
1053
1054 int pci_map_mem (pcici_t tag, u_long reg, vm_offset_t* va, vm_offset_t* pa)
1055 {
1056 struct pcicb *link = pcicb;
1057 unsigned data ,paddr;
1058 vm_size_t psize, poffs, pend;
1059 vm_offset_t vaddr;
1060
1061 /*
1062 ** sanity check
1063 */
1064
1065 if (reg < PCI_MAP_REG_START || reg >= PCI_MAP_REG_END || (reg & 3)) {
1066 printf ("pci_map_mem failed: bad register=0x%x\n",
1067 (unsigned)reg);
1068 return (0);
1069 };
1070
1071 /*
1072 ** save old mapping, get size and type of memory
1073 **
1074 ** type is in the lowest four bits.
1075 ** If device requires 2^n bytes, the next
1076 ** n-4 bits are read as 0.
1077 */
1078
1079 paddr = pci_conf_read (tag, reg) & PCI_MAP_MEMORY_ADDRESS_MASK;
1080 pci_conf_write (tag, reg, 0xfffffffful);
1081 data = pci_conf_read (tag, reg);
1082 pci_conf_write (tag, reg, paddr);
1083
1084 /*
1085 ** check the type
1086 */
1087
1088 if (!((data & PCI_MAP_MEMORY_TYPE_MASK) == PCI_MAP_MEMORY_TYPE_32BIT_1M
1089 && (paddr & ~0xfffff) == 0)
1090 && (data & PCI_MAP_MEMORY_TYPE_MASK) != PCI_MAP_MEMORY_TYPE_32BIT){
1091 printf ("pci_map_mem failed: bad memory type=0x%x\n",
1092 (unsigned) data);
1093 return (0);
1094 };
1095
1096 /*
1097 ** get the size.
1098 */
1099
1100 psize = -(data & PCI_MAP_MEMORY_ADDRESS_MASK);
1101 pend = paddr + psize -1;
1102
1103 if (!paddr || paddr == PCI_MAP_MEMORY_ADDRESS_MASK) {
1104 paddr = pci_memalloc (pcicb, 0, psize);
1105 if (!paddr) {
1106 printf ("pci_map_mem: not configured by bios.\n");
1107 return (0);
1108 };
1109 pci_register_memory (pcicb, paddr, pend);
1110 };
1111
1112 if (!((pcicb->pcicb_membase <= paddr &&
1113 pend <= pcicb->pcicb_memlimit) ||
1114 (pcicb->pcicb_p_membase <= paddr &&
1115 pend <= pcicb->pcicb_p_memlimit))) {
1116 printf ("pci_map_mem: device's memrange 0x%x-0x%x is "
1117 "incompatible with its bridge's\n"
1118 "\tmemrange 0x%x-0x%x and prefetchable memrange 0x%x-0x%x\n",
1119 (unsigned) paddr,
1120 (unsigned) (paddr + psize - 1),
1121 (unsigned) pcicb->pcicb_p_membase,
1122 (unsigned) pcicb->pcicb_p_memlimit,
1123 (unsigned) pcicb->pcicb_membase,
1124 (unsigned) pcicb->pcicb_memlimit);
1125 }
1126 pci_conf_write (tag, reg, paddr);
1127
1128 /*
1129 ** Truncate paddr to page boundary.
1130 ** (Or does pmap_mapdev the job?)
1131 */
1132
1133 poffs = paddr - trunc_page (paddr);
1134 vaddr = (vm_offset_t) pmap_mapdev (paddr-poffs, psize+poffs);
1135
1136 if (!vaddr) return (0);
1137
1138 vaddr += poffs;
1139
1140 #ifndef PCI_QUIET
1141 /*
1142 ** display values.
1143 */
1144
1145 if (bootverbose)
1146 printf ("\treg%d: virtual=0x%lx physical=0x%lx size=0x%lx\n",
1147 (unsigned) reg, (u_long)vaddr, (u_long)paddr, (u_long)psize);
1148 #endif
1149 /*
1150 ** set the configuration register and
1151 ** return the address to the driver
1152 ** Make sure to enable each upstream bridge
1153 ** so memory and DMA can go all the way.
1154 */
1155
1156 for (;;) {
1157 data = pci_conf_read (tag, PCI_COMMAND_STATUS_REG) & 0xffff;
1158 data |= PCI_COMMAND_MEM_ENABLE | PCI_COMMAND_MASTER_ENABLE;
1159 (void) pci_conf_write(tag, PCI_COMMAND_STATUS_REG, data);
1160 if ((link = link->pcicb_up) == NULL)
1161 break;
1162 tag = link->pcicb_bridge;
1163 }
1164
1165 *va = vaddr;
1166 *pa = paddr;
1167
1168 return (1);
1169 }
1170
1171 /*-----------------------------------------------------------------------
1172 **
1173 ** Pci meta interrupt handler
1174 **
1175 ** This handler assumes level triggered interrupts.
1176 ** It's possible to build a kernel which handles shared
1177 ** edge triggered interrupts by the options "PCI_EDGE_INT".
1178 ** But there is a performance penalty.
1179 **
1180 ** (Of course you can delete the #ifdef PCI_EDGE_INT bracketed
1181 ** code at all :-) :-) :-)
1182 **
1183 **-----------------------------------------------------------------------
1184 */
1185
1186 static struct pci_int_desc*
1187 pci_int_desc [PCI_MAX_IRQ];
1188
1189 #ifndef NO_SHARED_IRQ
1190
1191 static __inline unsigned
1192 splq (unsigned mask)
1193 {
1194 unsigned temp=cpl;
1195 cpl |= mask;
1196 return temp;
1197 }
1198
1199 static void
1200 pci_int (int irq)
1201 {
1202 struct pci_int_desc * p;
1203 int s;
1204
1205 if (irq<0 || irq >= PCI_MAX_IRQ) {
1206 printf ("pci_int: irq %d out of range, ignored\n", irq);
1207 return;
1208 };
1209 for (p = pci_int_desc[irq]; p!=NULL; p=p->pcid_next) {
1210 s = splq (*p->pcid_maskptr);
1211 (*p->pcid_handler) (p->pcid_argument);
1212 p-> pcid_tally++;
1213 splx (s);
1214 #if 0
1215 if (p->pcid_tally<20)
1216 printf ("PCI_INT: irq=%d h=%p cpl o=%x n=%x val=%d\n",
1217 irq, p->pcid_handler, s, cpl, c);
1218 #endif
1219 };
1220 }
1221 #endif
1222
1223 /*-----------------------------------------------------------------------
1224 **
1225 ** Auxiliary function for interrupt (un)mapping.
1226 **
1227 **-----------------------------------------------------------------------
1228 */
1229
1230 static u_int
1231 getirq (pcici_t tag)
1232 {
1233 u_int irq;
1234
1235 irq = PCI_INTERRUPT_LINE_EXTRACT(
1236 pci_conf_read (tag, PCI_INTERRUPT_REG));
1237
1238 if (irq == 0 || irq == 0xff) {
1239 printf ("\tint line register not set by bios\n");
1240 return (0xff);
1241 }
1242
1243 if (irq >= PCI_MAX_IRQ) {
1244 printf ("\tirq %d out of bounds (must be < %d).\n",
1245 irq, PCI_MAX_IRQ);
1246 return (0xff);
1247 }
1248
1249 return (irq);
1250 }
1251
1252 static struct pci_int_desc **
1253 getintdescbytag (u_int irq, pcici_t tag)
1254 {
1255 struct pci_int_desc *p, **pp;
1256
1257 pp=&pci_int_desc[irq];
1258 while (((p=*pp)) && !sametag(p->pcid_tag,tag))
1259 pp=&p->pcid_next;
1260
1261 if (!p) return (NULL);
1262
1263 return (pp);
1264 }
1265
1266 static struct pci_int_desc *
1267 getintdescbymptr (u_int irq, unsigned * mptr)
1268 {
1269 struct pci_int_desc *p;
1270
1271 for (p=pci_int_desc[irq];p;p=p->pcid_next)
1272 if (p->pcid_maskptr == mptr) break;
1273 return (p);
1274 }
1275
1276 /*-----------------------------------------------------------------------
1277 **
1278 ** Map pci interrupt.
1279 **
1280 **-----------------------------------------------------------------------
1281 */
1282
1283 static unsigned pci_mask0 = 0;
1284
1285 int pci_map_int (pcici_t tag, pci_inthand_t *func, void *arg, unsigned *maskptr)
1286 {
1287 u_int irq;
1288 int result, oldspl;
1289 unsigned mask;
1290 struct pci_int_desc *tail, *mdp=NULL, *new=NULL;
1291
1292 /*
1293 ** Get irq line from configuration space,
1294 ** and check for consistency.
1295 */
1296
1297 irq = getirq (tag);
1298 if (irq == 0xff) {
1299 return (0);
1300 };
1301 mask= 1ul << irq;
1302
1303 /*
1304 ** disable this interrupt.
1305 */
1306
1307 oldspl = splq (mask);
1308
1309 /*
1310 ** If handler for this tag already installed,
1311 ** remove it first.
1312 */
1313
1314 if (getintdescbytag (irq, tag) != NULL)
1315 pci_unmap_int (tag);
1316
1317 /*
1318 ** If this irq not yet included in the mask, include it.
1319 */
1320
1321 mdp = getintdescbymptr (irq, maskptr);
1322 if (!mdp) {
1323 result = pcibus->pb_imaskinc (irq, maskptr);
1324 if (result)
1325 goto conflict;
1326 };
1327
1328 /*
1329 ** Allocate descriptor and initialize it.
1330 */
1331
1332 tail = pci_int_desc[irq];
1333
1334 new = malloc (sizeof (*new), M_DEVBUF, M_WAITOK);
1335 bzero (new, sizeof (*new));
1336
1337 new->pcid_next = tail;
1338 new->pcid_tag = tag;
1339 new->pcid_handler = func;
1340 new->pcid_argument = arg;
1341 new->pcid_maskptr = maskptr;
1342 new->pcid_tally = 0;
1343 new->pcid_mask = mask;
1344
1345 /*
1346 ** If first handler: install it.
1347 ** If second handler: install shared-int-handler.
1348 */
1349
1350 if (!tail) {
1351 /*
1352 ** first handler for this irq.
1353 */
1354
1355 result = pcibus->pb_iattach
1356 /*
1357 * XXX if we get here, then `func' must be pci_int
1358 * so the bogus casts are almost OK since they just
1359 * undo the bogus casts that were needed to pass
1360 * pci_int and its arg to pci_map_int().
1361 */
1362 (irq, (inthand2_t *) func, (int) arg, maskptr);
1363 if (result) goto conflict;
1364
1365 #ifdef NO_SHARED_IRQ
1366 } else goto conflict;
1367 #else
1368 } else if (!tail->pcid_next) {
1369 /*
1370 ** Second handler for this irq.
1371 */
1372
1373 if (bootverbose)
1374 printf ("\tusing shared irq %d.\n", irq);
1375
1376 /*
1377 ** replace old handler by shared-int-handler.
1378 */
1379
1380 result = pcibus->pb_idetach (irq,
1381 (inthand2_t *) tail->pcid_handler);
1382 if (result)
1383 printf ("\tCANNOT DETACH INT HANDLER.\n");
1384
1385 result = pcibus->pb_iattach (irq, pci_int, irq, &pci_mask0);
1386 if (result) {
1387 printf ("\tCANNOT ATTACH SHARED INT HANDLER.\n");
1388 goto fail;
1389 };
1390 }
1391 #endif
1392 /*
1393 ** Link new descriptor, reenable ints and done.
1394 */
1395
1396 pci_int_desc[irq] = new;
1397 splx (oldspl);
1398 return (1);
1399
1400 /*
1401 ** Handle some problems.
1402 */
1403
1404 conflict:
1405 printf ("\tirq %d already in use.\n", irq);
1406 fail:
1407 /*
1408 ** If descriptor allocated, free it.
1409 ** If included in mask, remove it.
1410 */
1411
1412 if (new) free(new, M_DEVBUF);
1413 if (!mdp) (void) pcibus->pb_imaskexc (irq, maskptr);
1414 splx (oldspl);
1415 return (0);
1416 }
1417
1418 /*-----------------------------------------------------------------------
1419 **
1420 ** Unmap pci interrupt.
1421 **
1422 **-----------------------------------------------------------------------
1423 */
1424
1425 int pci_unmap_int (pcici_t tag)
1426 {
1427 int result, oldspl;
1428 struct pci_int_desc *this, **hook, *tail;
1429 unsigned irq;
1430
1431 /*
1432 ** Get irq line from configuration space,
1433 ** and check for consistency.
1434 */
1435
1436 irq = getirq (tag);
1437 if (irq == 0xff) {
1438 return (0);
1439 };
1440
1441 /*
1442 ** Search and unlink interrupt descriptor.
1443 */
1444
1445 hook = getintdescbytag (irq, tag);
1446 if (hook == NULL) {
1447 printf ("\tno irq %d handler for pci %x\n",
1448 irq, tag.tag);
1449 return (0);
1450 };
1451
1452 this = *hook;
1453 *hook= this->pcid_next;
1454
1455 /*
1456 ** Message
1457 */
1458
1459 printf ("\tirq %d handler %p(%p) unmapped for pci %x after %d ints.\n",
1460 irq, this->pcid_handler, this->pcid_argument,
1461 this->pcid_tag.tag, this->pcid_tally);
1462
1463 /*
1464 ** If this irq no longer included in the mask, remove it.
1465 */
1466
1467 if (!getintdescbymptr (irq, this->pcid_maskptr))
1468 (void) pcibus->pb_imaskexc (irq, this->pcid_maskptr);
1469
1470 tail = pci_int_desc[irq];
1471
1472 if (tail == NULL) {
1473
1474 /*
1475 ** Remove the old handler.
1476 */
1477
1478 result = pcibus->pb_idetach (irq,
1479 (inthand2_t *) this->pcid_handler);
1480 if (result)
1481 printf ("\tirq %d: cannot remove handler.\n", irq);
1482
1483 } else if (tail->pcid_next == NULL) {
1484
1485 /*
1486 ** Remove the shared int handler.
1487 ** Install the last remaining handler.
1488 */
1489
1490 oldspl = splq (1ul << irq);
1491
1492 result = pcibus->pb_idetach (irq, pci_int);
1493 if (result)
1494 printf ("\tirq %d: cannot remove handler.\n", irq);
1495
1496 result = pcibus->pb_iattach (irq,
1497 (inthand2_t *) tail->pcid_handler,
1498 (int) tail->pcid_argument,
1499 tail->pcid_maskptr);
1500
1501 if (result)
1502 printf ("\tirq %d: cannot install handler.\n", irq);
1503
1504 splx (oldspl);
1505 };
1506
1507 free (this, M_DEVBUF);
1508 return (1);
1509 }
1510
1511 /*-----------------------------------------------------------
1512 **
1513 ** Extract bus information from a tag
1514 **
1515 **-----------------------------------------------------------
1516 */
1517
1518 int pci_get_bus(pcici_t tag)
1519 {
1520 return (pcibus->pb_bus(tag));
1521 }
1522
1523 /*-----------------------------------------------------------
1524 **
1525 ** Extract device information from a tag
1526 **
1527 **-----------------------------------------------------------
1528 */
1529
1530 int pci_get_device(pcici_t tag)
1531 {
1532 return (pcibus->pb_device(tag));
1533 }
1534
1535 /*-----------------------------------------------------------
1536 **
1537 ** Extract device function from a tag
1538 **
1539 **-----------------------------------------------------------
1540 */
1541
1542 int pci_get_function(pcici_t tag)
1543 {
1544 return (pcibus->pb_function(tag));
1545 }
1546
1547
1548
1549 /*-----------------------------------------------------------
1550 **
1551 ** Display of unknown devices.
1552 **
1553 **-----------------------------------------------------------
1554 */
1555 struct vt {
1556 u_short ident;
1557 const char *name;
1558 };
1559
1560 static struct vt VendorTable[] = {
1561 {0x0e11, "Compaq"},
1562 {0x1000, "NCR/Symbios"},
1563 {0x1002, "ATI Technologies Inc."},
1564 {0x1004, "VLSI"},
1565 {0x100B, "National Semiconductor"},
1566 {0x100E, "Weitek"},
1567 {0x1011, "Digital Equipment Corporation"},
1568 {0x1013, "Cirrus Logic"},
1569 {0x101A, "NCR"},
1570 {0x1022, "AMD"},
1571 {0x102B, "Matrox"},
1572 {0x102C, "Chips & Technologies"},
1573 {0x1039, "Silicon Integrated Systems"},
1574 {0x1042, "SMC"},
1575 {0x1044, "DPT"},
1576 {0x1045, "OPTI"},
1577 {0x104B, "Bus Logic"},
1578 {0x104C, "TI"},
1579 {0x1060, "UMC"},
1580 {0x1080, "Contaq"},
1581 {0x1095, "CMD"},
1582 {0x10b9, "ACER Labs"},
1583 {0x10c8, "NeoMagic"},
1584 {0x1106, "VIA Technologies"},
1585 {0x5333, "S3 Inc."},
1586 {0x8086, "Intel Corporation"},
1587 {0x9004, "Adaptec"},
1588 {0,0}
1589 };
1590
1591 typedef struct {
1592 const int subclass;
1593 const char *name;
1594 } subclass_name;
1595
1596 /* 0x00 prehistoric subclasses */
1597 static const subclass_name old_subclasses[] =
1598 {
1599 { 0x00, "misc" },
1600 { 0x01, "vga" },
1601 { 0x00, NULL }
1602 };
1603
1604 /* 0x01 mass storage subclasses */
1605 static const subclass_name storage_subclasses[] =
1606 {
1607 { 0x00, "scsi" },
1608 { 0x01, "ide" },
1609 { 0x02, "floppy"},
1610 { 0x03, "ipi" },
1611 { 0x80, "misc" },
1612 { 0x00, NULL }
1613 };
1614
1615 /* 0x02 network subclasses */
1616 static const subclass_name network_subclasses[] =
1617 {
1618 { 0x00, "ethernet" },
1619 { 0x01, "tokenring" },
1620 { 0x02, "fddi" },
1621 { 0x80, "misc" },
1622 { 0x00, NULL }
1623 };
1624
1625 /* 0x03 display subclasses */
1626 static const subclass_name display_subclasses[] =
1627 {
1628 { 0x00, "vga" },
1629 { 0x01, "xga" },
1630 { 0x80, "misc" },
1631 { 0x00, NULL }
1632 };
1633
1634 /* 0x04 multimedia subclasses */
1635 static const subclass_name multimedia_subclasses[] =
1636 {
1637 { 0x00, "video" },
1638 { 0x01, "audio" },
1639 { 0x80, "misc" },
1640 { 0x00, NULL }
1641 };
1642
1643 /* 0x05 memory subclasses */
1644 static const subclass_name memory_subclasses[] =
1645 {
1646 { 0x00, "ram" },
1647 { 0x01, "flash" },
1648 { 0x80, "misc" },
1649 { 0x00, NULL }
1650 };
1651
1652 /* 0x06 bridge subclasses */
1653 static const subclass_name bridge_subclasses[] =
1654 {
1655 { 0x00, "host" },
1656 { 0x01, "isa" },
1657 { 0x02, "eisa" },
1658 { 0x03, "mc" },
1659 { 0x04, "pci" },
1660 { 0x05, "pcmcia"},
1661 { 0x07, "cardbus"},
1662 { 0x80, "misc" },
1663 { 0x00, NULL }
1664 };
1665
1666 static const subclass_name *const subclasses[] = {
1667 old_subclasses,
1668 storage_subclasses,
1669 network_subclasses,
1670 display_subclasses,
1671 multimedia_subclasses,
1672 memory_subclasses,
1673 bridge_subclasses,
1674 };
1675
1676 static const char *const majclasses[] = {
1677 "old",
1678 "storage",
1679 "network",
1680 "display",
1681 "multimedia",
1682 "memory",
1683 "bridge",
1684 "comms",
1685 "system",
1686 "input",
1687 "docking",
1688 "processor",
1689 "serial"
1690 };
1691
1692
1693 void not_supported (pcici_t tag, u_long type)
1694 {
1695 u_long reg;
1696 u_long data;
1697 u_char class;
1698 u_char subclass;
1699 struct vt * vp;
1700 int pciint;
1701 int irq;
1702
1703 /*
1704 ** lookup the names.
1705 */
1706
1707 for (vp=VendorTable; vp->ident; vp++)
1708 if (vp->ident == (type & 0xffff))
1709 break;
1710
1711 /*
1712 ** and display them.
1713 */
1714
1715 if (vp->ident) printf (vp->name);
1716 else printf ("vendor=0x%04lx", type & 0xffff);
1717
1718 printf (", device=0x%04lx", type >> 16);
1719
1720 data = pci_conf_read(tag, PCI_CLASS_REG);
1721 class = (data >> 24) & 0xff;
1722 subclass = (data >> 16) & 0xff;
1723
1724 if (class < sizeof(majclasses) / sizeof(majclasses[0])) {
1725 printf(", class=%s", majclasses[class]);
1726 } else {
1727 printf(", class=0x%02x", class);
1728 }
1729
1730 if (class < sizeof(subclasses) / sizeof(subclasses[0])) {
1731 const subclass_name *p = subclasses[class];
1732 while (p->name && (p->subclass != subclass))
1733 p++;
1734 if (p->name) {
1735 printf(" (%s)", p->name);
1736 } else {
1737 printf(" (unknown subclass 0x%02x)", subclass);
1738 }
1739 } else {
1740 printf(", subclass=0x%02x", subclass);
1741 }
1742
1743 data = pci_conf_read (tag, PCI_INTERRUPT_REG);
1744 pciint = PCI_INTERRUPT_PIN_EXTRACT(data);
1745
1746 if (pciint) {
1747
1748 printf (" int %c irq ", 0x60+pciint);
1749
1750 irq = PCI_INTERRUPT_LINE_EXTRACT(data);
1751
1752 /*
1753 ** If it's zero, the isa irq number is unknown,
1754 ** and we cannot bind the pci interrupt.
1755 */
1756
1757 if (irq && (irq != 0xff))
1758 printf ("%d", irq);
1759 else
1760 printf ("??");
1761 };
1762
1763 if (class != (PCI_CLASS_BRIDGE >> 24))
1764 printf (" [no driver assigned]");
1765 printf ("\n");
1766
1767 if (bootverbose) {
1768 if (class == (PCI_CLASS_BRIDGE >> 24)) {
1769 printf ("configuration space registers:");
1770 for (reg = 0; reg < 0x100; reg+=4) {
1771 if ((reg & 0x0f) == 0) printf ("\n%02lx:\t", reg);
1772 printf ("%08lx ", pci_conf_read (tag, reg));
1773 }
1774 printf ("\n");
1775 } else {
1776 for (reg=PCI_MAP_REG_START; reg<PCI_MAP_REG_END; reg+=4) {
1777 data = pci_conf_read (tag, reg);
1778 if ((data&~7)==0) continue;
1779 switch (data&7) {
1780
1781 case 1:
1782 case 5:
1783 printf ("\tmap(%lx): io(%04lx)\n",
1784 reg, data & ~3);
1785 break;
1786 case 0:
1787 printf ("\tmap(%lx): mem32(%08lx)\n",
1788 reg, data & ~7);
1789 break;
1790 case 2:
1791 printf ("\tmap(%lx): mem20(%05lx)\n",
1792 reg, data & ~7);
1793 break;
1794 case 4:
1795 printf ("\tmap(%lx): mem64(%08lx%08lx)\n",
1796 reg, pci_conf_read (tag, reg +4), data & ~7);
1797 reg += 4;
1798 break;
1799 }
1800 }
1801 }
1802 }
1803 }
1804
1805 /*
1806 * This is the user interface to the PCI configuration space.
1807 */
1808
1809
1810 static void
1811 pci_remember(int bus, int dev, int func, struct pci_device *dvp)
1812 {
1813 struct pci_conf *p;
1814 pcici_t tag;
1815
1816 if (++pci_dev_list_count > pci_dev_list_size) {
1817 struct pci_conf *new;
1818
1819 pci_dev_list_size += 8;
1820 MALLOC(new, struct pci_conf *, pci_dev_list_size * sizeof *new,
1821 M_DEVL, M_NOWAIT);
1822 if (!new) {
1823 pci_dev_list_size -= 8;
1824 pci_dev_list_count--;
1825 return;
1826 }
1827
1828 if (pci_dev_list) {
1829 bcopy(pci_dev_list, new, ((pci_dev_list_size - 8) *
1830 sizeof *new));
1831 FREE(pci_dev_list, M_DEVL);
1832 }
1833 pci_dev_list = new;
1834 }
1835
1836 p = &pci_dev_list[pci_dev_list_count - 1];
1837 p->pc_sel.pc_bus = bus;
1838 p->pc_sel.pc_dev = dev;
1839 p->pc_sel.pc_func = func;
1840 p->pc_dvp = dvp;
1841 p->pc_cb = pcicb;
1842
1843 tag = pcibus->pb_tag (bus, dev, func);
1844 p->pc_hdr = (pci_conf_read (tag, PCI_HEADER_MISC) >> 16) & 0xff;
1845 p->pc_devid = pci_conf_read(tag, PCI_ID_REG);
1846 p->pc_class = pci_conf_read(tag, PCI_CLASS_REG);
1847 switch (p->pc_hdr & 0x7f) {
1848 case 0:
1849 p->pc_subid = pci_conf_read(tag, PCI_SUBID_REG0);
1850 break;
1851 case 1:
1852 p->pc_subid = pci_conf_read(tag, PCI_SUBID_REG1);
1853 break;
1854 case 2:
1855 p->pc_subid = pci_conf_read(tag, PCI_SUBID_REG2);
1856 break;
1857 default:
1858 p->pc_subid = 0;
1859 }
1860 }
1861
1862 static int
1863 pci_open(dev_t dev, int oflags, int devtype, struct proc *p)
1864 {
1865 if ((oflags & FWRITE) && securelevel > 0) {
1866 return EPERM;
1867 }
1868
1869 return 0;
1870 }
1871
1872 static int
1873 pci_close(dev_t dev, int flag, int devtype, struct proc *p)
1874 {
1875 return 0;
1876 }
1877
1878 static int
1879 pci_ioctl(dev_t dev, int cmd, caddr_t data, int flag, struct proc *p)
1880 {
1881 struct pci_conf_io *cio;
1882 struct pci_io *io;
1883 size_t iolen;
1884 int error;
1885 pcici_t tag;
1886
1887 if (cmd != PCIOCGETCONF && !(flag & FWRITE))
1888 return EPERM;
1889
1890 switch(cmd) {
1891 case PCIOCGETCONF:
1892 cio = (struct pci_conf_io *)data;
1893 iolen = min(cio->pci_len,
1894 pci_dev_list_count * sizeof(struct pci_conf));
1895 cio->pci_len = pci_dev_list_count * sizeof(struct pci_conf);
1896
1897 error = copyout(pci_dev_list, cio->pci_buf, iolen);
1898 break;
1899
1900 case PCIOCREAD:
1901 io = (struct pci_io *)data;
1902 switch(io->pi_width) {
1903 case 4:
1904 tag = pcibus->pb_tag (io->pi_sel.pc_bus,
1905 io->pi_sel.pc_dev,
1906 io->pi_sel.pc_func);
1907 io->pi_data = pci_conf_read(tag, io->pi_reg);
1908 error = 0;
1909 break;
1910 case 2:
1911 case 1:
1912 default:
1913 error = ENODEV;
1914 break;
1915 }
1916 break;
1917
1918 case PCIOCWRITE:
1919 io = (struct pci_io *)data;
1920 switch(io->pi_width) {
1921 case 4:
1922 tag = pcibus->pb_tag (io->pi_sel.pc_bus,
1923 io->pi_sel.pc_dev,
1924 io->pi_sel.pc_func);
1925 pci_conf_write(tag, io->pi_reg, io->pi_data);
1926 error = 0;
1927 break;
1928 case 2:
1929 case 1:
1930 default:
1931 error = ENODEV;
1932 break;
1933 }
1934 break;
1935
1936 case PCIOCATTACHED:
1937 io = (struct pci_io *)data;
1938 switch(io->pi_width) {
1939 case 4:
1940 {
1941 int i = pci_dev_list_count;
1942 struct pci_conf *p = pci_dev_list;
1943 error = ENODEV;
1944 while (i--) {
1945 if (io->pi_sel.pc_bus == p->pc_sel.pc_bus &&
1946 io->pi_sel.pc_dev == p->pc_sel.pc_dev &&
1947 io->pi_sel.pc_func == p->pc_sel.pc_func) {
1948 io->pi_data = (u_int32_t)p->pc_dvp;
1949 error = 0;
1950 break;
1951 }
1952 p++;
1953 }
1954 }
1955 break;
1956 case 2:
1957 case 1:
1958 default:
1959 error = ENODEV;
1960 break;
1961 }
1962 break;
1963
1964 default:
1965 error = ENOTTY;
1966 break;
1967 }
1968
1969 return (error);
1970 }
1971
1972 #define PCI_CDEV 78
1973
1974 static struct cdevsw pcicdev = {
1975 pci_open, pci_close, noread, nowrite, pci_ioctl, nostop, noreset,
1976 nodevtotty, noselect, nommap, nostrategy, "pci", 0, PCI_CDEV
1977 };
1978
1979 #ifdef DEVFS
1980 static void *pci_devfs_token;
1981 #endif
1982
1983 static void
1984 pci_cdevinit(void *dummy)
1985 {
1986 dev_t dev;
1987
1988 dev = makedev(PCI_CDEV, 0);
1989 cdevsw_add(&dev, &pcicdev, NULL);
1990 #ifdef DEVFS
1991 pci_devfs_token = devfs_add_devswf(&pcicdev, 0, DV_CHR,
1992 UID_ROOT, GID_WHEEL, 0644, "pci");
1993 #endif
1994 }
1995
1996 SYSINIT(pcidev, SI_SUB_DRIVERS, SI_ORDER_MIDDLE+PCI_CDEV, pci_cdevinit, NULL);
1997
1998 #endif /* NPCI */
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