The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/pci/uhci_pci.c

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    1 /*-
    2  * Copyright (c) 1998 The NetBSD Foundation, Inc.
    3  * All rights reserved.
    4  *
    5  * This code is derived from software contributed to The NetBSD Foundation
    6  * by Lennart Augustsson (augustss@carlstedt.se) at
    7  * Carlstedt Research & Technology.
    8  *
    9  * Redistribution and use in source and binary forms, with or without
   10  * modification, are permitted provided that the following conditions
   11  * are met:
   12  * 1. Redistributions of source code must retain the above copyright
   13  *    notice, this list of conditions and the following disclaimer.
   14  * 2. Redistributions in binary form must reproduce the above copyright
   15  *    notice, this list of conditions and the following disclaimer in the
   16  *    documentation and/or other materials provided with the distribution.
   17  * 3. All advertising materials mentioning features or use of this software
   18  *    must display the following acknowledgement:
   19  *        This product includes software developed by the NetBSD
   20  *        Foundation, Inc. and its contributors.
   21  * 4. Neither the name of The NetBSD Foundation nor the names of its
   22  *    contributors may be used to endorse or promote products derived
   23  *    from this software without specific prior written permission.
   24  *
   25  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
   26  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
   27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
   28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
   29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
   30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
   31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
   32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
   33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
   34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
   35  * POSSIBILITY OF SUCH DAMAGE.
   36  */
   37 
   38 #include <sys/cdefs.h>
   39 __FBSDID("$FreeBSD$");
   40 
   41 /* Universal Host Controller Interface
   42  *
   43  * UHCI spec: http://www.intel.com/
   44  */
   45 
   46 /* The low level controller code for UHCI has been split into
   47  * PCI probes and UHCI specific code. This was done to facilitate the
   48  * sharing of code between *BSD's
   49  */
   50 
   51 #include "opt_bus.h"
   52 
   53 #include <sys/param.h>
   54 #include <sys/systm.h>
   55 #include <sys/kernel.h>
   56 #include <sys/module.h>
   57 #include <sys/bus.h>
   58 #include <sys/queue.h>
   59 #if defined(__FreeBSD__)
   60 #include <sys/bus.h>
   61 
   62 #include <machine/bus.h>
   63 #include <machine/resource.h>
   64 #include <sys/rman.h>
   65 #endif
   66 
   67 #include <pci/pcivar.h>
   68 #include <pci/pcireg.h>
   69 
   70 #include <dev/usb/usb.h>
   71 #include <dev/usb/usbdi.h>
   72 #include <dev/usb/usbdivar.h>
   73 #include <dev/usb/usb_mem.h>
   74 
   75 #include <dev/usb/uhcireg.h>
   76 #include <dev/usb/uhcivar.h>
   77 
   78 #define PCI_UHCI_VENDORID_INTEL         0x8086
   79 #define PCI_UHCI_VENDORID_VIA           0x1106
   80 
   81 #define PCI_UHCI_DEVICEID_PIIX3         0x70208086
   82 static const char *uhci_device_piix3 = "Intel 82371SB (PIIX3) USB controller";
   83 
   84 #define PCI_UHCI_DEVICEID_PIIX4         0x71128086
   85 #define PCI_UHCI_DEVICEID_PIIX4E        0x71128086      /* no separate stepping */
   86 static const char *uhci_device_piix4 = "Intel 82371AB/EB (PIIX4) USB controller";
   87 
   88 #define PCI_UHCI_DEVICEID_ICH           0x24128086
   89 static const char *uhci_device_ich = "Intel 82801AA (ICH) USB controller";
   90 
   91 #define PCI_UHCI_DEVICEID_ICH0          0x24228086
   92 static const char *uhci_device_ich0 = "Intel 82801AB (ICH0) USB controller";
   93 
   94 #define PCI_UHCI_DEVICEID_ICH2_A        0x24428086
   95 static const char *uhci_device_ich2_a = "Intel 82801BA/BAM (ICH2) USB controller USB-A";
   96 
   97 #define PCI_UHCI_DEVICEID_ICH2_B        0x24448086
   98 static const char *uhci_device_ich2_b = "Intel 82801BA/BAM (ICH2) USB controller USB-B";
   99 
  100 #define PCI_UHCI_DEVICEID_ICH3_A        0x24828086
  101 static const char *uhci_device_ich3_a = "Intel 82801CA/CAM (ICH3) USB controller USB-A";
  102 
  103 #define PCI_UHCI_DEVICEID_ICH3_B        0x24848086
  104 static const char *uhci_device_ich3_b = "Intel 82801CA/CAM (ICH3) USB controller USB-B";
  105 
  106 #define PCI_UHCI_DEVICEID_ICH3_C        0x24878086
  107 static const char *uhci_device_ich3_c = "Intel 82801CA/CAM (ICH3) USB controller USB-C";
  108 
  109 #define PCI_UHCI_DEVICEID_ICH4_A        0x24c28086
  110 static const char *uhci_device_ich4_a = "Intel 82801DB (ICH4) USB controller USB-A";
  111 
  112 #define PCI_UHCI_DEVICEID_ICH4_B        0x24c48086
  113 static const char *uhci_device_ich4_b = "Intel 82801DB (ICH4) USB controller USB-B";
  114 
  115 #define PCI_UHCI_DEVICEID_ICH4_C        0x24c78086
  116 static const char *uhci_device_ich4_c = "Intel 82801DB (ICH4) USB controller USB-C";
  117 
  118 #define PCI_UHCI_DEVICEID_ICH5_A        0x24d28086
  119 static const char *uhci_device_ich5_a = "Intel 82801EB (ICH5) USB controller USB-A";
  120 
  121 #define PCI_UHCI_DEVICEID_ICH5_B        0x24d48086
  122 static const char *uhci_device_ich5_b = "Intel 82801EB (ICH5) USB controller USB-B";
  123 
  124 #define PCI_UHCI_DEVICEID_ICH5_C        0x24d78086
  125 static const char *uhci_device_ich5_c = "Intel 82801EB (ICH5) USB controller USB-C";
  126 
  127 #define PCI_UHCI_DEVICEID_ICH5_D        0x24de8086
  128 static const char *uhci_device_ich5_d = "Intel 82801EB (ICH5) USB controller USB-D";
  129 
  130 #define PCI_UHCI_DEVICEID_ICH6_A        0x26588086
  131 static const char *uhci_device_ich6_a = "Intel 82801FB/FR/FW/FRW (ICH6) USB controller USB-A";
  132 
  133 #define PCI_UHCI_DEVICEID_ICH6_B        0x26598086
  134 static const char *uhci_device_ich6_b = "Intel 82801FB/FR/FW/FRW (ICH6) USB controller USB-B";
  135 
  136 #define PCI_UHCI_DEVICEID_ICH6_C        0x265a8086
  137 static const char *uhci_device_ich6_c = "Intel 82801FB/FR/FW/FRW (ICH6) USB controller USB-C";
  138 
  139 #define PCI_UHCI_DEVICEID_ICH6_D        0x265b8086
  140 static const char *uhci_device_ich6_d = "Intel 82801FB/FR/FW/FRW (ICH6) USB controller USB-D";
  141 
  142 #define PCI_UHCI_DEVICEID_440MX         0x719a8086
  143 static const char *uhci_device_440mx = "Intel 82443MX USB controller";
  144 
  145 #define PCI_UHCI_DEVICEID_460GX         0x76028086
  146 static const char *uhci_device_460gx = "Intel 82372FB/82468GX USB controller";
  147 
  148 #define PCI_UHCI_DEVICEID_VT83C572      0x30381106
  149 static const char *uhci_device_vt83c572 = "VIA 83C572 USB controller";
  150 
  151 static const char *uhci_device_generic = "UHCI (generic) USB controller";
  152 
  153 #define PCI_UHCI_BASE_REG               0x20
  154 
  155 
  156 static int uhci_pci_attach(device_t self);
  157 static int uhci_pci_detach(device_t self);
  158 static int uhci_pci_suspend(device_t self);
  159 static int uhci_pci_resume(device_t self);
  160 
  161 
  162 static int
  163 uhci_pci_suspend(device_t self)
  164 {
  165         uhci_softc_t *sc = device_get_softc(self);
  166         int err;
  167 
  168         err = bus_generic_suspend(self);
  169         if (err)
  170                 return err;
  171         uhci_power(PWR_SUSPEND, sc);
  172 
  173         return 0;
  174 }
  175 
  176 static int
  177 uhci_pci_resume(device_t self)
  178 {
  179         uhci_softc_t *sc = device_get_softc(self);
  180 
  181         pci_write_config(self, PCI_LEGSUP, PCI_LEGSUP_USBPIRQDEN, 2);
  182 
  183         uhci_power(PWR_RESUME, sc);
  184         bus_generic_resume(self);
  185 
  186         return 0;
  187 }
  188 
  189 static const char *
  190 uhci_pci_match(device_t self)
  191 {
  192         u_int32_t device_id = pci_get_devid(self);
  193 
  194         if (device_id == PCI_UHCI_DEVICEID_PIIX3) {
  195                 return (uhci_device_piix3);
  196         } else if (device_id == PCI_UHCI_DEVICEID_PIIX4) {
  197                 return (uhci_device_piix4);
  198         } else if (device_id == PCI_UHCI_DEVICEID_ICH) {
  199                 return (uhci_device_ich);
  200         } else if (device_id == PCI_UHCI_DEVICEID_ICH0) {
  201                 return (uhci_device_ich0);
  202         } else if (device_id == PCI_UHCI_DEVICEID_ICH2_A) {
  203                 return (uhci_device_ich2_a);
  204         } else if (device_id == PCI_UHCI_DEVICEID_ICH2_B) {
  205                 return (uhci_device_ich2_b);
  206         } else if (device_id == PCI_UHCI_DEVICEID_ICH3_A) {
  207                 return (uhci_device_ich3_a);
  208         } else if (device_id == PCI_UHCI_DEVICEID_ICH3_B) {
  209                 return (uhci_device_ich3_b);
  210         } else if (device_id == PCI_UHCI_DEVICEID_ICH3_C) {
  211                 return (uhci_device_ich3_c);
  212         } else if (device_id == PCI_UHCI_DEVICEID_ICH4_A) {
  213                 return (uhci_device_ich4_a);
  214         } else if (device_id == PCI_UHCI_DEVICEID_ICH4_B) {
  215                 return (uhci_device_ich4_b);
  216         } else if (device_id == PCI_UHCI_DEVICEID_ICH4_C) {
  217                 return (uhci_device_ich4_c);
  218         } else if (device_id == PCI_UHCI_DEVICEID_ICH5_A) {
  219                 return (uhci_device_ich5_a);
  220         } else if (device_id == PCI_UHCI_DEVICEID_ICH5_B) {
  221                 return (uhci_device_ich5_b);
  222         } else if (device_id == PCI_UHCI_DEVICEID_ICH5_C) {
  223                 return (uhci_device_ich5_c);
  224         } else if (device_id == PCI_UHCI_DEVICEID_ICH5_D) {
  225                 return (uhci_device_ich5_d);
  226         } else if (device_id == PCI_UHCI_DEVICEID_ICH6_A) {
  227                 return (uhci_device_ich6_a);
  228         } else if (device_id == PCI_UHCI_DEVICEID_ICH6_B) {
  229                 return (uhci_device_ich6_b);
  230         } else if (device_id == PCI_UHCI_DEVICEID_ICH6_C) {
  231                 return (uhci_device_ich6_c);
  232         } else if (device_id == PCI_UHCI_DEVICEID_ICH6_D) {
  233                 return (uhci_device_ich6_d);
  234         } else if (device_id == PCI_UHCI_DEVICEID_440MX) {
  235                 return (uhci_device_440mx);
  236         } else if (device_id == PCI_UHCI_DEVICEID_460GX) {
  237                 return (uhci_device_460gx);
  238         } else if (device_id == PCI_UHCI_DEVICEID_VT83C572) {
  239                 return (uhci_device_vt83c572);
  240         } else {
  241                 if (pci_get_class(self) == PCIC_SERIALBUS
  242                     && pci_get_subclass(self) == PCIS_SERIALBUS_USB
  243                     && pci_get_progif(self) == PCI_INTERFACE_UHCI) {
  244                         return (uhci_device_generic);
  245                 }
  246         }
  247 
  248         return NULL;            /* dunno... */
  249 }
  250 
  251 static int
  252 uhci_pci_probe(device_t self)
  253 {
  254         const char *desc = uhci_pci_match(self);
  255 
  256         if (desc) {
  257                 device_set_desc(self, desc);
  258                 return 0;
  259         } else {
  260                 return ENXIO;
  261         }
  262 }
  263 
  264 static int
  265 uhci_pci_attach(device_t self)
  266 {
  267         uhci_softc_t *sc = device_get_softc(self);
  268         int rid;
  269         int err;
  270 
  271         pci_enable_busmaster(self);
  272 
  273         rid = PCI_UHCI_BASE_REG;
  274         sc->io_res = bus_alloc_resource(self, SYS_RES_IOPORT, &rid,
  275             0, ~0, 1, RF_ACTIVE);
  276         if (!sc->io_res) {
  277                 device_printf(self, "Could not map ports\n");
  278                 return ENXIO;
  279         }
  280         sc->iot = rman_get_bustag(sc->io_res);
  281         sc->ioh = rman_get_bushandle(sc->io_res);
  282 
  283         /* disable interrupts */
  284         bus_space_write_2(sc->iot, sc->ioh, UHCI_INTR, 0);
  285 
  286         rid = 0;
  287         sc->irq_res = bus_alloc_resource(self, SYS_RES_IRQ, &rid,
  288             0, ~0, 1,
  289             RF_SHAREABLE | RF_ACTIVE);
  290         if (sc->irq_res == NULL) {
  291                 device_printf(self, "Could not allocate irq\n");
  292                 uhci_pci_detach(self);
  293                 return ENXIO;
  294         }
  295         sc->sc_bus.bdev = device_add_child(self, "usb", -1);
  296         if (!sc->sc_bus.bdev) {
  297                 device_printf(self, "Could not add USB device\n");
  298                 uhci_pci_detach(self);
  299                 return ENOMEM;
  300         }
  301         device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
  302 
  303         /* uhci_pci_match must never return NULL if uhci_pci_probe succeeded */
  304         device_set_desc(sc->sc_bus.bdev, uhci_pci_match(self));
  305         switch (pci_get_vendor(self)) {
  306         case PCI_UHCI_VENDORID_INTEL:
  307                 sprintf(sc->sc_vendor, "Intel");
  308                 break;
  309         case PCI_UHCI_VENDORID_VIA:
  310                 sprintf(sc->sc_vendor, "VIA");
  311                 break;
  312         default:
  313                 if (bootverbose)
  314                         device_printf(self, "(New UHCI DeviceId=0x%08x)\n",
  315                             pci_get_devid(self));
  316                 sprintf(sc->sc_vendor, "(0x%04x)", pci_get_vendor(self));
  317         }
  318 
  319         switch (pci_read_config(self, PCI_USBREV, 1) & PCI_USBREV_MASK) {
  320         case PCI_USBREV_PRE_1_0:
  321                 sc->sc_bus.usbrev = USBREV_PRE_1_0;
  322                 break;
  323         case PCI_USBREV_1_0:
  324                 sc->sc_bus.usbrev = USBREV_1_0;
  325                 break;
  326         default:
  327                 sc->sc_bus.usbrev = USBREV_UNKNOWN;
  328                 break;
  329         }
  330 
  331         err = bus_setup_intr(self, sc->irq_res, INTR_TYPE_BIO,
  332             (driver_intr_t *) uhci_intr, sc, &sc->ih);
  333         if (err) {
  334                 device_printf(self, "Could not setup irq, %d\n", err);
  335                 sc->ih = NULL;
  336                 uhci_pci_detach(self);
  337                 return ENXIO;
  338         }
  339         /*
  340          * Set the PIRQD enable bit and switch off all the others. We don't
  341          * want legacy support to interfere with us XXX Does this also mean
  342          * that the BIOS won't touch the keyboard anymore if it is connected
  343          * to the ports of the root hub?
  344          */
  345 #ifdef USB_DEBUG
  346         if (pci_read_config(self, PCI_LEGSUP, 2) != PCI_LEGSUP_USBPIRQDEN)
  347                 device_printf(self, "LegSup = 0x%04x\n",
  348                     pci_read_config(self, PCI_LEGSUP, 2));
  349 #endif
  350         pci_write_config(self, PCI_LEGSUP, PCI_LEGSUP_USBPIRQDEN, 2);
  351 
  352         err = uhci_init(sc);
  353         if (!err) {
  354                 sc->sc_flags |= UHCI_SCFLG_DONEINIT;
  355                 err = device_probe_and_attach(sc->sc_bus.bdev);
  356         }
  357 
  358         if (err) {
  359                 device_printf(self, "USB init failed\n");
  360                 uhci_pci_detach(self);
  361                 return EIO;
  362         }
  363         return 0;               /* success */
  364 }
  365 
  366 int
  367 uhci_pci_detach(device_t self)
  368 {
  369         uhci_softc_t *sc = device_get_softc(self);
  370 
  371         if (sc->sc_flags & UHCI_SCFLG_DONEINIT) {
  372                 uhci_detach(sc, 0);
  373                 sc->sc_flags &= ~UHCI_SCFLG_DONEINIT;
  374         }
  375 
  376 
  377         if (sc->irq_res && sc->ih) {
  378                 int err = bus_teardown_intr(self, sc->irq_res, sc->ih);
  379 
  380                 if (err)
  381                         /* XXX or should we panic? */
  382                         device_printf(self, "Could not tear down irq, %d\n",
  383                             err);
  384                 sc->ih = NULL;
  385         }
  386         if (sc->sc_bus.bdev) {
  387                 device_delete_child(self, sc->sc_bus.bdev);
  388                 sc->sc_bus.bdev = NULL;
  389         }
  390         if (sc->irq_res) {
  391                 bus_release_resource(self, SYS_RES_IRQ, 0, sc->irq_res);
  392                 sc->irq_res = NULL;
  393         }
  394         if (sc->io_res) {
  395                 bus_release_resource(self, SYS_RES_IOPORT, PCI_UHCI_BASE_REG,
  396                     sc->io_res);
  397                 sc->io_res = NULL;
  398                 sc->iot = 0;
  399                 sc->ioh = 0;
  400         }
  401         return 0;
  402 }
  403 
  404 
  405 static device_method_t uhci_methods[] = {
  406         /* Device interface */
  407         DEVMETHOD(device_probe, uhci_pci_probe),
  408         DEVMETHOD(device_attach, uhci_pci_attach),
  409         DEVMETHOD(device_detach, uhci_pci_detach),
  410         DEVMETHOD(device_suspend, uhci_pci_suspend),
  411         DEVMETHOD(device_resume, uhci_pci_resume),
  412         DEVMETHOD(device_shutdown, bus_generic_shutdown),
  413 
  414         /* Bus interface */
  415         DEVMETHOD(bus_print_child, bus_generic_print_child),
  416 
  417         {0, 0}
  418 };
  419 
  420 static driver_t uhci_driver = {
  421         "uhci",
  422         uhci_methods,
  423         sizeof(uhci_softc_t),
  424 };
  425 
  426 static devclass_t uhci_devclass;
  427 
  428 DRIVER_MODULE(uhci, pci, uhci_driver, uhci_devclass, 0, 0);

Cache object: 62677b16f22dec3963d0bf57a80a9f2a


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