Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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FreeBSD/Linux Kernel Cross Reference
sys/powerpc/aim/swtch32.S
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1 /* $FreeBSD$ */ 2 /* $NetBSD: locore.S,v 1.24 2000/05/31 05:09:17 thorpej Exp $ */ 3 4 /*- 5 * Copyright (C) 2001 Benno Rice 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 22 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 23 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 24 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 25 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 26 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 /*- 29 * Copyright (C) 1995, 1996 Wolfgang Solfrank. 30 * Copyright (C) 1995, 1996 TooLs GmbH. 31 * All rights reserved. 32 * 33 * Redistribution and use in source and binary forms, with or without 34 * modification, are permitted provided that the following conditions 35 * are met: 36 * 1. Redistributions of source code must retain the above copyright 37 * notice, this list of conditions and the following disclaimer. 38 * 2. Redistributions in binary form must reproduce the above copyright 39 * notice, this list of conditions and the following disclaimer in the 40 * documentation and/or other materials provided with the distribution. 41 * 3. All advertising materials mentioning features or use of this software 42 * must display the following acknowledgement: 43 * This product includes software developed by TooLs GmbH. 44 * 4. The name of TooLs GmbH may not be used to endorse or promote products 45 * derived from this software without specific prior written permission. 46 * 47 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR 48 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 49 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 50 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 51 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 52 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 53 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 54 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 55 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 56 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 57 */ 58 59 #include "assym.s" 60 #include "opt_sched.h" 61 62 #include <sys/syscall.h> 63 64 #include <machine/trap.h> 65 #include <machine/param.h> 66 #include <machine/asm.h> 67 68 /* 69 * void cpu_throw(struct thread *old, struct thread *new) 70 */ 71 ENTRY(cpu_throw) 72 mr %r2, %r4 73 b cpu_switchin 74 75 /* 76 * void cpu_switch(struct thread *old, 77 * struct thread *new, 78 * struct mutex *mtx); 79 * 80 * Switch to a new thread saving the current state in the old thread. 81 */ 82 ENTRY(cpu_switch) 83 lwz %r6,TD_PCB(%r3) /* Get the old thread's PCB ptr */ 84 stmw %r12,PCB_CONTEXT(%r6) /* Save the non-volatile GP regs. 85 These can now be used for scratch */ 86 87 mfcr %r16 /* Save the condition register */ 88 stw %r16,PCB_CR(%r6) 89 mflr %r16 /* Save the link register */ 90 stw %r16,PCB_LR(%r6) 91 stw %r1,PCB_SP(%r6) /* Save the stack pointer */ 92 93 mr %r14,%r3 /* Copy the old thread ptr... */ 94 mr %r2,%r4 /* and the new thread ptr in curthread */ 95 mr %r16,%r5 /* and the new lock */ 96 mr %r17,%r6 /* and the PCB */ 97 98 lwz %r7,PCB_FLAGS(%r17) 99 /* Save FPU context if needed */ 100 andi. %r7, %r7, PCB_FPU 101 beq .L1 102 bl save_fpu 103 104 .L1: 105 mr %r3,%r14 /* restore old thread ptr */ 106 lwz %r7,PCB_FLAGS(%r17) 107 /* Save Altivec context if needed */ 108 andi. %r7, %r7, PCB_VEC 109 beq .L2 110 bl save_vec 111 112 .L2: 113 mr %r3,%r14 /* restore old thread ptr */ 114 bl pmap_deactivate /* Deactivate the current pmap */ 115 116 sync /* Make sure all of that finished */ 117 stw %r16,TD_LOCK(%r14) /* ULE: update old thread's lock */ 118 119 cpu_switchin: 120 #if defined(SMP) && defined(SCHED_ULE) 121 /* Wait for the new thread to become unblocked */ 122 lis %r6,blocked_lock@ha 123 addi %r6,%r6,blocked_lock@l 124 blocked_loop: 125 lwz %r7,TD_LOCK(%r2) 126 cmpw %r6,%r7 127 beq blocked_loop 128 #endif 129 130 mfsprg %r7,0 /* Get the pcpu pointer */ 131 stw %r2,PC_CURTHREAD(%r7) /* Store new current thread */ 132 lwz %r17,TD_PCB(%r2) /* Store new current PCB */ 133 stw %r17,PC_CURPCB(%r7) 134 135 mr %r3,%r2 /* Get new thread ptr */ 136 bl pmap_activate /* Activate the new address space */ 137 138 lwz %r6, PCB_FLAGS(%r17) 139 /* Restore FPU context if needed */ 140 andi. %r6, %r6, PCB_FPU 141 beq .L3 142 mr %r3,%r2 /* Pass curthread to enable_fpu */ 143 bl enable_fpu 144 145 .L3: 146 lwz %r6, PCB_FLAGS(%r17) 147 /* Restore Altivec context if needed */ 148 andi. %r6, %r6, PCB_VEC 149 beq .L4 150 mr %r3,%r2 /* Pass curthread to enable_vec */ 151 bl enable_vec 152 153 /* thread to restore is in r3 */ 154 .L4: 155 mr %r3,%r17 /* Recover PCB ptr */ 156 lmw %r12,PCB_CONTEXT(%r3) /* Load the non-volatile GP regs */ 157 lwz %r5,PCB_CR(%r3) /* Load the condition register */ 158 mtcr %r5 159 lwz %r5,PCB_LR(%r3) /* Load the link register */ 160 mtlr %r5 161 lwz %r5,PCB_AIM_USR_VSID(%r3) /* Load the USER_SR segment reg */ 162 isync 163 mtsr USER_SR,%r5 164 isync 165 lwz %r1,PCB_SP(%r3) /* Load the stack pointer */ 166 /* 167 * Perform a dummy stwcx. to clear any reservations we may have 168 * inherited from the previous thread. It doesn't matter if the 169 * stwcx succeeds or not. pcb_context[0] can be clobbered. 170 */ 171 stwcx. %r1, 0, %r3 172 blr 173 174 /* 175 * savectx(pcb) 176 * Update pcb, saving current processor state 177 */ 178 ENTRY(savectx) 179 stmw %r12,PCB_CONTEXT(%r3) /* Save the non-volatile GP regs */ 180 mfcr %r4 /* Save the condition register */ 181 stw %r4,PCB_CR(%r3) 182 blr 183 184 /* 185 * fork_trampoline() 186 * Set up the return from cpu_fork() 187 */ 188 ENTRY(fork_trampoline) 189 lwz %r3,CF_FUNC(%r1) 190 lwz %r4,CF_ARG0(%r1) 191 lwz %r5,CF_ARG1(%r1) 192 bl fork_exit 193 addi %r1,%r1,CF_SIZE-FSP /* Allow 8 bytes in front of 194 trapframe to simulate FRAME_SETUP 195 does when allocating space for 196 a frame pointer/saved LR */ 197 b trapexit
Cache object: 88804554455f009587981a7152d453d4
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