The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/powerpc/booke/machdep_e500.c

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    1 /*-
    2  * Copyright (c) 2011-2012 Semihalf.
    3  * All rights reserved.
    4  *
    5  * Redistribution and use in source and binary forms, with or without
    6  * modification, are permitted provided that the following conditions
    7  * are met:
    8  * 1. Redistributions of source code must retain the above copyright
    9  *    notice, this list of conditions and the following disclaimer.
   10  * 2. Redistributions in binary form must reproduce the above copyright
   11  *    notice, this list of conditions and the following disclaimer in the
   12  *    documentation and/or other materials provided with the distribution.
   13  *
   14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   17  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   24  * SUCH DAMAGE.
   25  */
   26 
   27 #include <sys/cdefs.h>
   28 __FBSDID("$FreeBSD: releng/11.0/sys/powerpc/booke/machdep_e500.c 292903 2015-12-30 03:43:25Z jhibbits $");
   29 
   30 #include <sys/cdefs.h>
   31 #include <sys/types.h>
   32 #include <sys/param.h>
   33 #include <sys/proc.h>
   34 #include <sys/reboot.h>
   35 
   36 #include <vm/vm.h>
   37 #include <vm/pmap.h>
   38 
   39 #include <machine/machdep.h>
   40 
   41 #include <dev/fdt/fdt_common.h>
   42 
   43 #include <powerpc/mpc85xx/mpc85xx.h>
   44 
   45 extern void dcache_enable(void);
   46 extern void dcache_inval(void);
   47 extern void icache_enable(void);
   48 extern void icache_inval(void);
   49 extern void l2cache_enable(void);
   50 extern void l2cache_inval(void);
   51 extern void bpred_enable(void);
   52 
   53 void
   54 booke_init_tlb(vm_paddr_t fdt_immr_pa)
   55 {
   56 
   57 }
   58 
   59 void
   60 booke_enable_l1_cache(void)
   61 {
   62         uint32_t csr;
   63 
   64         /* Enable D-cache if applicable */
   65         csr = mfspr(SPR_L1CSR0);
   66         if ((csr & L1CSR0_DCE) == 0) {
   67                 dcache_inval();
   68                 dcache_enable();
   69         }
   70 
   71         csr = mfspr(SPR_L1CSR0);
   72         if ((boothowto & RB_VERBOSE) != 0 || (csr & L1CSR0_DCE) == 0)
   73                 printf("L1 D-cache %sabled\n",
   74                     (csr & L1CSR0_DCE) ? "en" : "dis");
   75 
   76         /* Enable L1 I-cache if applicable. */
   77         csr = mfspr(SPR_L1CSR1);
   78         if ((csr & L1CSR1_ICE) == 0) {
   79                 icache_inval();
   80                 icache_enable();
   81         }
   82 
   83         csr = mfspr(SPR_L1CSR1);
   84         if ((boothowto & RB_VERBOSE) != 0 || (csr & L1CSR1_ICE) == 0)
   85                 printf("L1 I-cache %sabled\n",
   86                     (csr & L1CSR1_ICE) ? "en" : "dis");
   87 }
   88 
   89 void
   90 booke_enable_l2_cache(void)
   91 {
   92         uint32_t csr;
   93 
   94         /* Enable L2 cache on E500mc */
   95         if ((((mfpvr() >> 16) & 0xFFFF) == FSL_E500mc) ||
   96             (((mfpvr() >> 16) & 0xFFFF) == FSL_E5500)) {
   97                 csr = mfspr(SPR_L2CSR0);
   98                 if ((csr & L2CSR0_L2E) == 0) {
   99                         l2cache_inval();
  100                         l2cache_enable();
  101                 }
  102 
  103                 csr = mfspr(SPR_L2CSR0);
  104                 if ((boothowto & RB_VERBOSE) != 0 || (csr & L2CSR0_L2E) == 0)
  105                         printf("L2 cache %sabled\n",
  106                             (csr & L2CSR0_L2E) ? "en" : "dis");
  107         }
  108 }
  109 
  110 void
  111 booke_enable_bpred(void)
  112 {
  113         uint32_t csr;
  114 
  115         bpred_enable();
  116         csr = mfspr(SPR_BUCSR);
  117         if ((boothowto & RB_VERBOSE) != 0 || (csr & BUCSR_BPEN) == 0)
  118                 printf("Branch Predictor %sabled\n",
  119                     (csr & BUCSR_BPEN) ? "en" : "dis");
  120 }
  121 
  122 void
  123 booke_disable_l2_cache(void)
  124 {
  125 }

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