atpic.c

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    1 /*-
    2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
    3  *
    4  * Copyright (c) 2009 Marcel Moolenaar
    5  *
    6  * Redistribution and use in source and binary forms, with or without
    7  * modification, are permitted provided that the following conditions
    8  * are met:
    9  * 1. Redistributions of source code must retain the above copyright
   10  *    notice, this list of conditions and the following disclaimer.
   11  * 2. Redistributions in binary form must reproduce the above copyright
   12  *    notice, this list of conditions and the following disclaimer in the
   13  *    documentation and/or other materials provided with the distribution.
   14  *
   15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
   16  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
   17  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
   18  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
   19  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
   20  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
   21  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
   22  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
   23  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   25  * SUCH DAMAGE.
   26  */
   27 
   28 #include <sys/cdefs.h>
   29 __FBSDID("$FreeBSD$");
   30 
   31 #include <sys/param.h>
   32 #include <sys/systm.h>
   33 #include <sys/bus.h>
   34 #include <sys/cpuset.h>
   35 #include <sys/kernel.h>
   36 #include <sys/module.h>
   37 #include <sys/rman.h>
   38 
   39 #include <machine/bus.h>
   40 #include <machine/intr_machdep.h>
   41 #include <machine/pio.h>
   42 
   43 #include <powerpc/mpc85xx/mpc85xx.h>
   44 
   45 #include <dev/ic/i8259.h>
   46 
   47 #include <isa/isareg.h>
   48 #include <isa/isavar.h>
   49 
   50 #include "pic_if.h"
   51 
   52 #define ATPIC_MASTER    0
   53 #define ATPIC_SLAVE     1
   54 
   55 struct atpic_softc {
   56         device_t        sc_dev;
   57 
   58         /* I/O port resources for master & slave. */
   59         struct resource *sc_res[2];
   60         int             sc_rid[2];
   61 
   62         /* Our "routing" interrupt */
   63         struct resource *sc_ires;
   64         void            *sc_icookie;
   65         int             sc_irid;
   66 
   67         int             sc_vector[16];
   68         uint8_t         sc_mask[2];
   69 };
   70 
   71 static int      atpic_isa_attach(device_t);
   72 static void     atpic_isa_identify(driver_t *, device_t);
   73 static int      atpic_isa_probe(device_t);
   74 
   75 static void atpic_config(device_t, u_int, enum intr_trigger,
   76     enum intr_polarity);
   77 static void atpic_dispatch(device_t, struct trapframe *);
   78 static void atpic_enable(device_t, u_int, u_int);
   79 static void atpic_eoi(device_t, u_int);
   80 static void atpic_ipi(device_t, u_int);
   81 static void atpic_mask(device_t, u_int);
   82 static void atpic_unmask(device_t, u_int);
   83 
   84 static void atpic_ofw_translate_code(device_t, u_int irq, int code,
   85     enum intr_trigger *trig, enum intr_polarity *pol);
   86 
   87 static device_method_t atpic_isa_methods[] = {
   88         /* Device interface */
   89         DEVMETHOD(device_identify,      atpic_isa_identify),
   90         DEVMETHOD(device_probe,         atpic_isa_probe),
   91         DEVMETHOD(device_attach,        atpic_isa_attach),
   92 
   93         /* PIC interface */
   94         DEVMETHOD(pic_config,           atpic_config),
   95         DEVMETHOD(pic_dispatch,         atpic_dispatch),
   96         DEVMETHOD(pic_enable,           atpic_enable),
   97         DEVMETHOD(pic_eoi,              atpic_eoi),
   98         DEVMETHOD(pic_ipi,              atpic_ipi),
   99         DEVMETHOD(pic_mask,             atpic_mask),
  100         DEVMETHOD(pic_unmask,           atpic_unmask),
  101 
  102         DEVMETHOD(pic_translate_code,   atpic_ofw_translate_code),
  103 
  104         { 0, 0 },
  105 };
  106 
  107 static driver_t atpic_isa_driver = {
  108         "atpic",
  109         atpic_isa_methods,
  110         sizeof(struct atpic_softc)
  111 };
  112 
  113 static struct isa_pnp_id atpic_ids[] = {
  114         { 0x0000d041 /* PNP0000 */, "AT interrupt controller" },
  115         { 0 }
  116 };
  117 
  118 DRIVER_MODULE(atpic, isa, atpic_isa_driver, 0, 0);
  119 ISA_PNP_INFO(atpic_ids);
  120 
  121 static __inline uint8_t
  122 atpic_read(struct atpic_softc *sc, int icu, int ofs)
  123 {
  124         uint8_t val;
  125 
  126         val = bus_read_1(sc->sc_res[icu], ofs);
  127         return (val);
  128 }
  129 
  130 static __inline void
  131 atpic_write(struct atpic_softc *sc, int icu, int ofs, uint8_t val)
  132 {
  133 
  134         bus_write_1(sc->sc_res[icu], ofs, val);
  135         bus_barrier(sc->sc_res[icu], ofs, 2 - ofs,
  136             BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE);
  137 }
  138 
  139 static void
  140 atpic_intr(void *arg)
  141 {
  142 
  143         atpic_dispatch(arg, NULL);
  144 }
  145 
  146 static void
  147 atpic_isa_identify(driver_t *drv, device_t parent)
  148 {
  149         device_t child;
  150 
  151         child = BUS_ADD_CHILD(parent, ISA_ORDER_SENSITIVE, drv->name, -1);
  152         device_set_driver(child, drv);
  153         isa_set_logicalid(child, atpic_ids[0].ip_id);
  154         isa_set_vendorid(child, atpic_ids[0].ip_id);
  155 
  156         bus_set_resource(child, SYS_RES_IOPORT, ATPIC_MASTER, IO_ICU1, 2);
  157         bus_set_resource(child, SYS_RES_IOPORT, ATPIC_SLAVE, IO_ICU2, 2);
  158 
  159         /* ISA interrupts are routed through external interrupt 0. */
  160         bus_set_resource(child, SYS_RES_IRQ, 0, 16, 1);
  161 }
  162 
  163 static int
  164 atpic_isa_probe(device_t dev)
  165 {
  166         int res;
  167 
  168         res = ISA_PNP_PROBE(device_get_parent(dev), dev, atpic_ids);
  169         if (res > 0)
  170                 return (res);
  171 
  172         device_set_desc(dev, "PC/AT compatible PIC");
  173         return (res);
  174 }
  175 
  176 static void
  177 atpic_init(struct atpic_softc *sc, int icu)
  178 {
  179 
  180         sc->sc_mask[icu] = 0xff - ((icu == ATPIC_MASTER) ? 4 : 0);
  181 
  182         atpic_write(sc, icu, 0, ICW1_RESET | ICW1_IC4);
  183         atpic_write(sc, icu, 1, (icu == ATPIC_SLAVE) ? 8 : 0);
  184         atpic_write(sc, icu, 1, (icu == ATPIC_SLAVE) ? 2 : 4);
  185         atpic_write(sc, icu, 1, ICW4_8086);
  186         atpic_write(sc, icu, 1, sc->sc_mask[icu]);
  187         atpic_write(sc, icu, 0, OCW3_SEL | OCW3_RR);
  188 }
  189 
  190 static int
  191 atpic_isa_attach(device_t dev)
  192 {
  193         struct atpic_softc *sc;
  194         int error;
  195 
  196         sc = device_get_softc(dev);
  197         sc->sc_dev = dev;
  198 
  199         error = ENXIO;
  200 
  201         sc->sc_rid[ATPIC_MASTER] = 0;
  202         sc->sc_res[ATPIC_MASTER] = bus_alloc_resource_any(dev, SYS_RES_IOPORT,
  203             &sc->sc_rid[ATPIC_MASTER], RF_ACTIVE);
  204         if (sc->sc_res[ATPIC_MASTER] == NULL)
  205                 goto fail;
  206 
  207         sc->sc_rid[ATPIC_SLAVE] = 1;
  208         sc->sc_res[ATPIC_SLAVE] = bus_alloc_resource_any(dev, SYS_RES_IOPORT,
  209             &sc->sc_rid[ATPIC_SLAVE], RF_ACTIVE);
  210         if (sc->sc_res[ATPIC_SLAVE] == NULL)
  211                 goto fail;
  212 
  213         sc->sc_irid = 0;
  214         sc->sc_ires = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->sc_irid,
  215             RF_ACTIVE);
  216         if (sc->sc_ires == NULL)
  217                 goto fail;
  218 
  219         error = bus_setup_intr(dev, sc->sc_ires, INTR_TYPE_MISC | INTR_MPSAFE,
  220             NULL, atpic_intr, dev, &sc->sc_icookie);
  221         if (error)
  222                 goto fail;
  223 
  224         atpic_init(sc, ATPIC_SLAVE);
  225         atpic_init(sc, ATPIC_MASTER);
  226 
  227         powerpc_register_pic(dev, 0, 16, 0, TRUE);
  228         return (0);
  229 
  230  fail:
  231         if (sc->sc_ires != NULL)
  232                 bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid,
  233                     sc->sc_ires);
  234         if (sc->sc_res[ATPIC_SLAVE] != NULL)
  235                 bus_release_resource(dev, SYS_RES_IOPORT,
  236                     sc->sc_rid[ATPIC_SLAVE], sc->sc_res[ATPIC_SLAVE]);
  237         if (sc->sc_res[ATPIC_MASTER] != NULL)
  238                 bus_release_resource(dev, SYS_RES_IOPORT,
  239                     sc->sc_rid[ATPIC_MASTER], sc->sc_res[ATPIC_MASTER]);
  240         return (error);
  241 }
  242 
  243 /*
  244  * PIC interface.
  245  */
  246 
  247 static void
  248 atpic_config(device_t dev, u_int irq, enum intr_trigger trig,
  249     enum intr_polarity pol)
  250 {
  251 }
  252 
  253 static void
  254 atpic_dispatch(device_t dev, struct trapframe *tf)
  255 {
  256         struct atpic_softc *sc;
  257         uint8_t irq;
  258 
  259         sc = device_get_softc(dev);
  260         atpic_write(sc, ATPIC_MASTER, 0, OCW3_SEL | OCW3_P);
  261         irq = atpic_read(sc, ATPIC_MASTER, 0);
  262         atpic_write(sc, ATPIC_MASTER, 0, OCW3_SEL | OCW3_RR);
  263         if ((irq & 0x80) == 0)
  264                 return;
  265 
  266         if (irq == 0x82) {
  267                 atpic_write(sc, ATPIC_SLAVE, 0, OCW3_SEL | OCW3_P);
  268                 irq = atpic_read(sc, ATPIC_SLAVE, 0) + 8;
  269                 atpic_write(sc, ATPIC_SLAVE, 0, OCW3_SEL | OCW3_RR);
  270                 if ((irq & 0x80) == 0)
  271                         return;
  272         }
  273 
  274         powerpc_dispatch_intr(sc->sc_vector[irq & 0x0f], tf);
  275 }
  276 
  277 static void
  278 atpic_enable(device_t dev, u_int irq, u_int vector)
  279 {
  280         struct atpic_softc *sc;
  281 
  282         sc = device_get_softc(dev);
  283         sc->sc_vector[irq] = vector;
  284         atpic_unmask(dev, irq);
  285 }
  286 
  287 static void
  288 atpic_eoi(device_t dev, u_int irq)
  289 {
  290         struct atpic_softc *sc;
  291 
  292         sc = device_get_softc(dev);
  293         if (irq > 7)
  294                 atpic_write(sc, ATPIC_SLAVE, 0, OCW2_EOI);
  295         atpic_write(sc, ATPIC_MASTER, 0, OCW2_EOI);
  296 }
  297 
  298 static void
  299 atpic_ipi(device_t dev, u_int cpu)
  300 {
  301         /* No SMP support. */
  302 }
  303 
  304 static void
  305 atpic_mask(device_t dev, u_int irq)
  306 {
  307         struct atpic_softc *sc;
  308 
  309         sc = device_get_softc(dev);
  310         if (irq > 7) {
  311                 sc->sc_mask[ATPIC_SLAVE] |= 1 << (irq - 8);
  312                 atpic_write(sc, ATPIC_SLAVE, 1, sc->sc_mask[ATPIC_SLAVE]);
  313         } else {
  314                 sc->sc_mask[ATPIC_MASTER] |= 1 << irq;
  315                 atpic_write(sc, ATPIC_MASTER, 1, sc->sc_mask[ATPIC_MASTER]);
  316         }
  317 }
  318 
  319 static void
  320 atpic_unmask(device_t dev, u_int irq)
  321 {
  322         struct atpic_softc *sc;
  323 
  324         sc = device_get_softc(dev);
  325         if (irq > 7) {
  326                 sc->sc_mask[ATPIC_SLAVE] &= ~(1 << (irq - 8));
  327                 atpic_write(sc, ATPIC_SLAVE, 1, sc->sc_mask[ATPIC_SLAVE]);
  328         } else {
  329                 sc->sc_mask[ATPIC_MASTER] &= ~(1 << irq);
  330                 atpic_write(sc, ATPIC_MASTER, 1, sc->sc_mask[ATPIC_MASTER]);
  331         }
  332 }
  333 
  334 static void
  335 atpic_ofw_translate_code(device_t dev, u_int irq, int code,
  336     enum intr_trigger *trig, enum intr_polarity *pol)
  337 {
  338         switch (code) {
  339         case 0:
  340                 /* Active L level */
  341                 *trig = INTR_TRIGGER_LEVEL;
  342                 *pol = INTR_POLARITY_LOW;
  343                 break;
  344         case 1:
  345                 /* Active H level */
  346                 *trig = INTR_TRIGGER_LEVEL;
  347                 *pol = INTR_POLARITY_HIGH;
  348                 break;
  349         case 2:
  350                 /* H to L edge */
  351                 *trig = INTR_TRIGGER_EDGE;
  352                 *pol = INTR_POLARITY_LOW;
  353                 break;
  354         case 3:
  355                 /* L to H edge */
  356                 *trig = INTR_TRIGGER_EDGE;
  357                 *pol = INTR_POLARITY_HIGH;
  358                 break;
  359         default:
  360                 *trig = INTR_TRIGGER_CONFORM;
  361                 *pol = INTR_POLARITY_CONFORM;
  362         }
  363 }
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FreeBSD/Linux Kernel Cross Reference sys/powerpc/mpc85xx/atpic.c

FreeBSD/Linux Kernel Cross Reference
sys/powerpc/mpc85xx/atpic.c
