The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/powerpc/mpc85xx/ds1553_reg.h

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    1 /*-
    2  * Copyright (C) 2006-2008 Semihalf, Grzegorz Bernacki
    3  * All rights reserved.
    4  *
    5  * Redistribution and use in source and binary forms, with or without
    6  * modification, are permitted provided that the following conditions
    7  * are met:
    8  * 1. Redistributions of source code must retain the above copyright
    9  *    notice, this list of conditions and the following disclaimer.
   10  * 2. Redistributions in binary form must reproduce the above copyright
   11  *    notice, this list of conditions and the following disclaimer in the
   12  *    documentation and/or other materials provided with the distribution.
   13  *
   14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   17  * ARE DISCLAIMED.  IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
   18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   24  * SUCH DAMAGE.
   25  *
   26  * $FreeBSD$
   27  */
   28 
   29 #ifndef _DEV_RTC_DS1553_H_
   30 #define _DEV_RTC_DS1553_H_
   31 
   32 /* DS1553 registers */
   33 #define DS1553_NVRAM_SIZE               0x1ff0
   34 #define DS1553_OFF_FLAGS                0x1ff0
   35 #define DS1553_OFF_ALARM_SECONDS        0x1ff2
   36 #define DS1553_OFF_ALARM_MINUTES        0x1ff3
   37 #define DS1553_OFF_ALARM_HOURS          0x1ff4
   38 #define DS1553_OFF_ALARM_DATE           0x1ff5
   39 #define DS1553_OFF_INTERRUPTS           0x1ff6
   40 #define DS1553_OFF_WATCHDOG             0x1ff7
   41 #define DS1553_OFF_CONTROL              0x1ff8
   42 #define DS1553_OFF_SECONDS              0x1ff9
   43 #define DS1553_OFF_MINUTES              0x1ffa
   44 #define DS1553_OFF_HOURS                0x1ffb
   45 #define DS1553_OFF_DAYOFWEEK            0x1ffc
   46 #define DS1553_OFF_DATE                 0x1ffd
   47 #define DS1553_OFF_MONTH                0x1ffe
   48 #define DS1553_OFF_YEAR                 0x1fff
   49 
   50 /* dayofweek register's bits */
   51 #define DS1553_BIT_FREQ_TEST            0x40 /* frequency test bit */
   52 
   53 /* seconds register's bit */
   54 #define DS1553_BIT_OSC                  0x80 /* oscillator start/stop bit */
   55 
   56 /* control register's bits */
   57 #define DS1553_BIT_WRITE                0x80 /* write */
   58 #define DS1553_BIT_READ                 0x40 /* read */
   59 
   60 /* watchdog register's bits */
   61 #define DS1553_BIT_WATCHDOG             0x80 /* watchdog steering bit */
   62 #define DS1553_BIT_BMB4                 0x40 /* watchdog multiplier bit4 */
   63 #define DS1553_BIT_BMB3                 0x20 /* watchdog multiplier bit3 */
   64 #define DS1553_BIT_BMB2                 0x10 /* watchdog multiplier bit2 */
   65 #define DS1553_BIT_BMB1                 0x8  /* watchdog multiplier bit1 */
   66 #define DS1553_BIT_BMB0                 0x4  /* watchdog multiplier bit0 */
   67 #define DS1553_BIT_RB1                  0x2  /* watchdog resolution bit1 */
   68 #define DS1553_BIT_RB0                  0x1  /* watchdog resolution bit0 */
   69 
   70 /* alarm seconds/minutes/hours/date register's bit */
   71 #define DS1553_BIT_AM                   0x80 /* alarm mask bit */
   72 
   73 /* flag register's bits */
   74 #define DS1553_BIT_BLF                  0x10 /* battery flag */
   75 #define DS1553_BIT_WF                   0x80 /* watchdog flag */
   76 
   77 /* register's mask */
   78 #define DS1553_MASK_MONTH               0x1f
   79 #define DS1553_MASK_DATE                0x3f
   80 #define DS1553_MASK_DAYOFWEEK           0x7
   81 #define DS1553_MASK_HOUR                0x3f
   82 #define DS1553_MASK_MINUTES             0x7f
   83 #define DS1553_MASK_SECONDS             0x7f
   84 
   85 struct ds1553_softc {
   86 
   87         bus_space_tag_t         sc_bst; /* bus space tag */
   88         bus_space_handle_t      sc_bsh; /* bus space handle */
   89 
   90         int                     rid;    /* resource id */
   91         struct resource         *res;
   92         struct mtx              sc_mtx; /* hardware mutex */
   93 
   94         uint32_t                year_offset;
   95         /* read/write functions */
   96         uint8_t                 (*sc_read)(device_t, bus_size_t);
   97         void                    (*sc_write)(device_t, bus_size_t, uint8_t);
   98 };
   99 
  100 /* device interface */
  101 int ds1553_attach(device_t);
  102 
  103 /* clock interface */
  104 int ds1553_gettime(device_t, struct timespec *);
  105 int ds1553_settime(device_t, struct timespec *);
  106 
  107 #endif /* _DEV_RTC_DS1553_H_ */

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