The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/powerpc/ofw/ofw_pcib_pci.c

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    1 /*-
    2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
    3  *
    4  * Copyright (c) 2000 Michael Smith
    5  * Copyright (c) 2000 BSDi
    6  * All rights reserved.
    7  *
    8  * Redistribution and use in source and binary forms, with or without
    9  * modification, are permitted provided that the following conditions
   10  * are met:
   11  * 1. Redistributions of source code must retain the above copyright
   12  *    notice, this list of conditions and the following disclaimer.
   13  * 2. Redistributions in binary form must reproduce the above copyright
   14  *    notice, this list of conditions and the following disclaimer in the
   15  *    documentation and/or other materials provided with the distribution.
   16  *
   17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   18  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   19  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   20  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   21  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   22  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   23  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   24  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   25  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   26  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   27  * SUCH DAMAGE.
   28  */
   29 
   30 #include <sys/cdefs.h>
   31 __FBSDID("$FreeBSD$");
   32 
   33 #include <sys/param.h>
   34 #include <sys/systm.h>
   35 #include <sys/module.h>
   36 #include <sys/bus.h>
   37 #include <sys/malloc.h>
   38 #include <sys/kernel.h>
   39 
   40 #include <dev/ofw/openfirm.h>
   41 #include <dev/ofw/ofw_pci.h>
   42 #include <dev/ofw/ofw_bus.h>
   43 #include <dev/ofw/ofw_bus_subr.h>
   44 
   45 #include <dev/pci/pcivar.h>
   46 #include <dev/pci/pcireg.h>
   47 #include <dev/pci/pcib_private.h>
   48 
   49 #include <machine/intr_machdep.h>
   50 
   51 #include "pcib_if.h"
   52 
   53 static int      ofw_pcib_pci_probe(device_t bus);
   54 static int      ofw_pcib_pci_attach(device_t bus);
   55 static phandle_t ofw_pcib_pci_get_node(device_t bus, device_t dev);
   56 static int      ofw_pcib_pci_route_interrupt(device_t bridge, device_t dev,
   57                     int intpin);
   58 
   59 static device_method_t ofw_pcib_pci_methods[] = {
   60         /* Device interface */
   61         DEVMETHOD(device_probe,         ofw_pcib_pci_probe),
   62         DEVMETHOD(device_attach,        ofw_pcib_pci_attach),
   63 
   64         /* pcib interface */
   65         DEVMETHOD(pcib_route_interrupt, ofw_pcib_pci_route_interrupt),
   66         DEVMETHOD(pcib_request_feature, pcib_request_feature_allow),
   67 
   68         /* ofw_bus interface */
   69         DEVMETHOD(ofw_bus_get_node,     ofw_pcib_pci_get_node),
   70 
   71         DEVMETHOD_END
   72 };
   73 
   74 struct ofw_pcib_softc {
   75         /*
   76          * This is here so that we can use pci bridge methods, too - the
   77          * generic routines only need the dev, secbus and subbus members
   78          * filled.
   79          */
   80         struct pcib_softc       ops_pcib_sc;
   81         phandle_t               ops_node;
   82         struct ofw_bus_iinfo    ops_iinfo;
   83 };
   84 
   85 DEFINE_CLASS_1(pcib, ofw_pcib_pci_driver, ofw_pcib_pci_methods,
   86     sizeof(struct ofw_pcib_softc), pcib_driver);
   87 EARLY_DRIVER_MODULE(ofw_pcib, pci, ofw_pcib_pci_driver, 0, 0, BUS_PASS_BUS);
   88 
   89 static int
   90 ofw_pcib_pci_probe(device_t dev)
   91 {
   92 
   93         if ((pci_get_class(dev) != PCIC_BRIDGE) ||
   94             (pci_get_subclass(dev) != PCIS_BRIDGE_PCI)) {
   95                 return (ENXIO);
   96         }
   97 
   98         if (ofw_bus_get_node(dev) == -1)
   99                 return (ENXIO);
  100 
  101         device_set_desc(dev, "OFW PCI-PCI bridge");
  102         return (0);
  103 }
  104 
  105 static int
  106 ofw_pcib_pci_attach(device_t dev)
  107 {
  108         struct ofw_pcib_softc *sc;
  109 
  110         sc = device_get_softc(dev);
  111         sc->ops_pcib_sc.dev = dev;
  112         sc->ops_node = ofw_bus_get_node(dev);
  113 
  114         ofw_bus_setup_iinfo(sc->ops_node, &sc->ops_iinfo,
  115             sizeof(cell_t));
  116 
  117         pcib_attach_common(dev);
  118         return (pcib_attach_child(dev));
  119 }
  120 
  121 static phandle_t
  122 ofw_pcib_pci_get_node(device_t bridge, device_t dev)
  123 {
  124         /* We have only one child, the PCI bus, so pass it our node */
  125 
  126         return (ofw_bus_get_node(bridge));
  127 }
  128 
  129 static int
  130 ofw_pcib_pci_route_interrupt(device_t bridge, device_t dev, int intpin)
  131 {
  132         struct ofw_pcib_softc *sc;
  133         struct ofw_bus_iinfo *ii;
  134         struct ofw_pci_register reg;
  135         cell_t pintr, mintr[2];
  136         int intrcells;
  137         phandle_t iparent;
  138 
  139         sc = device_get_softc(bridge);
  140         ii = &sc->ops_iinfo;
  141         if (ii->opi_imapsz > 0) {
  142                 pintr = intpin;
  143 
  144                 /* Fabricate imap information if this isn't an OFW device */
  145                 bzero(&reg, sizeof(reg));
  146                 reg.phys_hi = (pci_get_bus(dev) << OFW_PCI_PHYS_HI_BUSSHIFT) |
  147                     (pci_get_slot(dev) << OFW_PCI_PHYS_HI_DEVICESHIFT) |
  148                     (pci_get_function(dev) << OFW_PCI_PHYS_HI_FUNCTIONSHIFT);
  149 
  150                 intrcells = ofw_bus_lookup_imap(ofw_bus_get_node(dev), ii, &reg,
  151                     sizeof(reg), &pintr, sizeof(pintr), mintr, sizeof(mintr),
  152                     &iparent);
  153                 if (intrcells) {
  154                         /*
  155                          * If we've found a mapping, return it and don't map
  156                          * it again on higher levels - that causes problems
  157                          * in some cases, and never seems to be required.
  158                          */
  159                         mintr[0] = ofw_bus_map_intr(dev, iparent, intrcells,
  160                             mintr);
  161                         return (mintr[0]);
  162                 }
  163         } else if (intpin >= 1 && intpin <= 4) {
  164                 /*
  165                  * When an interrupt map is missing, we need to do the
  166                  * standard PCI swizzle and continue mapping at the parent.
  167                  */
  168                 return (pcib_route_interrupt(bridge, dev, intpin));
  169         }
  170         return (PCIB_ROUTE_INTERRUPT(device_get_parent(device_get_parent(
  171             bridge)), bridge, intpin));
  172 }

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