The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/powerpc/ofw/ofw_pcibus.c

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    1 /*-
    2  * Copyright (c) 1997, Stefan Esser <se@freebsd.org>
    3  * Copyright (c) 2000, Michael Smith <msmith@freebsd.org>
    4  * Copyright (c) 2000, BSDi
    5  * Copyright (c) 2003, Thomas Moestl <tmm@FreeBSD.org>
    6  * All rights reserved.
    7  *
    8  * Redistribution and use in source and binary forms, with or without
    9  * modification, are permitted provided that the following conditions
   10  * are met:
   11  * 1. Redistributions of source code must retain the above copyright
   12  *    notice unmodified, this list of conditions, and the following
   13  *    disclaimer.
   14  * 2. Redistributions in binary form must reproduce the above copyright
   15  *    notice, this list of conditions and the following disclaimer in the
   16  *    documentation and/or other materials provided with the distribution.
   17  *
   18  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
   19  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
   20  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
   21  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
   22  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
   23  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
   24  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
   25  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
   26  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
   27  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   28  */
   29 
   30 #include <sys/cdefs.h>
   31 __FBSDID("$FreeBSD: releng/9.0/sys/powerpc/ofw/ofw_pcibus.c 218184 2011-02-02 05:58:51Z marcel $");
   32 
   33 #include <sys/param.h>
   34 #include <sys/bus.h>
   35 #include <sys/kernel.h>
   36 #include <sys/libkern.h>
   37 #include <sys/module.h>
   38 #include <sys/pciio.h>
   39 
   40 #include <dev/ofw/ofw_bus.h>
   41 #include <dev/ofw/ofw_bus_subr.h>
   42 #include <dev/ofw/ofw_pci.h>
   43 #include <dev/ofw/openfirm.h>
   44 
   45 #include <machine/bus.h>
   46 #include <machine/intr_machdep.h>
   47 #include <machine/resource.h>
   48 
   49 #include <dev/pci/pcireg.h>
   50 #include <dev/pci/pcivar.h>
   51 #include <dev/pci/pci_private.h>
   52 
   53 #include "pcib_if.h"
   54 #include "pci_if.h"
   55 
   56 typedef uint32_t ofw_pci_intr_t;
   57 
   58 /* Methods */
   59 static device_probe_t ofw_pcibus_probe;
   60 static device_attach_t ofw_pcibus_attach;
   61 static pci_assign_interrupt_t ofw_pcibus_assign_interrupt;
   62 static ofw_bus_get_devinfo_t ofw_pcibus_get_devinfo;
   63 static int ofw_pcibus_child_pnpinfo_str_method(device_t cbdev, device_t child,
   64     char *buf, size_t buflen);
   65 
   66 static void ofw_pcibus_enum_devtree(device_t dev, u_int domain, u_int busno);
   67 static void ofw_pcibus_enum_bus(device_t dev, u_int domain, u_int busno);
   68 
   69 static device_method_t ofw_pcibus_methods[] = {
   70         /* Device interface */
   71         DEVMETHOD(device_probe,         ofw_pcibus_probe),
   72         DEVMETHOD(device_attach,        ofw_pcibus_attach),
   73 
   74         /* Bus interface */
   75         DEVMETHOD(bus_child_pnpinfo_str, ofw_pcibus_child_pnpinfo_str_method),
   76 
   77         /* PCI interface */
   78         DEVMETHOD(pci_assign_interrupt, ofw_pcibus_assign_interrupt),
   79 
   80         /* ofw_bus interface */
   81         DEVMETHOD(ofw_bus_get_devinfo,  ofw_pcibus_get_devinfo),
   82         DEVMETHOD(ofw_bus_get_compat,   ofw_bus_gen_get_compat),
   83         DEVMETHOD(ofw_bus_get_model,    ofw_bus_gen_get_model),
   84         DEVMETHOD(ofw_bus_get_name,     ofw_bus_gen_get_name),
   85         DEVMETHOD(ofw_bus_get_node,     ofw_bus_gen_get_node),
   86         DEVMETHOD(ofw_bus_get_type,     ofw_bus_gen_get_type),
   87 
   88         { 0, 0 }
   89 };
   90 
   91 struct ofw_pcibus_devinfo {
   92         struct pci_devinfo      opd_dinfo;
   93         struct ofw_bus_devinfo  opd_obdinfo;
   94 };
   95 
   96 static devclass_t pci_devclass;
   97 
   98 DEFINE_CLASS_1(pci, ofw_pcibus_driver, ofw_pcibus_methods, 1 /* no softc */,
   99     pci_driver);
  100 DRIVER_MODULE(ofw_pcibus, pcib, ofw_pcibus_driver, pci_devclass, 0, 0);
  101 MODULE_VERSION(ofw_pcibus, 1);
  102 MODULE_DEPEND(ofw_pcibus, pci, 1, 1, 1);
  103 
  104 static int
  105 ofw_pcibus_probe(device_t dev)
  106 {
  107 
  108         if (ofw_bus_get_node(dev) == 0)
  109                 return (ENXIO);
  110         device_set_desc(dev, "OFW PCI bus");
  111 
  112         return (0);
  113 }
  114 
  115 static int
  116 ofw_pcibus_attach(device_t dev)
  117 {
  118         u_int busno, domain;
  119 
  120         domain = pcib_get_domain(dev);
  121         busno = pcib_get_bus(dev);
  122         if (bootverbose)
  123                 device_printf(dev, "domain=%d, physical bus=%d\n",
  124                     domain, busno);
  125 
  126         /*
  127          * Attach those children represented in the device tree.
  128          */
  129 
  130         ofw_pcibus_enum_devtree(dev, domain, busno);
  131 
  132         /*
  133          * We now attach any laggard devices. FDT, for instance, allows
  134          * the device tree to enumerate only some PCI devices. Apple's
  135          * OF device tree on some Grackle-based hardware can also miss
  136          * functions on multi-function cards.
  137          */
  138 
  139         ofw_pcibus_enum_bus(dev, domain, busno);
  140 
  141         return (bus_generic_attach(dev));
  142 }
  143 
  144 static void
  145 ofw_pcibus_enum_devtree(device_t dev, u_int domain, u_int busno)
  146 {
  147         device_t pcib;
  148         struct ofw_pci_register pcir;
  149         struct ofw_pcibus_devinfo *dinfo;
  150         phandle_t node, child;
  151         u_int func, slot;
  152         int intline;
  153 
  154         pcib = device_get_parent(dev);
  155         node = ofw_bus_get_node(dev);
  156 
  157         for (child = OF_child(node); child != 0; child = OF_peer(child)) {
  158                 if (OF_getprop(child, "reg", &pcir, sizeof(pcir)) == -1)
  159                         continue;
  160                 slot = OFW_PCI_PHYS_HI_DEVICE(pcir.phys_hi);
  161                 func = OFW_PCI_PHYS_HI_FUNCTION(pcir.phys_hi);
  162 
  163                 /* Some OFW device trees contain dupes. */
  164                 if (pci_find_dbsf(domain, busno, slot, func) != NULL)
  165                         continue;
  166 
  167                 /*
  168                  * The preset in the intline register is usually bogus.  Reset
  169                  * it such that the PCI code will reroute the interrupt if
  170                  * needed.
  171                  */
  172 
  173                 intline = PCI_INVALID_IRQ;
  174                 if (OF_getproplen(child, "interrupts") > 0)
  175                         intline = 0;
  176                 PCIB_WRITE_CONFIG(pcib, busno, slot, func, PCIR_INTLINE,
  177                     intline, 1);
  178 
  179                 /*
  180                  * Now set up the PCI and OFW bus layer devinfo and add it
  181                  * to the PCI bus.
  182                  */
  183 
  184                 dinfo = (struct ofw_pcibus_devinfo *)pci_read_device(pcib,
  185                     domain, busno, slot, func, sizeof(*dinfo));
  186                 if (dinfo == NULL)
  187                         continue;
  188                 if (ofw_bus_gen_setup_devinfo(&dinfo->opd_obdinfo, child) !=
  189                     0) {
  190                         pci_freecfg((struct pci_devinfo *)dinfo);
  191                         continue;
  192                 }
  193                 pci_add_child(dev, (struct pci_devinfo *)dinfo);
  194 
  195                 /*
  196                  * Some devices don't have an intpin set, but do have
  197                  * interrupts. These are fully specified, and set in the
  198                  * interrupts property, so add that value to the device's
  199                  * resource list.
  200                  */
  201                 if (dinfo->opd_dinfo.cfg.intpin == 0) {
  202                         ofw_pci_intr_t intr[2];
  203                         phandle_t iparent;
  204                         int icells;
  205 
  206                         if (OF_getprop(child, "interrupts", &intr, 
  207                             sizeof(intr)) > 0) {
  208                                 iparent = 0;
  209                                 icells = 1;
  210                                 OF_getprop(child, "interrupt-parent", &iparent,
  211                                     sizeof(iparent));
  212                                 OF_getprop(iparent, "#interrupt-cells", &icells,
  213                                     sizeof(icells));
  214 
  215                                 if (iparent != 0)
  216                                         intr[0] = MAP_IRQ(iparent, intr[0]);
  217 
  218                                 if (iparent != 0 && icells > 1) {
  219                                         powerpc_config_intr(intr[0],
  220                                             (intr[1] & 1) ? INTR_TRIGGER_LEVEL :
  221                                             INTR_TRIGGER_EDGE,
  222                                             INTR_POLARITY_LOW);
  223                                 }
  224 
  225                                 resource_list_add(&dinfo->opd_dinfo.resources,
  226                                     SYS_RES_IRQ, 0, intr[0], intr[0], 1);
  227                         }
  228                 }
  229         }
  230 }
  231 
  232 /*
  233  * The following is an almost exact clone of pci_add_children(), with the
  234  * addition that it (a) will not add children that have already been added,
  235  * and (b) will set up the OFW devinfo to point to invalid values. This is
  236  * to handle non-enumerated PCI children as exist in FDT and on the second
  237  * function of the Rage 128 in my Blue & White G3.
  238  */
  239 
  240 static void
  241 ofw_pcibus_enum_bus(device_t dev, u_int domain, u_int busno)
  242 {
  243         device_t pcib;
  244         struct ofw_pcibus_devinfo *dinfo;
  245         int maxslots;
  246         int s, f, pcifunchigh;
  247         uint8_t hdrtype;
  248 
  249         pcib = device_get_parent(dev);
  250 
  251         maxslots = PCIB_MAXSLOTS(pcib);
  252         for (s = 0; s <= maxslots; s++) {
  253                 pcifunchigh = 0;
  254                 f = 0;
  255                 DELAY(1);
  256                 hdrtype = PCIB_READ_CONFIG(pcib, busno, s, f, PCIR_HDRTYPE, 1);
  257                 if ((hdrtype & PCIM_HDRTYPE) > PCI_MAXHDRTYPE)
  258                         continue;
  259                 if (hdrtype & PCIM_MFDEV)
  260                         pcifunchigh = PCI_FUNCMAX;
  261                 for (f = 0; f <= pcifunchigh; f++) {
  262                         /* Filter devices we have already added */
  263                         if (pci_find_dbsf(domain, busno, s, f) != NULL)
  264                                 continue;
  265 
  266                         dinfo = (struct ofw_pcibus_devinfo *)pci_read_device(
  267                             pcib, domain, busno, s, f, sizeof(*dinfo));
  268                         if (dinfo == NULL)
  269                                 continue;
  270 
  271                         dinfo->opd_obdinfo.obd_node = -1;
  272 
  273                         dinfo->opd_obdinfo.obd_name = NULL;
  274                         dinfo->opd_obdinfo.obd_compat = NULL;
  275                         dinfo->opd_obdinfo.obd_type = NULL;
  276                         dinfo->opd_obdinfo.obd_model = NULL;
  277 
  278                         /*
  279                          * For non OFW-devices, don't believe 0 
  280                          * for an interrupt.
  281                          */
  282                         if (dinfo->opd_dinfo.cfg.intline == 0) {
  283                                 dinfo->opd_dinfo.cfg.intline = PCI_INVALID_IRQ;
  284                                 PCIB_WRITE_CONFIG(pcib, busno, s, f, 
  285                                     PCIR_INTLINE, PCI_INVALID_IRQ, 1);
  286                         }
  287 
  288                         pci_add_child(dev, (struct pci_devinfo *)dinfo);
  289                 }
  290         }
  291 }
  292 
  293 static int
  294 ofw_pcibus_child_pnpinfo_str_method(device_t cbdev, device_t child, char *buf,
  295     size_t buflen)
  296 {
  297         pci_child_pnpinfo_str_method(cbdev, child, buf, buflen);
  298 
  299         if (ofw_bus_get_node(child) != -1)  {
  300                 strlcat(buf, " ", buflen); /* Separate info */
  301                 ofw_bus_gen_child_pnpinfo_str(cbdev, child, buf, buflen);
  302         }
  303 
  304         return (0);
  305 }
  306         
  307 static int
  308 ofw_pcibus_assign_interrupt(device_t dev, device_t child)
  309 {
  310         ofw_pci_intr_t intr;
  311         phandle_t node, iparent;
  312         int isz;
  313 
  314         node = ofw_bus_get_node(child);
  315 
  316         if (node == -1) {
  317                 /* Non-firmware enumerated child, use standard routing */
  318         
  319                 /*
  320                  * XXX: Right now we don't have anything sensible to do here,
  321                  * since the ofw_imap stuff relies on nodes having a reg
  322                  * property. There exist ways around this, so the ePAPR
  323                  * spec will need to be studied.
  324                  */
  325 
  326                 return (PCI_INVALID_IRQ);
  327 
  328 #ifdef NOTYET
  329                 intr = pci_get_intpin(child);
  330                 return (PCIB_ROUTE_INTERRUPT(device_get_parent(dev), child, 
  331                     intr));
  332 #endif
  333         }
  334         
  335         /*
  336          * Try to determine the node's interrupt parent so we know which
  337          * PIC to use.
  338          */
  339 
  340         iparent = -1;
  341         if (OF_getprop(node, "interrupt-parent", &iparent, sizeof(iparent)) < 0)
  342                 iparent = -1;
  343         
  344         /*
  345          * Any AAPL,interrupts property gets priority and is
  346          * fully specified (i.e. does not need routing)
  347          */
  348 
  349         isz = OF_getprop(node, "AAPL,interrupts", &intr, sizeof(intr));
  350         if (isz == sizeof(intr))
  351                 return ((iparent == -1) ? intr : MAP_IRQ(iparent, intr));
  352 
  353         isz = OF_getprop(node, "interrupts", &intr, sizeof(intr));
  354         if (isz == sizeof(intr)) {
  355                 if (iparent != -1)
  356                         intr = MAP_IRQ(iparent, intr);
  357         } else {
  358                 /* No property: our best guess is the intpin. */
  359                 intr = pci_get_intpin(child);
  360         }
  361         
  362         /*
  363          * If we got intr from a property, it may or may not be an intpin.
  364          * For on-board devices, it frequently is not, and is completely out
  365          * of the valid intpin range.  For PCI slots, it hopefully is,
  366          * otherwise we will have trouble interfacing with non-OFW buses
  367          * such as cardbus.
  368          * Since we cannot tell which it is without violating layering, we
  369          * will always use the route_interrupt method, and treat exceptions
  370          * on the level they become apparent.
  371          */
  372         return (PCIB_ROUTE_INTERRUPT(device_get_parent(dev), child, intr));
  373 }
  374 
  375 static const struct ofw_bus_devinfo *
  376 ofw_pcibus_get_devinfo(device_t bus, device_t dev)
  377 {
  378         struct ofw_pcibus_devinfo *dinfo;
  379 
  380         dinfo = device_get_ivars(dev);
  381         return (&dinfo->opd_obdinfo);
  382 }
  383 

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