1 /*-
2 * Copyright 2002 by Peter Grehan. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
6 * are met:
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
12 * 3. The name of the author may not be used to endorse or promote products
13 * derived from this software without specific prior written permission.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
20 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
21 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
22 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
23 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 * $FreeBSD$
28 */
29
30 #ifndef _MACIO_MACIOVAR_H_
31 #define _MACIO_MACIOVAR_H_
32
33 /*
34 * The addr space size
35 * XXX it would be better if this could be determined by querying the
36 * PCI device, but there isn't an access method for this
37 */
38 #define MACIO_REG_SIZE 0x7ffff
39
40 /*
41 * Feature Control Registers (FCR)
42 */
43 #define HEATHROW_FCR 0x38
44 #define KEYLARGO_FCR0 0x38
45 #define KEYLARGO_FCR1 0x3c
46
47 #define FCR_ENET_ENABLE 0x60000000
48 #define FCR_ENET_RESET 0x80000000
49
50 /*
51 * Format of a macio reg property entry.
52 */
53 struct macio_reg {
54 u_int32_t mr_base;
55 u_int32_t mr_size;
56 };
57
58 /*
59 * Per macio device structure.
60 */
61 struct macio_devinfo {
62 int mdi_interrupts[6];
63 int mdi_ninterrupts;
64 int mdi_base;
65 struct ofw_bus_devinfo mdi_obdinfo;
66 struct resource_list mdi_resources;
67 };
68
69 #endif /* _MACIO_MACIOVAR_H_ */
Cache object: 8faf9a4e39b8f215eff1e467e59d00d1
|