1 /*-
2 * Copyright (C) 2002 Benno Rice.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR
15 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
16 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
17 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
18 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
19 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
20 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
21 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
22 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
23 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24 *
25 * $FreeBSD$
26 */
27
28 #ifndef _POWERPC_POWERMAC_UNINORTHVAR_H_
29 #define _POWERPC_POWERMAC_UNINORTHVAR_H_
30
31 #include <powerpc/ofw/ofw_pci.h>
32
33 struct uninorth_softc {
34 struct ofw_pci_softc pci_sc;
35 vm_offset_t sc_addr;
36 vm_offset_t sc_data;
37 int sc_ver;
38 };
39
40 struct unin_chip_softc {
41 u_int32_t sc_physaddr;
42 vm_offset_t sc_addr;
43 u_int32_t sc_size;
44 struct rman sc_mem_rman;
45 int sc_version;
46 };
47
48 /*
49 * Format of a unin reg property entry.
50 */
51 struct unin_chip_reg {
52 u_int32_t mr_base;
53 u_int32_t mr_size;
54 };
55
56 /*
57 * Per unin device structure.
58 */
59 struct unin_chip_devinfo {
60 int udi_interrupts[6];
61 int udi_ninterrupts;
62 int udi_base;
63 struct ofw_bus_devinfo udi_obdinfo;
64 struct resource_list udi_resources;
65 };
66
67 /*
68 * Version register
69 */
70 #define UNIN_VERS 0x0
71
72 /*
73 * Clock-control register
74 */
75 #define UNIN_CLOCKCNTL 0x20
76 #define UNIN_CLOCKCNTL_GMAC 0x2
77
78 /*
79 * Toggle registers
80 */
81 #define UNIN_TOGGLE_REG 0xe0
82 #define UNIN_MPIC_RESET 0x2
83 #define UNIN_MPIC_OUTPUT_ENABLE 0x4
84
85 #endif /* _POWERPC_POWERMAC_UNINORTHVAR_H_ */
Cache object: 5fd4c7558f1b6fde3a7cdc9400f5a5b7
|