The Design and Implementation of the FreeBSD Operating System, Second Edition
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FreeBSD/Linux Kernel Cross Reference
sys/powerpc/powerpc/bus_machdep.c

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    1 /*-
    2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
    3  *
    4  * Copyright (c) 2006 Semihalf, Rafal Jaworowski <raj@semihalf.com>
    5  * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc.
    6  * All rights reserved.
    7  *
    8  * This code is derived from software contributed to The NetBSD Foundation
    9  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
   10  * NASA Ames Research Center.
   11  *
   12  * Redistribution and use in source and binary forms, with or without
   13  * modification, are permitted provided that the following conditions
   14  * are met:
   15  * 1. Redistributions of source code must retain the above copyright
   16  *    notice, this list of conditions and the following disclaimer.
   17  * 2. Redistributions in binary form must reproduce the above copyright
   18  *    notice, this list of conditions and the following disclaimer in the
   19  *    documentation and/or other materials provided with the distribution.
   20  *
   21  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
   22  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
   23  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
   24  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
   25  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
   26  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
   27  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
   28  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
   29  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
   30  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
   31  * POSSIBILITY OF SUCH DAMAGE.
   32  */
   33 
   34 #include <sys/cdefs.h>
   35 __FBSDID("$FreeBSD$");
   36 
   37 #define KTR_BE_IO       0
   38 #define KTR_LE_IO       0
   39 
   40 #include <sys/param.h>
   41 #include <sys/systm.h>
   42 #include <sys/bus.h>
   43 #include <sys/ktr.h>
   44 #include <vm/vm.h>
   45 #include <vm/pmap.h>
   46 #include <sys/endian.h>
   47 
   48 #include <machine/bus.h>
   49 #include <machine/pio.h>
   50 #include <machine/md_var.h>
   51 
   52 #define TODO panic("%s: not implemented", __func__)
   53 
   54 #define MAX_EARLYBOOT_MAPPINGS  6
   55 
   56 static struct {
   57         vm_offset_t virt;
   58         bus_addr_t addr;
   59         bus_size_t size;
   60         int flags;
   61 } earlyboot_mappings[MAX_EARLYBOOT_MAPPINGS];
   62 static int earlyboot_map_idx = 0;
   63 
   64 void bs_remap_earlyboot(void);
   65 
   66 static __inline void *
   67 __ppc_ba(bus_space_handle_t bsh, bus_size_t ofs)
   68 {
   69         return ((void *)(bsh + ofs));
   70 }
   71 
   72 static int
   73 bs_gen_map(bus_addr_t addr, bus_size_t size, int flags,
   74     bus_space_handle_t *bshp)
   75 {
   76         vm_memattr_t ma;
   77 
   78         /*
   79          * Record what we did if we haven't enabled the MMU yet. We
   80          * will need to remap it as soon as the MMU comes up.
   81          */
   82         if (!pmap_bootstrapped) {
   83                 KASSERT(earlyboot_map_idx < MAX_EARLYBOOT_MAPPINGS,
   84                     ("%s: too many early boot mapping requests", __func__));
   85                 earlyboot_mappings[earlyboot_map_idx].addr = addr;
   86                 earlyboot_mappings[earlyboot_map_idx].virt =
   87                     pmap_early_io_map(addr, size);
   88                 earlyboot_mappings[earlyboot_map_idx].size = size;
   89                 earlyboot_mappings[earlyboot_map_idx].flags = flags;
   90                 *bshp = earlyboot_mappings[earlyboot_map_idx].virt;
   91                 earlyboot_map_idx++;
   92         } else {
   93                 ma = VM_MEMATTR_DEFAULT;
   94                 switch (flags) {
   95                         case BUS_SPACE_MAP_CACHEABLE:
   96                                 ma = VM_MEMATTR_CACHEABLE;
   97                                 break;
   98                         case BUS_SPACE_MAP_PREFETCHABLE:
   99                                 ma = VM_MEMATTR_PREFETCHABLE;
  100                                 break;
  101                 }
  102                 *bshp = (bus_space_handle_t)pmap_mapdev_attr(addr, size, ma);
  103         }
  104 
  105         return (0);
  106 }
  107 
  108 void
  109 bs_remap_earlyboot(void)
  110 {
  111         vm_paddr_t pa, spa;
  112         vm_offset_t va;
  113         int i;
  114         vm_memattr_t ma;
  115 
  116         for (i = 0; i < earlyboot_map_idx; i++) {
  117                 spa = earlyboot_mappings[i].addr;
  118 
  119                 if (hw_direct_map &&
  120                    PHYS_TO_DMAP(spa) == earlyboot_mappings[i].virt &&
  121                    pmap_dev_direct_mapped(spa, earlyboot_mappings[i].size) == 0)
  122                         continue;
  123 
  124                 ma = VM_MEMATTR_DEFAULT;
  125                 switch (earlyboot_mappings[i].flags) {
  126                         case BUS_SPACE_MAP_CACHEABLE:
  127                                 ma = VM_MEMATTR_CACHEABLE;
  128                                 break;
  129                         case BUS_SPACE_MAP_PREFETCHABLE:
  130                                 ma = VM_MEMATTR_PREFETCHABLE;
  131                                 break;
  132                 }
  133 
  134                 pa = trunc_page(spa);
  135                 va = trunc_page(earlyboot_mappings[i].virt);
  136                 while (pa < spa + earlyboot_mappings[i].size) {
  137                         pmap_kenter_attr(va, pa, ma);
  138                         va += PAGE_SIZE;
  139                         pa += PAGE_SIZE;
  140                 }
  141         }
  142 }
  143 
  144 static void
  145 bs_gen_unmap(bus_size_t size __unused)
  146 {
  147 }
  148 
  149 static int
  150 bs_gen_subregion(bus_space_handle_t bsh, bus_size_t ofs,
  151     bus_size_t size __unused, bus_space_handle_t *nbshp)
  152 {
  153         *nbshp = bsh + ofs;
  154         return (0);
  155 }
  156 
  157 static int
  158 bs_gen_alloc(bus_addr_t rstart __unused, bus_addr_t rend __unused,
  159     bus_size_t size __unused, bus_size_t alignment __unused,
  160     bus_size_t boundary __unused, int flags __unused,
  161     bus_addr_t *bpap __unused, bus_space_handle_t *bshp __unused)
  162 {
  163         TODO;
  164 }
  165 
  166 static void
  167 bs_gen_free(bus_space_handle_t bsh __unused, bus_size_t size __unused)
  168 {
  169         TODO;
  170 }
  171 
  172 static void
  173 bs_gen_barrier(bus_space_handle_t bsh __unused, bus_size_t ofs __unused,
  174     bus_size_t size __unused, int flags __unused)
  175 {
  176 
  177         powerpc_iomb();
  178 }
  179 
  180 /*
  181  * Big-endian access functions
  182  */
  183 static uint8_t
  184 bs_be_rs_1(bus_space_handle_t bsh, bus_size_t ofs)
  185 {
  186         volatile uint8_t *addr;
  187         uint8_t res;
  188 
  189         addr = __ppc_ba(bsh, ofs);
  190         res = *addr;
  191         powerpc_iomb();
  192         CTR4(KTR_BE_IO, "%s(bsh=%#x, ofs=%#x) = %#x", __func__, bsh, ofs, res);
  193         return (res);
  194 }
  195 
  196 static uint16_t
  197 bs_be_rs_2(bus_space_handle_t bsh, bus_size_t ofs)
  198 {
  199         volatile uint16_t *addr;
  200         uint16_t res;
  201 
  202         addr = __ppc_ba(bsh, ofs);
  203         res = *addr;
  204         powerpc_iomb();
  205         CTR4(KTR_BE_IO, "%s(bsh=%#x, ofs=%#x) = %#x", __func__, bsh, ofs, res);
  206         return (res);
  207 }
  208 
  209 static uint32_t
  210 bs_be_rs_4(bus_space_handle_t bsh, bus_size_t ofs)
  211 {
  212         volatile uint32_t *addr;
  213         uint32_t res;
  214 
  215         addr = __ppc_ba(bsh, ofs);
  216         res = *addr;
  217         powerpc_iomb();
  218         CTR4(KTR_BE_IO, "%s(bsh=%#x, ofs=%#x) = %#x", __func__, bsh, ofs, res);
  219         return (res);
  220 }
  221 
  222 static uint64_t
  223 bs_be_rs_8(bus_space_handle_t bsh, bus_size_t ofs)
  224 {
  225         volatile uint64_t *addr;
  226         uint64_t res;
  227 
  228         addr = __ppc_ba(bsh, ofs);
  229         res = *addr;
  230         powerpc_iomb();
  231         return (res);
  232 }
  233 
  234 static void
  235 bs_be_rm_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t *addr, size_t cnt)
  236 {
  237         ins8(__ppc_ba(bsh, ofs), addr, cnt);
  238 }
  239 
  240 static void
  241 bs_be_rm_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t *addr, size_t cnt)
  242 {
  243         ins16(__ppc_ba(bsh, ofs), addr, cnt);
  244 }
  245 
  246 static void
  247 bs_be_rm_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t *addr, size_t cnt)
  248 {
  249         ins32(__ppc_ba(bsh, ofs), addr, cnt);
  250 }
  251 
  252 static void
  253 bs_be_rm_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t *addr, size_t cnt)
  254 {
  255         ins64(__ppc_ba(bsh, ofs), addr, cnt);
  256 }
  257 
  258 static void
  259 bs_be_rr_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t *addr, size_t cnt)
  260 {
  261         volatile uint8_t *s = __ppc_ba(bsh, ofs);
  262 
  263         while (cnt--)
  264                 *addr++ = *s++;
  265         powerpc_iomb();
  266 }
  267 
  268 static void
  269 bs_be_rr_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t *addr, size_t cnt)
  270 {
  271         volatile uint16_t *s = __ppc_ba(bsh, ofs);
  272 
  273         while (cnt--)
  274                 *addr++ = *s++;
  275         powerpc_iomb();
  276 }
  277 
  278 static void
  279 bs_be_rr_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t *addr, size_t cnt)
  280 {
  281         volatile uint32_t *s = __ppc_ba(bsh, ofs);
  282 
  283         while (cnt--)
  284                 *addr++ = *s++;
  285         powerpc_iomb();
  286 }
  287 
  288 static void
  289 bs_be_rr_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t *addr, size_t cnt)
  290 {
  291         volatile uint64_t *s = __ppc_ba(bsh, ofs);
  292 
  293         while (cnt--)
  294                 *addr++ = *s++;
  295         powerpc_iomb();
  296 }
  297 
  298 static void
  299 bs_be_ws_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t val)
  300 {
  301         volatile uint8_t *addr;
  302 
  303         addr = __ppc_ba(bsh, ofs);
  304         *addr = val;
  305         powerpc_iomb();
  306         CTR4(KTR_BE_IO, "%s(bsh=%#x, ofs=%#x, val=%#x)", __func__, bsh, ofs, val);
  307 }
  308 
  309 static void
  310 bs_be_ws_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t val)
  311 {
  312         volatile uint16_t *addr;
  313 
  314         addr = __ppc_ba(bsh, ofs);
  315         *addr = val;
  316         powerpc_iomb();
  317         CTR4(KTR_BE_IO, "%s(bsh=%#x, ofs=%#x, val=%#x)", __func__, bsh, ofs, val);
  318 }
  319 
  320 static void
  321 bs_be_ws_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t val)
  322 {
  323         volatile uint32_t *addr;
  324 
  325         addr = __ppc_ba(bsh, ofs);
  326         *addr = val;
  327         powerpc_iomb();
  328         CTR4(KTR_BE_IO, "%s(bsh=%#x, ofs=%#x, val=%#x)", __func__, bsh, ofs, val);
  329 }
  330 
  331 static void
  332 bs_be_ws_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t val)
  333 {
  334         volatile uint64_t *addr;
  335 
  336         addr = __ppc_ba(bsh, ofs);
  337         *addr = val;
  338         powerpc_iomb();
  339         CTR4(KTR_BE_IO, "%s(bsh=%#x, ofs=%#x, val=%#x)", __func__, bsh, ofs, val);
  340 }
  341 
  342 static void
  343 bs_be_wm_1(bus_space_handle_t bsh, bus_size_t ofs, const uint8_t *addr,
  344     bus_size_t cnt)
  345 {
  346         outsb(__ppc_ba(bsh, ofs), addr, cnt);
  347 }
  348 
  349 static void
  350 bs_be_wm_2(bus_space_handle_t bsh, bus_size_t ofs, const uint16_t *addr,
  351     bus_size_t cnt)
  352 {
  353         outsw(__ppc_ba(bsh, ofs), addr, cnt);
  354 }
  355 
  356 static void
  357 bs_be_wm_4(bus_space_handle_t bsh, bus_size_t ofs, const uint32_t *addr,
  358     bus_size_t cnt)
  359 {
  360         outsl(__ppc_ba(bsh, ofs), addr, cnt);
  361 }
  362 
  363 static void
  364 bs_be_wm_8(bus_space_handle_t bsh, bus_size_t ofs, const uint64_t *addr,
  365     bus_size_t cnt)
  366 {
  367         outsll(__ppc_ba(bsh, ofs), addr, cnt);
  368 }
  369 
  370 static void
  371 bs_be_wr_1(bus_space_handle_t bsh, bus_size_t ofs, const uint8_t *addr,
  372     size_t cnt)
  373 {
  374         volatile uint8_t *d = __ppc_ba(bsh, ofs);
  375 
  376         while (cnt--)
  377                 *d++ = *addr++;
  378         powerpc_iomb();
  379 }
  380 
  381 static void
  382 bs_be_wr_2(bus_space_handle_t bsh, bus_size_t ofs, const uint16_t *addr,
  383     size_t cnt)
  384 {
  385         volatile uint16_t *d = __ppc_ba(bsh, ofs);
  386 
  387         while (cnt--)
  388                 *d++ = *addr++;
  389         powerpc_iomb();
  390 }
  391 
  392 static void
  393 bs_be_wr_4(bus_space_handle_t bsh, bus_size_t ofs, const uint32_t *addr,
  394     size_t cnt)
  395 {
  396         volatile uint32_t *d = __ppc_ba(bsh, ofs);
  397 
  398         while (cnt--)
  399                 *d++ = *addr++;
  400         powerpc_iomb();
  401 }
  402 
  403 static void
  404 bs_be_wr_8(bus_space_handle_t bsh, bus_size_t ofs, const uint64_t *addr,
  405     size_t cnt)
  406 {
  407         volatile uint64_t *d = __ppc_ba(bsh, ofs);
  408 
  409         while (cnt--)
  410                 *d++ = *addr++;
  411         powerpc_iomb();
  412 }
  413 
  414 static void
  415 bs_be_sm_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t val, size_t cnt)
  416 {
  417         volatile uint8_t *d = __ppc_ba(bsh, ofs);
  418 
  419         while (cnt--)
  420                 *d = val;
  421         powerpc_iomb();
  422 }
  423 
  424 static void
  425 bs_be_sm_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t val, size_t cnt)
  426 {
  427         volatile uint16_t *d = __ppc_ba(bsh, ofs);
  428 
  429         while (cnt--)
  430                 *d = val;
  431         powerpc_iomb();
  432 }
  433 
  434 static void
  435 bs_be_sm_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t val, size_t cnt)
  436 {
  437         volatile uint32_t *d = __ppc_ba(bsh, ofs);
  438 
  439         while (cnt--)
  440                 *d = val;
  441         powerpc_iomb();
  442 }
  443 
  444 static void
  445 bs_be_sm_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t val, size_t cnt)
  446 {
  447         volatile uint64_t *d = __ppc_ba(bsh, ofs);
  448 
  449         while (cnt--)
  450                 *d = val;
  451         powerpc_iomb();
  452 }
  453 
  454 static void
  455 bs_be_sr_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t val, size_t cnt)
  456 {
  457         volatile uint8_t *d = __ppc_ba(bsh, ofs);
  458 
  459         while (cnt--)
  460                 *d++ = val;
  461         powerpc_iomb();
  462 }
  463 
  464 static void
  465 bs_be_sr_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t val, size_t cnt)
  466 {
  467         volatile uint16_t *d = __ppc_ba(bsh, ofs);
  468 
  469         while (cnt--)
  470                 *d++ = val;
  471         powerpc_iomb();
  472 }
  473 
  474 static void
  475 bs_be_sr_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t val, size_t cnt)
  476 {
  477         volatile uint32_t *d = __ppc_ba(bsh, ofs);
  478 
  479         while (cnt--)
  480                 *d++ = val;
  481         powerpc_iomb();
  482 }
  483 
  484 static void
  485 bs_be_sr_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t val, size_t cnt)
  486 {
  487         volatile uint64_t *d = __ppc_ba(bsh, ofs);
  488 
  489         while (cnt--)
  490                 *d++ = val;
  491         powerpc_iomb();
  492 }
  493 
  494 /*
  495  * Little-endian access functions
  496  */
  497 static uint8_t
  498 bs_le_rs_1(bus_space_handle_t bsh, bus_size_t ofs)
  499 {
  500         volatile uint8_t *addr;
  501         uint8_t res;
  502 
  503         addr = __ppc_ba(bsh, ofs);
  504         res = *addr;
  505         powerpc_iomb();
  506         CTR4(KTR_LE_IO, "%s(bsh=%#x, ofs=%#x) = %#x", __func__, bsh, ofs, res);
  507         return (res);
  508 }
  509 
  510 static uint16_t
  511 bs_le_rs_2(bus_space_handle_t bsh, bus_size_t ofs)
  512 {
  513         volatile uint16_t *addr;
  514         uint16_t res;
  515 
  516         addr = __ppc_ba(bsh, ofs);
  517         __asm __volatile("lhbrx %0, 0, %1" : "=r"(res) : "r"(addr));
  518         powerpc_iomb();
  519         CTR4(KTR_LE_IO, "%s(bsh=%#x, ofs=%#x) = %#x", __func__, bsh, ofs, res);
  520         return (res);
  521 }
  522 
  523 static uint32_t
  524 bs_le_rs_4(bus_space_handle_t bsh, bus_size_t ofs)
  525 {
  526         volatile uint32_t *addr;
  527         uint32_t res;
  528 
  529         addr = __ppc_ba(bsh, ofs);
  530         __asm __volatile("lwbrx %0, 0, %1" : "=r"(res) : "r"(addr));
  531         powerpc_iomb();
  532         CTR4(KTR_LE_IO, "%s(bsh=%#x, ofs=%#x) = %#x", __func__, bsh, ofs, res);
  533         return (res);
  534 }
  535 
  536 static uint64_t
  537 bs_le_rs_8(bus_space_handle_t bsh, bus_size_t ofs)
  538 {
  539         volatile uint64_t *addr;
  540         uint64_t res;
  541 
  542         addr = __ppc_ba(bsh, ofs);
  543         res = le64toh(*addr);
  544         powerpc_iomb();
  545         CTR4(KTR_LE_IO, "%s(bsh=%#x, ofs=%#x) = %#x", __func__, bsh, ofs, res);
  546         return (res);
  547 }
  548 
  549 static void
  550 bs_le_rm_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t *addr, size_t cnt)
  551 {
  552         ins8(__ppc_ba(bsh, ofs), addr, cnt);
  553 }
  554 
  555 static void
  556 bs_le_rm_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t *addr, size_t cnt)
  557 {
  558         ins16rb(__ppc_ba(bsh, ofs), addr, cnt);
  559 }
  560 
  561 static void
  562 bs_le_rm_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t *addr, size_t cnt)
  563 {
  564         ins32rb(__ppc_ba(bsh, ofs), addr, cnt);
  565 }
  566 
  567 static void
  568 bs_le_rm_8(bus_space_handle_t bshh, bus_size_t ofs, uint64_t *addr, size_t cnt)
  569 {
  570         TODO;
  571 }
  572 
  573 static void
  574 bs_le_rr_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t *addr, size_t cnt)
  575 {
  576         volatile uint8_t *s = __ppc_ba(bsh, ofs);
  577 
  578         while (cnt--)
  579                 *addr++ = *s++;
  580         powerpc_iomb();
  581 }
  582 
  583 static void
  584 bs_le_rr_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t *addr, size_t cnt)
  585 {
  586         volatile uint16_t *s = __ppc_ba(bsh, ofs);
  587 
  588         while (cnt--)
  589                 *addr++ = in16rb(s++);
  590         powerpc_iomb();
  591 }
  592 
  593 static void
  594 bs_le_rr_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t *addr, size_t cnt)
  595 {
  596         volatile uint32_t *s = __ppc_ba(bsh, ofs);
  597 
  598         while (cnt--)
  599                 *addr++ = in32rb(s++);
  600         powerpc_iomb();
  601 }
  602 
  603 static void
  604 bs_le_rr_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t *addr, size_t cnt)
  605 {
  606         TODO;
  607 }
  608 
  609 static void
  610 bs_le_ws_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t val)
  611 {
  612         volatile uint8_t *addr;
  613 
  614         addr = __ppc_ba(bsh, ofs);
  615         *addr = val;
  616         powerpc_iomb();
  617         CTR4(KTR_LE_IO, "%s(bsh=%#x, ofs=%#x, val=%#x)", __func__, bsh, ofs, val);
  618 }
  619 
  620 static void
  621 bs_le_ws_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t val)
  622 {
  623         volatile uint16_t *addr;
  624  
  625         addr = __ppc_ba(bsh, ofs);
  626         __asm __volatile("sthbrx %0, 0, %1" :: "r"(val), "r"(addr));
  627         powerpc_iomb();
  628         CTR4(KTR_LE_IO, "%s(bsh=%#x, ofs=%#x, val=%#x)", __func__, bsh, ofs, val);
  629 }
  630 
  631 static void
  632 bs_le_ws_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t val)
  633 {
  634         volatile uint32_t *addr;
  635 
  636         addr = __ppc_ba(bsh, ofs);
  637         __asm __volatile("stwbrx %0, 0, %1" :: "r"(val), "r"(addr));
  638         powerpc_iomb();
  639         CTR4(KTR_LE_IO, "%s(bsh=%#x, ofs=%#x, val=%#x)", __func__, bsh, ofs, val);
  640 }
  641 
  642 static void
  643 bs_le_ws_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t val)
  644 {
  645         volatile uint64_t *addr;
  646 
  647         addr = __ppc_ba(bsh, ofs);
  648         *addr = htole64(val);
  649         powerpc_iomb();
  650         CTR4(KTR_LE_IO, "%s(bsh=%#x, ofs=%#x, val=%#x)", __func__, bsh, ofs, val);
  651 }
  652 
  653 static void
  654 bs_le_wm_1(bus_space_handle_t bsh, bus_size_t ofs, const uint8_t *addr,
  655     bus_size_t cnt)
  656 {
  657         outs8(__ppc_ba(bsh, ofs), addr, cnt);
  658 }
  659 
  660 static void
  661 bs_le_wm_2(bus_space_handle_t bsh, bus_size_t ofs, const uint16_t *addr,
  662     bus_size_t cnt)
  663 {
  664         outs16rb(__ppc_ba(bsh, ofs), addr, cnt);
  665 }
  666 
  667 static void
  668 bs_le_wm_4(bus_space_handle_t bsh, bus_size_t ofs, const uint32_t *addr,
  669     bus_size_t cnt)
  670 {
  671         outs32rb(__ppc_ba(bsh, ofs), addr, cnt);
  672 }
  673 
  674 static void
  675 bs_le_wm_8(bus_space_handle_t bsh, bus_size_t ofs, const uint64_t *addr,
  676     bus_size_t cnt)
  677 {
  678         TODO;
  679 }
  680 
  681 static void
  682 bs_le_wr_1(bus_space_handle_t bsh, bus_size_t ofs, const uint8_t *addr,
  683     size_t cnt)
  684 {
  685         volatile uint8_t *d = __ppc_ba(bsh, ofs);
  686 
  687         while (cnt--)
  688                 *d++ = *addr++;
  689         powerpc_iomb();
  690 }
  691 
  692 static void
  693 bs_le_wr_2(bus_space_handle_t bsh, bus_size_t ofs, const uint16_t *addr,
  694     size_t cnt)
  695 {
  696         volatile uint16_t *d = __ppc_ba(bsh, ofs);
  697 
  698         while (cnt--)
  699                 out16rb(d++, *addr++);
  700         powerpc_iomb();
  701 }
  702 
  703 static void
  704 bs_le_wr_4(bus_space_handle_t bsh, bus_size_t ofs, const uint32_t *addr,
  705     size_t cnt)
  706 {
  707         volatile uint32_t *d = __ppc_ba(bsh, ofs);
  708 
  709         while (cnt--)
  710                 out32rb(d++, *addr++);
  711         powerpc_iomb();
  712 }
  713 
  714 static void
  715 bs_le_wr_8(bus_space_handle_t bsh, bus_size_t ofs, const uint64_t *addr,
  716     size_t cnt)
  717 {
  718         TODO;
  719 }
  720 
  721 static void
  722 bs_le_sm_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t val, size_t cnt)
  723 {
  724         volatile uint8_t *d = __ppc_ba(bsh, ofs);
  725 
  726         while (cnt--)
  727                 *d = val;
  728         powerpc_iomb();
  729 }
  730 
  731 static void
  732 bs_le_sm_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t val, size_t cnt)
  733 {
  734         volatile uint16_t *d = __ppc_ba(bsh, ofs);
  735 
  736         while (cnt--)
  737                 out16rb(d, val);
  738         powerpc_iomb();
  739 }
  740 
  741 static void
  742 bs_le_sm_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t val, size_t cnt)
  743 {
  744         volatile uint32_t *d = __ppc_ba(bsh, ofs);
  745 
  746         while (cnt--)
  747                 out32rb(d, val);
  748         powerpc_iomb();
  749 }
  750 
  751 static void
  752 bs_le_sm_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t val, size_t cnt)
  753 {
  754         TODO;
  755 }
  756 
  757 static void
  758 bs_le_sr_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t val, size_t cnt)
  759 {
  760         volatile uint8_t *d = __ppc_ba(bsh, ofs);
  761 
  762         while (cnt--)
  763                 *d++ = val;
  764         powerpc_iomb();
  765 }
  766 
  767 static void
  768 bs_le_sr_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t val, size_t cnt)
  769 {
  770         volatile uint16_t *d = __ppc_ba(bsh, ofs);
  771 
  772         while (cnt--)
  773                 out16rb(d++, val);
  774         powerpc_iomb();
  775 }
  776 
  777 static void
  778 bs_le_sr_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t val, size_t cnt)
  779 {
  780         volatile uint32_t *d = __ppc_ba(bsh, ofs);
  781 
  782         while (cnt--)
  783                 out32rb(d++, val);
  784         powerpc_iomb();
  785 }
  786 
  787 static void
  788 bs_le_sr_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t val, size_t cnt)
  789 {
  790         TODO;
  791 }
  792 
  793 struct bus_space bs_be_tag = {
  794         /* mapping/unmapping */
  795         bs_gen_map,
  796         bs_gen_unmap,
  797         bs_gen_subregion,
  798 
  799         /* allocation/deallocation */
  800         bs_gen_alloc,
  801         bs_gen_free,
  802 
  803         /* barrier */
  804         bs_gen_barrier,
  805 
  806         /* read (single) */
  807         bs_be_rs_1,
  808         bs_be_rs_2,
  809         bs_be_rs_4,
  810         bs_be_rs_8,
  811 
  812         bs_be_rs_2,
  813         bs_be_rs_4,
  814         bs_be_rs_8,
  815 
  816         /* read multiple */
  817         bs_be_rm_1,
  818         bs_be_rm_2,
  819         bs_be_rm_4,
  820         bs_be_rm_8,
  821 
  822         bs_be_rm_2,
  823         bs_be_rm_4,
  824         bs_be_rm_8,
  825 
  826         /* read region */
  827         bs_be_rr_1,
  828         bs_be_rr_2,
  829         bs_be_rr_4,
  830         bs_be_rr_8,
  831 
  832         bs_be_rr_2,
  833         bs_be_rr_4,
  834         bs_be_rr_8,
  835 
  836         /* write (single) */
  837         bs_be_ws_1,
  838         bs_be_ws_2,
  839         bs_be_ws_4,
  840         bs_be_ws_8,
  841 
  842         bs_be_ws_2,
  843         bs_be_ws_4,
  844         bs_be_ws_8,
  845 
  846         /* write multiple */
  847         bs_be_wm_1,
  848         bs_be_wm_2,
  849         bs_be_wm_4,
  850         bs_be_wm_8,
  851 
  852         bs_be_wm_2,
  853         bs_be_wm_4,
  854         bs_be_wm_8,
  855 
  856         /* write region */
  857         bs_be_wr_1,
  858         bs_be_wr_2,
  859         bs_be_wr_4,
  860         bs_be_wr_8,
  861 
  862         bs_be_wr_2,
  863         bs_be_wr_4,
  864         bs_be_wr_8,
  865 
  866         /* set multiple */
  867         bs_be_sm_1,
  868         bs_be_sm_2,
  869         bs_be_sm_4,
  870         bs_be_sm_8,
  871 
  872         bs_be_sm_2,
  873         bs_be_sm_4,
  874         bs_be_sm_8,
  875 
  876         /* set region */
  877         bs_be_sr_1,
  878         bs_be_sr_2,
  879         bs_be_sr_4,
  880         bs_be_sr_8,
  881 
  882         bs_be_sr_2,
  883         bs_be_sr_4,
  884         bs_be_sr_8,
  885 };
  886 
  887 struct bus_space bs_le_tag = {
  888         /* mapping/unmapping */
  889         bs_gen_map,
  890         bs_gen_unmap,
  891         bs_gen_subregion,
  892 
  893         /* allocation/deallocation */
  894         bs_gen_alloc,
  895         bs_gen_free,
  896 
  897         /* barrier */
  898         bs_gen_barrier,
  899 
  900         /* read (single) */
  901         bs_le_rs_1,
  902         bs_le_rs_2,
  903         bs_le_rs_4,
  904         bs_le_rs_8,
  905 
  906         bs_be_rs_2,
  907         bs_be_rs_4,
  908         bs_be_rs_8,
  909 
  910         /* read multiple */
  911         bs_le_rm_1,
  912         bs_le_rm_2,
  913         bs_le_rm_4,
  914         bs_le_rm_8,
  915 
  916         bs_be_rm_2,
  917         bs_be_rm_4,
  918         bs_be_rm_8,
  919 
  920         /* read region */
  921         bs_le_rr_1,
  922         bs_le_rr_2,
  923         bs_le_rr_4,
  924         bs_le_rr_8,
  925 
  926         bs_be_rr_2,
  927         bs_be_rr_4,
  928         bs_be_rr_8,
  929 
  930         /* write (single) */
  931         bs_le_ws_1,
  932         bs_le_ws_2,
  933         bs_le_ws_4,
  934         bs_le_ws_8,
  935 
  936         bs_be_ws_2,
  937         bs_be_ws_4,
  938         bs_be_ws_8,
  939 
  940         /* write multiple */
  941         bs_le_wm_1,
  942         bs_le_wm_2,
  943         bs_le_wm_4,
  944         bs_le_wm_8,
  945 
  946         bs_be_wm_2,
  947         bs_be_wm_4,
  948         bs_be_wm_8,
  949 
  950         /* write region */
  951         bs_le_wr_1,
  952         bs_le_wr_2,
  953         bs_le_wr_4,
  954         bs_le_wr_8,
  955 
  956         bs_be_wr_2,
  957         bs_be_wr_4,
  958         bs_be_wr_8,
  959 
  960         /* set multiple */
  961         bs_le_sm_1,
  962         bs_le_sm_2,
  963         bs_le_sm_4,
  964         bs_le_sm_8,
  965 
  966         bs_be_sm_2,
  967         bs_be_sm_4,
  968         bs_be_sm_8,
  969 
  970         /* set region */
  971         bs_le_sr_1,
  972         bs_le_sr_2,
  973         bs_le_sr_4,
  974         bs_le_sr_8,
  975 
  976         bs_be_sr_2,
  977         bs_be_sr_4,
  978         bs_be_sr_8,
  979 };

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