1 /*-
2 * Copyright (c) 2006 Semihalf, Rafal Jaworowski <raj@semihalf.com>
3 * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc.
4 * All rights reserved.
5 *
6 * This code is derived from software contributed to The NetBSD Foundation
7 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
8 * NASA Ames Research Center.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the NetBSD
21 * Foundation, Inc. and its contributors.
22 * 4. Neither the name of The NetBSD Foundation nor the names of its
23 * contributors may be used to endorse or promote products derived
24 * from this software without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 * POSSIBILITY OF SUCH DAMAGE.
37 */
38
39 #include <sys/cdefs.h>
40 __FBSDID("$FreeBSD: releng/9.0/sys/powerpc/powerpc/bus_machdep.c 226567 2011-10-20 15:34:17Z nwhitehorn $");
41
42 #define KTR_BE_IO 0
43 #define KTR_LE_IO 0
44
45 #include <sys/param.h>
46 #include <sys/systm.h>
47 #include <sys/bus.h>
48 #include <sys/ktr.h>
49 #include <vm/vm.h>
50 #include <vm/pmap.h>
51
52 #include <machine/bus.h>
53 #include <machine/pio.h>
54 #include <machine/md_var.h>
55
56 #define TODO panic("%s: not implemented", __func__)
57
58 #define MAX_EARLYBOOT_MAPPINGS 6
59
60 static struct {
61 bus_addr_t addr;
62 bus_size_t size;
63 int flags;
64 } earlyboot_mappings[MAX_EARLYBOOT_MAPPINGS];
65 static int earlyboot_map_idx = 0;
66
67 void bs_remap_earlyboot(void);
68
69 static __inline void *
70 __ppc_ba(bus_space_handle_t bsh, bus_size_t ofs)
71 {
72 return ((void *)(bsh + ofs));
73 }
74
75 static int
76 bs_gen_map(bus_addr_t addr, bus_size_t size, int flags,
77 bus_space_handle_t *bshp)
78 {
79 vm_memattr_t ma;
80
81 /*
82 * Record what we did if we haven't enabled the MMU yet. We
83 * will need to remap it as soon as the MMU comes up.
84 */
85 if (!pmap_bootstrapped) {
86 KASSERT(earlyboot_map_idx < MAX_EARLYBOOT_MAPPINGS,
87 ("%s: too many early boot mapping requests", __func__));
88 earlyboot_mappings[earlyboot_map_idx].addr = addr;
89 earlyboot_mappings[earlyboot_map_idx].size = size;
90 earlyboot_mappings[earlyboot_map_idx].flags = flags;
91 earlyboot_map_idx++;
92 *bshp = addr;
93 } else {
94 ma = VM_MEMATTR_DEFAULT;
95 switch (flags) {
96 case BUS_SPACE_MAP_CACHEABLE:
97 ma = VM_MEMATTR_CACHEABLE;
98 break;
99 case BUS_SPACE_MAP_PREFETCHABLE:
100 ma = VM_MEMATTR_PREFETCHABLE;
101 break;
102 }
103 *bshp = (bus_space_handle_t)pmap_mapdev_attr(addr, size, ma);
104 }
105
106 return (0);
107 }
108
109 void
110 bs_remap_earlyboot(void)
111 {
112 int i;
113 vm_offset_t pa, spa;
114 vm_memattr_t ma;
115
116 for (i = 0; i < earlyboot_map_idx; i++) {
117 spa = earlyboot_mappings[i].addr;
118 if (pmap_dev_direct_mapped(spa, earlyboot_mappings[i].size)
119 == 0)
120 continue;
121
122 ma = VM_MEMATTR_DEFAULT;
123 switch (earlyboot_mappings[i].flags) {
124 case BUS_SPACE_MAP_CACHEABLE:
125 ma = VM_MEMATTR_CACHEABLE;
126 break;
127 case BUS_SPACE_MAP_PREFETCHABLE:
128 ma = VM_MEMATTR_PREFETCHABLE;
129 break;
130 }
131
132 pa = trunc_page(spa);
133 while (pa < spa + earlyboot_mappings[i].size) {
134 pmap_kenter_attr(pa, pa, ma);
135 pa += PAGE_SIZE;
136 }
137 }
138 }
139
140 static void
141 bs_gen_unmap(bus_size_t size __unused)
142 {
143 }
144
145 static int
146 bs_gen_subregion(bus_space_handle_t bsh, bus_size_t ofs,
147 bus_size_t size __unused, bus_space_handle_t *nbshp)
148 {
149 *nbshp = bsh + ofs;
150 return (0);
151 }
152
153 static int
154 bs_gen_alloc(bus_addr_t rstart __unused, bus_addr_t rend __unused,
155 bus_size_t size __unused, bus_size_t alignment __unused,
156 bus_size_t boundary __unused, int flags __unused,
157 bus_addr_t *bpap __unused, bus_space_handle_t *bshp __unused)
158 {
159 TODO;
160 }
161
162 static void
163 bs_gen_free(bus_space_handle_t bsh __unused, bus_size_t size __unused)
164 {
165 TODO;
166 }
167
168 static void
169 bs_gen_barrier(bus_space_handle_t bsh __unused, bus_size_t ofs __unused,
170 bus_size_t size __unused, int flags __unused)
171 {
172 __asm __volatile("eieio; sync" : : : "memory");
173 }
174
175 /*
176 * Big-endian access functions
177 */
178 static uint8_t
179 bs_be_rs_1(bus_space_handle_t bsh, bus_size_t ofs)
180 {
181 volatile uint8_t *addr;
182 uint8_t res;
183
184 addr = __ppc_ba(bsh, ofs);
185 res = *addr;
186 CTR4(KTR_BE_IO, "%s(bsh=%#x, ofs=%#x) = %#x", __func__, bsh, ofs, res);
187 return (res);
188 }
189
190 static uint16_t
191 bs_be_rs_2(bus_space_handle_t bsh, bus_size_t ofs)
192 {
193 volatile uint16_t *addr;
194 uint16_t res;
195
196 addr = __ppc_ba(bsh, ofs);
197 res = *addr;
198 CTR4(KTR_BE_IO, "%s(bsh=%#x, ofs=%#x) = %#x", __func__, bsh, ofs, res);
199 return (res);
200 }
201
202 static uint32_t
203 bs_be_rs_4(bus_space_handle_t bsh, bus_size_t ofs)
204 {
205 volatile uint32_t *addr;
206 uint32_t res;
207
208 addr = __ppc_ba(bsh, ofs);
209 res = *addr;
210 CTR4(KTR_BE_IO, "%s(bsh=%#x, ofs=%#x) = %#x", __func__, bsh, ofs, res);
211 return (res);
212 }
213
214 static uint64_t
215 bs_be_rs_8(bus_space_handle_t bsh, bus_size_t ofs)
216 {
217 volatile uint64_t *addr;
218 uint64_t res;
219
220 addr = __ppc_ba(bsh, ofs);
221 res = *addr;
222 return (res);
223 }
224
225 static void
226 bs_be_rm_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t *addr, size_t cnt)
227 {
228 ins8(__ppc_ba(bsh, ofs), addr, cnt);
229 }
230
231 static void
232 bs_be_rm_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t *addr, size_t cnt)
233 {
234 ins16(__ppc_ba(bsh, ofs), addr, cnt);
235 }
236
237 static void
238 bs_be_rm_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t *addr, size_t cnt)
239 {
240 ins32(__ppc_ba(bsh, ofs), addr, cnt);
241 }
242
243 static void
244 bs_be_rm_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t *addr, size_t cnt)
245 {
246 ins64(__ppc_ba(bsh, ofs), addr, cnt);
247 }
248
249 static void
250 bs_be_rr_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t *addr, size_t cnt)
251 {
252 volatile uint8_t *s = __ppc_ba(bsh, ofs);
253
254 while (cnt--)
255 *addr++ = *s++;
256 __asm __volatile("eieio; sync");
257 }
258
259 static void
260 bs_be_rr_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t *addr, size_t cnt)
261 {
262 volatile uint16_t *s = __ppc_ba(bsh, ofs);
263
264 while (cnt--)
265 *addr++ = *s++;
266 __asm __volatile("eieio; sync");
267 }
268
269 static void
270 bs_be_rr_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t *addr, size_t cnt)
271 {
272 volatile uint32_t *s = __ppc_ba(bsh, ofs);
273
274 while (cnt--)
275 *addr++ = *s++;
276 __asm __volatile("eieio; sync");
277 }
278
279 static void
280 bs_be_rr_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t *addr, size_t cnt)
281 {
282 volatile uint64_t *s = __ppc_ba(bsh, ofs);
283
284 while (cnt--)
285 *addr++ = *s++;
286 __asm __volatile("eieio; sync");
287 }
288
289 static void
290 bs_be_ws_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t val)
291 {
292 volatile uint8_t *addr;
293
294 addr = __ppc_ba(bsh, ofs);
295 *addr = val;
296 __asm __volatile("eieio; sync");
297 CTR4(KTR_BE_IO, "%s(bsh=%#x, ofs=%#x, val=%#x)", __func__, bsh, ofs, val);
298 }
299
300 static void
301 bs_be_ws_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t val)
302 {
303 volatile uint16_t *addr;
304
305 addr = __ppc_ba(bsh, ofs);
306 *addr = val;
307 __asm __volatile("eieio; sync");
308 CTR4(KTR_BE_IO, "%s(bsh=%#x, ofs=%#x, val=%#x)", __func__, bsh, ofs, val);
309 }
310
311 static void
312 bs_be_ws_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t val)
313 {
314 volatile uint32_t *addr;
315
316 addr = __ppc_ba(bsh, ofs);
317 *addr = val;
318 __asm __volatile("eieio; sync");
319 CTR4(KTR_BE_IO, "%s(bsh=%#x, ofs=%#x, val=%#x)", __func__, bsh, ofs, val);
320 }
321
322 static void
323 bs_be_ws_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t val)
324 {
325 volatile uint64_t *addr;
326
327 addr = __ppc_ba(bsh, ofs);
328 *addr = val;
329 __asm __volatile("eieio; sync");
330 }
331
332 static void
333 bs_be_wm_1(bus_space_handle_t bsh, bus_size_t ofs, const uint8_t *addr,
334 bus_size_t cnt)
335 {
336 outsb(__ppc_ba(bsh, ofs), addr, cnt);
337 }
338
339 static void
340 bs_be_wm_2(bus_space_handle_t bsh, bus_size_t ofs, const uint16_t *addr,
341 bus_size_t cnt)
342 {
343 outsw(__ppc_ba(bsh, ofs), addr, cnt);
344 }
345
346 static void
347 bs_be_wm_4(bus_space_handle_t bsh, bus_size_t ofs, const uint32_t *addr,
348 bus_size_t cnt)
349 {
350 outsl(__ppc_ba(bsh, ofs), addr, cnt);
351 }
352
353 static void
354 bs_be_wm_8(bus_space_handle_t bsh, bus_size_t ofs, const uint64_t *addr,
355 bus_size_t cnt)
356 {
357 outsll(__ppc_ba(bsh, ofs), addr, cnt);
358 }
359
360 static void
361 bs_be_wr_1(bus_space_handle_t bsh, bus_size_t ofs, const uint8_t *addr,
362 size_t cnt)
363 {
364 volatile uint8_t *d = __ppc_ba(bsh, ofs);
365
366 while (cnt--)
367 *d++ = *addr++;
368 __asm __volatile("eieio; sync");
369 }
370
371 static void
372 bs_be_wr_2(bus_space_handle_t bsh, bus_size_t ofs, const uint16_t *addr,
373 size_t cnt)
374 {
375 volatile uint16_t *d = __ppc_ba(bsh, ofs);
376
377 while (cnt--)
378 *d++ = *addr++;
379 __asm __volatile("eieio; sync");
380 }
381
382 static void
383 bs_be_wr_4(bus_space_handle_t bsh, bus_size_t ofs, const uint32_t *addr,
384 size_t cnt)
385 {
386 volatile uint32_t *d = __ppc_ba(bsh, ofs);
387
388 while (cnt--)
389 *d++ = *addr++;
390 __asm __volatile("eieio; sync");
391 }
392
393 static void
394 bs_be_wr_8(bus_space_handle_t bsh, bus_size_t ofs, const uint64_t *addr,
395 size_t cnt)
396 {
397 volatile uint64_t *d = __ppc_ba(bsh, ofs);
398
399 while (cnt--)
400 *d++ = *addr++;
401 __asm __volatile("eieio; sync");
402 }
403
404 static void
405 bs_be_sm_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t val, size_t cnt)
406 {
407 volatile uint8_t *d = __ppc_ba(bsh, ofs);
408
409 while (cnt--)
410 *d = val;
411 __asm __volatile("eieio; sync");
412 }
413
414 static void
415 bs_be_sm_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t val, size_t cnt)
416 {
417 volatile uint16_t *d = __ppc_ba(bsh, ofs);
418
419 while (cnt--)
420 *d = val;
421 __asm __volatile("eieio; sync");
422 }
423
424 static void
425 bs_be_sm_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t val, size_t cnt)
426 {
427 volatile uint32_t *d = __ppc_ba(bsh, ofs);
428
429 while (cnt--)
430 *d = val;
431 __asm __volatile("eieio; sync");
432 }
433
434 static void
435 bs_be_sm_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t val, size_t cnt)
436 {
437 volatile uint64_t *d = __ppc_ba(bsh, ofs);
438
439 while (cnt--)
440 *d = val;
441 __asm __volatile("eieio; sync");
442 }
443
444 static void
445 bs_be_sr_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t val, size_t cnt)
446 {
447 volatile uint8_t *d = __ppc_ba(bsh, ofs);
448
449 while (cnt--)
450 *d++ = val;
451 __asm __volatile("eieio; sync");
452 }
453
454 static void
455 bs_be_sr_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t val, size_t cnt)
456 {
457 volatile uint16_t *d = __ppc_ba(bsh, ofs);
458
459 while (cnt--)
460 *d++ = val;
461 __asm __volatile("eieio; sync");
462 }
463
464 static void
465 bs_be_sr_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t val, size_t cnt)
466 {
467 volatile uint32_t *d = __ppc_ba(bsh, ofs);
468
469 while (cnt--)
470 *d++ = val;
471 __asm __volatile("eieio; sync");
472 }
473
474 static void
475 bs_be_sr_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t val, size_t cnt)
476 {
477 volatile uint64_t *d = __ppc_ba(bsh, ofs);
478
479 while (cnt--)
480 *d++ = val;
481 __asm __volatile("eieio; sync");
482 }
483
484 /*
485 * Little-endian access functions
486 */
487 static uint8_t
488 bs_le_rs_1(bus_space_handle_t bsh, bus_size_t ofs)
489 {
490 volatile uint8_t *addr;
491 uint8_t res;
492
493 addr = __ppc_ba(bsh, ofs);
494 res = *addr;
495 __asm __volatile("eieio; sync");
496 CTR4(KTR_LE_IO, "%s(bsh=%#x, ofs=%#x) = %#x", __func__, bsh, ofs, res);
497 return (res);
498 }
499
500 static uint16_t
501 bs_le_rs_2(bus_space_handle_t bsh, bus_size_t ofs)
502 {
503 volatile uint16_t *addr;
504 uint16_t res;
505
506 addr = __ppc_ba(bsh, ofs);
507 __asm __volatile("lhbrx %0, 0, %1" : "=r"(res) : "r"(addr));
508 __asm __volatile("eieio; sync");
509 CTR4(KTR_LE_IO, "%s(bsh=%#x, ofs=%#x) = %#x", __func__, bsh, ofs, res);
510 return (res);
511 }
512
513 static uint32_t
514 bs_le_rs_4(bus_space_handle_t bsh, bus_size_t ofs)
515 {
516 volatile uint32_t *addr;
517 uint32_t res;
518
519 addr = __ppc_ba(bsh, ofs);
520 __asm __volatile("lwbrx %0, 0, %1" : "=r"(res) : "r"(addr));
521 __asm __volatile("eieio; sync");
522 CTR4(KTR_LE_IO, "%s(bsh=%#x, ofs=%#x) = %#x", __func__, bsh, ofs, res);
523 return (res);
524 }
525
526 static uint64_t
527 bs_le_rs_8(bus_space_handle_t bsh, bus_size_t ofs)
528 {
529 TODO;
530 }
531
532 static void
533 bs_le_rm_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t *addr, size_t cnt)
534 {
535 ins8(__ppc_ba(bsh, ofs), addr, cnt);
536 }
537
538 static void
539 bs_le_rm_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t *addr, size_t cnt)
540 {
541 ins16rb(__ppc_ba(bsh, ofs), addr, cnt);
542 }
543
544 static void
545 bs_le_rm_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t *addr, size_t cnt)
546 {
547 ins32rb(__ppc_ba(bsh, ofs), addr, cnt);
548 }
549
550 static void
551 bs_le_rm_8(bus_space_handle_t bshh, bus_size_t ofs, uint64_t *addr, size_t cnt)
552 {
553 TODO;
554 }
555
556 static void
557 bs_le_rr_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t *addr, size_t cnt)
558 {
559 volatile uint8_t *s = __ppc_ba(bsh, ofs);
560
561 while (cnt--)
562 *addr++ = *s++;
563 __asm __volatile("eieio; sync");
564 }
565
566 static void
567 bs_le_rr_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t *addr, size_t cnt)
568 {
569 volatile uint16_t *s = __ppc_ba(bsh, ofs);
570
571 while (cnt--)
572 *addr++ = in16rb(s++);
573 __asm __volatile("eieio; sync");
574 }
575
576 static void
577 bs_le_rr_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t *addr, size_t cnt)
578 {
579 volatile uint32_t *s = __ppc_ba(bsh, ofs);
580
581 while (cnt--)
582 *addr++ = in32rb(s++);
583 __asm __volatile("eieio; sync");
584 }
585
586 static void
587 bs_le_rr_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t *addr, size_t cnt)
588 {
589 TODO;
590 }
591
592 static void
593 bs_le_ws_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t val)
594 {
595 volatile uint8_t *addr;
596
597 addr = __ppc_ba(bsh, ofs);
598 *addr = val;
599 CTR4(KTR_LE_IO, "%s(bsh=%#x, ofs=%#x, val=%#x)", __func__, bsh, ofs, val);
600 }
601
602 static void
603 bs_le_ws_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t val)
604 {
605 volatile uint16_t *addr;
606
607 addr = __ppc_ba(bsh, ofs);
608 __asm __volatile("sthbrx %0, 0, %1" :: "r"(val), "r"(addr));
609 CTR4(KTR_LE_IO, "%s(bsh=%#x, ofs=%#x, val=%#x)", __func__, bsh, ofs, val);
610 }
611
612 static void
613 bs_le_ws_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t val)
614 {
615 volatile uint32_t *addr;
616
617 addr = __ppc_ba(bsh, ofs);
618 __asm __volatile("stwbrx %0, 0, %1" :: "r"(val), "r"(addr));
619 CTR4(KTR_LE_IO, "%s(bsh=%#x, ofs=%#x, val=%#x)", __func__, bsh, ofs, val);
620 }
621
622 static void
623 bs_le_ws_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t val)
624 {
625 TODO;
626 }
627
628 static void
629 bs_le_wm_1(bus_space_handle_t bsh, bus_size_t ofs, const uint8_t *addr,
630 bus_size_t cnt)
631 {
632 outs8(__ppc_ba(bsh, ofs), addr, cnt);
633 }
634
635 static void
636 bs_le_wm_2(bus_space_handle_t bsh, bus_size_t ofs, const uint16_t *addr,
637 bus_size_t cnt)
638 {
639 outs16rb(__ppc_ba(bsh, ofs), addr, cnt);
640 }
641
642 static void
643 bs_le_wm_4(bus_space_handle_t bsh, bus_size_t ofs, const uint32_t *addr,
644 bus_size_t cnt)
645 {
646 outs32rb(__ppc_ba(bsh, ofs), addr, cnt);
647 }
648
649 static void
650 bs_le_wm_8(bus_space_handle_t bsh, bus_size_t ofs, const uint64_t *addr,
651 bus_size_t cnt)
652 {
653 TODO;
654 }
655
656 static void
657 bs_le_wr_1(bus_space_handle_t bsh, bus_size_t ofs, const uint8_t *addr,
658 size_t cnt)
659 {
660 volatile uint8_t *d = __ppc_ba(bsh, ofs);
661
662 while (cnt--)
663 *d++ = *addr++;
664 __asm __volatile("eieio; sync");
665 }
666
667 static void
668 bs_le_wr_2(bus_space_handle_t bsh, bus_size_t ofs, const uint16_t *addr,
669 size_t cnt)
670 {
671 volatile uint16_t *d = __ppc_ba(bsh, ofs);
672
673 while (cnt--)
674 out16rb(d++, *addr++);
675 __asm __volatile("eieio; sync");
676 }
677
678 static void
679 bs_le_wr_4(bus_space_handle_t bsh, bus_size_t ofs, const uint32_t *addr,
680 size_t cnt)
681 {
682 volatile uint32_t *d = __ppc_ba(bsh, ofs);
683
684 while (cnt--)
685 out32rb(d++, *addr++);
686 __asm __volatile("eieio; sync");
687 }
688
689 static void
690 bs_le_wr_8(bus_space_handle_t bsh, bus_size_t ofs, const uint64_t *addr,
691 size_t cnt)
692 {
693 TODO;
694 }
695
696 static void
697 bs_le_sm_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t val, size_t cnt)
698 {
699 volatile uint8_t *d = __ppc_ba(bsh, ofs);
700
701 while (cnt--)
702 *d = val;
703 __asm __volatile("eieio; sync");
704 }
705
706 static void
707 bs_le_sm_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t val, size_t cnt)
708 {
709 volatile uint16_t *d = __ppc_ba(bsh, ofs);
710
711 while (cnt--)
712 out16rb(d, val);
713 __asm __volatile("eieio; sync");
714 }
715
716 static void
717 bs_le_sm_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t val, size_t cnt)
718 {
719 volatile uint32_t *d = __ppc_ba(bsh, ofs);
720
721 while (cnt--)
722 out32rb(d, val);
723 __asm __volatile("eieio; sync");
724 }
725
726 static void
727 bs_le_sm_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t val, size_t cnt)
728 {
729 TODO;
730 }
731
732 static void
733 bs_le_sr_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t val, size_t cnt)
734 {
735 volatile uint8_t *d = __ppc_ba(bsh, ofs);
736
737 while (cnt--)
738 *d++ = val;
739 __asm __volatile("eieio; sync");
740 }
741
742 static void
743 bs_le_sr_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t val, size_t cnt)
744 {
745 volatile uint16_t *d = __ppc_ba(bsh, ofs);
746
747 while (cnt--)
748 out16rb(d++, val);
749 __asm __volatile("eieio; sync");
750 }
751
752 static void
753 bs_le_sr_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t val, size_t cnt)
754 {
755 volatile uint32_t *d = __ppc_ba(bsh, ofs);
756
757 while (cnt--)
758 out32rb(d++, val);
759 __asm __volatile("eieio; sync");
760 }
761
762 static void
763 bs_le_sr_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t val, size_t cnt)
764 {
765 TODO;
766 }
767
768 struct bus_space bs_be_tag = {
769 /* mapping/unmapping */
770 bs_gen_map,
771 bs_gen_unmap,
772 bs_gen_subregion,
773
774 /* allocation/deallocation */
775 bs_gen_alloc,
776 bs_gen_free,
777
778 /* barrier */
779 bs_gen_barrier,
780
781 /* read (single) */
782 bs_be_rs_1,
783 bs_be_rs_2,
784 bs_be_rs_4,
785 bs_be_rs_8,
786
787 bs_be_rs_2,
788 bs_be_rs_4,
789 bs_be_rs_8,
790
791 /* read multiple */
792 bs_be_rm_1,
793 bs_be_rm_2,
794 bs_be_rm_4,
795 bs_be_rm_8,
796
797 bs_be_rm_2,
798 bs_be_rm_4,
799 bs_be_rm_8,
800
801 /* read region */
802 bs_be_rr_1,
803 bs_be_rr_2,
804 bs_be_rr_4,
805 bs_be_rr_8,
806
807 bs_be_rr_2,
808 bs_be_rr_4,
809 bs_be_rr_8,
810
811 /* write (single) */
812 bs_be_ws_1,
813 bs_be_ws_2,
814 bs_be_ws_4,
815 bs_be_ws_8,
816
817 bs_be_ws_2,
818 bs_be_ws_4,
819 bs_be_ws_8,
820
821 /* write multiple */
822 bs_be_wm_1,
823 bs_be_wm_2,
824 bs_be_wm_4,
825 bs_be_wm_8,
826
827 bs_be_wm_2,
828 bs_be_wm_4,
829 bs_be_wm_8,
830
831 /* write region */
832 bs_be_wr_1,
833 bs_be_wr_2,
834 bs_be_wr_4,
835 bs_be_wr_8,
836
837 bs_be_wr_2,
838 bs_be_wr_4,
839 bs_be_wr_8,
840
841 /* set multiple */
842 bs_be_sm_1,
843 bs_be_sm_2,
844 bs_be_sm_4,
845 bs_be_sm_8,
846
847 bs_be_sm_2,
848 bs_be_sm_4,
849 bs_be_sm_8,
850
851 /* set region */
852 bs_be_sr_1,
853 bs_be_sr_2,
854 bs_be_sr_4,
855 bs_be_sr_8,
856
857 bs_be_sr_2,
858 bs_be_sr_4,
859 bs_be_sr_8,
860 };
861
862 struct bus_space bs_le_tag = {
863 /* mapping/unmapping */
864 bs_gen_map,
865 bs_gen_unmap,
866 bs_gen_subregion,
867
868 /* allocation/deallocation */
869 bs_gen_alloc,
870 bs_gen_free,
871
872 /* barrier */
873 bs_gen_barrier,
874
875 /* read (single) */
876 bs_le_rs_1,
877 bs_le_rs_2,
878 bs_le_rs_4,
879 bs_le_rs_8,
880
881 bs_be_rs_2,
882 bs_be_rs_4,
883 bs_be_rs_8,
884
885 /* read multiple */
886 bs_le_rm_1,
887 bs_le_rm_2,
888 bs_le_rm_4,
889 bs_le_rm_8,
890
891 bs_be_rm_2,
892 bs_be_rm_4,
893 bs_be_rm_8,
894
895 /* read region */
896 bs_le_rr_1,
897 bs_le_rr_2,
898 bs_le_rr_4,
899 bs_le_rr_8,
900
901 bs_be_rr_2,
902 bs_be_rr_4,
903 bs_be_rr_8,
904
905 /* write (single) */
906 bs_le_ws_1,
907 bs_le_ws_2,
908 bs_le_ws_4,
909 bs_le_ws_8,
910
911 bs_be_ws_2,
912 bs_be_ws_4,
913 bs_be_ws_8,
914
915 /* write multiple */
916 bs_le_wm_1,
917 bs_le_wm_2,
918 bs_le_wm_4,
919 bs_le_wm_8,
920
921 bs_be_wm_2,
922 bs_be_wm_4,
923 bs_be_wm_8,
924
925 /* write region */
926 bs_le_wr_1,
927 bs_le_wr_2,
928 bs_le_wr_4,
929 bs_le_wr_8,
930
931 bs_be_wr_2,
932 bs_be_wr_4,
933 bs_be_wr_8,
934
935 /* set multiple */
936 bs_le_sm_1,
937 bs_le_sm_2,
938 bs_le_sm_4,
939 bs_le_sm_8,
940
941 bs_be_sm_2,
942 bs_be_sm_4,
943 bs_be_sm_8,
944
945 /* set region */
946 bs_le_sr_1,
947 bs_le_sr_2,
948 bs_le_sr_4,
949 bs_le_sr_8,
950
951 bs_be_sr_2,
952 bs_be_sr_4,
953 bs_be_sr_8,
954 };
Cache object: 0916bcee71358c3b7632e5edcbc566ee
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