1 /*-
2 * Copyright (c) 2017-2018 QCM Technologies.
3 * Copyright (c) 2017-2018 Semihalf.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 * $FreeBSD$
28 */
29
30 #include "assym.inc"
31
32 #include <machine/asm.h>
33
34 .p2align 3
35 ENTRY(enter_idle_powerx)
36 mfsprg0 %r3 /* Get the pcpu pointer */
37 ld %r3,PC_CURTHREAD(%r3) /* Get current thread */
38 ld %r3,TD_PCB(%r3) /* Get PCB of current thread */
39 std %r12,PCB_CONTEXT(%r3) /* Save the non-volatile GP regs. */
40 std %r13,PCB_CONTEXT+1*8(%r3)
41 std %r14,PCB_CONTEXT+2*8(%r3)
42 std %r15,PCB_CONTEXT+3*8(%r3)
43 std %r16,PCB_CONTEXT+4*8(%r3)
44 std %r17,PCB_CONTEXT+5*8(%r3)
45 std %r18,PCB_CONTEXT+6*8(%r3)
46 std %r19,PCB_CONTEXT+7*8(%r3)
47 std %r20,PCB_CONTEXT+8*8(%r3)
48 std %r21,PCB_CONTEXT+9*8(%r3)
49 std %r22,PCB_CONTEXT+10*8(%r3)
50 std %r23,PCB_CONTEXT+11*8(%r3)
51 std %r24,PCB_CONTEXT+12*8(%r3)
52 std %r25,PCB_CONTEXT+13*8(%r3)
53 std %r26,PCB_CONTEXT+14*8(%r3)
54 std %r27,PCB_CONTEXT+15*8(%r3)
55 std %r28,PCB_CONTEXT+16*8(%r3)
56 std %r29,PCB_CONTEXT+17*8(%r3)
57 std %r30,PCB_CONTEXT+18*8(%r3)
58 std %r31,PCB_CONTEXT+19*8(%r3)
59
60 mfcr %r16 /* Save the condition register */
61 std %r16,PCB_CR(%r3)
62 mflr %r16 /* Save the link register */
63 std %r16,PCB_LR(%r3)
64 std %r1,PCB_SP(%r3) /* Save the stack pointer */
65 std %r2,PCB_TOC(%r3) /* Save the TOC pointer */
66
67 bl 1f
68 1: mflr %r3
69 addi %r3,%r3,power_save_sequence-1b
70 mtsrr0 %r3
71
72 /* Set MSR */
73 li %r3,0
74 ori %r3,%r3,(PSL_ME | PSL_RI)
75 li %r8,0x9 /* PSL_SF and PSL_HV */
76 insrdi %r3,%r8,4,0
77 mtsrr1 %r3
78
79 rfid
80
81 .p2align 2
82 power_save_sequence:
83 bl 1f
84 .llong 0x0 /* Playground for power-save sequence */
85 1: mflr %r3
86
87 /* Start power-save sequence */
88 std %r2,0(%r3)
89 ptesync
90 ld %r2,0(%r3)
91 2: cmpd %r2,%r2
92 bne 2b
93 nap
94 b .
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