The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/powerpc/powerpc/intr_machdep.c

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    1 /*-
    2  * Copyright (c) 1991 The Regents of the University of California.
    3  * All rights reserved.
    4  *
    5  * This code is derived from software contributed to Berkeley by
    6  * William Jolitz.
    7  *
    8  * Redistribution and use in source and binary forms, with or without
    9  * modification, are permitted provided that the following conditions
   10  * are met:
   11  * 1. Redistributions of source code must retain the above copyright
   12  *    notice, this list of conditions and the following disclaimer.
   13  * 2. Redistributions in binary form must reproduce the above copyright
   14  *    notice, this list of conditions and the following disclaimer in the
   15  *    documentation and/or other materials provided with the distribution.
   16  * 4. Neither the name of the University nor the names of its contributors
   17  *    may be used to endorse or promote products derived from this software
   18  *    without specific prior written permission.
   19  *
   20  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
   21  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   22  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   23  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
   24  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   25  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   26  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   27  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   28  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   29  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   30  * SUCH DAMAGE.
   31  */
   32 /*-
   33  * Copyright (c) 2002 Benno Rice.
   34  * All rights reserved.
   35  *
   36  * Redistribution and use in source and binary forms, with or without
   37  * modification, are permitted provided that the following conditions
   38  * are met:
   39  * 1. Redistributions of source code must retain the above copyright
   40  *    notice, this list of conditions and the following disclaimer.
   41  * 2. Redistributions in binary form must reproduce the above copyright
   42  *    notice, this list of conditions and the following disclaimer in the
   43  *    documentation and/or other materials provided with the distribution.
   44  *
   45  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   46  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   47  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   48  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   49  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   50  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   51  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   52  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   53  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   54  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   55  * SUCH DAMAGE.
   56  *
   57  *      from: @(#)isa.c 7.2 (Berkeley) 5/13/91
   58  *      form: src/sys/i386/isa/intr_machdep.c,v 1.57 2001/07/20
   59  *
   60  * $FreeBSD: releng/6.2/sys/powerpc/powerpc/intr_machdep.c 156543 2006-03-10 19:37:35Z jhb $
   61  */
   62 
   63 #include <sys/param.h>
   64 #include <sys/systm.h>
   65 #include <sys/kernel.h>
   66 #include <sys/queue.h>
   67 #include <sys/bus.h>
   68 #include <sys/interrupt.h>
   69 #include <sys/lock.h>
   70 #include <sys/malloc.h>
   71 #include <sys/mutex.h>
   72 #include <sys/pcpu.h>
   73 #include <sys/vmmeter.h>
   74 #include <sys/proc.h>
   75 
   76 #include <machine/frame.h>
   77 #include <machine/interruptvar.h>
   78 #include <machine/intr_machdep.h>
   79 #include <machine/trap.h>
   80 
   81 #define MAX_STRAY_LOG   5
   82 
   83 MALLOC_DEFINE(M_INTR, "intr", "interrupt handler data");
   84 
   85 static int      intr_initialized = 0;
   86 
   87 static u_int            intr_nirq;
   88 static struct           ppc_intr_handler *intr_handlers;
   89 
   90 static struct           mtx intr_table_lock;
   91 
   92 extern int      extint, extsize;
   93 extern u_long   extint_call;
   94 
   95 static int              intrcnt_index;
   96 static ih_func_t        intr_stray_handler;
   97 static ih_func_t        sched_ithd;
   98 
   99 static void             (*irq_enable)(uintptr_t);
  100 static void             (*irq_disable)(uintptr_t);
  101 
  102 static void intrcnt_setname(const char *name, int index);
  103 static void intrcnt_updatename(struct ppc_intr_handler *ih);
  104 
  105 static void
  106 intrcnt_setname(const char *name, int index)
  107 {
  108         snprintf(intrnames + (MAXCOMLEN + 1) * index, MAXCOMLEN + 1, "%-*s",
  109             MAXCOMLEN, name);
  110 }
  111 
  112 static void
  113 intrcnt_updatename(struct ppc_intr_handler *ih)
  114 {
  115         intrcnt_setname(ih->ih_event->ie_fullname, ih->ih_index);
  116 }
  117 
  118 static void
  119 intrcnt_register(struct ppc_intr_handler *ih)
  120 {
  121         char straystr[MAXCOMLEN + 1];
  122 
  123         KASSERT(ih->ih_event != NULL,
  124                 ("%s: ppc_intr_handler with no event", __func__));
  125 
  126         ih->ih_index = intrcnt_index;
  127         intrcnt_index += 2;
  128         snprintf(straystr, MAXCOMLEN + 1, "stray irq%d", ih->ih_irq);
  129         intrcnt_updatename(ih);
  130         ih->ih_count = &intrcnt[ih->ih_index];
  131         intrcnt_setname(straystr, ih->ih_index + 1);
  132         ih->ih_straycount = &intrcnt[ih->ih_index + 1];
  133 }
  134 
  135 void
  136 intr_init(void (*handler)(void), int nirq, void (*irq_e)(uintptr_t),
  137     void (*irq_d)(uintptr_t))
  138 {
  139         int             i;
  140         u_int32_t       msr;
  141 
  142         if (intr_initialized != 0)
  143                 panic("intr_init: interrupts intialized twice\n");
  144 
  145         intr_initialized++;
  146 
  147         intr_nirq = nirq;
  148         intr_handlers = malloc(nirq * sizeof(struct ppc_intr_handler), M_INTR,
  149             M_NOWAIT|M_ZERO);
  150         if (intr_handlers == NULL)
  151                 panic("intr_init: unable to allocate interrupt handler array");
  152 
  153         for (i = 0; i < nirq; i++) {
  154                 intr_handlers[i].ih_func = intr_stray_handler;
  155                 intr_handlers[i].ih_arg = &intr_handlers[i];
  156                 intr_handlers[i].ih_irq = i;
  157                 intr_handlers[i].ih_flags = 0;
  158                 /* mux all initial stray irqs onto same count... */
  159                 intr_handlers[i].ih_straycount = &intrcnt[0];
  160         }
  161 
  162         intrcnt_setname("???", 0);
  163         intrcnt_index = 1;
  164 
  165         msr = mfmsr();
  166         mtmsr(msr & ~PSL_EE);
  167 
  168         ext_intr_install(handler);
  169 
  170         mtmsr(msr);
  171 
  172         irq_enable = irq_e;
  173         irq_disable = irq_d;
  174 
  175         mtx_init(&intr_table_lock, "intr table", NULL, MTX_SPIN);
  176 }
  177 
  178 void
  179 intr_setup(u_int irq, ih_func_t *ihf, void *iha, u_int flags)
  180 {
  181         u_int32_t       msr;
  182 
  183         msr = mfmsr();
  184         mtmsr(msr & ~PSL_EE);
  185 
  186         intr_handlers[irq].ih_func = ihf;
  187         intr_handlers[irq].ih_arg = iha;
  188         intr_handlers[irq].ih_irq = irq;
  189         intr_handlers[irq].ih_flags = flags;
  190 
  191         mtmsr(msr);
  192 }
  193 
  194 int
  195 inthand_add(const char *name, u_int irq, void (*handler)(void *), void *arg,
  196     int flags, void **cookiep)
  197 {
  198         struct  ppc_intr_handler *ih;
  199         struct  intr_event *event, *orphan;
  200         int     error = 0;
  201         int     created_event = 0;
  202 
  203         /*
  204          * Work around a race where more than one CPU may be registering
  205          * handlers on the same IRQ at the same time.
  206          */
  207         ih = &intr_handlers[irq];
  208         mtx_lock_spin(&intr_table_lock);
  209         event = ih->ih_event;
  210         mtx_unlock_spin(&intr_table_lock);
  211         if (event == NULL) {
  212                 error = intr_event_create(&event, (void *)irq, 0,
  213                     (void (*)(void *))irq_enable, "irq%d:", irq);
  214                 if (error)
  215                         return (error);
  216 
  217                 mtx_lock_spin(&intr_table_lock);
  218 
  219                 if (ih->ih_event == NULL) {
  220                         ih->ih_event = event;
  221                         created_event++;
  222                         mtx_unlock_spin(&intr_table_lock);
  223                 } else {
  224                         orphan = event;
  225                         event = ih->ih_event;
  226                         mtx_unlock_spin(&intr_table_lock);
  227                         intr_event_destroy(orphan);
  228                 }
  229         }
  230 
  231         /* XXX: Should probably fix support for multiple FAST. */
  232         if (flags & INTR_FAST)
  233                 flags |= INTR_EXCL;
  234         error = intr_event_add_handler(event, name, handler, arg,
  235             intr_priority(flags), flags, cookiep);
  236 
  237         if ((flags & INTR_FAST) == 0 || error) {
  238                 intr_setup(irq, sched_ithd, ih, flags);
  239                 error = 0;
  240         }
  241 
  242         if (error)
  243                 return (error);
  244 
  245         if (flags & INTR_FAST)
  246                 intr_setup(irq, handler, arg, flags);
  247 
  248         intrcnt_register(ih);
  249 
  250         return (0);
  251 }
  252 
  253 int
  254 inthand_remove(u_int irq, void *cookie)
  255 {
  256         struct  ppc_intr_handler *ih;
  257         int     error;
  258 
  259         error = intr_event_remove_handler(cookie);
  260 
  261         if (error == 0) {
  262                 ih = &intr_handlers[irq];
  263 
  264                 mtx_lock_spin(&intr_table_lock);
  265 
  266                 if (ih->ih_event == NULL) {
  267                         intr_setup(irq, intr_stray_handler, ih, 0);
  268                 } else {
  269                         intr_setup(irq, sched_ithd, ih, 0);
  270                 }
  271 
  272                 mtx_unlock_spin(&intr_table_lock);
  273         }
  274 
  275         return (error);
  276 }
  277 
  278 void
  279 intr_handle(u_int irq)
  280 {
  281         atomic_add_long(intr_handlers[irq].ih_count, 1);
  282         intr_handlers[irq].ih_func(intr_handlers[irq].ih_arg);
  283 
  284         /* XXX wrong thing when using pre-emption ? */
  285         if ((intr_handlers[irq].ih_flags & INTR_FAST) != 0)
  286                 irq_enable(irq);
  287 }
  288 
  289 static void
  290 intr_stray_handler(void *cookie)
  291 {
  292         struct  ppc_intr_handler *ih;
  293 
  294         ih = (struct ppc_intr_handler *)cookie;
  295 
  296         if (*intr_handlers[ih->ih_irq].ih_straycount < MAX_STRAY_LOG) {
  297                 printf("stray irq %d\n", ih->ih_irq);
  298 
  299                 atomic_add_long(intr_handlers[ih->ih_irq].ih_straycount, 1);
  300                 if (*intr_handlers[ih->ih_irq].ih_straycount >= MAX_STRAY_LOG)
  301                         printf("got %d stray irq %d's: not logging anymore\n",
  302                                MAX_STRAY_LOG, ih->ih_irq);
  303         }
  304 }
  305 
  306 static void
  307 sched_ithd(void *cookie)
  308 {
  309         struct  ppc_intr_handler *ih;
  310         int     error;
  311 
  312         ih = (struct ppc_intr_handler *)cookie;
  313 
  314         error = intr_event_schedule_thread(ih->ih_event);
  315 
  316         if (error == EINVAL)
  317                 intr_stray_handler(ih);
  318 }

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