1 /*-
2 * Copyright (c) 2001 The NetBSD Foundation, Inc.
3 * All rights reserved.
4 *
5 * This code is derived from software contributed to The NetBSD Foundation
6 * by Matt Thomas <matt@3am-software.com> of Allegro Networks, Inc.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. All advertising materials mentioning features or use of this software
17 * must display the following acknowledgement:
18 * This product includes software developed by the NetBSD
19 * Foundation, Inc. and its contributors.
20 * 4. Neither the name of The NetBSD Foundation nor the names of its
21 * contributors may be used to endorse or promote products derived
22 * from this software without specific prior written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
25 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
26 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
27 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
28 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 * POSSIBILITY OF SUCH DAMAGE.
35 */
36 /*-
37 * Copyright (C) 1995, 1996 Wolfgang Solfrank.
38 * Copyright (C) 1995, 1996 TooLs GmbH.
39 * All rights reserved.
40 *
41 * Redistribution and use in source and binary forms, with or without
42 * modification, are permitted provided that the following conditions
43 * are met:
44 * 1. Redistributions of source code must retain the above copyright
45 * notice, this list of conditions and the following disclaimer.
46 * 2. Redistributions in binary form must reproduce the above copyright
47 * notice, this list of conditions and the following disclaimer in the
48 * documentation and/or other materials provided with the distribution.
49 * 3. All advertising materials mentioning features or use of this software
50 * must display the following acknowledgement:
51 * This product includes software developed by TooLs GmbH.
52 * 4. The name of TooLs GmbH may not be used to endorse or promote products
53 * derived from this software without specific prior written permission.
54 *
55 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
56 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
57 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
58 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
59 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
60 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
61 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
62 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
63 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
64 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
65 *
66 * $NetBSD: pmap.c,v 1.28 2000/03/26 20:42:36 kleink Exp $
67 */
68 /*-
69 * Copyright (C) 2001 Benno Rice.
70 * All rights reserved.
71 *
72 * Redistribution and use in source and binary forms, with or without
73 * modification, are permitted provided that the following conditions
74 * are met:
75 * 1. Redistributions of source code must retain the above copyright
76 * notice, this list of conditions and the following disclaimer.
77 * 2. Redistributions in binary form must reproduce the above copyright
78 * notice, this list of conditions and the following disclaimer in the
79 * documentation and/or other materials provided with the distribution.
80 *
81 * THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR
82 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
83 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
84 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
85 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
86 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
87 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
88 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
89 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
90 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
91 */
92
93 #include <sys/cdefs.h>
94 __FBSDID("$FreeBSD: releng/6.0/sys/powerpc/powerpc/pmap.c 150070 2005-09-13 05:11:37Z grehan $");
95
96 /*
97 * Manages physical address maps.
98 *
99 * In addition to hardware address maps, this module is called upon to
100 * provide software-use-only maps which may or may not be stored in the
101 * same form as hardware maps. These pseudo-maps are used to store
102 * intermediate results from copy operations to and from address spaces.
103 *
104 * Since the information managed by this module is also stored by the
105 * logical address mapping module, this module may throw away valid virtual
106 * to physical mappings at almost any time. However, invalidations of
107 * mappings must be done as requested.
108 *
109 * In order to cope with hardware architectures which make virtual to
110 * physical map invalidates expensive, this module may delay invalidate
111 * reduced protection operations until such time as they are actually
112 * necessary. This module is given full information as to which processors
113 * are currently using which maps, and to when physical maps must be made
114 * correct.
115 */
116
117 #include "opt_kstack_pages.h"
118
119 #include <sys/param.h>
120 #include <sys/kernel.h>
121 #include <sys/ktr.h>
122 #include <sys/lock.h>
123 #include <sys/msgbuf.h>
124 #include <sys/mutex.h>
125 #include <sys/proc.h>
126 #include <sys/sysctl.h>
127 #include <sys/systm.h>
128 #include <sys/vmmeter.h>
129
130 #include <dev/ofw/openfirm.h>
131
132 #include <vm/vm.h>
133 #include <vm/vm_param.h>
134 #include <vm/vm_kern.h>
135 #include <vm/vm_page.h>
136 #include <vm/vm_map.h>
137 #include <vm/vm_object.h>
138 #include <vm/vm_extern.h>
139 #include <vm/vm_pageout.h>
140 #include <vm/vm_pager.h>
141 #include <vm/uma.h>
142
143 #include <machine/cpu.h>
144 #include <machine/powerpc.h>
145 #include <machine/bat.h>
146 #include <machine/frame.h>
147 #include <machine/md_var.h>
148 #include <machine/psl.h>
149 #include <machine/pte.h>
150 #include <machine/sr.h>
151
152 #define PMAP_DEBUG
153
154 #define TODO panic("%s: not implemented", __func__);
155
156 #define TLBIE(va) __asm __volatile("tlbie %0" :: "r"(va))
157 #define TLBSYNC() __asm __volatile("tlbsync");
158 #define SYNC() __asm __volatile("sync");
159 #define EIEIO() __asm __volatile("eieio");
160
161 #define VSID_MAKE(sr, hash) ((sr) | (((hash) & 0xfffff) << 4))
162 #define VSID_TO_SR(vsid) ((vsid) & 0xf)
163 #define VSID_TO_HASH(vsid) (((vsid) >> 4) & 0xfffff)
164
165 #define PVO_PTEGIDX_MASK 0x007 /* which PTEG slot */
166 #define PVO_PTEGIDX_VALID 0x008 /* slot is valid */
167 #define PVO_WIRED 0x010 /* PVO entry is wired */
168 #define PVO_MANAGED 0x020 /* PVO entry is managed */
169 #define PVO_EXECUTABLE 0x040 /* PVO entry is executable */
170 #define PVO_BOOTSTRAP 0x080 /* PVO entry allocated during
171 bootstrap */
172 #define PVO_FAKE 0x100 /* fictitious phys page */
173 #define PVO_VADDR(pvo) ((pvo)->pvo_vaddr & ~ADDR_POFF)
174 #define PVO_ISEXECUTABLE(pvo) ((pvo)->pvo_vaddr & PVO_EXECUTABLE)
175 #define PVO_ISFAKE(pvo) ((pvo)->pvo_vaddr & PVO_FAKE)
176 #define PVO_PTEGIDX_GET(pvo) ((pvo)->pvo_vaddr & PVO_PTEGIDX_MASK)
177 #define PVO_PTEGIDX_ISSET(pvo) ((pvo)->pvo_vaddr & PVO_PTEGIDX_VALID)
178 #define PVO_PTEGIDX_CLR(pvo) \
179 ((void)((pvo)->pvo_vaddr &= ~(PVO_PTEGIDX_VALID|PVO_PTEGIDX_MASK)))
180 #define PVO_PTEGIDX_SET(pvo, i) \
181 ((void)((pvo)->pvo_vaddr |= (i)|PVO_PTEGIDX_VALID))
182
183 #define PMAP_PVO_CHECK(pvo)
184
185 struct ofw_map {
186 vm_offset_t om_va;
187 vm_size_t om_len;
188 vm_offset_t om_pa;
189 u_int om_mode;
190 };
191
192 int pmap_bootstrapped = 0;
193
194 /*
195 * Virtual and physical address of message buffer.
196 */
197 struct msgbuf *msgbufp;
198 vm_offset_t msgbuf_phys;
199
200 int pmap_pagedaemon_waken;
201
202 /*
203 * Map of physical memory regions.
204 */
205 vm_offset_t phys_avail[128];
206 u_int phys_avail_count;
207 static struct mem_region *regions;
208 static struct mem_region *pregions;
209 int regions_sz, pregions_sz;
210 static struct ofw_map *translations;
211
212 /*
213 * First and last available kernel virtual addresses.
214 */
215 vm_offset_t virtual_avail;
216 vm_offset_t virtual_end;
217 vm_offset_t kernel_vm_end;
218
219 /*
220 * Kernel pmap.
221 */
222 struct pmap kernel_pmap_store;
223 extern struct pmap ofw_pmap;
224
225 /*
226 * Lock for the pteg and pvo tables.
227 */
228 struct mtx pmap_table_mutex;
229
230 /*
231 * PTEG data.
232 */
233 static struct pteg *pmap_pteg_table;
234 u_int pmap_pteg_count;
235 u_int pmap_pteg_mask;
236
237 /*
238 * PVO data.
239 */
240 struct pvo_head *pmap_pvo_table; /* pvo entries by pteg index */
241 struct pvo_head pmap_pvo_kunmanaged =
242 LIST_HEAD_INITIALIZER(pmap_pvo_kunmanaged); /* list of unmanaged pages */
243 struct pvo_head pmap_pvo_unmanaged =
244 LIST_HEAD_INITIALIZER(pmap_pvo_unmanaged); /* list of unmanaged pages */
245
246 uma_zone_t pmap_upvo_zone; /* zone for pvo entries for unmanaged pages */
247 uma_zone_t pmap_mpvo_zone; /* zone for pvo entries for managed pages */
248
249 #define BPVO_POOL_SIZE 32768
250 static struct pvo_entry *pmap_bpvo_pool;
251 static int pmap_bpvo_pool_index = 0;
252
253 #define VSID_NBPW (sizeof(u_int32_t) * 8)
254 static u_int pmap_vsid_bitmap[NPMAPS / VSID_NBPW];
255
256 static boolean_t pmap_initialized = FALSE;
257
258 /*
259 * Statistics.
260 */
261 u_int pmap_pte_valid = 0;
262 u_int pmap_pte_overflow = 0;
263 u_int pmap_pte_replacements = 0;
264 u_int pmap_pvo_entries = 0;
265 u_int pmap_pvo_enter_calls = 0;
266 u_int pmap_pvo_remove_calls = 0;
267 u_int pmap_pte_spills = 0;
268 SYSCTL_INT(_machdep, OID_AUTO, pmap_pte_valid, CTLFLAG_RD, &pmap_pte_valid,
269 0, "");
270 SYSCTL_INT(_machdep, OID_AUTO, pmap_pte_overflow, CTLFLAG_RD,
271 &pmap_pte_overflow, 0, "");
272 SYSCTL_INT(_machdep, OID_AUTO, pmap_pte_replacements, CTLFLAG_RD,
273 &pmap_pte_replacements, 0, "");
274 SYSCTL_INT(_machdep, OID_AUTO, pmap_pvo_entries, CTLFLAG_RD, &pmap_pvo_entries,
275 0, "");
276 SYSCTL_INT(_machdep, OID_AUTO, pmap_pvo_enter_calls, CTLFLAG_RD,
277 &pmap_pvo_enter_calls, 0, "");
278 SYSCTL_INT(_machdep, OID_AUTO, pmap_pvo_remove_calls, CTLFLAG_RD,
279 &pmap_pvo_remove_calls, 0, "");
280 SYSCTL_INT(_machdep, OID_AUTO, pmap_pte_spills, CTLFLAG_RD,
281 &pmap_pte_spills, 0, "");
282
283 struct pvo_entry *pmap_pvo_zeropage;
284
285 vm_offset_t pmap_rkva_start = VM_MIN_KERNEL_ADDRESS;
286 u_int pmap_rkva_count = 4;
287
288 /*
289 * Allocate physical memory for use in pmap_bootstrap.
290 */
291 static vm_offset_t pmap_bootstrap_alloc(vm_size_t, u_int);
292
293 /*
294 * PTE calls.
295 */
296 static int pmap_pte_insert(u_int, struct pte *);
297
298 /*
299 * PVO calls.
300 */
301 static int pmap_pvo_enter(pmap_t, uma_zone_t, struct pvo_head *,
302 vm_offset_t, vm_offset_t, u_int, int);
303 static void pmap_pvo_remove(struct pvo_entry *, int);
304 static struct pvo_entry *pmap_pvo_find_va(pmap_t, vm_offset_t, int *);
305 static struct pte *pmap_pvo_to_pte(const struct pvo_entry *, int);
306
307 /*
308 * Utility routines.
309 */
310 static struct pvo_entry *pmap_rkva_alloc(void);
311 static void pmap_pa_map(struct pvo_entry *, vm_offset_t,
312 struct pte *, int *);
313 static void pmap_pa_unmap(struct pvo_entry *, struct pte *, int *);
314 static void pmap_syncicache(vm_offset_t, vm_size_t);
315 static boolean_t pmap_query_bit(vm_page_t, int);
316 static u_int pmap_clear_bit(vm_page_t, int, int *);
317 static void tlbia(void);
318
319 static __inline int
320 va_to_sr(u_int *sr, vm_offset_t va)
321 {
322 return (sr[(uintptr_t)va >> ADDR_SR_SHFT]);
323 }
324
325 static __inline u_int
326 va_to_pteg(u_int sr, vm_offset_t addr)
327 {
328 u_int hash;
329
330 hash = (sr & SR_VSID_MASK) ^ (((u_int)addr & ADDR_PIDX) >>
331 ADDR_PIDX_SHFT);
332 return (hash & pmap_pteg_mask);
333 }
334
335 static __inline struct pvo_head *
336 pa_to_pvoh(vm_offset_t pa, vm_page_t *pg_p)
337 {
338 struct vm_page *pg;
339
340 pg = PHYS_TO_VM_PAGE(pa);
341
342 if (pg_p != NULL)
343 *pg_p = pg;
344
345 if (pg == NULL)
346 return (&pmap_pvo_unmanaged);
347
348 return (&pg->md.mdpg_pvoh);
349 }
350
351 static __inline struct pvo_head *
352 vm_page_to_pvoh(vm_page_t m)
353 {
354
355 return (&m->md.mdpg_pvoh);
356 }
357
358 static __inline void
359 pmap_attr_clear(vm_page_t m, int ptebit)
360 {
361
362 m->md.mdpg_attrs &= ~ptebit;
363 }
364
365 static __inline int
366 pmap_attr_fetch(vm_page_t m)
367 {
368
369 return (m->md.mdpg_attrs);
370 }
371
372 static __inline void
373 pmap_attr_save(vm_page_t m, int ptebit)
374 {
375
376 m->md.mdpg_attrs |= ptebit;
377 }
378
379 static __inline int
380 pmap_pte_compare(const struct pte *pt, const struct pte *pvo_pt)
381 {
382 if (pt->pte_hi == pvo_pt->pte_hi)
383 return (1);
384
385 return (0);
386 }
387
388 static __inline int
389 pmap_pte_match(struct pte *pt, u_int sr, vm_offset_t va, int which)
390 {
391 return (pt->pte_hi & ~PTE_VALID) ==
392 (((sr & SR_VSID_MASK) << PTE_VSID_SHFT) |
393 ((va >> ADDR_API_SHFT) & PTE_API) | which);
394 }
395
396 static __inline void
397 pmap_pte_create(struct pte *pt, u_int sr, vm_offset_t va, u_int pte_lo)
398 {
399 /*
400 * Construct a PTE. Default to IMB initially. Valid bit only gets
401 * set when the real pte is set in memory.
402 *
403 * Note: Don't set the valid bit for correct operation of tlb update.
404 */
405 pt->pte_hi = ((sr & SR_VSID_MASK) << PTE_VSID_SHFT) |
406 (((va & ADDR_PIDX) >> ADDR_API_SHFT) & PTE_API);
407 pt->pte_lo = pte_lo;
408 }
409
410 static __inline void
411 pmap_pte_synch(struct pte *pt, struct pte *pvo_pt)
412 {
413
414 pvo_pt->pte_lo |= pt->pte_lo & (PTE_REF | PTE_CHG);
415 }
416
417 static __inline void
418 pmap_pte_clear(struct pte *pt, vm_offset_t va, int ptebit)
419 {
420
421 /*
422 * As shown in Section 7.6.3.2.3
423 */
424 pt->pte_lo &= ~ptebit;
425 TLBIE(va);
426 EIEIO();
427 TLBSYNC();
428 SYNC();
429 }
430
431 static __inline void
432 pmap_pte_set(struct pte *pt, struct pte *pvo_pt)
433 {
434
435 pvo_pt->pte_hi |= PTE_VALID;
436
437 /*
438 * Update the PTE as defined in section 7.6.3.1.
439 * Note that the REF/CHG bits are from pvo_pt and thus should havce
440 * been saved so this routine can restore them (if desired).
441 */
442 pt->pte_lo = pvo_pt->pte_lo;
443 EIEIO();
444 pt->pte_hi = pvo_pt->pte_hi;
445 SYNC();
446 pmap_pte_valid++;
447 }
448
449 static __inline void
450 pmap_pte_unset(struct pte *pt, struct pte *pvo_pt, vm_offset_t va)
451 {
452
453 pvo_pt->pte_hi &= ~PTE_VALID;
454
455 /*
456 * Force the reg & chg bits back into the PTEs.
457 */
458 SYNC();
459
460 /*
461 * Invalidate the pte.
462 */
463 pt->pte_hi &= ~PTE_VALID;
464
465 SYNC();
466 TLBIE(va);
467 EIEIO();
468 TLBSYNC();
469 SYNC();
470
471 /*
472 * Save the reg & chg bits.
473 */
474 pmap_pte_synch(pt, pvo_pt);
475 pmap_pte_valid--;
476 }
477
478 static __inline void
479 pmap_pte_change(struct pte *pt, struct pte *pvo_pt, vm_offset_t va)
480 {
481
482 /*
483 * Invalidate the PTE
484 */
485 pmap_pte_unset(pt, pvo_pt, va);
486 pmap_pte_set(pt, pvo_pt);
487 }
488
489 /*
490 * Quick sort callout for comparing memory regions.
491 */
492 static int mr_cmp(const void *a, const void *b);
493 static int om_cmp(const void *a, const void *b);
494
495 static int
496 mr_cmp(const void *a, const void *b)
497 {
498 const struct mem_region *regiona;
499 const struct mem_region *regionb;
500
501 regiona = a;
502 regionb = b;
503 if (regiona->mr_start < regionb->mr_start)
504 return (-1);
505 else if (regiona->mr_start > regionb->mr_start)
506 return (1);
507 else
508 return (0);
509 }
510
511 static int
512 om_cmp(const void *a, const void *b)
513 {
514 const struct ofw_map *mapa;
515 const struct ofw_map *mapb;
516
517 mapa = a;
518 mapb = b;
519 if (mapa->om_pa < mapb->om_pa)
520 return (-1);
521 else if (mapa->om_pa > mapb->om_pa)
522 return (1);
523 else
524 return (0);
525 }
526
527 void
528 pmap_bootstrap(vm_offset_t kernelstart, vm_offset_t kernelend)
529 {
530 ihandle_t mmui;
531 phandle_t chosen, mmu;
532 int sz;
533 int i, j;
534 int ofw_mappings;
535 vm_size_t size, physsz, hwphyssz;
536 vm_offset_t pa, va, off;
537 u_int batl, batu;
538
539 /*
540 * Set up BAT0 to map the lowest 256 MB area
541 */
542 battable[0x0].batl = BATL(0x00000000, BAT_M, BAT_PP_RW);
543 battable[0x0].batu = BATU(0x00000000, BAT_BL_256M, BAT_Vs);
544
545 /*
546 * Map PCI memory space.
547 */
548 battable[0x8].batl = BATL(0x80000000, BAT_I|BAT_G, BAT_PP_RW);
549 battable[0x8].batu = BATU(0x80000000, BAT_BL_256M, BAT_Vs);
550
551 battable[0x9].batl = BATL(0x90000000, BAT_I|BAT_G, BAT_PP_RW);
552 battable[0x9].batu = BATU(0x90000000, BAT_BL_256M, BAT_Vs);
553
554 battable[0xa].batl = BATL(0xa0000000, BAT_I|BAT_G, BAT_PP_RW);
555 battable[0xa].batu = BATU(0xa0000000, BAT_BL_256M, BAT_Vs);
556
557 battable[0xb].batl = BATL(0xb0000000, BAT_I|BAT_G, BAT_PP_RW);
558 battable[0xb].batu = BATU(0xb0000000, BAT_BL_256M, BAT_Vs);
559
560 /*
561 * Map obio devices.
562 */
563 battable[0xf].batl = BATL(0xf0000000, BAT_I|BAT_G, BAT_PP_RW);
564 battable[0xf].batu = BATU(0xf0000000, BAT_BL_256M, BAT_Vs);
565
566 /*
567 * Use an IBAT and a DBAT to map the bottom segment of memory
568 * where we are.
569 */
570 batu = BATU(0x00000000, BAT_BL_256M, BAT_Vs);
571 batl = BATL(0x00000000, BAT_M, BAT_PP_RW);
572 __asm ("sync; isync; \n"
573 "mtibatu 0,%0; mtibatl 0,%1; isync; \n"
574 "mtdbatu 0,%0; mtdbatl 0,%1; isync"
575 :: "r"(batu), "r"(batl));
576
577 #if 0
578 /* map frame buffer */
579 batu = BATU(0x90000000, BAT_BL_256M, BAT_Vs);
580 batl = BATL(0x90000000, BAT_I|BAT_G, BAT_PP_RW);
581 __asm ("mtdbatu 1,%0; mtdbatl 1,%1; isync"
582 :: "r"(batu), "r"(batl));
583 #endif
584
585 #if 1
586 /* map pci space */
587 batu = BATU(0x80000000, BAT_BL_256M, BAT_Vs);
588 batl = BATL(0x80000000, BAT_I|BAT_G, BAT_PP_RW);
589 __asm ("mtdbatu 1,%0; mtdbatl 1,%1; isync"
590 :: "r"(batu), "r"(batl));
591 #endif
592
593 /*
594 * Set the start and end of kva.
595 */
596 virtual_avail = VM_MIN_KERNEL_ADDRESS;
597 virtual_end = VM_MAX_KERNEL_ADDRESS;
598
599 mem_regions(&pregions, &pregions_sz, ®ions, ®ions_sz);
600 CTR0(KTR_PMAP, "pmap_bootstrap: physical memory");
601
602 qsort(pregions, pregions_sz, sizeof(*pregions), mr_cmp);
603 for (i = 0; i < pregions_sz; i++) {
604 vm_offset_t pa;
605 vm_offset_t end;
606
607 CTR3(KTR_PMAP, "physregion: %#x - %#x (%#x)",
608 pregions[i].mr_start,
609 pregions[i].mr_start + pregions[i].mr_size,
610 pregions[i].mr_size);
611 /*
612 * Install entries into the BAT table to allow all
613 * of physmem to be convered by on-demand BAT entries.
614 * The loop will sometimes set the same battable element
615 * twice, but that's fine since they won't be used for
616 * a while yet.
617 */
618 pa = pregions[i].mr_start & 0xf0000000;
619 end = pregions[i].mr_start + pregions[i].mr_size;
620 do {
621 u_int n = pa >> ADDR_SR_SHFT;
622
623 battable[n].batl = BATL(pa, BAT_M, BAT_PP_RW);
624 battable[n].batu = BATU(pa, BAT_BL_256M, BAT_Vs);
625 pa += SEGMENT_LENGTH;
626 } while (pa < end);
627 }
628
629 if (sizeof(phys_avail)/sizeof(phys_avail[0]) < regions_sz)
630 panic("pmap_bootstrap: phys_avail too small");
631 qsort(regions, regions_sz, sizeof(*regions), mr_cmp);
632 phys_avail_count = 0;
633 physsz = 0;
634 hwphyssz = 0;
635 TUNABLE_ULONG_FETCH("hw.physmem", (u_long *) &hwphyssz);
636 for (i = 0, j = 0; i < regions_sz; i++, j += 2) {
637 CTR3(KTR_PMAP, "region: %#x - %#x (%#x)", regions[i].mr_start,
638 regions[i].mr_start + regions[i].mr_size,
639 regions[i].mr_size);
640 if (hwphyssz != 0 &&
641 (physsz + regions[i].mr_size) >= hwphyssz) {
642 if (physsz < hwphyssz) {
643 phys_avail[j] = regions[i].mr_start;
644 phys_avail[j + 1] = regions[i].mr_start +
645 hwphyssz - physsz;
646 physsz = hwphyssz;
647 phys_avail_count++;
648 }
649 break;
650 }
651 phys_avail[j] = regions[i].mr_start;
652 phys_avail[j + 1] = regions[i].mr_start + regions[i].mr_size;
653 phys_avail_count++;
654 physsz += regions[i].mr_size;
655 }
656 physmem = btoc(physsz);
657
658 /*
659 * Allocate PTEG table.
660 */
661 #ifdef PTEGCOUNT
662 pmap_pteg_count = PTEGCOUNT;
663 #else
664 pmap_pteg_count = 0x1000;
665
666 while (pmap_pteg_count < physmem)
667 pmap_pteg_count <<= 1;
668
669 pmap_pteg_count >>= 1;
670 #endif /* PTEGCOUNT */
671
672 size = pmap_pteg_count * sizeof(struct pteg);
673 CTR2(KTR_PMAP, "pmap_bootstrap: %d PTEGs, %d bytes", pmap_pteg_count,
674 size);
675 pmap_pteg_table = (struct pteg *)pmap_bootstrap_alloc(size, size);
676 CTR1(KTR_PMAP, "pmap_bootstrap: PTEG table at %p", pmap_pteg_table);
677 bzero((void *)pmap_pteg_table, pmap_pteg_count * sizeof(struct pteg));
678 pmap_pteg_mask = pmap_pteg_count - 1;
679
680 /*
681 * Allocate pv/overflow lists.
682 */
683 size = sizeof(struct pvo_head) * pmap_pteg_count;
684 pmap_pvo_table = (struct pvo_head *)pmap_bootstrap_alloc(size,
685 PAGE_SIZE);
686 CTR1(KTR_PMAP, "pmap_bootstrap: PVO table at %p", pmap_pvo_table);
687 for (i = 0; i < pmap_pteg_count; i++)
688 LIST_INIT(&pmap_pvo_table[i]);
689
690 /*
691 * Initialize the lock that synchronizes access to the pteg and pvo
692 * tables.
693 */
694 mtx_init(&pmap_table_mutex, "pmap table", NULL, MTX_DEF);
695
696 /*
697 * Allocate the message buffer.
698 */
699 msgbuf_phys = pmap_bootstrap_alloc(MSGBUF_SIZE, 0);
700
701 /*
702 * Initialise the unmanaged pvo pool.
703 */
704 pmap_bpvo_pool = (struct pvo_entry *)pmap_bootstrap_alloc(
705 BPVO_POOL_SIZE*sizeof(struct pvo_entry), 0);
706 pmap_bpvo_pool_index = 0;
707
708 /*
709 * Make sure kernel vsid is allocated as well as VSID 0.
710 */
711 pmap_vsid_bitmap[(KERNEL_VSIDBITS & (NPMAPS - 1)) / VSID_NBPW]
712 |= 1 << (KERNEL_VSIDBITS % VSID_NBPW);
713 pmap_vsid_bitmap[0] |= 1;
714
715 /*
716 * Set up the Open Firmware pmap and add it's mappings.
717 */
718 pmap_pinit(&ofw_pmap);
719 ofw_pmap.pm_sr[KERNEL_SR] = KERNEL_SEGMENT;
720 ofw_pmap.pm_sr[KERNEL2_SR] = KERNEL2_SEGMENT;
721 if ((chosen = OF_finddevice("/chosen")) == -1)
722 panic("pmap_bootstrap: can't find /chosen");
723 OF_getprop(chosen, "mmu", &mmui, 4);
724 if ((mmu = OF_instance_to_package(mmui)) == -1)
725 panic("pmap_bootstrap: can't get mmu package");
726 if ((sz = OF_getproplen(mmu, "translations")) == -1)
727 panic("pmap_bootstrap: can't get ofw translation count");
728 translations = NULL;
729 for (i = 0; phys_avail[i] != 0; i += 2) {
730 if (phys_avail[i + 1] >= sz) {
731 translations = (struct ofw_map *)phys_avail[i];
732 break;
733 }
734 }
735 if (translations == NULL)
736 panic("pmap_bootstrap: no space to copy translations");
737 bzero(translations, sz);
738 if (OF_getprop(mmu, "translations", translations, sz) == -1)
739 panic("pmap_bootstrap: can't get ofw translations");
740 CTR0(KTR_PMAP, "pmap_bootstrap: translations");
741 sz /= sizeof(*translations);
742 qsort(translations, sz, sizeof (*translations), om_cmp);
743 for (i = 0, ofw_mappings = 0; i < sz; i++) {
744 CTR3(KTR_PMAP, "translation: pa=%#x va=%#x len=%#x",
745 translations[i].om_pa, translations[i].om_va,
746 translations[i].om_len);
747
748 /*
749 * If the mapping is 1:1, let the RAM and device on-demand
750 * BAT tables take care of the translation.
751 */
752 if (translations[i].om_va == translations[i].om_pa)
753 continue;
754
755 /* Enter the pages */
756 for (off = 0; off < translations[i].om_len; off += PAGE_SIZE) {
757 struct vm_page m;
758
759 m.phys_addr = translations[i].om_pa + off;
760 pmap_enter(&ofw_pmap, translations[i].om_va + off, &m,
761 VM_PROT_ALL, 1);
762 ofw_mappings++;
763 }
764 }
765 #ifdef SMP
766 TLBSYNC();
767 #endif
768
769 /*
770 * Initialize the kernel pmap (which is statically allocated).
771 */
772 PMAP_LOCK_INIT(kernel_pmap);
773 for (i = 0; i < 16; i++) {
774 kernel_pmap->pm_sr[i] = EMPTY_SEGMENT;
775 }
776 kernel_pmap->pm_sr[KERNEL_SR] = KERNEL_SEGMENT;
777 kernel_pmap->pm_sr[KERNEL2_SR] = KERNEL2_SEGMENT;
778 kernel_pmap->pm_active = ~0;
779
780 /*
781 * Allocate a kernel stack with a guard page for thread0 and map it
782 * into the kernel page map.
783 */
784 pa = pmap_bootstrap_alloc(KSTACK_PAGES * PAGE_SIZE, 0);
785 kstack0_phys = pa;
786 kstack0 = virtual_avail + (KSTACK_GUARD_PAGES * PAGE_SIZE);
787 CTR2(KTR_PMAP, "pmap_bootstrap: kstack0 at %#x (%#x)", kstack0_phys,
788 kstack0);
789 virtual_avail += (KSTACK_PAGES + KSTACK_GUARD_PAGES) * PAGE_SIZE;
790 for (i = 0; i < KSTACK_PAGES; i++) {
791 pa = kstack0_phys + i * PAGE_SIZE;
792 va = kstack0 + i * PAGE_SIZE;
793 pmap_kenter(va, pa);
794 TLBIE(va);
795 }
796
797 /*
798 * Calculate the last available physical address.
799 */
800 for (i = 0; phys_avail[i + 2] != 0; i += 2)
801 ;
802 Maxmem = powerpc_btop(phys_avail[i + 1]);
803
804 /*
805 * Allocate virtual address space for the message buffer.
806 */
807 msgbufp = (struct msgbuf *)virtual_avail;
808 virtual_avail += round_page(MSGBUF_SIZE);
809
810 /*
811 * Initialize hardware.
812 */
813 for (i = 0; i < 16; i++) {
814 mtsrin(i << ADDR_SR_SHFT, EMPTY_SEGMENT);
815 }
816 __asm __volatile ("mtsr %0,%1"
817 :: "n"(KERNEL_SR), "r"(KERNEL_SEGMENT));
818 __asm __volatile ("mtsr %0,%1"
819 :: "n"(KERNEL2_SR), "r"(KERNEL2_SEGMENT));
820 __asm __volatile ("sync; mtsdr1 %0; isync"
821 :: "r"((u_int)pmap_pteg_table | (pmap_pteg_mask >> 10)));
822 tlbia();
823
824 pmap_bootstrapped++;
825 }
826
827 /*
828 * Activate a user pmap. The pmap must be activated before it's address
829 * space can be accessed in any way.
830 */
831 void
832 pmap_activate(struct thread *td)
833 {
834 pmap_t pm, pmr;
835
836 /*
837 * Load all the data we need up front to encourage the compiler to
838 * not issue any loads while we have interrupts disabled below.
839 */
840 pm = &td->td_proc->p_vmspace->vm_pmap;
841
842 if ((pmr = (pmap_t)pmap_kextract((vm_offset_t)pm)) == NULL)
843 pmr = pm;
844
845 pm->pm_active |= PCPU_GET(cpumask);
846 PCPU_SET(curpmap, pmr);
847 }
848
849 void
850 pmap_deactivate(struct thread *td)
851 {
852 pmap_t pm;
853
854 pm = &td->td_proc->p_vmspace->vm_pmap;
855 pm->pm_active &= ~(PCPU_GET(cpumask));
856 PCPU_SET(curpmap, NULL);
857 }
858
859 vm_offset_t
860 pmap_addr_hint(vm_object_t object, vm_offset_t va, vm_size_t size)
861 {
862
863 return (va);
864 }
865
866 void
867 pmap_change_wiring(pmap_t pm, vm_offset_t va, boolean_t wired)
868 {
869 struct pvo_entry *pvo;
870
871 PMAP_LOCK(pm);
872 pvo = pmap_pvo_find_va(pm, va & ~ADDR_POFF, NULL);
873
874 if (pvo != NULL) {
875 if (wired) {
876 if ((pvo->pvo_vaddr & PVO_WIRED) == 0)
877 pm->pm_stats.wired_count++;
878 pvo->pvo_vaddr |= PVO_WIRED;
879 } else {
880 if ((pvo->pvo_vaddr & PVO_WIRED) != 0)
881 pm->pm_stats.wired_count--;
882 pvo->pvo_vaddr &= ~PVO_WIRED;
883 }
884 }
885 PMAP_UNLOCK(pm);
886 }
887
888 void
889 pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr,
890 vm_size_t len, vm_offset_t src_addr)
891 {
892
893 /*
894 * This is not needed as it's mainly an optimisation.
895 * It may want to be implemented later though.
896 */
897 }
898
899 void
900 pmap_copy_page(vm_page_t msrc, vm_page_t mdst)
901 {
902 vm_offset_t dst;
903 vm_offset_t src;
904
905 dst = VM_PAGE_TO_PHYS(mdst);
906 src = VM_PAGE_TO_PHYS(msrc);
907
908 kcopy((void *)src, (void *)dst, PAGE_SIZE);
909 }
910
911 /*
912 * Zero a page of physical memory by temporarily mapping it into the tlb.
913 */
914 void
915 pmap_zero_page(vm_page_t m)
916 {
917 vm_offset_t pa = VM_PAGE_TO_PHYS(m);
918 caddr_t va;
919
920 if (pa < SEGMENT_LENGTH) {
921 va = (caddr_t) pa;
922 } else if (pmap_initialized) {
923 if (pmap_pvo_zeropage == NULL)
924 pmap_pvo_zeropage = pmap_rkva_alloc();
925 pmap_pa_map(pmap_pvo_zeropage, pa, NULL, NULL);
926 va = (caddr_t)PVO_VADDR(pmap_pvo_zeropage);
927 } else {
928 panic("pmap_zero_page: can't zero pa %#x", pa);
929 }
930
931 bzero(va, PAGE_SIZE);
932
933 if (pa >= SEGMENT_LENGTH)
934 pmap_pa_unmap(pmap_pvo_zeropage, NULL, NULL);
935 }
936
937 void
938 pmap_zero_page_area(vm_page_t m, int off, int size)
939 {
940 vm_offset_t pa = VM_PAGE_TO_PHYS(m);
941 caddr_t va;
942
943 if (pa < SEGMENT_LENGTH) {
944 va = (caddr_t) pa;
945 } else if (pmap_initialized) {
946 if (pmap_pvo_zeropage == NULL)
947 pmap_pvo_zeropage = pmap_rkva_alloc();
948 pmap_pa_map(pmap_pvo_zeropage, pa, NULL, NULL);
949 va = (caddr_t)PVO_VADDR(pmap_pvo_zeropage);
950 } else {
951 panic("pmap_zero_page: can't zero pa %#x", pa);
952 }
953
954 bzero(va + off, size);
955
956 if (pa >= SEGMENT_LENGTH)
957 pmap_pa_unmap(pmap_pvo_zeropage, NULL, NULL);
958 }
959
960 void
961 pmap_zero_page_idle(vm_page_t m)
962 {
963
964 /* XXX this is called outside of Giant, is pmap_zero_page safe? */
965 /* XXX maybe have a dedicated mapping for this to avoid the problem? */
966 mtx_lock(&Giant);
967 pmap_zero_page(m);
968 mtx_unlock(&Giant);
969 }
970
971 /*
972 * Map the given physical page at the specified virtual address in the
973 * target pmap with the protection requested. If specified the page
974 * will be wired down.
975 */
976 void
977 pmap_enter(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot,
978 boolean_t wired)
979 {
980 struct pvo_head *pvo_head;
981 uma_zone_t zone;
982 vm_page_t pg;
983 u_int pte_lo, pvo_flags, was_exec, i;
984 int error;
985
986 if (!pmap_initialized) {
987 pvo_head = &pmap_pvo_kunmanaged;
988 zone = pmap_upvo_zone;
989 pvo_flags = 0;
990 pg = NULL;
991 was_exec = PTE_EXEC;
992 } else {
993 pvo_head = vm_page_to_pvoh(m);
994 pg = m;
995 zone = pmap_mpvo_zone;
996 pvo_flags = PVO_MANAGED;
997 was_exec = 0;
998 }
999 if (pmap_bootstrapped)
1000 vm_page_lock_queues();
1001 PMAP_LOCK(pmap);
1002
1003 /* XXX change the pvo head for fake pages */
1004 if ((m->flags & PG_FICTITIOUS) == PG_FICTITIOUS)
1005 pvo_head = &pmap_pvo_kunmanaged;
1006
1007 /*
1008 * If this is a managed page, and it's the first reference to the page,
1009 * clear the execness of the page. Otherwise fetch the execness.
1010 */
1011 if ((pg != NULL) && ((m->flags & PG_FICTITIOUS) == 0)) {
1012 if (LIST_EMPTY(pvo_head)) {
1013 pmap_attr_clear(pg, PTE_EXEC);
1014 } else {
1015 was_exec = pmap_attr_fetch(pg) & PTE_EXEC;
1016 }
1017 }
1018
1019 /*
1020 * Assume the page is cache inhibited and access is guarded unless
1021 * it's in our available memory array.
1022 */
1023 pte_lo = PTE_I | PTE_G;
1024 for (i = 0; i < pregions_sz; i++) {
1025 if ((VM_PAGE_TO_PHYS(m) >= pregions[i].mr_start) &&
1026 (VM_PAGE_TO_PHYS(m) <
1027 (pregions[i].mr_start + pregions[i].mr_size))) {
1028 pte_lo &= ~(PTE_I | PTE_G);
1029 break;
1030 }
1031 }
1032
1033 if (prot & VM_PROT_WRITE)
1034 pte_lo |= PTE_BW;
1035 else
1036 pte_lo |= PTE_BR;
1037
1038 if (prot & VM_PROT_EXECUTE)
1039 pvo_flags |= PVO_EXECUTABLE;
1040
1041 if (wired)
1042 pvo_flags |= PVO_WIRED;
1043
1044 if ((m->flags & PG_FICTITIOUS) != 0)
1045 pvo_flags |= PVO_FAKE;
1046
1047 error = pmap_pvo_enter(pmap, zone, pvo_head, va, VM_PAGE_TO_PHYS(m),
1048 pte_lo, pvo_flags);
1049
1050 /*
1051 * Flush the real page from the instruction cache if this page is
1052 * mapped executable and cacheable and was not previously mapped (or
1053 * was not mapped executable).
1054 */
1055 if (error == 0 && (pvo_flags & PVO_EXECUTABLE) &&
1056 (pte_lo & PTE_I) == 0 && was_exec == 0) {
1057 /*
1058 * Flush the real memory from the cache.
1059 */
1060 pmap_syncicache(VM_PAGE_TO_PHYS(m), PAGE_SIZE);
1061 if (pg != NULL)
1062 pmap_attr_save(pg, PTE_EXEC);
1063 }
1064 if (pmap_bootstrapped)
1065 vm_page_unlock_queues();
1066
1067 /* XXX syncicache always until problems are sorted */
1068 pmap_syncicache(VM_PAGE_TO_PHYS(m), PAGE_SIZE);
1069 PMAP_UNLOCK(pmap);
1070 }
1071
1072 vm_page_t
1073 pmap_enter_quick(pmap_t pm, vm_offset_t va, vm_page_t m, vm_page_t mpte)
1074 {
1075
1076 vm_page_busy(m);
1077 vm_page_unlock_queues();
1078 VM_OBJECT_UNLOCK(m->object);
1079 mtx_lock(&Giant);
1080 pmap_enter(pm, va, m, VM_PROT_READ | VM_PROT_EXECUTE, FALSE);
1081 mtx_unlock(&Giant);
1082 VM_OBJECT_LOCK(m->object);
1083 vm_page_lock_queues();
1084 vm_page_wakeup(m);
1085 return (NULL);
1086 }
1087
1088 vm_paddr_t
1089 pmap_extract(pmap_t pm, vm_offset_t va)
1090 {
1091 struct pvo_entry *pvo;
1092 vm_paddr_t pa;
1093
1094 PMAP_LOCK(pm);
1095 pvo = pmap_pvo_find_va(pm, va & ~ADDR_POFF, NULL);
1096 if (pvo == NULL)
1097 pa = 0;
1098 else
1099 pa = (pvo->pvo_pte.pte_lo & PTE_RPGN) | (va & ADDR_POFF);
1100 PMAP_UNLOCK(pm);
1101 return (pa);
1102 }
1103
1104 /*
1105 * Atomically extract and hold the physical page with the given
1106 * pmap and virtual address pair if that mapping permits the given
1107 * protection.
1108 */
1109 vm_page_t
1110 pmap_extract_and_hold(pmap_t pmap, vm_offset_t va, vm_prot_t prot)
1111 {
1112 struct pvo_entry *pvo;
1113 vm_page_t m;
1114
1115 m = NULL;
1116 mtx_lock(&Giant);
1117 vm_page_lock_queues();
1118 PMAP_LOCK(pmap);
1119 pvo = pmap_pvo_find_va(pmap, va & ~ADDR_POFF, NULL);
1120 if (pvo != NULL && (pvo->pvo_pte.pte_hi & PTE_VALID) &&
1121 ((pvo->pvo_pte.pte_lo & PTE_PP) == PTE_RW ||
1122 (prot & VM_PROT_WRITE) == 0)) {
1123 m = PHYS_TO_VM_PAGE(pvo->pvo_pte.pte_lo & PTE_RPGN);
1124 vm_page_hold(m);
1125 }
1126 vm_page_unlock_queues();
1127 PMAP_UNLOCK(pmap);
1128 mtx_unlock(&Giant);
1129 return (m);
1130 }
1131
1132 /*
1133 * Grow the number of kernel page table entries. Unneeded.
1134 */
1135 void
1136 pmap_growkernel(vm_offset_t addr)
1137 {
1138 }
1139
1140 /*
1141 * Initialize a vm_page's machine-dependent fields.
1142 */
1143 void
1144 pmap_page_init(vm_page_t m)
1145 {
1146 }
1147
1148 void
1149 pmap_init(void)
1150 {
1151
1152 CTR0(KTR_PMAP, "pmap_init");
1153
1154 pmap_upvo_zone = uma_zcreate("UPVO entry", sizeof (struct pvo_entry),
1155 NULL, NULL, NULL, NULL, UMA_ALIGN_PTR,
1156 UMA_ZONE_VM | UMA_ZONE_NOFREE);
1157 pmap_mpvo_zone = uma_zcreate("MPVO entry", sizeof(struct pvo_entry),
1158 NULL, NULL, NULL, NULL, UMA_ALIGN_PTR,
1159 UMA_ZONE_VM | UMA_ZONE_NOFREE);
1160 pmap_initialized = TRUE;
1161 }
1162
1163 void
1164 pmap_init2(void)
1165 {
1166
1167 CTR0(KTR_PMAP, "pmap_init2");
1168 }
1169
1170 boolean_t
1171 pmap_is_modified(vm_page_t m)
1172 {
1173
1174 if ((m->flags & (PG_FICTITIOUS |PG_UNMANAGED)) != 0)
1175 return (FALSE);
1176
1177 return (pmap_query_bit(m, PTE_CHG));
1178 }
1179
1180 /*
1181 * pmap_is_prefaultable:
1182 *
1183 * Return whether or not the specified virtual address is elgible
1184 * for prefault.
1185 */
1186 boolean_t
1187 pmap_is_prefaultable(pmap_t pmap, vm_offset_t addr)
1188 {
1189
1190 return (FALSE);
1191 }
1192
1193 void
1194 pmap_clear_reference(vm_page_t m)
1195 {
1196
1197 if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) != 0)
1198 return;
1199 pmap_clear_bit(m, PTE_REF, NULL);
1200 }
1201
1202 void
1203 pmap_clear_modify(vm_page_t m)
1204 {
1205
1206 if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) != 0)
1207 return;
1208 pmap_clear_bit(m, PTE_CHG, NULL);
1209 }
1210
1211 /*
1212 * pmap_ts_referenced:
1213 *
1214 * Return a count of reference bits for a page, clearing those bits.
1215 * It is not necessary for every reference bit to be cleared, but it
1216 * is necessary that 0 only be returned when there are truly no
1217 * reference bits set.
1218 *
1219 * XXX: The exact number of bits to check and clear is a matter that
1220 * should be tested and standardized at some point in the future for
1221 * optimal aging of shared pages.
1222 */
1223 int
1224 pmap_ts_referenced(vm_page_t m)
1225 {
1226 int count;
1227
1228 if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) != 0)
1229 return (0);
1230
1231 count = pmap_clear_bit(m, PTE_REF, NULL);
1232
1233 return (count);
1234 }
1235
1236 /*
1237 * Map a wired page into kernel virtual address space.
1238 */
1239 void
1240 pmap_kenter(vm_offset_t va, vm_offset_t pa)
1241 {
1242 u_int pte_lo;
1243 int error;
1244 int i;
1245
1246 #if 0
1247 if (va < VM_MIN_KERNEL_ADDRESS)
1248 panic("pmap_kenter: attempt to enter non-kernel address %#x",
1249 va);
1250 #endif
1251
1252 pte_lo = PTE_I | PTE_G;
1253 for (i = 0; i < pregions_sz; i++) {
1254 if ((pa >= pregions[i].mr_start) &&
1255 (pa < (pregions[i].mr_start + pregions[i].mr_size))) {
1256 pte_lo &= ~(PTE_I | PTE_G);
1257 break;
1258 }
1259 }
1260
1261 PMAP_LOCK(kernel_pmap);
1262 error = pmap_pvo_enter(kernel_pmap, pmap_upvo_zone,
1263 &pmap_pvo_kunmanaged, va, pa, pte_lo, PVO_WIRED);
1264
1265 if (error != 0 && error != ENOENT)
1266 panic("pmap_kenter: failed to enter va %#x pa %#x: %d", va,
1267 pa, error);
1268
1269 /*
1270 * Flush the real memory from the instruction cache.
1271 */
1272 if ((pte_lo & (PTE_I | PTE_G)) == 0) {
1273 pmap_syncicache(pa, PAGE_SIZE);
1274 }
1275 PMAP_UNLOCK(kernel_pmap);
1276 }
1277
1278 /*
1279 * Extract the physical page address associated with the given kernel virtual
1280 * address.
1281 */
1282 vm_offset_t
1283 pmap_kextract(vm_offset_t va)
1284 {
1285 struct pvo_entry *pvo;
1286 vm_paddr_t pa;
1287
1288 #ifdef UMA_MD_SMALL_ALLOC
1289 /*
1290 * Allow direct mappings
1291 */
1292 if (va < VM_MIN_KERNEL_ADDRESS) {
1293 return (va);
1294 }
1295 #endif
1296
1297 PMAP_LOCK(kernel_pmap);
1298 pvo = pmap_pvo_find_va(kernel_pmap, va & ~ADDR_POFF, NULL);
1299 KASSERT(pvo != NULL, ("pmap_kextract: no addr found"));
1300 pa = (pvo->pvo_pte.pte_lo & PTE_RPGN) | (va & ADDR_POFF);
1301 PMAP_UNLOCK(kernel_pmap);
1302 return (pa);
1303 }
1304
1305 /*
1306 * Remove a wired page from kernel virtual address space.
1307 */
1308 void
1309 pmap_kremove(vm_offset_t va)
1310 {
1311
1312 pmap_remove(kernel_pmap, va, va + PAGE_SIZE);
1313 }
1314
1315 /*
1316 * Map a range of physical addresses into kernel virtual address space.
1317 *
1318 * The value passed in *virt is a suggested virtual address for the mapping.
1319 * Architectures which can support a direct-mapped physical to virtual region
1320 * can return the appropriate address within that region, leaving '*virt'
1321 * unchanged. We cannot and therefore do not; *virt is updated with the
1322 * first usable address after the mapped region.
1323 */
1324 vm_offset_t
1325 pmap_map(vm_offset_t *virt, vm_offset_t pa_start, vm_offset_t pa_end, int prot)
1326 {
1327 vm_offset_t sva, va;
1328
1329 sva = *virt;
1330 va = sva;
1331 for (; pa_start < pa_end; pa_start += PAGE_SIZE, va += PAGE_SIZE)
1332 pmap_kenter(va, pa_start);
1333 *virt = va;
1334 return (sva);
1335 }
1336
1337 int
1338 pmap_mincore(pmap_t pmap, vm_offset_t addr)
1339 {
1340 TODO;
1341 return (0);
1342 }
1343
1344 void
1345 pmap_object_init_pt(pmap_t pm, vm_offset_t addr, vm_object_t object,
1346 vm_pindex_t pindex, vm_size_t size)
1347 {
1348
1349 VM_OBJECT_LOCK_ASSERT(object, MA_OWNED);
1350 KASSERT(object->type == OBJT_DEVICE,
1351 ("pmap_object_init_pt: non-device object"));
1352 KASSERT(pm == &curproc->p_vmspace->vm_pmap || pm == kernel_pmap,
1353 ("pmap_object_init_pt: non current pmap"));
1354 }
1355
1356 /*
1357 * Lower the permission for all mappings to a given page.
1358 */
1359 void
1360 pmap_page_protect(vm_page_t m, vm_prot_t prot)
1361 {
1362 struct pvo_head *pvo_head;
1363 struct pvo_entry *pvo, *next_pvo;
1364 struct pte *pt;
1365 pmap_t pmap;
1366
1367 /*
1368 * Since the routine only downgrades protection, if the
1369 * maximal protection is desired, there isn't any change
1370 * to be made.
1371 */
1372 if ((prot & (VM_PROT_READ|VM_PROT_WRITE)) ==
1373 (VM_PROT_READ|VM_PROT_WRITE))
1374 return;
1375
1376 pvo_head = vm_page_to_pvoh(m);
1377 for (pvo = LIST_FIRST(pvo_head); pvo != NULL; pvo = next_pvo) {
1378 next_pvo = LIST_NEXT(pvo, pvo_vlink);
1379 PMAP_PVO_CHECK(pvo); /* sanity check */
1380 pmap = pvo->pvo_pmap;
1381 PMAP_LOCK(pmap);
1382
1383 /*
1384 * Downgrading to no mapping at all, we just remove the entry.
1385 */
1386 if ((prot & VM_PROT_READ) == 0) {
1387 pmap_pvo_remove(pvo, -1);
1388 PMAP_UNLOCK(pmap);
1389 continue;
1390 }
1391
1392 /*
1393 * If EXEC permission is being revoked, just clear the flag
1394 * in the PVO.
1395 */
1396 if ((prot & VM_PROT_EXECUTE) == 0)
1397 pvo->pvo_vaddr &= ~PVO_EXECUTABLE;
1398
1399 /*
1400 * If this entry is already RO, don't diddle with the page
1401 * table.
1402 */
1403 if ((pvo->pvo_pte.pte_lo & PTE_PP) == PTE_BR) {
1404 PMAP_UNLOCK(pmap);
1405 PMAP_PVO_CHECK(pvo);
1406 continue;
1407 }
1408
1409 /*
1410 * Grab the PTE before we diddle the bits so pvo_to_pte can
1411 * verify the pte contents are as expected.
1412 */
1413 pt = pmap_pvo_to_pte(pvo, -1);
1414 pvo->pvo_pte.pte_lo &= ~PTE_PP;
1415 pvo->pvo_pte.pte_lo |= PTE_BR;
1416 if (pt != NULL)
1417 pmap_pte_change(pt, &pvo->pvo_pte, pvo->pvo_vaddr);
1418 PMAP_UNLOCK(pmap);
1419 PMAP_PVO_CHECK(pvo); /* sanity check */
1420 }
1421
1422 /*
1423 * Downgrading from writeable: clear the VM page flag
1424 */
1425 if ((prot & VM_PROT_WRITE) != VM_PROT_WRITE)
1426 vm_page_flag_clear(m, PG_WRITEABLE);
1427 }
1428
1429 /*
1430 * Returns true if the pmap's pv is one of the first
1431 * 16 pvs linked to from this page. This count may
1432 * be changed upwards or downwards in the future; it
1433 * is only necessary that true be returned for a small
1434 * subset of pmaps for proper page aging.
1435 */
1436 boolean_t
1437 pmap_page_exists_quick(pmap_t pmap, vm_page_t m)
1438 {
1439 int loops;
1440 struct pvo_entry *pvo;
1441
1442 if (!pmap_initialized || (m->flags & PG_FICTITIOUS))
1443 return FALSE;
1444
1445 loops = 0;
1446 LIST_FOREACH(pvo, vm_page_to_pvoh(m), pvo_vlink) {
1447 if (pvo->pvo_pmap == pmap)
1448 return (TRUE);
1449 if (++loops >= 16)
1450 break;
1451 }
1452
1453 return (FALSE);
1454 }
1455
1456 static u_int pmap_vsidcontext;
1457
1458 void
1459 pmap_pinit(pmap_t pmap)
1460 {
1461 int i, mask;
1462 u_int entropy;
1463
1464 KASSERT((int)pmap < VM_MIN_KERNEL_ADDRESS, ("pmap_pinit: virt pmap"));
1465 PMAP_LOCK_INIT(pmap);
1466
1467 entropy = 0;
1468 __asm __volatile("mftb %0" : "=r"(entropy));
1469
1470 /*
1471 * Allocate some segment registers for this pmap.
1472 */
1473 for (i = 0; i < NPMAPS; i += VSID_NBPW) {
1474 u_int hash, n;
1475
1476 /*
1477 * Create a new value by mutiplying by a prime and adding in
1478 * entropy from the timebase register. This is to make the
1479 * VSID more random so that the PT hash function collides
1480 * less often. (Note that the prime casues gcc to do shifts
1481 * instead of a multiply.)
1482 */
1483 pmap_vsidcontext = (pmap_vsidcontext * 0x1105) + entropy;
1484 hash = pmap_vsidcontext & (NPMAPS - 1);
1485 if (hash == 0) /* 0 is special, avoid it */
1486 continue;
1487 n = hash >> 5;
1488 mask = 1 << (hash & (VSID_NBPW - 1));
1489 hash = (pmap_vsidcontext & 0xfffff);
1490 if (pmap_vsid_bitmap[n] & mask) { /* collision? */
1491 /* anything free in this bucket? */
1492 if (pmap_vsid_bitmap[n] == 0xffffffff) {
1493 entropy = (pmap_vsidcontext >> 20);
1494 continue;
1495 }
1496 i = ffs(~pmap_vsid_bitmap[i]) - 1;
1497 mask = 1 << i;
1498 hash &= 0xfffff & ~(VSID_NBPW - 1);
1499 hash |= i;
1500 }
1501 pmap_vsid_bitmap[n] |= mask;
1502 for (i = 0; i < 16; i++)
1503 pmap->pm_sr[i] = VSID_MAKE(i, hash);
1504 return;
1505 }
1506
1507 panic("pmap_pinit: out of segments");
1508 }
1509
1510 /*
1511 * Initialize the pmap associated with process 0.
1512 */
1513 void
1514 pmap_pinit0(pmap_t pm)
1515 {
1516
1517 pmap_pinit(pm);
1518 bzero(&pm->pm_stats, sizeof(pm->pm_stats));
1519 }
1520
1521 /*
1522 * Set the physical protection on the specified range of this map as requested.
1523 */
1524 void
1525 pmap_protect(pmap_t pm, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot)
1526 {
1527 struct pvo_entry *pvo;
1528 struct pte *pt;
1529 int pteidx;
1530
1531 CTR4(KTR_PMAP, "pmap_protect: pm=%p sva=%#x eva=%#x prot=%#x", pm, sva,
1532 eva, prot);
1533
1534
1535 KASSERT(pm == &curproc->p_vmspace->vm_pmap || pm == kernel_pmap,
1536 ("pmap_protect: non current pmap"));
1537
1538 if ((prot & VM_PROT_READ) == VM_PROT_NONE) {
1539 mtx_lock(&Giant);
1540 pmap_remove(pm, sva, eva);
1541 mtx_unlock(&Giant);
1542 return;
1543 }
1544
1545 mtx_lock(&Giant);
1546 vm_page_lock_queues();
1547 PMAP_LOCK(pm);
1548 for (; sva < eva; sva += PAGE_SIZE) {
1549 pvo = pmap_pvo_find_va(pm, sva, &pteidx);
1550 if (pvo == NULL)
1551 continue;
1552
1553 if ((prot & VM_PROT_EXECUTE) == 0)
1554 pvo->pvo_vaddr &= ~PVO_EXECUTABLE;
1555
1556 /*
1557 * Grab the PTE pointer before we diddle with the cached PTE
1558 * copy.
1559 */
1560 pt = pmap_pvo_to_pte(pvo, pteidx);
1561 /*
1562 * Change the protection of the page.
1563 */
1564 pvo->pvo_pte.pte_lo &= ~PTE_PP;
1565 pvo->pvo_pte.pte_lo |= PTE_BR;
1566
1567 /*
1568 * If the PVO is in the page table, update that pte as well.
1569 */
1570 if (pt != NULL)
1571 pmap_pte_change(pt, &pvo->pvo_pte, pvo->pvo_vaddr);
1572 }
1573 vm_page_unlock_queues();
1574 PMAP_UNLOCK(pm);
1575 mtx_unlock(&Giant);
1576 }
1577
1578 /*
1579 * Map a list of wired pages into kernel virtual address space. This is
1580 * intended for temporary mappings which do not need page modification or
1581 * references recorded. Existing mappings in the region are overwritten.
1582 */
1583 void
1584 pmap_qenter(vm_offset_t sva, vm_page_t *m, int count)
1585 {
1586 vm_offset_t va;
1587
1588 va = sva;
1589 while (count-- > 0) {
1590 pmap_kenter(va, VM_PAGE_TO_PHYS(*m));
1591 va += PAGE_SIZE;
1592 m++;
1593 }
1594 }
1595
1596 /*
1597 * Remove page mappings from kernel virtual address space. Intended for
1598 * temporary mappings entered by pmap_qenter.
1599 */
1600 void
1601 pmap_qremove(vm_offset_t sva, int count)
1602 {
1603 vm_offset_t va;
1604
1605 va = sva;
1606 while (count-- > 0) {
1607 pmap_kremove(va);
1608 va += PAGE_SIZE;
1609 }
1610 }
1611
1612 void
1613 pmap_release(pmap_t pmap)
1614 {
1615 int idx, mask;
1616
1617 /*
1618 * Free segment register's VSID
1619 */
1620 if (pmap->pm_sr[0] == 0)
1621 panic("pmap_release");
1622
1623 idx = VSID_TO_HASH(pmap->pm_sr[0]) & (NPMAPS-1);
1624 mask = 1 << (idx % VSID_NBPW);
1625 idx /= VSID_NBPW;
1626 pmap_vsid_bitmap[idx] &= ~mask;
1627 PMAP_LOCK_DESTROY(pmap);
1628 }
1629
1630 /*
1631 * Remove the given range of addresses from the specified map.
1632 */
1633 void
1634 pmap_remove(pmap_t pm, vm_offset_t sva, vm_offset_t eva)
1635 {
1636 struct pvo_entry *pvo;
1637 int pteidx;
1638
1639 vm_page_lock_queues();
1640 PMAP_LOCK(pm);
1641 for (; sva < eva; sva += PAGE_SIZE) {
1642 pvo = pmap_pvo_find_va(pm, sva, &pteidx);
1643 if (pvo != NULL) {
1644 pmap_pvo_remove(pvo, pteidx);
1645 }
1646 }
1647 PMAP_UNLOCK(pm);
1648 vm_page_unlock_queues();
1649 }
1650
1651 /*
1652 * Remove physical page from all pmaps in which it resides. pmap_pvo_remove()
1653 * will reflect changes in pte's back to the vm_page.
1654 */
1655 void
1656 pmap_remove_all(vm_page_t m)
1657 {
1658 struct pvo_head *pvo_head;
1659 struct pvo_entry *pvo, *next_pvo;
1660 pmap_t pmap;
1661
1662 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
1663
1664 pvo_head = vm_page_to_pvoh(m);
1665 for (pvo = LIST_FIRST(pvo_head); pvo != NULL; pvo = next_pvo) {
1666 next_pvo = LIST_NEXT(pvo, pvo_vlink);
1667
1668 PMAP_PVO_CHECK(pvo); /* sanity check */
1669 pmap = pvo->pvo_pmap;
1670 PMAP_LOCK(pmap);
1671 pmap_pvo_remove(pvo, -1);
1672 PMAP_UNLOCK(pmap);
1673 }
1674 vm_page_flag_clear(m, PG_WRITEABLE);
1675 }
1676
1677 /*
1678 * Remove all pages from specified address space, this aids process exit
1679 * speeds. This is much faster than pmap_remove in the case of running down
1680 * an entire address space. Only works for the current pmap.
1681 */
1682 void
1683 pmap_remove_pages(pmap_t pm, vm_offset_t sva, vm_offset_t eva)
1684 {
1685 }
1686
1687 /*
1688 * Allocate a physical page of memory directly from the phys_avail map.
1689 * Can only be called from pmap_bootstrap before avail start and end are
1690 * calculated.
1691 */
1692 static vm_offset_t
1693 pmap_bootstrap_alloc(vm_size_t size, u_int align)
1694 {
1695 vm_offset_t s, e;
1696 int i, j;
1697
1698 size = round_page(size);
1699 for (i = 0; phys_avail[i + 1] != 0; i += 2) {
1700 if (align != 0)
1701 s = (phys_avail[i] + align - 1) & ~(align - 1);
1702 else
1703 s = phys_avail[i];
1704 e = s + size;
1705
1706 if (s < phys_avail[i] || e > phys_avail[i + 1])
1707 continue;
1708
1709 if (s == phys_avail[i]) {
1710 phys_avail[i] += size;
1711 } else if (e == phys_avail[i + 1]) {
1712 phys_avail[i + 1] -= size;
1713 } else {
1714 for (j = phys_avail_count * 2; j > i; j -= 2) {
1715 phys_avail[j] = phys_avail[j - 2];
1716 phys_avail[j + 1] = phys_avail[j - 1];
1717 }
1718
1719 phys_avail[i + 3] = phys_avail[i + 1];
1720 phys_avail[i + 1] = s;
1721 phys_avail[i + 2] = e;
1722 phys_avail_count++;
1723 }
1724
1725 return (s);
1726 }
1727 panic("pmap_bootstrap_alloc: could not allocate memory");
1728 }
1729
1730 /*
1731 * Return an unmapped pvo for a kernel virtual address.
1732 * Used by pmap functions that operate on physical pages.
1733 */
1734 static struct pvo_entry *
1735 pmap_rkva_alloc(void)
1736 {
1737 struct pvo_entry *pvo;
1738 struct pte *pt;
1739 vm_offset_t kva;
1740 int pteidx;
1741
1742 if (pmap_rkva_count == 0)
1743 panic("pmap_rkva_alloc: no more reserved KVAs");
1744
1745 kva = pmap_rkva_start + (PAGE_SIZE * --pmap_rkva_count);
1746 pmap_kenter(kva, 0);
1747
1748 pvo = pmap_pvo_find_va(kernel_pmap, kva, &pteidx);
1749
1750 if (pvo == NULL)
1751 panic("pmap_kva_alloc: pmap_pvo_find_va failed");
1752
1753 pt = pmap_pvo_to_pte(pvo, pteidx);
1754
1755 if (pt == NULL)
1756 panic("pmap_kva_alloc: pmap_pvo_to_pte failed");
1757
1758 pmap_pte_unset(pt, &pvo->pvo_pte, pvo->pvo_vaddr);
1759 PVO_PTEGIDX_CLR(pvo);
1760
1761 pmap_pte_overflow++;
1762
1763 return (pvo);
1764 }
1765
1766 static void
1767 pmap_pa_map(struct pvo_entry *pvo, vm_offset_t pa, struct pte *saved_pt,
1768 int *depth_p)
1769 {
1770 struct pte *pt;
1771
1772 /*
1773 * If this pvo already has a valid pte, we need to save it so it can
1774 * be restored later. We then just reload the new PTE over the old
1775 * slot.
1776 */
1777 if (saved_pt != NULL) {
1778 pt = pmap_pvo_to_pte(pvo, -1);
1779
1780 if (pt != NULL) {
1781 pmap_pte_unset(pt, &pvo->pvo_pte, pvo->pvo_vaddr);
1782 PVO_PTEGIDX_CLR(pvo);
1783 pmap_pte_overflow++;
1784 }
1785
1786 *saved_pt = pvo->pvo_pte;
1787
1788 pvo->pvo_pte.pte_lo &= ~PTE_RPGN;
1789 }
1790
1791 pvo->pvo_pte.pte_lo |= pa;
1792
1793 if (!pmap_pte_spill(pvo->pvo_vaddr))
1794 panic("pmap_pa_map: could not spill pvo %p", pvo);
1795
1796 if (depth_p != NULL)
1797 (*depth_p)++;
1798 }
1799
1800 static void
1801 pmap_pa_unmap(struct pvo_entry *pvo, struct pte *saved_pt, int *depth_p)
1802 {
1803 struct pte *pt;
1804
1805 pt = pmap_pvo_to_pte(pvo, -1);
1806
1807 if (pt != NULL) {
1808 pmap_pte_unset(pt, &pvo->pvo_pte, pvo->pvo_vaddr);
1809 PVO_PTEGIDX_CLR(pvo);
1810 pmap_pte_overflow++;
1811 }
1812
1813 pvo->pvo_pte.pte_lo &= ~PTE_RPGN;
1814
1815 /*
1816 * If there is a saved PTE and it's valid, restore it and return.
1817 */
1818 if (saved_pt != NULL && (saved_pt->pte_lo & PTE_RPGN) != 0) {
1819 if (depth_p != NULL && --(*depth_p) == 0)
1820 panic("pmap_pa_unmap: restoring but depth == 0");
1821
1822 pvo->pvo_pte = *saved_pt;
1823
1824 if (!pmap_pte_spill(pvo->pvo_vaddr))
1825 panic("pmap_pa_unmap: could not spill pvo %p", pvo);
1826 }
1827 }
1828
1829 static void
1830 pmap_syncicache(vm_offset_t pa, vm_size_t len)
1831 {
1832 __syncicache((void *)pa, len);
1833 }
1834
1835 static void
1836 tlbia(void)
1837 {
1838 caddr_t i;
1839
1840 SYNC();
1841 for (i = 0; i < (caddr_t)0x00040000; i += 0x00001000) {
1842 TLBIE(i);
1843 EIEIO();
1844 }
1845 TLBSYNC();
1846 SYNC();
1847 }
1848
1849 static int
1850 pmap_pvo_enter(pmap_t pm, uma_zone_t zone, struct pvo_head *pvo_head,
1851 vm_offset_t va, vm_offset_t pa, u_int pte_lo, int flags)
1852 {
1853 struct pvo_entry *pvo;
1854 u_int sr;
1855 int first;
1856 u_int ptegidx;
1857 int i;
1858 int bootstrap;
1859
1860 pmap_pvo_enter_calls++;
1861 first = 0;
1862 bootstrap = 0;
1863
1864 /*
1865 * Compute the PTE Group index.
1866 */
1867 va &= ~ADDR_POFF;
1868 sr = va_to_sr(pm->pm_sr, va);
1869 ptegidx = va_to_pteg(sr, va);
1870
1871 /*
1872 * Remove any existing mapping for this page. Reuse the pvo entry if
1873 * there is a mapping.
1874 */
1875 mtx_lock(&pmap_table_mutex);
1876 LIST_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) {
1877 if (pvo->pvo_pmap == pm && PVO_VADDR(pvo) == va) {
1878 if ((pvo->pvo_pte.pte_lo & PTE_RPGN) == pa &&
1879 (pvo->pvo_pte.pte_lo & PTE_PP) ==
1880 (pte_lo & PTE_PP)) {
1881 mtx_unlock(&pmap_table_mutex);
1882 return (0);
1883 }
1884 pmap_pvo_remove(pvo, -1);
1885 break;
1886 }
1887 }
1888
1889 /*
1890 * If we aren't overwriting a mapping, try to allocate.
1891 */
1892 if (pmap_initialized) {
1893 pvo = uma_zalloc(zone, M_NOWAIT);
1894 } else {
1895 if (pmap_bpvo_pool_index >= BPVO_POOL_SIZE) {
1896 panic("pmap_enter: bpvo pool exhausted, %d, %d, %d",
1897 pmap_bpvo_pool_index, BPVO_POOL_SIZE,
1898 BPVO_POOL_SIZE * sizeof(struct pvo_entry));
1899 }
1900 pvo = &pmap_bpvo_pool[pmap_bpvo_pool_index];
1901 pmap_bpvo_pool_index++;
1902 bootstrap = 1;
1903 }
1904
1905 if (pvo == NULL) {
1906 mtx_unlock(&pmap_table_mutex);
1907 return (ENOMEM);
1908 }
1909
1910 pmap_pvo_entries++;
1911 pvo->pvo_vaddr = va;
1912 pvo->pvo_pmap = pm;
1913 LIST_INSERT_HEAD(&pmap_pvo_table[ptegidx], pvo, pvo_olink);
1914 pvo->pvo_vaddr &= ~ADDR_POFF;
1915 if (flags & VM_PROT_EXECUTE)
1916 pvo->pvo_vaddr |= PVO_EXECUTABLE;
1917 if (flags & PVO_WIRED)
1918 pvo->pvo_vaddr |= PVO_WIRED;
1919 if (pvo_head != &pmap_pvo_kunmanaged)
1920 pvo->pvo_vaddr |= PVO_MANAGED;
1921 if (bootstrap)
1922 pvo->pvo_vaddr |= PVO_BOOTSTRAP;
1923 if (flags & PVO_FAKE)
1924 pvo->pvo_vaddr |= PVO_FAKE;
1925
1926 pmap_pte_create(&pvo->pvo_pte, sr, va, pa | pte_lo);
1927
1928 /*
1929 * Remember if the list was empty and therefore will be the first
1930 * item.
1931 */
1932 if (LIST_FIRST(pvo_head) == NULL)
1933 first = 1;
1934 LIST_INSERT_HEAD(pvo_head, pvo, pvo_vlink);
1935
1936 if (pvo->pvo_pte.pte_lo & PVO_WIRED)
1937 pm->pm_stats.wired_count++;
1938 pm->pm_stats.resident_count++;
1939
1940 /*
1941 * We hope this succeeds but it isn't required.
1942 */
1943 i = pmap_pte_insert(ptegidx, &pvo->pvo_pte);
1944 if (i >= 0) {
1945 PVO_PTEGIDX_SET(pvo, i);
1946 } else {
1947 panic("pmap_pvo_enter: overflow");
1948 pmap_pte_overflow++;
1949 }
1950 mtx_unlock(&pmap_table_mutex);
1951
1952 return (first ? ENOENT : 0);
1953 }
1954
1955 static void
1956 pmap_pvo_remove(struct pvo_entry *pvo, int pteidx)
1957 {
1958 struct pte *pt;
1959
1960 /*
1961 * If there is an active pte entry, we need to deactivate it (and
1962 * save the ref & cfg bits).
1963 */
1964 pt = pmap_pvo_to_pte(pvo, pteidx);
1965 if (pt != NULL) {
1966 pmap_pte_unset(pt, &pvo->pvo_pte, pvo->pvo_vaddr);
1967 PVO_PTEGIDX_CLR(pvo);
1968 } else {
1969 pmap_pte_overflow--;
1970 }
1971
1972 /*
1973 * Update our statistics.
1974 */
1975 pvo->pvo_pmap->pm_stats.resident_count--;
1976 if (pvo->pvo_pte.pte_lo & PVO_WIRED)
1977 pvo->pvo_pmap->pm_stats.wired_count--;
1978
1979 /*
1980 * Save the REF/CHG bits into their cache if the page is managed.
1981 */
1982 if ((pvo->pvo_vaddr & (PVO_MANAGED|PVO_FAKE)) == PVO_MANAGED) {
1983 struct vm_page *pg;
1984
1985 pg = PHYS_TO_VM_PAGE(pvo->pvo_pte.pte_lo & PTE_RPGN);
1986 if (pg != NULL) {
1987 pmap_attr_save(pg, pvo->pvo_pte.pte_lo &
1988 (PTE_REF | PTE_CHG));
1989 }
1990 }
1991
1992 /*
1993 * Remove this PVO from the PV list.
1994 */
1995 LIST_REMOVE(pvo, pvo_vlink);
1996
1997 /*
1998 * Remove this from the overflow list and return it to the pool
1999 * if we aren't going to reuse it.
2000 */
2001 LIST_REMOVE(pvo, pvo_olink);
2002 if (!(pvo->pvo_vaddr & PVO_BOOTSTRAP))
2003 uma_zfree(pvo->pvo_vaddr & PVO_MANAGED ? pmap_mpvo_zone :
2004 pmap_upvo_zone, pvo);
2005 pmap_pvo_entries--;
2006 pmap_pvo_remove_calls++;
2007 }
2008
2009 static __inline int
2010 pmap_pvo_pte_index(const struct pvo_entry *pvo, int ptegidx)
2011 {
2012 int pteidx;
2013
2014 /*
2015 * We can find the actual pte entry without searching by grabbing
2016 * the PTEG index from 3 unused bits in pte_lo[11:9] and by
2017 * noticing the HID bit.
2018 */
2019 pteidx = ptegidx * 8 + PVO_PTEGIDX_GET(pvo);
2020 if (pvo->pvo_pte.pte_hi & PTE_HID)
2021 pteidx ^= pmap_pteg_mask * 8;
2022
2023 return (pteidx);
2024 }
2025
2026 static struct pvo_entry *
2027 pmap_pvo_find_va(pmap_t pm, vm_offset_t va, int *pteidx_p)
2028 {
2029 struct pvo_entry *pvo;
2030 int ptegidx;
2031 u_int sr;
2032
2033 va &= ~ADDR_POFF;
2034 sr = va_to_sr(pm->pm_sr, va);
2035 ptegidx = va_to_pteg(sr, va);
2036
2037 mtx_lock(&pmap_table_mutex);
2038 LIST_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) {
2039 if (pvo->pvo_pmap == pm && PVO_VADDR(pvo) == va) {
2040 if (pteidx_p)
2041 *pteidx_p = pmap_pvo_pte_index(pvo, ptegidx);
2042 break;
2043 }
2044 }
2045 mtx_unlock(&pmap_table_mutex);
2046
2047 return (pvo);
2048 }
2049
2050 static struct pte *
2051 pmap_pvo_to_pte(const struct pvo_entry *pvo, int pteidx)
2052 {
2053 struct pte *pt;
2054
2055 /*
2056 * If we haven't been supplied the ptegidx, calculate it.
2057 */
2058 if (pteidx == -1) {
2059 int ptegidx;
2060 u_int sr;
2061
2062 sr = va_to_sr(pvo->pvo_pmap->pm_sr, pvo->pvo_vaddr);
2063 ptegidx = va_to_pteg(sr, pvo->pvo_vaddr);
2064 pteidx = pmap_pvo_pte_index(pvo, ptegidx);
2065 }
2066
2067 pt = &pmap_pteg_table[pteidx >> 3].pt[pteidx & 7];
2068
2069 if ((pvo->pvo_pte.pte_hi & PTE_VALID) && !PVO_PTEGIDX_ISSET(pvo)) {
2070 panic("pmap_pvo_to_pte: pvo %p has valid pte in pvo but no "
2071 "valid pte index", pvo);
2072 }
2073
2074 if ((pvo->pvo_pte.pte_hi & PTE_VALID) == 0 && PVO_PTEGIDX_ISSET(pvo)) {
2075 panic("pmap_pvo_to_pte: pvo %p has valid pte index in pvo "
2076 "pvo but no valid pte", pvo);
2077 }
2078
2079 if ((pt->pte_hi ^ (pvo->pvo_pte.pte_hi & ~PTE_VALID)) == PTE_VALID) {
2080 if ((pvo->pvo_pte.pte_hi & PTE_VALID) == 0) {
2081 panic("pmap_pvo_to_pte: pvo %p has valid pte in "
2082 "pmap_pteg_table %p but invalid in pvo", pvo, pt);
2083 }
2084
2085 if (((pt->pte_lo ^ pvo->pvo_pte.pte_lo) & ~(PTE_CHG|PTE_REF))
2086 != 0) {
2087 panic("pmap_pvo_to_pte: pvo %p pte does not match "
2088 "pte %p in pmap_pteg_table", pvo, pt);
2089 }
2090
2091 return (pt);
2092 }
2093
2094 if (pvo->pvo_pte.pte_hi & PTE_VALID) {
2095 panic("pmap_pvo_to_pte: pvo %p has invalid pte %p in "
2096 "pmap_pteg_table but valid in pvo", pvo, pt);
2097 }
2098
2099 return (NULL);
2100 }
2101
2102 /*
2103 * XXX: THIS STUFF SHOULD BE IN pte.c?
2104 */
2105 int
2106 pmap_pte_spill(vm_offset_t addr)
2107 {
2108 struct pvo_entry *source_pvo, *victim_pvo;
2109 struct pvo_entry *pvo;
2110 int ptegidx, i, j;
2111 u_int sr;
2112 struct pteg *pteg;
2113 struct pte *pt;
2114
2115 pmap_pte_spills++;
2116
2117 sr = mfsrin(addr);
2118 ptegidx = va_to_pteg(sr, addr);
2119
2120 /*
2121 * Have to substitute some entry. Use the primary hash for this.
2122 * Use low bits of timebase as random generator.
2123 */
2124 pteg = &pmap_pteg_table[ptegidx];
2125 mtx_lock(&pmap_table_mutex);
2126 __asm __volatile("mftb %0" : "=r"(i));
2127 i &= 7;
2128 pt = &pteg->pt[i];
2129
2130 source_pvo = NULL;
2131 victim_pvo = NULL;
2132 LIST_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) {
2133 /*
2134 * We need to find a pvo entry for this address.
2135 */
2136 PMAP_PVO_CHECK(pvo);
2137 if (source_pvo == NULL &&
2138 pmap_pte_match(&pvo->pvo_pte, sr, addr,
2139 pvo->pvo_pte.pte_hi & PTE_HID)) {
2140 /*
2141 * Now found an entry to be spilled into the pteg.
2142 * The PTE is now valid, so we know it's active.
2143 */
2144 j = pmap_pte_insert(ptegidx, &pvo->pvo_pte);
2145
2146 if (j >= 0) {
2147 PVO_PTEGIDX_SET(pvo, j);
2148 pmap_pte_overflow--;
2149 PMAP_PVO_CHECK(pvo);
2150 mtx_unlock(&pmap_table_mutex);
2151 return (1);
2152 }
2153
2154 source_pvo = pvo;
2155
2156 if (victim_pvo != NULL)
2157 break;
2158 }
2159
2160 /*
2161 * We also need the pvo entry of the victim we are replacing
2162 * so save the R & C bits of the PTE.
2163 */
2164 if ((pt->pte_hi & PTE_HID) == 0 && victim_pvo == NULL &&
2165 pmap_pte_compare(pt, &pvo->pvo_pte)) {
2166 victim_pvo = pvo;
2167 if (source_pvo != NULL)
2168 break;
2169 }
2170 }
2171
2172 if (source_pvo == NULL) {
2173 mtx_unlock(&pmap_table_mutex);
2174 return (0);
2175 }
2176
2177 if (victim_pvo == NULL) {
2178 if ((pt->pte_hi & PTE_HID) == 0)
2179 panic("pmap_pte_spill: victim p-pte (%p) has no pvo"
2180 "entry", pt);
2181
2182 /*
2183 * If this is a secondary PTE, we need to search it's primary
2184 * pvo bucket for the matching PVO.
2185 */
2186 LIST_FOREACH(pvo, &pmap_pvo_table[ptegidx ^ pmap_pteg_mask],
2187 pvo_olink) {
2188 PMAP_PVO_CHECK(pvo);
2189 /*
2190 * We also need the pvo entry of the victim we are
2191 * replacing so save the R & C bits of the PTE.
2192 */
2193 if (pmap_pte_compare(pt, &pvo->pvo_pte)) {
2194 victim_pvo = pvo;
2195 break;
2196 }
2197 }
2198
2199 if (victim_pvo == NULL)
2200 panic("pmap_pte_spill: victim s-pte (%p) has no pvo"
2201 "entry", pt);
2202 }
2203
2204 /*
2205 * We are invalidating the TLB entry for the EA we are replacing even
2206 * though it's valid. If we don't, we lose any ref/chg bit changes
2207 * contained in the TLB entry.
2208 */
2209 source_pvo->pvo_pte.pte_hi &= ~PTE_HID;
2210
2211 pmap_pte_unset(pt, &victim_pvo->pvo_pte, victim_pvo->pvo_vaddr);
2212 pmap_pte_set(pt, &source_pvo->pvo_pte);
2213
2214 PVO_PTEGIDX_CLR(victim_pvo);
2215 PVO_PTEGIDX_SET(source_pvo, i);
2216 pmap_pte_replacements++;
2217
2218 PMAP_PVO_CHECK(victim_pvo);
2219 PMAP_PVO_CHECK(source_pvo);
2220
2221 mtx_unlock(&pmap_table_mutex);
2222 return (1);
2223 }
2224
2225 static int
2226 pmap_pte_insert(u_int ptegidx, struct pte *pvo_pt)
2227 {
2228 struct pte *pt;
2229 int i;
2230
2231 /*
2232 * First try primary hash.
2233 */
2234 for (pt = pmap_pteg_table[ptegidx].pt, i = 0; i < 8; i++, pt++) {
2235 if ((pt->pte_hi & PTE_VALID) == 0) {
2236 pvo_pt->pte_hi &= ~PTE_HID;
2237 pmap_pte_set(pt, pvo_pt);
2238 return (i);
2239 }
2240 }
2241
2242 /*
2243 * Now try secondary hash.
2244 */
2245 ptegidx ^= pmap_pteg_mask;
2246 ptegidx++;
2247 for (pt = pmap_pteg_table[ptegidx].pt, i = 0; i < 8; i++, pt++) {
2248 if ((pt->pte_hi & PTE_VALID) == 0) {
2249 pvo_pt->pte_hi |= PTE_HID;
2250 pmap_pte_set(pt, pvo_pt);
2251 return (i);
2252 }
2253 }
2254
2255 panic("pmap_pte_insert: overflow");
2256 return (-1);
2257 }
2258
2259 static boolean_t
2260 pmap_query_bit(vm_page_t m, int ptebit)
2261 {
2262 struct pvo_entry *pvo;
2263 struct pte *pt;
2264
2265 #if 0
2266 if (pmap_attr_fetch(m) & ptebit)
2267 return (TRUE);
2268 #endif
2269
2270 LIST_FOREACH(pvo, vm_page_to_pvoh(m), pvo_vlink) {
2271 PMAP_PVO_CHECK(pvo); /* sanity check */
2272
2273 /*
2274 * See if we saved the bit off. If so, cache it and return
2275 * success.
2276 */
2277 if (pvo->pvo_pte.pte_lo & ptebit) {
2278 pmap_attr_save(m, ptebit);
2279 PMAP_PVO_CHECK(pvo); /* sanity check */
2280 return (TRUE);
2281 }
2282 }
2283
2284 /*
2285 * No luck, now go through the hard part of looking at the PTEs
2286 * themselves. Sync so that any pending REF/CHG bits are flushed to
2287 * the PTEs.
2288 */
2289 SYNC();
2290 LIST_FOREACH(pvo, vm_page_to_pvoh(m), pvo_vlink) {
2291 PMAP_PVO_CHECK(pvo); /* sanity check */
2292
2293 /*
2294 * See if this pvo has a valid PTE. if so, fetch the
2295 * REF/CHG bits from the valid PTE. If the appropriate
2296 * ptebit is set, cache it and return success.
2297 */
2298 pt = pmap_pvo_to_pte(pvo, -1);
2299 if (pt != NULL) {
2300 pmap_pte_synch(pt, &pvo->pvo_pte);
2301 if (pvo->pvo_pte.pte_lo & ptebit) {
2302 pmap_attr_save(m, ptebit);
2303 PMAP_PVO_CHECK(pvo); /* sanity check */
2304 return (TRUE);
2305 }
2306 }
2307 }
2308
2309 return (FALSE);
2310 }
2311
2312 static u_int
2313 pmap_clear_bit(vm_page_t m, int ptebit, int *origbit)
2314 {
2315 u_int count;
2316 struct pvo_entry *pvo;
2317 struct pte *pt;
2318 int rv;
2319
2320 /*
2321 * Clear the cached value.
2322 */
2323 rv = pmap_attr_fetch(m);
2324 pmap_attr_clear(m, ptebit);
2325
2326 /*
2327 * Sync so that any pending REF/CHG bits are flushed to the PTEs (so
2328 * we can reset the right ones). note that since the pvo entries and
2329 * list heads are accessed via BAT0 and are never placed in the page
2330 * table, we don't have to worry about further accesses setting the
2331 * REF/CHG bits.
2332 */
2333 SYNC();
2334
2335 /*
2336 * For each pvo entry, clear the pvo's ptebit. If this pvo has a
2337 * valid pte clear the ptebit from the valid pte.
2338 */
2339 count = 0;
2340 LIST_FOREACH(pvo, vm_page_to_pvoh(m), pvo_vlink) {
2341 PMAP_PVO_CHECK(pvo); /* sanity check */
2342 pt = pmap_pvo_to_pte(pvo, -1);
2343 if (pt != NULL) {
2344 pmap_pte_synch(pt, &pvo->pvo_pte);
2345 if (pvo->pvo_pte.pte_lo & ptebit) {
2346 count++;
2347 pmap_pte_clear(pt, PVO_VADDR(pvo), ptebit);
2348 }
2349 }
2350 rv |= pvo->pvo_pte.pte_lo;
2351 pvo->pvo_pte.pte_lo &= ~ptebit;
2352 PMAP_PVO_CHECK(pvo); /* sanity check */
2353 }
2354
2355 if (origbit != NULL) {
2356 *origbit = rv;
2357 }
2358
2359 return (count);
2360 }
2361
2362 /*
2363 * Return true if the physical range is encompassed by the battable[idx]
2364 */
2365 static int
2366 pmap_bat_mapped(int idx, vm_offset_t pa, vm_size_t size)
2367 {
2368 u_int prot;
2369 u_int32_t start;
2370 u_int32_t end;
2371 u_int32_t bat_ble;
2372
2373 /*
2374 * Return immediately if not a valid mapping
2375 */
2376 if (!battable[idx].batu & BAT_Vs)
2377 return (EINVAL);
2378
2379 /*
2380 * The BAT entry must be cache-inhibited, guarded, and r/w
2381 * so it can function as an i/o page
2382 */
2383 prot = battable[idx].batl & (BAT_I|BAT_G|BAT_PP_RW);
2384 if (prot != (BAT_I|BAT_G|BAT_PP_RW))
2385 return (EPERM);
2386
2387 /*
2388 * The address should be within the BAT range. Assume that the
2389 * start address in the BAT has the correct alignment (thus
2390 * not requiring masking)
2391 */
2392 start = battable[idx].batl & BAT_PBS;
2393 bat_ble = (battable[idx].batu & ~(BAT_EBS)) | 0x03;
2394 end = start | (bat_ble << 15) | 0x7fff;
2395
2396 if ((pa < start) || ((pa + size) > end))
2397 return (ERANGE);
2398
2399 return (0);
2400 }
2401
2402 int
2403 pmap_dev_direct_mapped(vm_offset_t pa, vm_size_t size)
2404 {
2405 int i;
2406
2407 /*
2408 * This currently does not work for entries that
2409 * overlap 256M BAT segments.
2410 */
2411
2412 for(i = 0; i < 16; i++)
2413 if (pmap_bat_mapped(i, pa, size) == 0)
2414 return (0);
2415
2416 return (EFAULT);
2417 }
2418
2419 /*
2420 * Map a set of physical memory pages into the kernel virtual
2421 * address space. Return a pointer to where it is mapped. This
2422 * routine is intended to be used for mapping device memory,
2423 * NOT real memory.
2424 */
2425 void *
2426 pmap_mapdev(vm_offset_t pa, vm_size_t size)
2427 {
2428 vm_offset_t va, tmpva, ppa, offset;
2429 int i;
2430
2431 ppa = trunc_page(pa);
2432 offset = pa & PAGE_MASK;
2433 size = roundup(offset + size, PAGE_SIZE);
2434
2435 GIANT_REQUIRED;
2436
2437 /*
2438 * If the physical address lies within a valid BAT table entry,
2439 * return the 1:1 mapping. This currently doesn't work
2440 * for regions that overlap 256M BAT segments.
2441 */
2442 for (i = 0; i < 16; i++) {
2443 if (pmap_bat_mapped(i, pa, size) == 0)
2444 return ((void *) pa);
2445 }
2446
2447 va = kmem_alloc_nofault(kernel_map, size);
2448 if (!va)
2449 panic("pmap_mapdev: Couldn't alloc kernel virtual memory");
2450
2451 for (tmpva = va; size > 0;) {
2452 pmap_kenter(tmpva, ppa);
2453 TLBIE(tmpva); /* XXX or should it be invalidate-all ? */
2454 size -= PAGE_SIZE;
2455 tmpva += PAGE_SIZE;
2456 ppa += PAGE_SIZE;
2457 }
2458
2459 return ((void *)(va + offset));
2460 }
2461
2462 void
2463 pmap_unmapdev(vm_offset_t va, vm_size_t size)
2464 {
2465 vm_offset_t base, offset;
2466
2467 /*
2468 * If this is outside kernel virtual space, then it's a
2469 * battable entry and doesn't require unmapping
2470 */
2471 if ((va >= VM_MIN_KERNEL_ADDRESS) && (va <= VM_MAX_KERNEL_ADDRESS)) {
2472 base = trunc_page(va);
2473 offset = va & PAGE_MASK;
2474 size = roundup(offset + size, PAGE_SIZE);
2475 kmem_free(kernel_map, base, size);
2476 }
2477 }
Cache object: 6e9efb0b8e7c69b8202fa7126653cb52
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