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sys/powerpc/powerpc/pmap.c
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1 /*- 2 * Copyright (c) 2001 The NetBSD Foundation, Inc. 3 * All rights reserved. 4 * 5 * This code is derived from software contributed to The NetBSD Foundation 6 * by Matt Thomas <matt@3am-software.com> of Allegro Networks, Inc. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by the NetBSD 19 * Foundation, Inc. and its contributors. 20 * 4. Neither the name of The NetBSD Foundation nor the names of its 21 * contributors may be used to endorse or promote products derived 22 * from this software without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 25 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 26 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 27 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 28 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 34 * POSSIBILITY OF SUCH DAMAGE. 35 */ 36 /*- 37 * Copyright (C) 1995, 1996 Wolfgang Solfrank. 38 * Copyright (C) 1995, 1996 TooLs GmbH. 39 * All rights reserved. 40 * 41 * Redistribution and use in source and binary forms, with or without 42 * modification, are permitted provided that the following conditions 43 * are met: 44 * 1. Redistributions of source code must retain the above copyright 45 * notice, this list of conditions and the following disclaimer. 46 * 2. Redistributions in binary form must reproduce the above copyright 47 * notice, this list of conditions and the following disclaimer in the 48 * documentation and/or other materials provided with the distribution. 49 * 3. All advertising materials mentioning features or use of this software 50 * must display the following acknowledgement: 51 * This product includes software developed by TooLs GmbH. 52 * 4. The name of TooLs GmbH may not be used to endorse or promote products 53 * derived from this software without specific prior written permission. 54 * 55 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR 56 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 57 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 58 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 59 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 60 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 61 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 62 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 63 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 64 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 65 * 66 * $NetBSD: pmap.c,v 1.28 2000/03/26 20:42:36 kleink Exp $ 67 */ 68 /*- 69 * Copyright (C) 2001 Benno Rice. 70 * All rights reserved. 71 * 72 * Redistribution and use in source and binary forms, with or without 73 * modification, are permitted provided that the following conditions 74 * are met: 75 * 1. Redistributions of source code must retain the above copyright 76 * notice, this list of conditions and the following disclaimer. 77 * 2. Redistributions in binary form must reproduce the above copyright 78 * notice, this list of conditions and the following disclaimer in the 79 * documentation and/or other materials provided with the distribution. 80 * 81 * THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR 82 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 83 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 84 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 85 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 86 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 87 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 88 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 89 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 90 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 91 */ 92 93 #include <sys/cdefs.h> 94 __FBSDID("$FreeBSD: releng/6.3/sys/powerpc/powerpc/pmap.c 173367 2007-11-05 16:18:00Z ups $"); 95 96 /* 97 * Manages physical address maps. 98 * 99 * In addition to hardware address maps, this module is called upon to 100 * provide software-use-only maps which may or may not be stored in the 101 * same form as hardware maps. These pseudo-maps are used to store 102 * intermediate results from copy operations to and from address spaces. 103 * 104 * Since the information managed by this module is also stored by the 105 * logical address mapping module, this module may throw away valid virtual 106 * to physical mappings at almost any time. However, invalidations of 107 * mappings must be done as requested. 108 * 109 * In order to cope with hardware architectures which make virtual to 110 * physical map invalidates expensive, this module may delay invalidate 111 * reduced protection operations until such time as they are actually 112 * necessary. This module is given full information as to which processors 113 * are currently using which maps, and to when physical maps must be made 114 * correct. 115 */ 116 117 #include "opt_kstack_pages.h" 118 119 #include <sys/param.h> 120 #include <sys/kernel.h> 121 #include <sys/ktr.h> 122 #include <sys/lock.h> 123 #include <sys/msgbuf.h> 124 #include <sys/mutex.h> 125 #include <sys/proc.h> 126 #include <sys/sysctl.h> 127 #include <sys/systm.h> 128 #include <sys/vmmeter.h> 129 130 #include <dev/ofw/openfirm.h> 131 132 #include <vm/vm.h> 133 #include <vm/vm_param.h> 134 #include <vm/vm_kern.h> 135 #include <vm/vm_page.h> 136 #include <vm/vm_map.h> 137 #include <vm/vm_object.h> 138 #include <vm/vm_extern.h> 139 #include <vm/vm_pageout.h> 140 #include <vm/vm_pager.h> 141 #include <vm/uma.h> 142 143 #include <machine/cpu.h> 144 #include <machine/powerpc.h> 145 #include <machine/bat.h> 146 #include <machine/frame.h> 147 #include <machine/md_var.h> 148 #include <machine/psl.h> 149 #include <machine/pte.h> 150 #include <machine/sr.h> 151 152 #define PMAP_DEBUG 153 154 #define TODO panic("%s: not implemented", __func__); 155 156 #define TLBIE(va) __asm __volatile("tlbie %0" :: "r"(va)) 157 #define TLBSYNC() __asm __volatile("tlbsync"); 158 #define SYNC() __asm __volatile("sync"); 159 #define EIEIO() __asm __volatile("eieio"); 160 161 #define VSID_MAKE(sr, hash) ((sr) | (((hash) & 0xfffff) << 4)) 162 #define VSID_TO_SR(vsid) ((vsid) & 0xf) 163 #define VSID_TO_HASH(vsid) (((vsid) >> 4) & 0xfffff) 164 165 #define PVO_PTEGIDX_MASK 0x007 /* which PTEG slot */ 166 #define PVO_PTEGIDX_VALID 0x008 /* slot is valid */ 167 #define PVO_WIRED 0x010 /* PVO entry is wired */ 168 #define PVO_MANAGED 0x020 /* PVO entry is managed */ 169 #define PVO_EXECUTABLE 0x040 /* PVO entry is executable */ 170 #define PVO_BOOTSTRAP 0x080 /* PVO entry allocated during 171 bootstrap */ 172 #define PVO_FAKE 0x100 /* fictitious phys page */ 173 #define PVO_VADDR(pvo) ((pvo)->pvo_vaddr & ~ADDR_POFF) 174 #define PVO_ISEXECUTABLE(pvo) ((pvo)->pvo_vaddr & PVO_EXECUTABLE) 175 #define PVO_ISFAKE(pvo) ((pvo)->pvo_vaddr & PVO_FAKE) 176 #define PVO_PTEGIDX_GET(pvo) ((pvo)->pvo_vaddr & PVO_PTEGIDX_MASK) 177 #define PVO_PTEGIDX_ISSET(pvo) ((pvo)->pvo_vaddr & PVO_PTEGIDX_VALID) 178 #define PVO_PTEGIDX_CLR(pvo) \ 179 ((void)((pvo)->pvo_vaddr &= ~(PVO_PTEGIDX_VALID|PVO_PTEGIDX_MASK))) 180 #define PVO_PTEGIDX_SET(pvo, i) \ 181 ((void)((pvo)->pvo_vaddr |= (i)|PVO_PTEGIDX_VALID)) 182 183 #define PMAP_PVO_CHECK(pvo) 184 185 struct ofw_map { 186 vm_offset_t om_va; 187 vm_size_t om_len; 188 vm_offset_t om_pa; 189 u_int om_mode; 190 }; 191 192 int pmap_bootstrapped = 0; 193 194 /* 195 * Virtual and physical address of message buffer. 196 */ 197 struct msgbuf *msgbufp; 198 vm_offset_t msgbuf_phys; 199 200 int pmap_pagedaemon_waken; 201 202 /* 203 * Map of physical memory regions. 204 */ 205 vm_offset_t phys_avail[128]; 206 u_int phys_avail_count; 207 static struct mem_region *regions; 208 static struct mem_region *pregions; 209 int regions_sz, pregions_sz; 210 static struct ofw_map *translations; 211 212 /* 213 * First and last available kernel virtual addresses. 214 */ 215 vm_offset_t virtual_avail; 216 vm_offset_t virtual_end; 217 vm_offset_t kernel_vm_end; 218 219 /* 220 * Kernel pmap. 221 */ 222 struct pmap kernel_pmap_store; 223 extern struct pmap ofw_pmap; 224 225 /* 226 * Lock for the pteg and pvo tables. 227 */ 228 struct mtx pmap_table_mutex; 229 230 /* 231 * PTEG data. 232 */ 233 static struct pteg *pmap_pteg_table; 234 u_int pmap_pteg_count; 235 u_int pmap_pteg_mask; 236 237 /* 238 * PVO data. 239 */ 240 struct pvo_head *pmap_pvo_table; /* pvo entries by pteg index */ 241 struct pvo_head pmap_pvo_kunmanaged = 242 LIST_HEAD_INITIALIZER(pmap_pvo_kunmanaged); /* list of unmanaged pages */ 243 struct pvo_head pmap_pvo_unmanaged = 244 LIST_HEAD_INITIALIZER(pmap_pvo_unmanaged); /* list of unmanaged pages */ 245 246 uma_zone_t pmap_upvo_zone; /* zone for pvo entries for unmanaged pages */ 247 uma_zone_t pmap_mpvo_zone; /* zone for pvo entries for managed pages */ 248 249 #define BPVO_POOL_SIZE 32768 250 static struct pvo_entry *pmap_bpvo_pool; 251 static int pmap_bpvo_pool_index = 0; 252 253 #define VSID_NBPW (sizeof(u_int32_t) * 8) 254 static u_int pmap_vsid_bitmap[NPMAPS / VSID_NBPW]; 255 256 static boolean_t pmap_initialized = FALSE; 257 258 /* 259 * Statistics. 260 */ 261 u_int pmap_pte_valid = 0; 262 u_int pmap_pte_overflow = 0; 263 u_int pmap_pte_replacements = 0; 264 u_int pmap_pvo_entries = 0; 265 u_int pmap_pvo_enter_calls = 0; 266 u_int pmap_pvo_remove_calls = 0; 267 u_int pmap_pte_spills = 0; 268 SYSCTL_INT(_machdep, OID_AUTO, pmap_pte_valid, CTLFLAG_RD, &pmap_pte_valid, 269 0, ""); 270 SYSCTL_INT(_machdep, OID_AUTO, pmap_pte_overflow, CTLFLAG_RD, 271 &pmap_pte_overflow, 0, ""); 272 SYSCTL_INT(_machdep, OID_AUTO, pmap_pte_replacements, CTLFLAG_RD, 273 &pmap_pte_replacements, 0, ""); 274 SYSCTL_INT(_machdep, OID_AUTO, pmap_pvo_entries, CTLFLAG_RD, &pmap_pvo_entries, 275 0, ""); 276 SYSCTL_INT(_machdep, OID_AUTO, pmap_pvo_enter_calls, CTLFLAG_RD, 277 &pmap_pvo_enter_calls, 0, ""); 278 SYSCTL_INT(_machdep, OID_AUTO, pmap_pvo_remove_calls, CTLFLAG_RD, 279 &pmap_pvo_remove_calls, 0, ""); 280 SYSCTL_INT(_machdep, OID_AUTO, pmap_pte_spills, CTLFLAG_RD, 281 &pmap_pte_spills, 0, ""); 282 283 struct pvo_entry *pmap_pvo_zeropage; 284 285 vm_offset_t pmap_rkva_start = VM_MIN_KERNEL_ADDRESS; 286 u_int pmap_rkva_count = 4; 287 288 /* 289 * Allocate physical memory for use in pmap_bootstrap. 290 */ 291 static vm_offset_t pmap_bootstrap_alloc(vm_size_t, u_int); 292 293 /* 294 * PTE calls. 295 */ 296 static int pmap_pte_insert(u_int, struct pte *); 297 298 /* 299 * PVO calls. 300 */ 301 static int pmap_pvo_enter(pmap_t, uma_zone_t, struct pvo_head *, 302 vm_offset_t, vm_offset_t, u_int, int); 303 static void pmap_pvo_remove(struct pvo_entry *, int); 304 static struct pvo_entry *pmap_pvo_find_va(pmap_t, vm_offset_t, int *); 305 static struct pte *pmap_pvo_to_pte(const struct pvo_entry *, int); 306 307 /* 308 * Utility routines. 309 */ 310 static void pmap_enter_locked(pmap_t, vm_offset_t, vm_page_t, 311 vm_prot_t, boolean_t); 312 static struct pvo_entry *pmap_rkva_alloc(void); 313 static void pmap_pa_map(struct pvo_entry *, vm_offset_t, 314 struct pte *, int *); 315 static void pmap_pa_unmap(struct pvo_entry *, struct pte *, int *); 316 static void pmap_syncicache(vm_offset_t, vm_size_t); 317 static boolean_t pmap_query_bit(vm_page_t, int); 318 static u_int pmap_clear_bit(vm_page_t, int, int *); 319 static void tlbia(void); 320 321 static __inline int 322 va_to_sr(u_int *sr, vm_offset_t va) 323 { 324 return (sr[(uintptr_t)va >> ADDR_SR_SHFT]); 325 } 326 327 static __inline u_int 328 va_to_pteg(u_int sr, vm_offset_t addr) 329 { 330 u_int hash; 331 332 hash = (sr & SR_VSID_MASK) ^ (((u_int)addr & ADDR_PIDX) >> 333 ADDR_PIDX_SHFT); 334 return (hash & pmap_pteg_mask); 335 } 336 337 static __inline struct pvo_head * 338 pa_to_pvoh(vm_offset_t pa, vm_page_t *pg_p) 339 { 340 struct vm_page *pg; 341 342 pg = PHYS_TO_VM_PAGE(pa); 343 344 if (pg_p != NULL) 345 *pg_p = pg; 346 347 if (pg == NULL) 348 return (&pmap_pvo_unmanaged); 349 350 return (&pg->md.mdpg_pvoh); 351 } 352 353 static __inline struct pvo_head * 354 vm_page_to_pvoh(vm_page_t m) 355 { 356 357 return (&m->md.mdpg_pvoh); 358 } 359 360 static __inline void 361 pmap_attr_clear(vm_page_t m, int ptebit) 362 { 363 364 m->md.mdpg_attrs &= ~ptebit; 365 } 366 367 static __inline int 368 pmap_attr_fetch(vm_page_t m) 369 { 370 371 return (m->md.mdpg_attrs); 372 } 373 374 static __inline void 375 pmap_attr_save(vm_page_t m, int ptebit) 376 { 377 378 m->md.mdpg_attrs |= ptebit; 379 } 380 381 static __inline int 382 pmap_pte_compare(const struct pte *pt, const struct pte *pvo_pt) 383 { 384 if (pt->pte_hi == pvo_pt->pte_hi) 385 return (1); 386 387 return (0); 388 } 389 390 static __inline int 391 pmap_pte_match(struct pte *pt, u_int sr, vm_offset_t va, int which) 392 { 393 return (pt->pte_hi & ~PTE_VALID) == 394 (((sr & SR_VSID_MASK) << PTE_VSID_SHFT) | 395 ((va >> ADDR_API_SHFT) & PTE_API) | which); 396 } 397 398 static __inline void 399 pmap_pte_create(struct pte *pt, u_int sr, vm_offset_t va, u_int pte_lo) 400 { 401 /* 402 * Construct a PTE. Default to IMB initially. Valid bit only gets 403 * set when the real pte is set in memory. 404 * 405 * Note: Don't set the valid bit for correct operation of tlb update. 406 */ 407 pt->pte_hi = ((sr & SR_VSID_MASK) << PTE_VSID_SHFT) | 408 (((va & ADDR_PIDX) >> ADDR_API_SHFT) & PTE_API); 409 pt->pte_lo = pte_lo; 410 } 411 412 static __inline void 413 pmap_pte_synch(struct pte *pt, struct pte *pvo_pt) 414 { 415 416 pvo_pt->pte_lo |= pt->pte_lo & (PTE_REF | PTE_CHG); 417 } 418 419 static __inline void 420 pmap_pte_clear(struct pte *pt, vm_offset_t va, int ptebit) 421 { 422 423 /* 424 * As shown in Section 7.6.3.2.3 425 */ 426 pt->pte_lo &= ~ptebit; 427 TLBIE(va); 428 EIEIO(); 429 TLBSYNC(); 430 SYNC(); 431 } 432 433 static __inline void 434 pmap_pte_set(struct pte *pt, struct pte *pvo_pt) 435 { 436 437 pvo_pt->pte_hi |= PTE_VALID; 438 439 /* 440 * Update the PTE as defined in section 7.6.3.1. 441 * Note that the REF/CHG bits are from pvo_pt and thus should havce 442 * been saved so this routine can restore them (if desired). 443 */ 444 pt->pte_lo = pvo_pt->pte_lo; 445 EIEIO(); 446 pt->pte_hi = pvo_pt->pte_hi; 447 SYNC(); 448 pmap_pte_valid++; 449 } 450 451 static __inline void 452 pmap_pte_unset(struct pte *pt, struct pte *pvo_pt, vm_offset_t va) 453 { 454 455 pvo_pt->pte_hi &= ~PTE_VALID; 456 457 /* 458 * Force the reg & chg bits back into the PTEs. 459 */ 460 SYNC(); 461 462 /* 463 * Invalidate the pte. 464 */ 465 pt->pte_hi &= ~PTE_VALID; 466 467 SYNC(); 468 TLBIE(va); 469 EIEIO(); 470 TLBSYNC(); 471 SYNC(); 472 473 /* 474 * Save the reg & chg bits. 475 */ 476 pmap_pte_synch(pt, pvo_pt); 477 pmap_pte_valid--; 478 } 479 480 static __inline void 481 pmap_pte_change(struct pte *pt, struct pte *pvo_pt, vm_offset_t va) 482 { 483 484 /* 485 * Invalidate the PTE 486 */ 487 pmap_pte_unset(pt, pvo_pt, va); 488 pmap_pte_set(pt, pvo_pt); 489 } 490 491 /* 492 * Quick sort callout for comparing memory regions. 493 */ 494 static int mr_cmp(const void *a, const void *b); 495 static int om_cmp(const void *a, const void *b); 496 497 static int 498 mr_cmp(const void *a, const void *b) 499 { 500 const struct mem_region *regiona; 501 const struct mem_region *regionb; 502 503 regiona = a; 504 regionb = b; 505 if (regiona->mr_start < regionb->mr_start) 506 return (-1); 507 else if (regiona->mr_start > regionb->mr_start) 508 return (1); 509 else 510 return (0); 511 } 512 513 static int 514 om_cmp(const void *a, const void *b) 515 { 516 const struct ofw_map *mapa; 517 const struct ofw_map *mapb; 518 519 mapa = a; 520 mapb = b; 521 if (mapa->om_pa < mapb->om_pa) 522 return (-1); 523 else if (mapa->om_pa > mapb->om_pa) 524 return (1); 525 else 526 return (0); 527 } 528 529 void 530 pmap_bootstrap(vm_offset_t kernelstart, vm_offset_t kernelend) 531 { 532 ihandle_t mmui; 533 phandle_t chosen, mmu; 534 int sz; 535 int i, j; 536 int ofw_mappings; 537 vm_size_t size, physsz, hwphyssz; 538 vm_offset_t pa, va, off; 539 u_int batl, batu; 540 541 /* 542 * Set up BAT0 to map the lowest 256 MB area 543 */ 544 battable[0x0].batl = BATL(0x00000000, BAT_M, BAT_PP_RW); 545 battable[0x0].batu = BATU(0x00000000, BAT_BL_256M, BAT_Vs); 546 547 /* 548 * Map PCI memory space. 549 */ 550 battable[0x8].batl = BATL(0x80000000, BAT_I|BAT_G, BAT_PP_RW); 551 battable[0x8].batu = BATU(0x80000000, BAT_BL_256M, BAT_Vs); 552 553 battable[0x9].batl = BATL(0x90000000, BAT_I|BAT_G, BAT_PP_RW); 554 battable[0x9].batu = BATU(0x90000000, BAT_BL_256M, BAT_Vs); 555 556 battable[0xa].batl = BATL(0xa0000000, BAT_I|BAT_G, BAT_PP_RW); 557 battable[0xa].batu = BATU(0xa0000000, BAT_BL_256M, BAT_Vs); 558 559 battable[0xb].batl = BATL(0xb0000000, BAT_I|BAT_G, BAT_PP_RW); 560 battable[0xb].batu = BATU(0xb0000000, BAT_BL_256M, BAT_Vs); 561 562 /* 563 * Map obio devices. 564 */ 565 battable[0xf].batl = BATL(0xf0000000, BAT_I|BAT_G, BAT_PP_RW); 566 battable[0xf].batu = BATU(0xf0000000, BAT_BL_256M, BAT_Vs); 567 568 /* 569 * Use an IBAT and a DBAT to map the bottom segment of memory 570 * where we are. 571 */ 572 batu = BATU(0x00000000, BAT_BL_256M, BAT_Vs); 573 batl = BATL(0x00000000, BAT_M, BAT_PP_RW); 574 __asm (".balign 32; \n" 575 "mtibatu 0,%0; mtibatl 0,%1; isync; \n" 576 "mtdbatu 0,%0; mtdbatl 0,%1; isync" 577 :: "r"(batu), "r"(batl)); 578 579 #if 0 580 /* map frame buffer */ 581 batu = BATU(0x90000000, BAT_BL_256M, BAT_Vs); 582 batl = BATL(0x90000000, BAT_I|BAT_G, BAT_PP_RW); 583 __asm ("mtdbatu 1,%0; mtdbatl 1,%1; isync" 584 :: "r"(batu), "r"(batl)); 585 #endif 586 587 #if 1 588 /* map pci space */ 589 batu = BATU(0x80000000, BAT_BL_256M, BAT_Vs); 590 batl = BATL(0x80000000, BAT_I|BAT_G, BAT_PP_RW); 591 __asm ("mtdbatu 1,%0; mtdbatl 1,%1; isync" 592 :: "r"(batu), "r"(batl)); 593 #endif 594 595 /* 596 * Set the start and end of kva. 597 */ 598 virtual_avail = VM_MIN_KERNEL_ADDRESS; 599 virtual_end = VM_MAX_KERNEL_ADDRESS; 600 601 mem_regions(&pregions, &pregions_sz, ®ions, ®ions_sz); 602 CTR0(KTR_PMAP, "pmap_bootstrap: physical memory"); 603 604 qsort(pregions, pregions_sz, sizeof(*pregions), mr_cmp); 605 for (i = 0; i < pregions_sz; i++) { 606 vm_offset_t pa; 607 vm_offset_t end; 608 609 CTR3(KTR_PMAP, "physregion: %#x - %#x (%#x)", 610 pregions[i].mr_start, 611 pregions[i].mr_start + pregions[i].mr_size, 612 pregions[i].mr_size); 613 /* 614 * Install entries into the BAT table to allow all 615 * of physmem to be convered by on-demand BAT entries. 616 * The loop will sometimes set the same battable element 617 * twice, but that's fine since they won't be used for 618 * a while yet. 619 */ 620 pa = pregions[i].mr_start & 0xf0000000; 621 end = pregions[i].mr_start + pregions[i].mr_size; 622 do { 623 u_int n = pa >> ADDR_SR_SHFT; 624 625 battable[n].batl = BATL(pa, BAT_M, BAT_PP_RW); 626 battable[n].batu = BATU(pa, BAT_BL_256M, BAT_Vs); 627 pa += SEGMENT_LENGTH; 628 } while (pa < end); 629 } 630 631 if (sizeof(phys_avail)/sizeof(phys_avail[0]) < regions_sz) 632 panic("pmap_bootstrap: phys_avail too small"); 633 qsort(regions, regions_sz, sizeof(*regions), mr_cmp); 634 phys_avail_count = 0; 635 physsz = 0; 636 hwphyssz = 0; 637 TUNABLE_ULONG_FETCH("hw.physmem", (u_long *) &hwphyssz); 638 for (i = 0, j = 0; i < regions_sz; i++, j += 2) { 639 CTR3(KTR_PMAP, "region: %#x - %#x (%#x)", regions[i].mr_start, 640 regions[i].mr_start + regions[i].mr_size, 641 regions[i].mr_size); 642 if (hwphyssz != 0 && 643 (physsz + regions[i].mr_size) >= hwphyssz) { 644 if (physsz < hwphyssz) { 645 phys_avail[j] = regions[i].mr_start; 646 phys_avail[j + 1] = regions[i].mr_start + 647 hwphyssz - physsz; 648 physsz = hwphyssz; 649 phys_avail_count++; 650 } 651 break; 652 } 653 phys_avail[j] = regions[i].mr_start; 654 phys_avail[j + 1] = regions[i].mr_start + regions[i].mr_size; 655 phys_avail_count++; 656 physsz += regions[i].mr_size; 657 } 658 physmem = btoc(physsz); 659 660 /* 661 * Allocate PTEG table. 662 */ 663 #ifdef PTEGCOUNT 664 pmap_pteg_count = PTEGCOUNT; 665 #else 666 pmap_pteg_count = 0x1000; 667 668 while (pmap_pteg_count < physmem) 669 pmap_pteg_count <<= 1; 670 671 pmap_pteg_count >>= 1; 672 #endif /* PTEGCOUNT */ 673 674 size = pmap_pteg_count * sizeof(struct pteg); 675 CTR2(KTR_PMAP, "pmap_bootstrap: %d PTEGs, %d bytes", pmap_pteg_count, 676 size); 677 pmap_pteg_table = (struct pteg *)pmap_bootstrap_alloc(size, size); 678 CTR1(KTR_PMAP, "pmap_bootstrap: PTEG table at %p", pmap_pteg_table); 679 bzero((void *)pmap_pteg_table, pmap_pteg_count * sizeof(struct pteg)); 680 pmap_pteg_mask = pmap_pteg_count - 1; 681 682 /* 683 * Allocate pv/overflow lists. 684 */ 685 size = sizeof(struct pvo_head) * pmap_pteg_count; 686 pmap_pvo_table = (struct pvo_head *)pmap_bootstrap_alloc(size, 687 PAGE_SIZE); 688 CTR1(KTR_PMAP, "pmap_bootstrap: PVO table at %p", pmap_pvo_table); 689 for (i = 0; i < pmap_pteg_count; i++) 690 LIST_INIT(&pmap_pvo_table[i]); 691 692 /* 693 * Initialize the lock that synchronizes access to the pteg and pvo 694 * tables. 695 */ 696 mtx_init(&pmap_table_mutex, "pmap table", NULL, MTX_DEF); 697 698 /* 699 * Allocate the message buffer. 700 */ 701 msgbuf_phys = pmap_bootstrap_alloc(MSGBUF_SIZE, 0); 702 703 /* 704 * Initialise the unmanaged pvo pool. 705 */ 706 pmap_bpvo_pool = (struct pvo_entry *)pmap_bootstrap_alloc( 707 BPVO_POOL_SIZE*sizeof(struct pvo_entry), 0); 708 pmap_bpvo_pool_index = 0; 709 710 /* 711 * Make sure kernel vsid is allocated as well as VSID 0. 712 */ 713 pmap_vsid_bitmap[(KERNEL_VSIDBITS & (NPMAPS - 1)) / VSID_NBPW] 714 |= 1 << (KERNEL_VSIDBITS % VSID_NBPW); 715 pmap_vsid_bitmap[0] |= 1; 716 717 /* 718 * Set up the Open Firmware pmap and add it's mappings. 719 */ 720 pmap_pinit(&ofw_pmap); 721 ofw_pmap.pm_sr[KERNEL_SR] = KERNEL_SEGMENT; 722 ofw_pmap.pm_sr[KERNEL2_SR] = KERNEL2_SEGMENT; 723 if ((chosen = OF_finddevice("/chosen")) == -1) 724 panic("pmap_bootstrap: can't find /chosen"); 725 OF_getprop(chosen, "mmu", &mmui, 4); 726 if ((mmu = OF_instance_to_package(mmui)) == -1) 727 panic("pmap_bootstrap: can't get mmu package"); 728 if ((sz = OF_getproplen(mmu, "translations")) == -1) 729 panic("pmap_bootstrap: can't get ofw translation count"); 730 translations = NULL; 731 for (i = 0; phys_avail[i] != 0; i += 2) { 732 if (phys_avail[i + 1] >= sz) { 733 translations = (struct ofw_map *)phys_avail[i]; 734 break; 735 } 736 } 737 if (translations == NULL) 738 panic("pmap_bootstrap: no space to copy translations"); 739 bzero(translations, sz); 740 if (OF_getprop(mmu, "translations", translations, sz) == -1) 741 panic("pmap_bootstrap: can't get ofw translations"); 742 CTR0(KTR_PMAP, "pmap_bootstrap: translations"); 743 sz /= sizeof(*translations); 744 qsort(translations, sz, sizeof (*translations), om_cmp); 745 for (i = 0, ofw_mappings = 0; i < sz; i++) { 746 CTR3(KTR_PMAP, "translation: pa=%#x va=%#x len=%#x", 747 translations[i].om_pa, translations[i].om_va, 748 translations[i].om_len); 749 750 /* 751 * If the mapping is 1:1, let the RAM and device on-demand 752 * BAT tables take care of the translation. 753 */ 754 if (translations[i].om_va == translations[i].om_pa) 755 continue; 756 757 /* Enter the pages */ 758 for (off = 0; off < translations[i].om_len; off += PAGE_SIZE) { 759 struct vm_page m; 760 761 m.phys_addr = translations[i].om_pa + off; 762 PMAP_LOCK(&ofw_pmap); 763 pmap_enter_locked(&ofw_pmap, translations[i].om_va + off, &m, 764 VM_PROT_ALL, 1); 765 PMAP_UNLOCK(&ofw_pmap); 766 ofw_mappings++; 767 } 768 } 769 #ifdef SMP 770 TLBSYNC(); 771 #endif 772 773 /* 774 * Initialize the kernel pmap (which is statically allocated). 775 */ 776 PMAP_LOCK_INIT(kernel_pmap); 777 for (i = 0; i < 16; i++) { 778 kernel_pmap->pm_sr[i] = EMPTY_SEGMENT; 779 } 780 kernel_pmap->pm_sr[KERNEL_SR] = KERNEL_SEGMENT; 781 kernel_pmap->pm_sr[KERNEL2_SR] = KERNEL2_SEGMENT; 782 kernel_pmap->pm_active = ~0; 783 784 /* 785 * Allocate a kernel stack with a guard page for thread0 and map it 786 * into the kernel page map. 787 */ 788 pa = pmap_bootstrap_alloc(KSTACK_PAGES * PAGE_SIZE, 0); 789 kstack0_phys = pa; 790 kstack0 = virtual_avail + (KSTACK_GUARD_PAGES * PAGE_SIZE); 791 CTR2(KTR_PMAP, "pmap_bootstrap: kstack0 at %#x (%#x)", kstack0_phys, 792 kstack0); 793 virtual_avail += (KSTACK_PAGES + KSTACK_GUARD_PAGES) * PAGE_SIZE; 794 for (i = 0; i < KSTACK_PAGES; i++) { 795 pa = kstack0_phys + i * PAGE_SIZE; 796 va = kstack0 + i * PAGE_SIZE; 797 pmap_kenter(va, pa); 798 TLBIE(va); 799 } 800 801 /* 802 * Calculate the last available physical address. 803 */ 804 for (i = 0; phys_avail[i + 2] != 0; i += 2) 805 ; 806 Maxmem = powerpc_btop(phys_avail[i + 1]); 807 808 /* 809 * Allocate virtual address space for the message buffer. 810 */ 811 msgbufp = (struct msgbuf *)virtual_avail; 812 virtual_avail += round_page(MSGBUF_SIZE); 813 814 /* 815 * Initialize hardware. 816 */ 817 for (i = 0; i < 16; i++) { 818 mtsrin(i << ADDR_SR_SHFT, EMPTY_SEGMENT); 819 } 820 __asm __volatile ("mtsr %0,%1" 821 :: "n"(KERNEL_SR), "r"(KERNEL_SEGMENT)); 822 __asm __volatile ("mtsr %0,%1" 823 :: "n"(KERNEL2_SR), "r"(KERNEL2_SEGMENT)); 824 __asm __volatile ("sync; mtsdr1 %0; isync" 825 :: "r"((u_int)pmap_pteg_table | (pmap_pteg_mask >> 10))); 826 tlbia(); 827 828 pmap_bootstrapped++; 829 } 830 831 /* 832 * Activate a user pmap. The pmap must be activated before it's address 833 * space can be accessed in any way. 834 */ 835 void 836 pmap_activate(struct thread *td) 837 { 838 pmap_t pm, pmr; 839 840 /* 841 * Load all the data we need up front to encourage the compiler to 842 * not issue any loads while we have interrupts disabled below. 843 */ 844 pm = &td->td_proc->p_vmspace->vm_pmap; 845 846 if ((pmr = (pmap_t)pmap_kextract((vm_offset_t)pm)) == NULL) 847 pmr = pm; 848 849 pm->pm_active |= PCPU_GET(cpumask); 850 PCPU_SET(curpmap, pmr); 851 } 852 853 void 854 pmap_deactivate(struct thread *td) 855 { 856 pmap_t pm; 857 858 pm = &td->td_proc->p_vmspace->vm_pmap; 859 pm->pm_active &= ~(PCPU_GET(cpumask)); 860 PCPU_SET(curpmap, NULL); 861 } 862 863 vm_offset_t 864 pmap_addr_hint(vm_object_t object, vm_offset_t va, vm_size_t size) 865 { 866 867 return (va); 868 } 869 870 void 871 pmap_change_wiring(pmap_t pm, vm_offset_t va, boolean_t wired) 872 { 873 struct pvo_entry *pvo; 874 875 PMAP_LOCK(pm); 876 pvo = pmap_pvo_find_va(pm, va & ~ADDR_POFF, NULL); 877 878 if (pvo != NULL) { 879 if (wired) { 880 if ((pvo->pvo_vaddr & PVO_WIRED) == 0) 881 pm->pm_stats.wired_count++; 882 pvo->pvo_vaddr |= PVO_WIRED; 883 } else { 884 if ((pvo->pvo_vaddr & PVO_WIRED) != 0) 885 pm->pm_stats.wired_count--; 886 pvo->pvo_vaddr &= ~PVO_WIRED; 887 } 888 } 889 PMAP_UNLOCK(pm); 890 } 891 892 void 893 pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr, 894 vm_size_t len, vm_offset_t src_addr) 895 { 896 897 /* 898 * This is not needed as it's mainly an optimisation. 899 * It may want to be implemented later though. 900 */ 901 } 902 903 void 904 pmap_copy_page(vm_page_t msrc, vm_page_t mdst) 905 { 906 vm_offset_t dst; 907 vm_offset_t src; 908 909 dst = VM_PAGE_TO_PHYS(mdst); 910 src = VM_PAGE_TO_PHYS(msrc); 911 912 kcopy((void *)src, (void *)dst, PAGE_SIZE); 913 } 914 915 /* 916 * Zero a page of physical memory by temporarily mapping it into the tlb. 917 */ 918 void 919 pmap_zero_page(vm_page_t m) 920 { 921 vm_offset_t pa = VM_PAGE_TO_PHYS(m); 922 caddr_t va; 923 924 if (pa < SEGMENT_LENGTH) { 925 va = (caddr_t) pa; 926 } else if (pmap_initialized) { 927 if (pmap_pvo_zeropage == NULL) 928 pmap_pvo_zeropage = pmap_rkva_alloc(); 929 pmap_pa_map(pmap_pvo_zeropage, pa, NULL, NULL); 930 va = (caddr_t)PVO_VADDR(pmap_pvo_zeropage); 931 } else { 932 panic("pmap_zero_page: can't zero pa %#x", pa); 933 } 934 935 bzero(va, PAGE_SIZE); 936 937 if (pa >= SEGMENT_LENGTH) 938 pmap_pa_unmap(pmap_pvo_zeropage, NULL, NULL); 939 } 940 941 void 942 pmap_zero_page_area(vm_page_t m, int off, int size) 943 { 944 vm_offset_t pa = VM_PAGE_TO_PHYS(m); 945 caddr_t va; 946 947 if (pa < SEGMENT_LENGTH) { 948 va = (caddr_t) pa; 949 } else if (pmap_initialized) { 950 if (pmap_pvo_zeropage == NULL) 951 pmap_pvo_zeropage = pmap_rkva_alloc(); 952 pmap_pa_map(pmap_pvo_zeropage, pa, NULL, NULL); 953 va = (caddr_t)PVO_VADDR(pmap_pvo_zeropage); 954 } else { 955 panic("pmap_zero_page: can't zero pa %#x", pa); 956 } 957 958 bzero(va + off, size); 959 960 if (pa >= SEGMENT_LENGTH) 961 pmap_pa_unmap(pmap_pvo_zeropage, NULL, NULL); 962 } 963 964 void 965 pmap_zero_page_idle(vm_page_t m) 966 { 967 968 /* XXX this is called outside of Giant, is pmap_zero_page safe? */ 969 /* XXX maybe have a dedicated mapping for this to avoid the problem? */ 970 mtx_lock(&Giant); 971 pmap_zero_page(m); 972 mtx_unlock(&Giant); 973 } 974 975 /* 976 * Map the given physical page at the specified virtual address in the 977 * target pmap with the protection requested. If specified the page 978 * will be wired down. 979 */ 980 void 981 pmap_enter(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot, 982 boolean_t wired) 983 { 984 985 vm_page_lock_queues(); 986 PMAP_LOCK(pmap); 987 pmap_enter_locked(pmap, va, m, prot, wired); 988 vm_page_unlock_queues(); 989 PMAP_UNLOCK(pmap); 990 } 991 992 /* 993 * Map the given physical page at the specified virtual address in the 994 * target pmap with the protection requested. If specified the page 995 * will be wired down. 996 * 997 * The page queues and pmap must be locked. 998 */ 999 static void 1000 pmap_enter_locked(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot, 1001 boolean_t wired) 1002 { 1003 struct pvo_head *pvo_head; 1004 uma_zone_t zone; 1005 vm_page_t pg; 1006 u_int pte_lo, pvo_flags, was_exec, i; 1007 int error; 1008 1009 if (!pmap_initialized) { 1010 pvo_head = &pmap_pvo_kunmanaged; 1011 zone = pmap_upvo_zone; 1012 pvo_flags = 0; 1013 pg = NULL; 1014 was_exec = PTE_EXEC; 1015 } else { 1016 pvo_head = vm_page_to_pvoh(m); 1017 pg = m; 1018 zone = pmap_mpvo_zone; 1019 pvo_flags = PVO_MANAGED; 1020 was_exec = 0; 1021 } 1022 if (pmap_bootstrapped) 1023 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 1024 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 1025 1026 /* XXX change the pvo head for fake pages */ 1027 if ((m->flags & PG_FICTITIOUS) == PG_FICTITIOUS) 1028 pvo_head = &pmap_pvo_kunmanaged; 1029 1030 /* 1031 * If this is a managed page, and it's the first reference to the page, 1032 * clear the execness of the page. Otherwise fetch the execness. 1033 */ 1034 if ((pg != NULL) && ((m->flags & PG_FICTITIOUS) == 0)) { 1035 if (LIST_EMPTY(pvo_head)) { 1036 pmap_attr_clear(pg, PTE_EXEC); 1037 } else { 1038 was_exec = pmap_attr_fetch(pg) & PTE_EXEC; 1039 } 1040 } 1041 1042 /* 1043 * Assume the page is cache inhibited and access is guarded unless 1044 * it's in our available memory array. 1045 */ 1046 pte_lo = PTE_I | PTE_G; 1047 for (i = 0; i < pregions_sz; i++) { 1048 if ((VM_PAGE_TO_PHYS(m) >= pregions[i].mr_start) && 1049 (VM_PAGE_TO_PHYS(m) < 1050 (pregions[i].mr_start + pregions[i].mr_size))) { 1051 pte_lo &= ~(PTE_I | PTE_G); 1052 break; 1053 } 1054 } 1055 1056 if (prot & VM_PROT_WRITE) 1057 pte_lo |= PTE_BW; 1058 else 1059 pte_lo |= PTE_BR; 1060 1061 if (prot & VM_PROT_EXECUTE) 1062 pvo_flags |= PVO_EXECUTABLE; 1063 1064 if (wired) 1065 pvo_flags |= PVO_WIRED; 1066 1067 if ((m->flags & PG_FICTITIOUS) != 0) 1068 pvo_flags |= PVO_FAKE; 1069 1070 error = pmap_pvo_enter(pmap, zone, pvo_head, va, VM_PAGE_TO_PHYS(m), 1071 pte_lo, pvo_flags); 1072 1073 /* 1074 * Flush the real page from the instruction cache if this page is 1075 * mapped executable and cacheable and was not previously mapped (or 1076 * was not mapped executable). 1077 */ 1078 if (error == 0 && (pvo_flags & PVO_EXECUTABLE) && 1079 (pte_lo & PTE_I) == 0 && was_exec == 0) { 1080 /* 1081 * Flush the real memory from the cache. 1082 */ 1083 pmap_syncicache(VM_PAGE_TO_PHYS(m), PAGE_SIZE); 1084 if (pg != NULL) 1085 pmap_attr_save(pg, PTE_EXEC); 1086 } 1087 1088 /* XXX syncicache always until problems are sorted */ 1089 pmap_syncicache(VM_PAGE_TO_PHYS(m), PAGE_SIZE); 1090 } 1091 1092 /* 1093 * Maps a sequence of resident pages belonging to the same object. 1094 * The sequence begins with the given page m_start. This page is 1095 * mapped at the given virtual address start. Each subsequent page is 1096 * mapped at a virtual address that is offset from start by the same 1097 * amount as the page is offset from m_start within the object. The 1098 * last page in the sequence is the page with the largest offset from 1099 * m_start that can be mapped at a virtual address less than the given 1100 * virtual address end. Not every virtual page between start and end 1101 * is mapped; only those for which a resident page exists with the 1102 * corresponding offset from m_start are mapped. 1103 */ 1104 void 1105 pmap_enter_object(pmap_t pm, vm_offset_t start, vm_offset_t end, 1106 vm_page_t m_start, vm_prot_t prot) 1107 { 1108 vm_page_t m; 1109 vm_pindex_t diff, psize; 1110 1111 psize = atop(end - start); 1112 m = m_start; 1113 PMAP_LOCK(pm); 1114 while (m != NULL && (diff = m->pindex - m_start->pindex) < psize) { 1115 pmap_enter_locked(pm, start + ptoa(diff), m, prot & 1116 (VM_PROT_READ | VM_PROT_EXECUTE), FALSE); 1117 m = TAILQ_NEXT(m, listq); 1118 } 1119 PMAP_UNLOCK(pm); 1120 } 1121 1122 void 1123 pmap_enter_quick(pmap_t pm, vm_offset_t va, vm_page_t m, vm_prot_t prot) 1124 { 1125 1126 PMAP_LOCK(pm); 1127 pmap_enter_locked(pm, va, m, prot & (VM_PROT_READ | VM_PROT_EXECUTE), 1128 FALSE); 1129 PMAP_UNLOCK(pm); 1130 } 1131 1132 vm_paddr_t 1133 pmap_extract(pmap_t pm, vm_offset_t va) 1134 { 1135 struct pvo_entry *pvo; 1136 vm_paddr_t pa; 1137 1138 PMAP_LOCK(pm); 1139 pvo = pmap_pvo_find_va(pm, va & ~ADDR_POFF, NULL); 1140 if (pvo == NULL) 1141 pa = 0; 1142 else 1143 pa = (pvo->pvo_pte.pte_lo & PTE_RPGN) | (va & ADDR_POFF); 1144 PMAP_UNLOCK(pm); 1145 return (pa); 1146 } 1147 1148 /* 1149 * Atomically extract and hold the physical page with the given 1150 * pmap and virtual address pair if that mapping permits the given 1151 * protection. 1152 */ 1153 vm_page_t 1154 pmap_extract_and_hold(pmap_t pmap, vm_offset_t va, vm_prot_t prot) 1155 { 1156 struct pvo_entry *pvo; 1157 vm_page_t m; 1158 1159 m = NULL; 1160 mtx_lock(&Giant); 1161 vm_page_lock_queues(); 1162 PMAP_LOCK(pmap); 1163 pvo = pmap_pvo_find_va(pmap, va & ~ADDR_POFF, NULL); 1164 if (pvo != NULL && (pvo->pvo_pte.pte_hi & PTE_VALID) && 1165 ((pvo->pvo_pte.pte_lo & PTE_PP) == PTE_RW || 1166 (prot & VM_PROT_WRITE) == 0)) { 1167 m = PHYS_TO_VM_PAGE(pvo->pvo_pte.pte_lo & PTE_RPGN); 1168 vm_page_hold(m); 1169 } 1170 vm_page_unlock_queues(); 1171 PMAP_UNLOCK(pmap); 1172 mtx_unlock(&Giant); 1173 return (m); 1174 } 1175 1176 /* 1177 * Grow the number of kernel page table entries. Unneeded. 1178 */ 1179 void 1180 pmap_growkernel(vm_offset_t addr) 1181 { 1182 } 1183 1184 /* 1185 * Initialize a vm_page's machine-dependent fields. 1186 */ 1187 void 1188 pmap_page_init(vm_page_t m) 1189 { 1190 } 1191 1192 void 1193 pmap_init(void) 1194 { 1195 1196 CTR0(KTR_PMAP, "pmap_init"); 1197 1198 pmap_upvo_zone = uma_zcreate("UPVO entry", sizeof (struct pvo_entry), 1199 NULL, NULL, NULL, NULL, UMA_ALIGN_PTR, 1200 UMA_ZONE_VM | UMA_ZONE_NOFREE); 1201 pmap_mpvo_zone = uma_zcreate("MPVO entry", sizeof(struct pvo_entry), 1202 NULL, NULL, NULL, NULL, UMA_ALIGN_PTR, 1203 UMA_ZONE_VM | UMA_ZONE_NOFREE); 1204 pmap_initialized = TRUE; 1205 } 1206 1207 void 1208 pmap_init2(void) 1209 { 1210 1211 CTR0(KTR_PMAP, "pmap_init2"); 1212 } 1213 1214 boolean_t 1215 pmap_is_modified(vm_page_t m) 1216 { 1217 1218 if ((m->flags & (PG_FICTITIOUS |PG_UNMANAGED)) != 0) 1219 return (FALSE); 1220 1221 return (pmap_query_bit(m, PTE_CHG)); 1222 } 1223 1224 /* 1225 * pmap_is_prefaultable: 1226 * 1227 * Return whether or not the specified virtual address is elgible 1228 * for prefault. 1229 */ 1230 boolean_t 1231 pmap_is_prefaultable(pmap_t pmap, vm_offset_t addr) 1232 { 1233 1234 return (FALSE); 1235 } 1236 1237 void 1238 pmap_clear_reference(vm_page_t m) 1239 { 1240 1241 if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) != 0) 1242 return; 1243 pmap_clear_bit(m, PTE_REF, NULL); 1244 } 1245 1246 void 1247 pmap_clear_modify(vm_page_t m) 1248 { 1249 1250 if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) != 0) 1251 return; 1252 pmap_clear_bit(m, PTE_CHG, NULL); 1253 } 1254 1255 /* 1256 * pmap_ts_referenced: 1257 * 1258 * Return a count of reference bits for a page, clearing those bits. 1259 * It is not necessary for every reference bit to be cleared, but it 1260 * is necessary that 0 only be returned when there are truly no 1261 * reference bits set. 1262 * 1263 * XXX: The exact number of bits to check and clear is a matter that 1264 * should be tested and standardized at some point in the future for 1265 * optimal aging of shared pages. 1266 */ 1267 int 1268 pmap_ts_referenced(vm_page_t m) 1269 { 1270 int count; 1271 1272 if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) != 0) 1273 return (0); 1274 1275 count = pmap_clear_bit(m, PTE_REF, NULL); 1276 1277 return (count); 1278 } 1279 1280 /* 1281 * Map a wired page into kernel virtual address space. 1282 */ 1283 void 1284 pmap_kenter(vm_offset_t va, vm_offset_t pa) 1285 { 1286 u_int pte_lo; 1287 int error; 1288 int i; 1289 1290 #if 0 1291 if (va < VM_MIN_KERNEL_ADDRESS) 1292 panic("pmap_kenter: attempt to enter non-kernel address %#x", 1293 va); 1294 #endif 1295 1296 pte_lo = PTE_I | PTE_G; 1297 for (i = 0; i < pregions_sz; i++) { 1298 if ((pa >= pregions[i].mr_start) && 1299 (pa < (pregions[i].mr_start + pregions[i].mr_size))) { 1300 pte_lo &= ~(PTE_I | PTE_G); 1301 break; 1302 } 1303 } 1304 1305 PMAP_LOCK(kernel_pmap); 1306 error = pmap_pvo_enter(kernel_pmap, pmap_upvo_zone, 1307 &pmap_pvo_kunmanaged, va, pa, pte_lo, PVO_WIRED); 1308 1309 if (error != 0 && error != ENOENT) 1310 panic("pmap_kenter: failed to enter va %#x pa %#x: %d", va, 1311 pa, error); 1312 1313 /* 1314 * Flush the real memory from the instruction cache. 1315 */ 1316 if ((pte_lo & (PTE_I | PTE_G)) == 0) { 1317 pmap_syncicache(pa, PAGE_SIZE); 1318 } 1319 PMAP_UNLOCK(kernel_pmap); 1320 } 1321 1322 /* 1323 * Extract the physical page address associated with the given kernel virtual 1324 * address. 1325 */ 1326 vm_offset_t 1327 pmap_kextract(vm_offset_t va) 1328 { 1329 struct pvo_entry *pvo; 1330 vm_paddr_t pa; 1331 1332 #ifdef UMA_MD_SMALL_ALLOC 1333 /* 1334 * Allow direct mappings 1335 */ 1336 if (va < VM_MIN_KERNEL_ADDRESS) { 1337 return (va); 1338 } 1339 #endif 1340 1341 PMAP_LOCK(kernel_pmap); 1342 pvo = pmap_pvo_find_va(kernel_pmap, va & ~ADDR_POFF, NULL); 1343 KASSERT(pvo != NULL, ("pmap_kextract: no addr found")); 1344 pa = (pvo->pvo_pte.pte_lo & PTE_RPGN) | (va & ADDR_POFF); 1345 PMAP_UNLOCK(kernel_pmap); 1346 return (pa); 1347 } 1348 1349 /* 1350 * Remove a wired page from kernel virtual address space. 1351 */ 1352 void 1353 pmap_kremove(vm_offset_t va) 1354 { 1355 1356 pmap_remove(kernel_pmap, va, va + PAGE_SIZE); 1357 } 1358 1359 /* 1360 * Map a range of physical addresses into kernel virtual address space. 1361 * 1362 * The value passed in *virt is a suggested virtual address for the mapping. 1363 * Architectures which can support a direct-mapped physical to virtual region 1364 * can return the appropriate address within that region, leaving '*virt' 1365 * unchanged. We cannot and therefore do not; *virt is updated with the 1366 * first usable address after the mapped region. 1367 */ 1368 vm_offset_t 1369 pmap_map(vm_offset_t *virt, vm_offset_t pa_start, vm_offset_t pa_end, int prot) 1370 { 1371 vm_offset_t sva, va; 1372 1373 sva = *virt; 1374 va = sva; 1375 for (; pa_start < pa_end; pa_start += PAGE_SIZE, va += PAGE_SIZE) 1376 pmap_kenter(va, pa_start); 1377 *virt = va; 1378 return (sva); 1379 } 1380 1381 int 1382 pmap_mincore(pmap_t pmap, vm_offset_t addr) 1383 { 1384 TODO; 1385 return (0); 1386 } 1387 1388 void 1389 pmap_object_init_pt(pmap_t pm, vm_offset_t addr, vm_object_t object, 1390 vm_pindex_t pindex, vm_size_t size) 1391 { 1392 1393 VM_OBJECT_LOCK_ASSERT(object, MA_OWNED); 1394 KASSERT(object->type == OBJT_DEVICE, 1395 ("pmap_object_init_pt: non-device object")); 1396 KASSERT(pm == &curproc->p_vmspace->vm_pmap || pm == kernel_pmap, 1397 ("pmap_object_init_pt: non current pmap")); 1398 } 1399 1400 /* 1401 * Lower the permission for all mappings to a given page. 1402 */ 1403 void 1404 pmap_page_protect(vm_page_t m, vm_prot_t prot) 1405 { 1406 struct pvo_head *pvo_head; 1407 struct pvo_entry *pvo, *next_pvo; 1408 struct pte *pt; 1409 pmap_t pmap; 1410 1411 /* 1412 * Since the routine only downgrades protection, if the 1413 * maximal protection is desired, there isn't any change 1414 * to be made. 1415 */ 1416 if ((prot & (VM_PROT_READ|VM_PROT_WRITE)) == 1417 (VM_PROT_READ|VM_PROT_WRITE)) 1418 return; 1419 1420 pvo_head = vm_page_to_pvoh(m); 1421 for (pvo = LIST_FIRST(pvo_head); pvo != NULL; pvo = next_pvo) { 1422 next_pvo = LIST_NEXT(pvo, pvo_vlink); 1423 PMAP_PVO_CHECK(pvo); /* sanity check */ 1424 pmap = pvo->pvo_pmap; 1425 PMAP_LOCK(pmap); 1426 1427 /* 1428 * Downgrading to no mapping at all, we just remove the entry. 1429 */ 1430 if ((prot & VM_PROT_READ) == 0) { 1431 pmap_pvo_remove(pvo, -1); 1432 PMAP_UNLOCK(pmap); 1433 continue; 1434 } 1435 1436 /* 1437 * If EXEC permission is being revoked, just clear the flag 1438 * in the PVO. 1439 */ 1440 if ((prot & VM_PROT_EXECUTE) == 0) 1441 pvo->pvo_vaddr &= ~PVO_EXECUTABLE; 1442 1443 /* 1444 * If this entry is already RO, don't diddle with the page 1445 * table. 1446 */ 1447 if ((pvo->pvo_pte.pte_lo & PTE_PP) == PTE_BR) { 1448 PMAP_UNLOCK(pmap); 1449 PMAP_PVO_CHECK(pvo); 1450 continue; 1451 } 1452 1453 /* 1454 * Grab the PTE before we diddle the bits so pvo_to_pte can 1455 * verify the pte contents are as expected. 1456 */ 1457 pt = pmap_pvo_to_pte(pvo, -1); 1458 pvo->pvo_pte.pte_lo &= ~PTE_PP; 1459 pvo->pvo_pte.pte_lo |= PTE_BR; 1460 if (pt != NULL) 1461 pmap_pte_change(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 1462 PMAP_UNLOCK(pmap); 1463 PMAP_PVO_CHECK(pvo); /* sanity check */ 1464 } 1465 1466 /* 1467 * Downgrading from writeable: clear the VM page flag 1468 */ 1469 if ((prot & VM_PROT_WRITE) != VM_PROT_WRITE) 1470 vm_page_flag_clear(m, PG_WRITEABLE); 1471 } 1472 1473 /* 1474 * Returns true if the pmap's pv is one of the first 1475 * 16 pvs linked to from this page. This count may 1476 * be changed upwards or downwards in the future; it 1477 * is only necessary that true be returned for a small 1478 * subset of pmaps for proper page aging. 1479 */ 1480 boolean_t 1481 pmap_page_exists_quick(pmap_t pmap, vm_page_t m) 1482 { 1483 int loops; 1484 struct pvo_entry *pvo; 1485 1486 if (!pmap_initialized || (m->flags & PG_FICTITIOUS)) 1487 return FALSE; 1488 1489 loops = 0; 1490 LIST_FOREACH(pvo, vm_page_to_pvoh(m), pvo_vlink) { 1491 if (pvo->pvo_pmap == pmap) 1492 return (TRUE); 1493 if (++loops >= 16) 1494 break; 1495 } 1496 1497 return (FALSE); 1498 } 1499 1500 static u_int pmap_vsidcontext; 1501 1502 void 1503 pmap_pinit(pmap_t pmap) 1504 { 1505 int i, mask; 1506 u_int entropy; 1507 1508 KASSERT((int)pmap < VM_MIN_KERNEL_ADDRESS, ("pmap_pinit: virt pmap")); 1509 PMAP_LOCK_INIT(pmap); 1510 1511 entropy = 0; 1512 __asm __volatile("mftb %0" : "=r"(entropy)); 1513 1514 /* 1515 * Allocate some segment registers for this pmap. 1516 */ 1517 for (i = 0; i < NPMAPS; i += VSID_NBPW) { 1518 u_int hash, n; 1519 1520 /* 1521 * Create a new value by mutiplying by a prime and adding in 1522 * entropy from the timebase register. This is to make the 1523 * VSID more random so that the PT hash function collides 1524 * less often. (Note that the prime casues gcc to do shifts 1525 * instead of a multiply.) 1526 */ 1527 pmap_vsidcontext = (pmap_vsidcontext * 0x1105) + entropy; 1528 hash = pmap_vsidcontext & (NPMAPS - 1); 1529 if (hash == 0) /* 0 is special, avoid it */ 1530 continue; 1531 n = hash >> 5; 1532 mask = 1 << (hash & (VSID_NBPW - 1)); 1533 hash = (pmap_vsidcontext & 0xfffff); 1534 if (pmap_vsid_bitmap[n] & mask) { /* collision? */ 1535 /* anything free in this bucket? */ 1536 if (pmap_vsid_bitmap[n] == 0xffffffff) { 1537 entropy = (pmap_vsidcontext >> 20); 1538 continue; 1539 } 1540 i = ffs(~pmap_vsid_bitmap[i]) - 1; 1541 mask = 1 << i; 1542 hash &= 0xfffff & ~(VSID_NBPW - 1); 1543 hash |= i; 1544 } 1545 pmap_vsid_bitmap[n] |= mask; 1546 for (i = 0; i < 16; i++) 1547 pmap->pm_sr[i] = VSID_MAKE(i, hash); 1548 return; 1549 } 1550 1551 panic("pmap_pinit: out of segments"); 1552 } 1553 1554 /* 1555 * Initialize the pmap associated with process 0. 1556 */ 1557 void 1558 pmap_pinit0(pmap_t pm) 1559 { 1560 1561 pmap_pinit(pm); 1562 bzero(&pm->pm_stats, sizeof(pm->pm_stats)); 1563 } 1564 1565 /* 1566 * Set the physical protection on the specified range of this map as requested. 1567 */ 1568 void 1569 pmap_protect(pmap_t pm, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot) 1570 { 1571 struct pvo_entry *pvo; 1572 struct pte *pt; 1573 int pteidx; 1574 1575 CTR4(KTR_PMAP, "pmap_protect: pm=%p sva=%#x eva=%#x prot=%#x", pm, sva, 1576 eva, prot); 1577 1578 1579 KASSERT(pm == &curproc->p_vmspace->vm_pmap || pm == kernel_pmap, 1580 ("pmap_protect: non current pmap")); 1581 1582 if ((prot & VM_PROT_READ) == VM_PROT_NONE) { 1583 mtx_lock(&Giant); 1584 pmap_remove(pm, sva, eva); 1585 mtx_unlock(&Giant); 1586 return; 1587 } 1588 1589 mtx_lock(&Giant); 1590 vm_page_lock_queues(); 1591 PMAP_LOCK(pm); 1592 for (; sva < eva; sva += PAGE_SIZE) { 1593 pvo = pmap_pvo_find_va(pm, sva, &pteidx); 1594 if (pvo == NULL) 1595 continue; 1596 1597 if ((prot & VM_PROT_EXECUTE) == 0) 1598 pvo->pvo_vaddr &= ~PVO_EXECUTABLE; 1599 1600 /* 1601 * Grab the PTE pointer before we diddle with the cached PTE 1602 * copy. 1603 */ 1604 pt = pmap_pvo_to_pte(pvo, pteidx); 1605 /* 1606 * Change the protection of the page. 1607 */ 1608 pvo->pvo_pte.pte_lo &= ~PTE_PP; 1609 pvo->pvo_pte.pte_lo |= PTE_BR; 1610 1611 /* 1612 * If the PVO is in the page table, update that pte as well. 1613 */ 1614 if (pt != NULL) 1615 pmap_pte_change(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 1616 } 1617 vm_page_unlock_queues(); 1618 PMAP_UNLOCK(pm); 1619 mtx_unlock(&Giant); 1620 } 1621 1622 /* 1623 * Map a list of wired pages into kernel virtual address space. This is 1624 * intended for temporary mappings which do not need page modification or 1625 * references recorded. Existing mappings in the region are overwritten. 1626 */ 1627 void 1628 pmap_qenter(vm_offset_t sva, vm_page_t *m, int count) 1629 { 1630 vm_offset_t va; 1631 1632 va = sva; 1633 while (count-- > 0) { 1634 pmap_kenter(va, VM_PAGE_TO_PHYS(*m)); 1635 va += PAGE_SIZE; 1636 m++; 1637 } 1638 } 1639 1640 /* 1641 * Remove page mappings from kernel virtual address space. Intended for 1642 * temporary mappings entered by pmap_qenter. 1643 */ 1644 void 1645 pmap_qremove(vm_offset_t sva, int count) 1646 { 1647 vm_offset_t va; 1648 1649 va = sva; 1650 while (count-- > 0) { 1651 pmap_kremove(va); 1652 va += PAGE_SIZE; 1653 } 1654 } 1655 1656 void 1657 pmap_release(pmap_t pmap) 1658 { 1659 int idx, mask; 1660 1661 /* 1662 * Free segment register's VSID 1663 */ 1664 if (pmap->pm_sr[0] == 0) 1665 panic("pmap_release"); 1666 1667 idx = VSID_TO_HASH(pmap->pm_sr[0]) & (NPMAPS-1); 1668 mask = 1 << (idx % VSID_NBPW); 1669 idx /= VSID_NBPW; 1670 pmap_vsid_bitmap[idx] &= ~mask; 1671 PMAP_LOCK_DESTROY(pmap); 1672 } 1673 1674 /* 1675 * Remove the given range of addresses from the specified map. 1676 */ 1677 void 1678 pmap_remove(pmap_t pm, vm_offset_t sva, vm_offset_t eva) 1679 { 1680 struct pvo_entry *pvo; 1681 int pteidx; 1682 1683 vm_page_lock_queues(); 1684 PMAP_LOCK(pm); 1685 for (; sva < eva; sva += PAGE_SIZE) { 1686 pvo = pmap_pvo_find_va(pm, sva, &pteidx); 1687 if (pvo != NULL) { 1688 pmap_pvo_remove(pvo, pteidx); 1689 } 1690 } 1691 PMAP_UNLOCK(pm); 1692 vm_page_unlock_queues(); 1693 } 1694 1695 /* 1696 * Remove physical page from all pmaps in which it resides. pmap_pvo_remove() 1697 * will reflect changes in pte's back to the vm_page. 1698 */ 1699 void 1700 pmap_remove_all(vm_page_t m) 1701 { 1702 struct pvo_head *pvo_head; 1703 struct pvo_entry *pvo, *next_pvo; 1704 pmap_t pmap; 1705 1706 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 1707 1708 pvo_head = vm_page_to_pvoh(m); 1709 for (pvo = LIST_FIRST(pvo_head); pvo != NULL; pvo = next_pvo) { 1710 next_pvo = LIST_NEXT(pvo, pvo_vlink); 1711 1712 PMAP_PVO_CHECK(pvo); /* sanity check */ 1713 pmap = pvo->pvo_pmap; 1714 PMAP_LOCK(pmap); 1715 pmap_pvo_remove(pvo, -1); 1716 PMAP_UNLOCK(pmap); 1717 } 1718 vm_page_flag_clear(m, PG_WRITEABLE); 1719 } 1720 1721 /* 1722 * Remove all pages from specified address space, this aids process exit 1723 * speeds. This is much faster than pmap_remove in the case of running down 1724 * an entire address space. Only works for the current pmap. 1725 */ 1726 void 1727 pmap_remove_pages(pmap_t pm, vm_offset_t sva, vm_offset_t eva) 1728 { 1729 } 1730 1731 /* 1732 * Allocate a physical page of memory directly from the phys_avail map. 1733 * Can only be called from pmap_bootstrap before avail start and end are 1734 * calculated. 1735 */ 1736 static vm_offset_t 1737 pmap_bootstrap_alloc(vm_size_t size, u_int align) 1738 { 1739 vm_offset_t s, e; 1740 int i, j; 1741 1742 size = round_page(size); 1743 for (i = 0; phys_avail[i + 1] != 0; i += 2) { 1744 if (align != 0) 1745 s = (phys_avail[i] + align - 1) & ~(align - 1); 1746 else 1747 s = phys_avail[i]; 1748 e = s + size; 1749 1750 if (s < phys_avail[i] || e > phys_avail[i + 1]) 1751 continue; 1752 1753 if (s == phys_avail[i]) { 1754 phys_avail[i] += size; 1755 } else if (e == phys_avail[i + 1]) { 1756 phys_avail[i + 1] -= size; 1757 } else { 1758 for (j = phys_avail_count * 2; j > i; j -= 2) { 1759 phys_avail[j] = phys_avail[j - 2]; 1760 phys_avail[j + 1] = phys_avail[j - 1]; 1761 } 1762 1763 phys_avail[i + 3] = phys_avail[i + 1]; 1764 phys_avail[i + 1] = s; 1765 phys_avail[i + 2] = e; 1766 phys_avail_count++; 1767 } 1768 1769 return (s); 1770 } 1771 panic("pmap_bootstrap_alloc: could not allocate memory"); 1772 } 1773 1774 /* 1775 * Return an unmapped pvo for a kernel virtual address. 1776 * Used by pmap functions that operate on physical pages. 1777 */ 1778 static struct pvo_entry * 1779 pmap_rkva_alloc(void) 1780 { 1781 struct pvo_entry *pvo; 1782 struct pte *pt; 1783 vm_offset_t kva; 1784 int pteidx; 1785 1786 if (pmap_rkva_count == 0) 1787 panic("pmap_rkva_alloc: no more reserved KVAs"); 1788 1789 kva = pmap_rkva_start + (PAGE_SIZE * --pmap_rkva_count); 1790 pmap_kenter(kva, 0); 1791 1792 pvo = pmap_pvo_find_va(kernel_pmap, kva, &pteidx); 1793 1794 if (pvo == NULL) 1795 panic("pmap_kva_alloc: pmap_pvo_find_va failed"); 1796 1797 pt = pmap_pvo_to_pte(pvo, pteidx); 1798 1799 if (pt == NULL) 1800 panic("pmap_kva_alloc: pmap_pvo_to_pte failed"); 1801 1802 pmap_pte_unset(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 1803 PVO_PTEGIDX_CLR(pvo); 1804 1805 pmap_pte_overflow++; 1806 1807 return (pvo); 1808 } 1809 1810 static void 1811 pmap_pa_map(struct pvo_entry *pvo, vm_offset_t pa, struct pte *saved_pt, 1812 int *depth_p) 1813 { 1814 struct pte *pt; 1815 1816 /* 1817 * If this pvo already has a valid pte, we need to save it so it can 1818 * be restored later. We then just reload the new PTE over the old 1819 * slot. 1820 */ 1821 if (saved_pt != NULL) { 1822 pt = pmap_pvo_to_pte(pvo, -1); 1823 1824 if (pt != NULL) { 1825 pmap_pte_unset(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 1826 PVO_PTEGIDX_CLR(pvo); 1827 pmap_pte_overflow++; 1828 } 1829 1830 *saved_pt = pvo->pvo_pte; 1831 1832 pvo->pvo_pte.pte_lo &= ~PTE_RPGN; 1833 } 1834 1835 pvo->pvo_pte.pte_lo |= pa; 1836 1837 if (!pmap_pte_spill(pvo->pvo_vaddr)) 1838 panic("pmap_pa_map: could not spill pvo %p", pvo); 1839 1840 if (depth_p != NULL) 1841 (*depth_p)++; 1842 } 1843 1844 static void 1845 pmap_pa_unmap(struct pvo_entry *pvo, struct pte *saved_pt, int *depth_p) 1846 { 1847 struct pte *pt; 1848 1849 pt = pmap_pvo_to_pte(pvo, -1); 1850 1851 if (pt != NULL) { 1852 pmap_pte_unset(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 1853 PVO_PTEGIDX_CLR(pvo); 1854 pmap_pte_overflow++; 1855 } 1856 1857 pvo->pvo_pte.pte_lo &= ~PTE_RPGN; 1858 1859 /* 1860 * If there is a saved PTE and it's valid, restore it and return. 1861 */ 1862 if (saved_pt != NULL && (saved_pt->pte_lo & PTE_RPGN) != 0) { 1863 if (depth_p != NULL && --(*depth_p) == 0) 1864 panic("pmap_pa_unmap: restoring but depth == 0"); 1865 1866 pvo->pvo_pte = *saved_pt; 1867 1868 if (!pmap_pte_spill(pvo->pvo_vaddr)) 1869 panic("pmap_pa_unmap: could not spill pvo %p", pvo); 1870 } 1871 } 1872 1873 static void 1874 pmap_syncicache(vm_offset_t pa, vm_size_t len) 1875 { 1876 __syncicache((void *)pa, len); 1877 } 1878 1879 static void 1880 tlbia(void) 1881 { 1882 caddr_t i; 1883 1884 SYNC(); 1885 for (i = 0; i < (caddr_t)0x00040000; i += 0x00001000) { 1886 TLBIE(i); 1887 EIEIO(); 1888 } 1889 TLBSYNC(); 1890 SYNC(); 1891 } 1892 1893 static int 1894 pmap_pvo_enter(pmap_t pm, uma_zone_t zone, struct pvo_head *pvo_head, 1895 vm_offset_t va, vm_offset_t pa, u_int pte_lo, int flags) 1896 { 1897 struct pvo_entry *pvo; 1898 u_int sr; 1899 int first; 1900 u_int ptegidx; 1901 int i; 1902 int bootstrap; 1903 1904 pmap_pvo_enter_calls++; 1905 first = 0; 1906 bootstrap = 0; 1907 1908 /* 1909 * Compute the PTE Group index. 1910 */ 1911 va &= ~ADDR_POFF; 1912 sr = va_to_sr(pm->pm_sr, va); 1913 ptegidx = va_to_pteg(sr, va); 1914 1915 /* 1916 * Remove any existing mapping for this page. Reuse the pvo entry if 1917 * there is a mapping. 1918 */ 1919 mtx_lock(&pmap_table_mutex); 1920 LIST_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) { 1921 if (pvo->pvo_pmap == pm && PVO_VADDR(pvo) == va) { 1922 if ((pvo->pvo_pte.pte_lo & PTE_RPGN) == pa && 1923 (pvo->pvo_pte.pte_lo & PTE_PP) == 1924 (pte_lo & PTE_PP)) { 1925 mtx_unlock(&pmap_table_mutex); 1926 return (0); 1927 } 1928 pmap_pvo_remove(pvo, -1); 1929 break; 1930 } 1931 } 1932 1933 /* 1934 * If we aren't overwriting a mapping, try to allocate. 1935 */ 1936 if (pmap_initialized) { 1937 pvo = uma_zalloc(zone, M_NOWAIT); 1938 } else { 1939 if (pmap_bpvo_pool_index >= BPVO_POOL_SIZE) { 1940 panic("pmap_enter: bpvo pool exhausted, %d, %d, %d", 1941 pmap_bpvo_pool_index, BPVO_POOL_SIZE, 1942 BPVO_POOL_SIZE * sizeof(struct pvo_entry)); 1943 } 1944 pvo = &pmap_bpvo_pool[pmap_bpvo_pool_index]; 1945 pmap_bpvo_pool_index++; 1946 bootstrap = 1; 1947 } 1948 1949 if (pvo == NULL) { 1950 mtx_unlock(&pmap_table_mutex); 1951 return (ENOMEM); 1952 } 1953 1954 pmap_pvo_entries++; 1955 pvo->pvo_vaddr = va; 1956 pvo->pvo_pmap = pm; 1957 LIST_INSERT_HEAD(&pmap_pvo_table[ptegidx], pvo, pvo_olink); 1958 pvo->pvo_vaddr &= ~ADDR_POFF; 1959 if (flags & VM_PROT_EXECUTE) 1960 pvo->pvo_vaddr |= PVO_EXECUTABLE; 1961 if (flags & PVO_WIRED) 1962 pvo->pvo_vaddr |= PVO_WIRED; 1963 if (pvo_head != &pmap_pvo_kunmanaged) 1964 pvo->pvo_vaddr |= PVO_MANAGED; 1965 if (bootstrap) 1966 pvo->pvo_vaddr |= PVO_BOOTSTRAP; 1967 if (flags & PVO_FAKE) 1968 pvo->pvo_vaddr |= PVO_FAKE; 1969 1970 pmap_pte_create(&pvo->pvo_pte, sr, va, pa | pte_lo); 1971 1972 /* 1973 * Remember if the list was empty and therefore will be the first 1974 * item. 1975 */ 1976 if (LIST_FIRST(pvo_head) == NULL) 1977 first = 1; 1978 LIST_INSERT_HEAD(pvo_head, pvo, pvo_vlink); 1979 1980 if (pvo->pvo_pte.pte_lo & PVO_WIRED) 1981 pm->pm_stats.wired_count++; 1982 pm->pm_stats.resident_count++; 1983 1984 /* 1985 * We hope this succeeds but it isn't required. 1986 */ 1987 i = pmap_pte_insert(ptegidx, &pvo->pvo_pte); 1988 if (i >= 0) { 1989 PVO_PTEGIDX_SET(pvo, i); 1990 } else { 1991 panic("pmap_pvo_enter: overflow"); 1992 pmap_pte_overflow++; 1993 } 1994 mtx_unlock(&pmap_table_mutex); 1995 1996 return (first ? ENOENT : 0); 1997 } 1998 1999 static void 2000 pmap_pvo_remove(struct pvo_entry *pvo, int pteidx) 2001 { 2002 struct pte *pt; 2003 2004 /* 2005 * If there is an active pte entry, we need to deactivate it (and 2006 * save the ref & cfg bits). 2007 */ 2008 pt = pmap_pvo_to_pte(pvo, pteidx); 2009 if (pt != NULL) { 2010 pmap_pte_unset(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 2011 PVO_PTEGIDX_CLR(pvo); 2012 } else { 2013 pmap_pte_overflow--; 2014 } 2015 2016 /* 2017 * Update our statistics. 2018 */ 2019 pvo->pvo_pmap->pm_stats.resident_count--; 2020 if (pvo->pvo_pte.pte_lo & PVO_WIRED) 2021 pvo->pvo_pmap->pm_stats.wired_count--; 2022 2023 /* 2024 * Save the REF/CHG bits into their cache if the page is managed. 2025 */ 2026 if ((pvo->pvo_vaddr & (PVO_MANAGED|PVO_FAKE)) == PVO_MANAGED) { 2027 struct vm_page *pg; 2028 2029 pg = PHYS_TO_VM_PAGE(pvo->pvo_pte.pte_lo & PTE_RPGN); 2030 if (pg != NULL) { 2031 pmap_attr_save(pg, pvo->pvo_pte.pte_lo & 2032 (PTE_REF | PTE_CHG)); 2033 } 2034 } 2035 2036 /* 2037 * Remove this PVO from the PV list. 2038 */ 2039 LIST_REMOVE(pvo, pvo_vlink); 2040 2041 /* 2042 * Remove this from the overflow list and return it to the pool 2043 * if we aren't going to reuse it. 2044 */ 2045 LIST_REMOVE(pvo, pvo_olink); 2046 if (!(pvo->pvo_vaddr & PVO_BOOTSTRAP)) 2047 uma_zfree(pvo->pvo_vaddr & PVO_MANAGED ? pmap_mpvo_zone : 2048 pmap_upvo_zone, pvo); 2049 pmap_pvo_entries--; 2050 pmap_pvo_remove_calls++; 2051 } 2052 2053 static __inline int 2054 pmap_pvo_pte_index(const struct pvo_entry *pvo, int ptegidx) 2055 { 2056 int pteidx; 2057 2058 /* 2059 * We can find the actual pte entry without searching by grabbing 2060 * the PTEG index from 3 unused bits in pte_lo[11:9] and by 2061 * noticing the HID bit. 2062 */ 2063 pteidx = ptegidx * 8 + PVO_PTEGIDX_GET(pvo); 2064 if (pvo->pvo_pte.pte_hi & PTE_HID) 2065 pteidx ^= pmap_pteg_mask * 8; 2066 2067 return (pteidx); 2068 } 2069 2070 static struct pvo_entry * 2071 pmap_pvo_find_va(pmap_t pm, vm_offset_t va, int *pteidx_p) 2072 { 2073 struct pvo_entry *pvo; 2074 int ptegidx; 2075 u_int sr; 2076 2077 va &= ~ADDR_POFF; 2078 sr = va_to_sr(pm->pm_sr, va); 2079 ptegidx = va_to_pteg(sr, va); 2080 2081 mtx_lock(&pmap_table_mutex); 2082 LIST_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) { 2083 if (pvo->pvo_pmap == pm && PVO_VADDR(pvo) == va) { 2084 if (pteidx_p) 2085 *pteidx_p = pmap_pvo_pte_index(pvo, ptegidx); 2086 break; 2087 } 2088 } 2089 mtx_unlock(&pmap_table_mutex); 2090 2091 return (pvo); 2092 } 2093 2094 static struct pte * 2095 pmap_pvo_to_pte(const struct pvo_entry *pvo, int pteidx) 2096 { 2097 struct pte *pt; 2098 2099 /* 2100 * If we haven't been supplied the ptegidx, calculate it. 2101 */ 2102 if (pteidx == -1) { 2103 int ptegidx; 2104 u_int sr; 2105 2106 sr = va_to_sr(pvo->pvo_pmap->pm_sr, pvo->pvo_vaddr); 2107 ptegidx = va_to_pteg(sr, pvo->pvo_vaddr); 2108 pteidx = pmap_pvo_pte_index(pvo, ptegidx); 2109 } 2110 2111 pt = &pmap_pteg_table[pteidx >> 3].pt[pteidx & 7]; 2112 2113 if ((pvo->pvo_pte.pte_hi & PTE_VALID) && !PVO_PTEGIDX_ISSET(pvo)) { 2114 panic("pmap_pvo_to_pte: pvo %p has valid pte in pvo but no " 2115 "valid pte index", pvo); 2116 } 2117 2118 if ((pvo->pvo_pte.pte_hi & PTE_VALID) == 0 && PVO_PTEGIDX_ISSET(pvo)) { 2119 panic("pmap_pvo_to_pte: pvo %p has valid pte index in pvo " 2120 "pvo but no valid pte", pvo); 2121 } 2122 2123 if ((pt->pte_hi ^ (pvo->pvo_pte.pte_hi & ~PTE_VALID)) == PTE_VALID) { 2124 if ((pvo->pvo_pte.pte_hi & PTE_VALID) == 0) { 2125 panic("pmap_pvo_to_pte: pvo %p has valid pte in " 2126 "pmap_pteg_table %p but invalid in pvo", pvo, pt); 2127 } 2128 2129 if (((pt->pte_lo ^ pvo->pvo_pte.pte_lo) & ~(PTE_CHG|PTE_REF)) 2130 != 0) { 2131 panic("pmap_pvo_to_pte: pvo %p pte does not match " 2132 "pte %p in pmap_pteg_table", pvo, pt); 2133 } 2134 2135 return (pt); 2136 } 2137 2138 if (pvo->pvo_pte.pte_hi & PTE_VALID) { 2139 panic("pmap_pvo_to_pte: pvo %p has invalid pte %p in " 2140 "pmap_pteg_table but valid in pvo", pvo, pt); 2141 } 2142 2143 return (NULL); 2144 } 2145 2146 /* 2147 * XXX: THIS STUFF SHOULD BE IN pte.c? 2148 */ 2149 int 2150 pmap_pte_spill(vm_offset_t addr) 2151 { 2152 struct pvo_entry *source_pvo, *victim_pvo; 2153 struct pvo_entry *pvo; 2154 int ptegidx, i, j; 2155 u_int sr; 2156 struct pteg *pteg; 2157 struct pte *pt; 2158 2159 pmap_pte_spills++; 2160 2161 sr = mfsrin(addr); 2162 ptegidx = va_to_pteg(sr, addr); 2163 2164 /* 2165 * Have to substitute some entry. Use the primary hash for this. 2166 * Use low bits of timebase as random generator. 2167 */ 2168 pteg = &pmap_pteg_table[ptegidx]; 2169 mtx_lock(&pmap_table_mutex); 2170 __asm __volatile("mftb %0" : "=r"(i)); 2171 i &= 7; 2172 pt = &pteg->pt[i]; 2173 2174 source_pvo = NULL; 2175 victim_pvo = NULL; 2176 LIST_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) { 2177 /* 2178 * We need to find a pvo entry for this address. 2179 */ 2180 PMAP_PVO_CHECK(pvo); 2181 if (source_pvo == NULL && 2182 pmap_pte_match(&pvo->pvo_pte, sr, addr, 2183 pvo->pvo_pte.pte_hi & PTE_HID)) { 2184 /* 2185 * Now found an entry to be spilled into the pteg. 2186 * The PTE is now valid, so we know it's active. 2187 */ 2188 j = pmap_pte_insert(ptegidx, &pvo->pvo_pte); 2189 2190 if (j >= 0) { 2191 PVO_PTEGIDX_SET(pvo, j); 2192 pmap_pte_overflow--; 2193 PMAP_PVO_CHECK(pvo); 2194 mtx_unlock(&pmap_table_mutex); 2195 return (1); 2196 } 2197 2198 source_pvo = pvo; 2199 2200 if (victim_pvo != NULL) 2201 break; 2202 } 2203 2204 /* 2205 * We also need the pvo entry of the victim we are replacing 2206 * so save the R & C bits of the PTE. 2207 */ 2208 if ((pt->pte_hi & PTE_HID) == 0 && victim_pvo == NULL && 2209 pmap_pte_compare(pt, &pvo->pvo_pte)) { 2210 victim_pvo = pvo; 2211 if (source_pvo != NULL) 2212 break; 2213 } 2214 } 2215 2216 if (source_pvo == NULL) { 2217 mtx_unlock(&pmap_table_mutex); 2218 return (0); 2219 } 2220 2221 if (victim_pvo == NULL) { 2222 if ((pt->pte_hi & PTE_HID) == 0) 2223 panic("pmap_pte_spill: victim p-pte (%p) has no pvo" 2224 "entry", pt); 2225 2226 /* 2227 * If this is a secondary PTE, we need to search it's primary 2228 * pvo bucket for the matching PVO. 2229 */ 2230 LIST_FOREACH(pvo, &pmap_pvo_table[ptegidx ^ pmap_pteg_mask], 2231 pvo_olink) { 2232 PMAP_PVO_CHECK(pvo); 2233 /* 2234 * We also need the pvo entry of the victim we are 2235 * replacing so save the R & C bits of the PTE. 2236 */ 2237 if (pmap_pte_compare(pt, &pvo->pvo_pte)) { 2238 victim_pvo = pvo; 2239 break; 2240 } 2241 } 2242 2243 if (victim_pvo == NULL) 2244 panic("pmap_pte_spill: victim s-pte (%p) has no pvo" 2245 "entry", pt); 2246 } 2247 2248 /* 2249 * We are invalidating the TLB entry for the EA we are replacing even 2250 * though it's valid. If we don't, we lose any ref/chg bit changes 2251 * contained in the TLB entry. 2252 */ 2253 source_pvo->pvo_pte.pte_hi &= ~PTE_HID; 2254 2255 pmap_pte_unset(pt, &victim_pvo->pvo_pte, victim_pvo->pvo_vaddr); 2256 pmap_pte_set(pt, &source_pvo->pvo_pte); 2257 2258 PVO_PTEGIDX_CLR(victim_pvo); 2259 PVO_PTEGIDX_SET(source_pvo, i); 2260 pmap_pte_replacements++; 2261 2262 PMAP_PVO_CHECK(victim_pvo); 2263 PMAP_PVO_CHECK(source_pvo); 2264 2265 mtx_unlock(&pmap_table_mutex); 2266 return (1); 2267 } 2268 2269 static int 2270 pmap_pte_insert(u_int ptegidx, struct pte *pvo_pt) 2271 { 2272 struct pte *pt; 2273 int i; 2274 2275 /* 2276 * First try primary hash. 2277 */ 2278 for (pt = pmap_pteg_table[ptegidx].pt, i = 0; i < 8; i++, pt++) { 2279 if ((pt->pte_hi & PTE_VALID) == 0) { 2280 pvo_pt->pte_hi &= ~PTE_HID; 2281 pmap_pte_set(pt, pvo_pt); 2282 return (i); 2283 } 2284 } 2285 2286 /* 2287 * Now try secondary hash. 2288 */ 2289 ptegidx ^= pmap_pteg_mask; 2290 ptegidx++; 2291 for (pt = pmap_pteg_table[ptegidx].pt, i = 0; i < 8; i++, pt++) { 2292 if ((pt->pte_hi & PTE_VALID) == 0) { 2293 pvo_pt->pte_hi |= PTE_HID; 2294 pmap_pte_set(pt, pvo_pt); 2295 return (i); 2296 } 2297 } 2298 2299 panic("pmap_pte_insert: overflow"); 2300 return (-1); 2301 } 2302 2303 static boolean_t 2304 pmap_query_bit(vm_page_t m, int ptebit) 2305 { 2306 struct pvo_entry *pvo; 2307 struct pte *pt; 2308 2309 #if 0 2310 if (pmap_attr_fetch(m) & ptebit) 2311 return (TRUE); 2312 #endif 2313 2314 LIST_FOREACH(pvo, vm_page_to_pvoh(m), pvo_vlink) { 2315 PMAP_PVO_CHECK(pvo); /* sanity check */ 2316 2317 /* 2318 * See if we saved the bit off. If so, cache it and return 2319 * success. 2320 */ 2321 if (pvo->pvo_pte.pte_lo & ptebit) { 2322 pmap_attr_save(m, ptebit); 2323 PMAP_PVO_CHECK(pvo); /* sanity check */ 2324 return (TRUE); 2325 } 2326 } 2327 2328 /* 2329 * No luck, now go through the hard part of looking at the PTEs 2330 * themselves. Sync so that any pending REF/CHG bits are flushed to 2331 * the PTEs. 2332 */ 2333 SYNC(); 2334 LIST_FOREACH(pvo, vm_page_to_pvoh(m), pvo_vlink) { 2335 PMAP_PVO_CHECK(pvo); /* sanity check */ 2336 2337 /* 2338 * See if this pvo has a valid PTE. if so, fetch the 2339 * REF/CHG bits from the valid PTE. If the appropriate 2340 * ptebit is set, cache it and return success. 2341 */ 2342 pt = pmap_pvo_to_pte(pvo, -1); 2343 if (pt != NULL) { 2344 pmap_pte_synch(pt, &pvo->pvo_pte); 2345 if (pvo->pvo_pte.pte_lo & ptebit) { 2346 pmap_attr_save(m, ptebit); 2347 PMAP_PVO_CHECK(pvo); /* sanity check */ 2348 return (TRUE); 2349 } 2350 } 2351 } 2352 2353 return (FALSE); 2354 } 2355 2356 static u_int 2357 pmap_clear_bit(vm_page_t m, int ptebit, int *origbit) 2358 { 2359 u_int count; 2360 struct pvo_entry *pvo; 2361 struct pte *pt; 2362 int rv; 2363 2364 /* 2365 * Clear the cached value. 2366 */ 2367 rv = pmap_attr_fetch(m); 2368 pmap_attr_clear(m, ptebit); 2369 2370 /* 2371 * Sync so that any pending REF/CHG bits are flushed to the PTEs (so 2372 * we can reset the right ones). note that since the pvo entries and 2373 * list heads are accessed via BAT0 and are never placed in the page 2374 * table, we don't have to worry about further accesses setting the 2375 * REF/CHG bits. 2376 */ 2377 SYNC(); 2378 2379 /* 2380 * For each pvo entry, clear the pvo's ptebit. If this pvo has a 2381 * valid pte clear the ptebit from the valid pte. 2382 */ 2383 count = 0; 2384 LIST_FOREACH(pvo, vm_page_to_pvoh(m), pvo_vlink) { 2385 PMAP_PVO_CHECK(pvo); /* sanity check */ 2386 pt = pmap_pvo_to_pte(pvo, -1); 2387 if (pt != NULL) { 2388 pmap_pte_synch(pt, &pvo->pvo_pte); 2389 if (pvo->pvo_pte.pte_lo & ptebit) { 2390 count++; 2391 pmap_pte_clear(pt, PVO_VADDR(pvo), ptebit); 2392 } 2393 } 2394 rv |= pvo->pvo_pte.pte_lo; 2395 pvo->pvo_pte.pte_lo &= ~ptebit; 2396 PMAP_PVO_CHECK(pvo); /* sanity check */ 2397 } 2398 2399 if (origbit != NULL) { 2400 *origbit = rv; 2401 } 2402 2403 return (count); 2404 } 2405 2406 /* 2407 * Return true if the physical range is encompassed by the battable[idx] 2408 */ 2409 static int 2410 pmap_bat_mapped(int idx, vm_offset_t pa, vm_size_t size) 2411 { 2412 u_int prot; 2413 u_int32_t start; 2414 u_int32_t end; 2415 u_int32_t bat_ble; 2416 2417 /* 2418 * Return immediately if not a valid mapping 2419 */ 2420 if (!battable[idx].batu & BAT_Vs) 2421 return (EINVAL); 2422 2423 /* 2424 * The BAT entry must be cache-inhibited, guarded, and r/w 2425 * so it can function as an i/o page 2426 */ 2427 prot = battable[idx].batl & (BAT_I|BAT_G|BAT_PP_RW); 2428 if (prot != (BAT_I|BAT_G|BAT_PP_RW)) 2429 return (EPERM); 2430 2431 /* 2432 * The address should be within the BAT range. Assume that the 2433 * start address in the BAT has the correct alignment (thus 2434 * not requiring masking) 2435 */ 2436 start = battable[idx].batl & BAT_PBS; 2437 bat_ble = (battable[idx].batu & ~(BAT_EBS)) | 0x03; 2438 end = start | (bat_ble << 15) | 0x7fff; 2439 2440 if ((pa < start) || ((pa + size) > end)) 2441 return (ERANGE); 2442 2443 return (0); 2444 } 2445 2446 int 2447 pmap_dev_direct_mapped(vm_offset_t pa, vm_size_t size) 2448 { 2449 int i; 2450 2451 /* 2452 * This currently does not work for entries that 2453 * overlap 256M BAT segments. 2454 */ 2455 2456 for(i = 0; i < 16; i++) 2457 if (pmap_bat_mapped(i, pa, size) == 0) 2458 return (0); 2459 2460 return (EFAULT); 2461 } 2462 2463 /* 2464 * Map a set of physical memory pages into the kernel virtual 2465 * address space. Return a pointer to where it is mapped. This 2466 * routine is intended to be used for mapping device memory, 2467 * NOT real memory. 2468 */ 2469 void * 2470 pmap_mapdev(vm_offset_t pa, vm_size_t size) 2471 { 2472 vm_offset_t va, tmpva, ppa, offset; 2473 int i; 2474 2475 ppa = trunc_page(pa); 2476 offset = pa & PAGE_MASK; 2477 size = roundup(offset + size, PAGE_SIZE); 2478 2479 GIANT_REQUIRED; 2480 2481 /* 2482 * If the physical address lies within a valid BAT table entry, 2483 * return the 1:1 mapping. This currently doesn't work 2484 * for regions that overlap 256M BAT segments. 2485 */ 2486 for (i = 0; i < 16; i++) { 2487 if (pmap_bat_mapped(i, pa, size) == 0) 2488 return ((void *) pa); 2489 } 2490 2491 va = kmem_alloc_nofault(kernel_map, size); 2492 if (!va) 2493 panic("pmap_mapdev: Couldn't alloc kernel virtual memory"); 2494 2495 for (tmpva = va; size > 0;) { 2496 pmap_kenter(tmpva, ppa); 2497 TLBIE(tmpva); /* XXX or should it be invalidate-all ? */ 2498 size -= PAGE_SIZE; 2499 tmpva += PAGE_SIZE; 2500 ppa += PAGE_SIZE; 2501 } 2502 2503 return ((void *)(va + offset)); 2504 } 2505 2506 void 2507 pmap_unmapdev(vm_offset_t va, vm_size_t size) 2508 { 2509 vm_offset_t base, offset; 2510 2511 /* 2512 * If this is outside kernel virtual space, then it's a 2513 * battable entry and doesn't require unmapping 2514 */ 2515 if ((va >= VM_MIN_KERNEL_ADDRESS) && (va <= VM_MAX_KERNEL_ADDRESS)) { 2516 base = trunc_page(va); 2517 offset = va & PAGE_MASK; 2518 size = roundup(offset + size, PAGE_SIZE); 2519 kmem_free(kernel_map, base, size); 2520 } 2521 }
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