The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/powerpc/powerpc/swtch.S

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    1 /* $FreeBSD: releng/6.4/sys/powerpc/powerpc/swtch.S 139825 2005-01-07 02:29:27Z imp $ */
    2 /* $NetBSD: locore.S,v 1.24 2000/05/31 05:09:17 thorpej Exp $ */
    3 
    4 /*-
    5  * Copyright (C) 2001 Benno Rice
    6  * All rights reserved.
    7  *
    8  * Redistribution and use in source and binary forms, with or without
    9  * modification, are permitted provided that the following conditions
   10  * are met:
   11  * 1. Redistributions of source code must retain the above copyright
   12  *    notice, this list of conditions and the following disclaimer.
   13  * 2. Redistributions in binary form must reproduce the above copyright
   14  *    notice, this list of conditions and the following disclaimer in the
   15  *    documentation and/or other materials provided with the distribution.
   16  *
   17  * THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR
   18  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
   19  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
   20  * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
   21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
   22  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
   23  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
   24  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
   25  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
   26  * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   27 */
   28 /*-
   29  * Copyright (C) 1995, 1996 Wolfgang Solfrank.
   30  * Copyright (C) 1995, 1996 TooLs GmbH.
   31  * All rights reserved.
   32  *
   33  * Redistribution and use in source and binary forms, with or without
   34  * modification, are permitted provided that the following conditions
   35  * are met:
   36  * 1. Redistributions of source code must retain the above copyright
   37  *    notice, this list of conditions and the following disclaimer.
   38  * 2. Redistributions in binary form must reproduce the above copyright
   39  *    notice, this list of conditions and the following disclaimer in the
   40  *    documentation and/or other materials provided with the distribution.
   41  * 3. All advertising materials mentioning features or use of this software
   42  *    must display the following acknowledgement:
   43  *      This product includes software developed by TooLs GmbH.
   44  * 4. The name of TooLs GmbH may not be used to endorse or promote products
   45  *    derived from this software without specific prior written permission.
   46  *
   47  * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
   48  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
   49  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
   50  * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
   51  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
   52  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
   53  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
   54  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
   55  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
   56  * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   57  */
   58 
   59 #include "assym.s"
   60 
   61 #include <sys/syscall.h>
   62 
   63 #include <machine/trap.h>
   64 #include <machine/param.h>
   65 #include <machine/sr.h>
   66 #include <machine/psl.h>
   67 #include <machine/asm.h>
   68 
   69 /*
   70  * void cpu_switch(struct thread *old, struct thread *new)
   71  *
   72  * Switch to a new thread saving the current state in the old thread.
   73  */
   74 ENTRY(cpu_switch)
   75         lwz     %r5,TD_PCB(%r3)         /* Get the old thread's PCB ptr */
   76 
   77         mr      %r12,%r2        
   78         stmw    %r12,PCB_CONTEXT(%r5)   /* Save the non-volatile GP regs.
   79                                            These can now be used for scratch */
   80 
   81         mfcr    %r16                    /* Save the condition register */
   82         stw     %r16,PCB_CR(%r5)
   83         mflr    %r16                    /* Save the link register */
   84         stw     %r16,PCB_LR(%r5)
   85         mfsr    %r16,USER_SR            /* Save USER_SR for copyin/out */
   86         isync
   87         stw     %r16,PCB_USR(%r5)
   88         stw     %r1,PCB_SP(%r5)         /* Save the stack pointer */
   89 
   90         mr      %r14,%r3                /* Copy the old thread ptr... */
   91         mr      %r15,%r4                /* and the new thread ptr in scratch */
   92         
   93         lwz     %r6,PCB_FLAGS(%r5)      /* Save FPU context if needed */
   94         andi.   %r6, %r6, PCB_FPU
   95         beq     .L1
   96         bl      save_fpu
   97         mr      %r3,%r14                /* restore old thread ptr */
   98 .L1:
   99         bl      pmap_deactivate         /* Deactivate the current pmap */
  100 
  101         mr      %r3,%r15                /* Get new thread ptr */
  102         bl      pmap_activate           /* Activate the new address space */
  103 
  104         mfsprg  %r7,0                   /* Get the pcpu pointer */
  105         stw     %r15,PC_CURTHREAD(%r7)  /* Store new current thread */
  106         lwz     %r17,TD_PCB(%r15)       /* Store new current PCB */
  107         stw     %r17,PC_CURPCB(%r7)
  108 
  109         lwz     %r6, PCB_FLAGS(%r17)    /* Restore FPU context if needed */
  110         andi.   %r6, %r6, PCB_FPU
  111         beq     .L2
  112         mr      %r3,%r15                /* Pass curthread to enable_fpu */
  113         bl      enable_fpu
  114 
  115         /* thread to restore is in r3 */
  116 .L2:
  117         mr      %r3,%r17                /* Recover PCB ptr */
  118         lmw     %r12,PCB_CONTEXT(%r3)   /* Load the non-volatile GP regs */
  119         mr      %r2,%r12
  120         lwz     %r5,PCB_CR(%r3)         /* Load the condition register */
  121         mtcr    %r5
  122         lwz     %r5,PCB_LR(%r3)         /* Load the link register */
  123         mtlr    %r5
  124         lwz     %r5,PCB_USR(%r3)        /* Load the USER_SR segment reg */
  125         mtsr    USER_SR,%r5
  126         isync
  127         lwz     %r1,PCB_SP(%r3)         /* Load the stack pointer */
  128         blr
  129 
  130 /*
  131  * savectx(pcb)
  132  * Update pcb, saving current processor state
  133  */
  134 ENTRY(savectx)
  135         mr      %r12,%r2
  136         stmw    %r12,PCB_CONTEXT(%r3)   /* Save the non-volatile GP regs */
  137         mfcr    %r4                     /* Save the condition register */
  138         stw     %r4,PCB_CONTEXT(%r3)
  139         blr
  140 
  141 /*
  142  * fork_trampoline()
  143  * Set up the return from cpu_fork()
  144  */
  145 ENTRY(fork_trampoline)
  146         lwz     %r3,CF_FUNC(%r1)
  147         lwz     %r4,CF_ARG0(%r1)
  148         lwz     %r5,CF_ARG1(%r1)
  149         bl      fork_exit
  150         addi    %r1,%r1,CF_SIZE-FSP     /* Allow 8 bytes in front of
  151                                            trapframe to simulate FRAME_SETUP
  152                                            does when allocating space for
  153                                            a frame pointer/saved LR */
  154         b       trapexit

Cache object: e408678b0ad22974fbdcf6ae5a84eaf9


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