The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]

FreeBSD/Linux Kernel Cross Reference
sys/powerpc/powerpc/swtch32.S

Version: -  FREEBSD  -  FREEBSD-13-STABLE  -  FREEBSD-13-0  -  FREEBSD-12-STABLE  -  FREEBSD-12-0  -  FREEBSD-11-STABLE  -  FREEBSD-11-0  -  FREEBSD-10-STABLE  -  FREEBSD-10-0  -  FREEBSD-9-STABLE  -  FREEBSD-9-0  -  FREEBSD-8-STABLE  -  FREEBSD-8-0  -  FREEBSD-7-STABLE  -  FREEBSD-7-0  -  FREEBSD-6-STABLE  -  FREEBSD-6-0  -  FREEBSD-5-STABLE  -  FREEBSD-5-0  -  FREEBSD-4-STABLE  -  FREEBSD-3-STABLE  -  FREEBSD22  -  l41  -  OPENBSD  -  linux-2.6  -  MK84  -  PLAN9  -  xnu-8792 
SearchContext: -  none  -  3  -  10 

    1 /* $FreeBSD$ */
    2 /* $NetBSD: locore.S,v 1.24 2000/05/31 05:09:17 thorpej Exp $ */
    3 
    4 /*-
    5  * Copyright (C) 2001 Benno Rice
    6  * All rights reserved.
    7  *
    8  * Redistribution and use in source and binary forms, with or without
    9  * modification, are permitted provided that the following conditions
   10  * are met:
   11  * 1. Redistributions of source code must retain the above copyright
   12  *    notice, this list of conditions and the following disclaimer.
   13  * 2. Redistributions in binary form must reproduce the above copyright
   14  *    notice, this list of conditions and the following disclaimer in the
   15  *    documentation and/or other materials provided with the distribution.
   16  *
   17  * THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR
   18  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
   19  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
   20  * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
   21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
   22  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
   23  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
   24  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
   25  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
   26  * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   27 */
   28 /*-
   29  * Copyright (C) 1995, 1996 Wolfgang Solfrank.
   30  * Copyright (C) 1995, 1996 TooLs GmbH.
   31  * All rights reserved.
   32  *
   33  * Redistribution and use in source and binary forms, with or without
   34  * modification, are permitted provided that the following conditions
   35  * are met:
   36  * 1. Redistributions of source code must retain the above copyright
   37  *    notice, this list of conditions and the following disclaimer.
   38  * 2. Redistributions in binary form must reproduce the above copyright
   39  *    notice, this list of conditions and the following disclaimer in the
   40  *    documentation and/or other materials provided with the distribution.
   41  * 3. All advertising materials mentioning features or use of this software
   42  *    must display the following acknowledgement:
   43  *      This product includes software developed by TooLs GmbH.
   44  * 4. The name of TooLs GmbH may not be used to endorse or promote products
   45  *    derived from this software without specific prior written permission.
   46  *
   47  * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
   48  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
   49  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
   50  * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
   51  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
   52  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
   53  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
   54  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
   55  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
   56  * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   57  */
   58 
   59 #include "assym.s"
   60 #include "opt_sched.h"
   61 
   62 #include <sys/syscall.h>
   63 
   64 #include <machine/trap.h>
   65 #include <machine/param.h>
   66 #include <machine/asm.h>
   67 #include <machine/spr.h>
   68 
   69 /*
   70  * void cpu_throw(struct thread *old, struct thread *new)
   71  */
   72 ENTRY(cpu_throw)
   73         mr      %r2, %r4
   74         li      %r14,0  /* Tell cpu_switchin not to release a thread */
   75 
   76         b       cpu_switchin
   77 
   78 /*
   79  * void cpu_switch(struct thread *old,
   80  *                 struct thread *new,
   81  *                 struct mutex *mtx); 
   82  *
   83  * Switch to a new thread saving the current state in the old thread.
   84  */
   85 ENTRY(cpu_switch)
   86         lwz     %r6,TD_PCB(%r3)         /* Get the old thread's PCB ptr */
   87         stmw    %r12,PCB_CONTEXT(%r6)   /* Save the non-volatile GP regs.
   88                                            These can now be used for scratch */
   89 
   90         mfcr    %r16                    /* Save the condition register */
   91         stw     %r16,PCB_CR(%r6)
   92         mflr    %r16                    /* Save the link register */
   93         stw     %r16,PCB_LR(%r6)
   94         stw     %r1,PCB_SP(%r6)         /* Save the stack pointer */
   95 
   96         mr      %r14,%r3                /* Copy the old thread ptr... */
   97         mr      %r2,%r4                 /* and the new thread ptr in curthread */
   98         mr      %r16,%r5                /* and the new lock */
   99         mr      %r17,%r6                /* and the PCB */
  100         
  101         lwz     %r7,PCB_FLAGS(%r17)
  102         /* Save FPU context if needed */
  103         andi.   %r7, %r7, PCB_FPU
  104         beq     .L1
  105         bl      save_fpu
  106 
  107 .L1:
  108         mr      %r3,%r14                /* restore old thread ptr */
  109         lwz     %r7,PCB_FLAGS(%r17)
  110         /* Save Altivec context if needed */
  111         andi.   %r7, %r7, PCB_VEC
  112         beq     .L2
  113         bl      save_vec
  114         
  115 .L2:
  116         mr      %r3,%r14                /* restore old thread ptr */
  117         bl      pmap_deactivate         /* Deactivate the current pmap */
  118 
  119         sync                            /* Make sure all of that finished */
  120 
  121 cpu_switchin:
  122 #if defined(SMP) && defined(SCHED_ULE)
  123         /* Wait for the new thread to become unblocked */
  124         bl      _GLOBAL_OFFSET_TABLE_@local-4
  125         mflr    %r6
  126         lwz     %r6,blocked_lock@got(%r6)
  127 blocked_loop:
  128         lwz     %r7,TD_LOCK(%r2)
  129         cmpw    %r6,%r7 
  130         beq-    blocked_loop
  131         isync
  132 #endif
  133 
  134         lwz     %r17,TD_PCB(%r2)        /* Get new current PCB */
  135         lwz     %r1,PCB_SP(%r17)        /* Load new stack pointer */
  136 
  137         /* Release old thread now that we have a stack pointer set up */
  138         cmpwi   %r14,0
  139         beq-    1f
  140         stw     %r16,TD_LOCK(%r14)      /* ULE: update old thread's lock */
  141 
  142 1:      mfsprg  %r7,0                   /* Get the pcpu pointer */
  143         stw     %r2,PC_CURTHREAD(%r7)   /* Store new current thread */
  144         lwz     %r17,TD_PCB(%r2)        /* Store new current PCB */
  145         stw     %r17,PC_CURPCB(%r7)
  146 
  147         mr      %r3,%r2                 /* Get new thread ptr */
  148         bl      pmap_activate           /* Activate the new address space */
  149 
  150         lwz     %r6, PCB_FLAGS(%r17)
  151         /* Restore FPU context if needed */
  152         andi.   %r6, %r6, PCB_FPU
  153         beq     .L3
  154         mr      %r3,%r2                 /* Pass curthread to enable_fpu */
  155         bl      enable_fpu
  156 
  157 .L3:
  158         lwz     %r6, PCB_FLAGS(%r17)
  159         /* Restore Altivec context if needed */
  160         andi.   %r6, %r6, PCB_VEC
  161         beq     .L4
  162         mr      %r3,%r2                 /* Pass curthread to enable_vec */
  163         bl      enable_vec
  164 
  165 .L4:
  166         /* thread to restore is in r3 */
  167         mr      %r3,%r17                /* Recover PCB ptr */
  168         lmw     %r12,PCB_CONTEXT(%r3)   /* Load the non-volatile GP regs */
  169         lwz     %r5,PCB_CR(%r3)         /* Load the condition register */
  170         mtcr    %r5
  171         lwz     %r5,PCB_LR(%r3)         /* Load the link register */
  172         mtlr    %r5
  173         lwz     %r1,PCB_SP(%r3)         /* Load the stack pointer */
  174         /*
  175          * Perform a dummy stwcx. to clear any reservations we may have
  176          * inherited from the previous thread. It doesn't matter if the
  177          * stwcx succeeds or not. pcb_context[0] can be clobbered.
  178          */
  179         stwcx.  %r1, 0, %r3
  180         blr
  181 
  182 /*
  183  * savectx(pcb)
  184  * Update pcb, saving current processor state
  185  */
  186 ENTRY(savectx)
  187         stmw    %r12,PCB_CONTEXT(%r3)   /* Save the non-volatile GP regs */
  188         mfcr    %r4                     /* Save the condition register */
  189         stw     %r4,PCB_CR(%r3)
  190         mflr    %r4                     /* Save the link register */
  191         stw     %r4,PCB_LR(%r3)
  192         blr
  193 
  194 /*
  195  * fork_trampoline()
  196  * Set up the return from cpu_fork()
  197  */
  198 ENTRY(fork_trampoline)
  199         lwz     %r3,CF_FUNC(%r1)
  200         lwz     %r4,CF_ARG0(%r1)
  201         lwz     %r5,CF_ARG1(%r1)
  202         bl      fork_exit
  203         addi    %r1,%r1,CF_SIZE-FSP     /* Allow 8 bytes in front of
  204                                            trapframe to simulate FRAME_SETUP
  205                                            does when allocating space for
  206                                            a frame pointer/saved LR */
  207         b       trapexit

Cache object: 601e480c372406773f91b36632418b89


[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]


This page is part of the FreeBSD/Linux Linux Kernel Cross-Reference, and was automatically generated using a modified version of the LXR engine.