The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/powerpc/powerpc/swtch32.S

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    1 /* $FreeBSD$ */
    2 /* $NetBSD: locore.S,v 1.24 2000/05/31 05:09:17 thorpej Exp $ */
    3 
    4 /*-
    5  * Copyright (C) 2001 Benno Rice
    6  * All rights reserved.
    7  *
    8  * Redistribution and use in source and binary forms, with or without
    9  * modification, are permitted provided that the following conditions
   10  * are met:
   11  * 1. Redistributions of source code must retain the above copyright
   12  *    notice, this list of conditions and the following disclaimer.
   13  * 2. Redistributions in binary form must reproduce the above copyright
   14  *    notice, this list of conditions and the following disclaimer in the
   15  *    documentation and/or other materials provided with the distribution.
   16  *
   17  * THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR
   18  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
   19  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
   20  * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
   21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
   22  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
   23  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
   24  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
   25  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
   26  * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   27 */
   28 /*-
   29  * Copyright (C) 1995, 1996 Wolfgang Solfrank.
   30  * Copyright (C) 1995, 1996 TooLs GmbH.
   31  * All rights reserved.
   32  *
   33  * Redistribution and use in source and binary forms, with or without
   34  * modification, are permitted provided that the following conditions
   35  * are met:
   36  * 1. Redistributions of source code must retain the above copyright
   37  *    notice, this list of conditions and the following disclaimer.
   38  * 2. Redistributions in binary form must reproduce the above copyright
   39  *    notice, this list of conditions and the following disclaimer in the
   40  *    documentation and/or other materials provided with the distribution.
   41  * 3. All advertising materials mentioning features or use of this software
   42  *    must display the following acknowledgement:
   43  *      This product includes software developed by TooLs GmbH.
   44  * 4. The name of TooLs GmbH may not be used to endorse or promote products
   45  *    derived from this software without specific prior written permission.
   46  *
   47  * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
   48  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
   49  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
   50  * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
   51  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
   52  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
   53  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
   54  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
   55  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
   56  * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   57  */
   58 
   59 #include "assym.inc"
   60 #include "opt_sched.h"
   61 
   62 #include <sys/syscall.h>
   63 
   64 #include <machine/trap.h>
   65 #include <machine/param.h>
   66 #include <machine/asm.h>
   67 #include <machine/spr.h>
   68 
   69 /*
   70  * void cpu_throw(struct thread *old, struct thread *new)
   71  */
   72 ENTRY(cpu_throw)
   73         mr      %r2, %r4
   74         li      %r14,0  /* Tell cpu_switchin not to release a thread */
   75 
   76         b       cpu_switchin
   77 END(cpu_throw)
   78 
   79 /*
   80  * void cpu_switch(struct thread *old,
   81  *                 struct thread *new,
   82  *                 struct mutex *mtx); 
   83  *
   84  * Switch to a new thread saving the current state in the old thread.
   85  */
   86 ENTRY(cpu_switch)
   87         lwz     %r6,TD_PCB(%r3)         /* Get the old thread's PCB ptr */
   88         stmw    %r12,PCB_CONTEXT(%r6)   /* Save the non-volatile GP regs.
   89                                            These can now be used for scratch */
   90 
   91         mfcr    %r16                    /* Save the condition register */
   92         stw     %r16,PCB_CR(%r6)
   93         mflr    %r16                    /* Save the link register */
   94         stw     %r16,PCB_LR(%r6)
   95         stw     %r1,PCB_SP(%r6)         /* Save the stack pointer */
   96         bl      1f
   97 1:
   98         mflr    %r30                    /* Prepare for secure-PLT calls */
   99         addis   %r30, %r30, (_GLOBAL_OFFSET_TABLE_-1b)@ha
  100         addi    %r30, %r30, (_GLOBAL_OFFSET_TABLE_-1b)@l
  101 
  102         mr      %r14,%r3                /* Copy the old thread ptr... */
  103         mr      %r2,%r4                 /* and the new thread ptr in curthread */
  104         mr      %r16,%r5                /* and the new lock */
  105         mr      %r17,%r6                /* and the PCB */
  106         
  107         lwz     %r18,PCB_FLAGS(%r17)
  108         /* Save FPU context if needed */
  109         andi.   %r7, %r18, PCB_FPU
  110         beq     .L1
  111         bl      save_fpu
  112 
  113 .L1:
  114         mr      %r3,%r14                /* restore old thread ptr */
  115         /* Save Altivec context if needed */
  116         andi.   %r7, %r18, PCB_VEC
  117         beq     .L2
  118         bl      save_vec
  119         
  120 .L2:
  121 #if defined(__SPE__)
  122         mfspr   %r3,SPR_SPEFSCR
  123         stw     %r3,PCB_VSCR(%r17)
  124 #endif
  125         mr      %r3,%r14                /* restore old thread ptr */
  126         bl      pmap_deactivate         /* Deactivate the current pmap */
  127 
  128         sync                            /* Make sure all of that finished */
  129 
  130 cpu_switchin:
  131 #if defined(SMP) && defined(SCHED_ULE)
  132         /* Wait for the new thread to become unblocked */
  133         bl      1f
  134 1:
  135         mflr    %r6
  136         addis   %r6,%r6,(_GLOBAL_OFFSET_TABLE_-1b)@ha
  137         addi    %r6,%r6,(_GLOBAL_OFFSET_TABLE_-1b)@l
  138         mr      %r30, %r6               /* Prepare for secure-PLT calls */
  139         lwz     %r6,blocked_lock@got(%r6)
  140 blocked_loop:
  141         lwz     %r7,TD_LOCK(%r2)
  142         cmpw    %r6,%r7 
  143         beq-    blocked_loop
  144         isync
  145 #endif
  146 
  147         lwz     %r17,TD_PCB(%r2)        /* Get new current PCB */
  148         lwz     %r1,PCB_SP(%r17)        /* Load new stack pointer */
  149 
  150         /* Release old thread now that we have a stack pointer set up */
  151         cmpwi   %r14,0
  152         beq-    1f
  153         stw     %r16,TD_LOCK(%r14)      /* ULE: update old thread's lock */
  154 
  155 1:      mfsprg  %r7,0                   /* Get the pcpu pointer */
  156         stw     %r2,PC_CURTHREAD(%r7)   /* Store new current thread */
  157         lwz     %r17,TD_PCB(%r2)        /* Store new current PCB */
  158         stw     %r17,PC_CURPCB(%r7)
  159 
  160         mr      %r3,%r2                 /* Get new thread ptr */
  161         bl      pmap_activate           /* Activate the new address space */
  162 
  163         lwz     %r19, PCB_FLAGS(%r17)
  164         /* Restore FPU context if needed */
  165         andi.   %r6, %r19, PCB_FPU
  166         beq     .L3
  167         mr      %r3,%r2                 /* Pass curthread to enable_fpu */
  168         bl      enable_fpu
  169 
  170 .L3:
  171         /* Restore Altivec context if needed */
  172         andi.   %r6, %r19, PCB_VEC
  173         beq     .L4
  174         mr      %r3,%r2                 /* Pass curthread to enable_vec */
  175         bl      enable_vec
  176 
  177 .L4:
  178 #if defined(__SPE__)
  179         lwz     %r3,PCB_VSCR(%r17)
  180         mtspr   SPR_SPEFSCR,%r3
  181 #endif
  182         /* thread to restore is in r3 */
  183         mr      %r3,%r17                /* Recover PCB ptr */
  184         lmw     %r12,PCB_CONTEXT(%r3)   /* Load the non-volatile GP regs */
  185         lwz     %r5,PCB_CR(%r3)         /* Load the condition register */
  186         mtcr    %r5
  187         lwz     %r5,PCB_LR(%r3)         /* Load the link register */
  188         mtlr    %r5
  189         lwz     %r1,PCB_SP(%r3)         /* Load the stack pointer */
  190         /*
  191          * Perform a dummy stwcx. to clear any reservations we may have
  192          * inherited from the previous thread. It doesn't matter if the
  193          * stwcx succeeds or not. pcb_context[0] can be clobbered.
  194          */
  195         stwcx.  %r1, 0, %r3
  196         blr
  197 END(cpu_switch)
  198 
  199 /*
  200  * savectx(pcb)
  201  * Update pcb, saving current processor state
  202  */
  203 ENTRY(savectx)
  204         stmw    %r12,PCB_CONTEXT(%r3)   /* Save the non-volatile GP regs */
  205         mfcr    %r4                     /* Save the condition register */
  206         stw     %r4,PCB_CR(%r3)
  207         stw     %r1,PCB_SP(%r3)         /* Save the stack pointer */
  208         mflr    %r4                     /* Save the link register */
  209         stw     %r4,PCB_LR(%r3)
  210         blr
  211 END(savectx)
  212 
  213 /*
  214  * fork_trampoline()
  215  * Set up the return from cpu_fork()
  216  */
  217 ENTRY(fork_trampoline)
  218         lwz     %r3,CF_FUNC(%r1)
  219         lwz     %r4,CF_ARG0(%r1)
  220         lwz     %r5,CF_ARG1(%r1)
  221         bl      fork_exit
  222         addi    %r1,%r1,CF_SIZE-FSP     /* Allow 8 bytes in front of
  223                                            trapframe to simulate FRAME_SETUP
  224                                            does when allocating space for
  225                                            a frame pointer/saved LR */
  226 #ifdef __SPE__
  227         li      %r3,SPEFSCR_FINVE|SPEFSCR_FDBZE|SPEFSCR_FUNFE|SPEFSCR_FOVFE
  228         mtspr   SPR_SPEFSCR, %r3
  229 #endif
  230         b       trapexit
  231 END(fork_trampoline)

Cache object: bc04d145909282a5a335822202b20e37


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