The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/powerpc/powerpc/swtch64.S

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    1 /* $FreeBSD: releng/10.1/sys/powerpc/powerpc/swtch64.S 266001 2014-05-14 03:09:37Z ian $ */
    2 /* $NetBSD: locore.S,v 1.24 2000/05/31 05:09:17 thorpej Exp $ */
    3 
    4 /*-
    5  * Copyright (C) 2001 Benno Rice
    6  * All rights reserved.
    7  *
    8  * Redistribution and use in source and binary forms, with or without
    9  * modification, are permitted provided that the following conditions
   10  * are met:
   11  * 1. Redistributions of source code must retain the above copyright
   12  *    notice, this list of conditions and the following disclaimer.
   13  * 2. Redistributions in binary form must reproduce the above copyright
   14  *    notice, this list of conditions and the following disclaimer in the
   15  *    documentation and/or other materials provided with the distribution.
   16  *
   17  * THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR
   18  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
   19  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
   20  * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
   21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
   22  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
   23  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
   24  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
   25  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
   26  * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   27 */
   28 /*-
   29  * Copyright (C) 1995, 1996 Wolfgang Solfrank.
   30  * Copyright (C) 1995, 1996 TooLs GmbH.
   31  * All rights reserved.
   32  *
   33  * Redistribution and use in source and binary forms, with or without
   34  * modification, are permitted provided that the following conditions
   35  * are met:
   36  * 1. Redistributions of source code must retain the above copyright
   37  *    notice, this list of conditions and the following disclaimer.
   38  * 2. Redistributions in binary form must reproduce the above copyright
   39  *    notice, this list of conditions and the following disclaimer in the
   40  *    documentation and/or other materials provided with the distribution.
   41  * 3. All advertising materials mentioning features or use of this software
   42  *    must display the following acknowledgement:
   43  *      This product includes software developed by TooLs GmbH.
   44  * 4. The name of TooLs GmbH may not be used to endorse or promote products
   45  *    derived from this software without specific prior written permission.
   46  *
   47  * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
   48  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
   49  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
   50  * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
   51  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
   52  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
   53  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
   54  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
   55  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
   56  * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   57  */
   58 
   59 #include "assym.s"
   60 #include "opt_sched.h"
   61 
   62 #include <sys/syscall.h>
   63 
   64 #include <machine/trap.h>
   65 #include <machine/param.h>
   66 #include <machine/asm.h>
   67 
   68 /*
   69  * void cpu_throw(struct thread *old, struct thread *new)
   70  */
   71 ENTRY(cpu_throw)
   72         mr      %r13, %r4
   73         b       cpu_switchin
   74 
   75 /*
   76  * void cpu_switch(struct thread *old,
   77  *                 struct thread *new,
   78  *                 struct mutex *mtx); 
   79  *
   80  * Switch to a new thread saving the current state in the old thread.
   81  */
   82 ENTRY(cpu_switch)
   83         ld      %r6,TD_PCB(%r3)         /* Get the old thread's PCB ptr */
   84         std     %r12,PCB_CONTEXT(%r6)   /* Save the non-volatile GP regs.
   85                                            These can now be used for scratch */
   86         std     %r14,PCB_CONTEXT+2*8(%r6)       
   87         std     %r15,PCB_CONTEXT+3*8(%r6)       
   88         std     %r16,PCB_CONTEXT+4*8(%r6)       
   89         std     %r17,PCB_CONTEXT+5*8(%r6)       
   90         std     %r18,PCB_CONTEXT+6*8(%r6)       
   91         std     %r19,PCB_CONTEXT+7*8(%r6)       
   92         std     %r20,PCB_CONTEXT+8*8(%r6)       
   93         std     %r21,PCB_CONTEXT+9*8(%r6)       
   94         std     %r22,PCB_CONTEXT+10*8(%r6)      
   95         std     %r23,PCB_CONTEXT+11*8(%r6)      
   96         std     %r24,PCB_CONTEXT+12*8(%r6)      
   97         std     %r25,PCB_CONTEXT+13*8(%r6)      
   98         std     %r26,PCB_CONTEXT+14*8(%r6)      
   99         std     %r27,PCB_CONTEXT+15*8(%r6)      
  100         std     %r28,PCB_CONTEXT+16*8(%r6)      
  101         std     %r29,PCB_CONTEXT+17*8(%r6)      
  102         std     %r30,PCB_CONTEXT+18*8(%r6)      
  103         std     %r31,PCB_CONTEXT+19*8(%r6)      
  104 
  105         mfcr    %r16                    /* Save the condition register */
  106         std     %r16,PCB_CR(%r6)
  107         mflr    %r16                    /* Save the link register */
  108         std     %r16,PCB_LR(%r6)
  109         std     %r1,PCB_SP(%r6)         /* Save the stack pointer */
  110         std     %r2,PCB_TOC(%r6)        /* Save the TOC pointer */
  111         
  112         mr      %r14,%r3                /* Copy the old thread ptr... */
  113         mr      %r13,%r4                /* and the new thread ptr in curthread*/
  114         mr      %r16,%r5                /* and the new lock */
  115         mr      %r17,%r6                /* and the PCB */
  116         
  117         stdu    %r1,-48(%r1)
  118 
  119         lwz     %r7,PCB_FLAGS(%r17)
  120         /* Save FPU context if needed */
  121         andi.   %r7, %r7, PCB_FPU
  122         beq     .L1
  123         bl      save_fpu
  124         nop
  125 
  126 .L1:
  127         mr      %r3,%r14                /* restore old thread ptr */
  128         lwz     %r7,PCB_FLAGS(%r17)
  129         /* Save Altivec context if needed */
  130         andi.   %r7, %r7, PCB_VEC
  131         beq     .L2
  132         bl      save_vec
  133         nop
  134         
  135 .L2:
  136         mr      %r3,%r14                /* restore old thread ptr */
  137         bl      pmap_deactivate /* Deactivate the current pmap */
  138         nop
  139 
  140         addi    %r1,%r1,48
  141 
  142         sync                            /* Make sure all of that finished */
  143         std     %r16,TD_LOCK(%r14)      /* ULE: update old thread's lock */
  144 
  145 cpu_switchin:
  146 #if defined(SMP) && defined(SCHED_ULE)
  147         /* Wait for the new thread to become unblocked */
  148         lis     %r6,blocked_lock@ha
  149         addi    %r6,%r6,blocked_lock@l
  150 blocked_loop:
  151         ld      %r7,TD_LOCK(%r13)
  152         cmpd    %r6,%r7 
  153         beq-    blocked_loop
  154         isync
  155 #endif
  156 
  157         mfsprg  %r7,0                   /* Get the pcpu pointer */
  158         std     %r13,PC_CURTHREAD(%r7)  /* Store new current thread */
  159         ld      %r17,TD_PCB(%r13)       /* Store new current PCB */
  160         std     %r17,PC_CURPCB(%r7)
  161 
  162         stdu    %r1,-48(%r1)
  163 
  164         mr      %r3,%r13                /* Get new thread ptr */
  165         bl      pmap_activate           /* Activate the new address space */
  166         nop
  167 
  168         lwz     %r6, PCB_FLAGS(%r17)
  169         /* Restore FPU context if needed */
  170         andi.   %r6, %r6, PCB_FPU
  171         beq     .L3
  172         mr      %r3,%r13                /* Pass curthread to enable_fpu */
  173         bl      enable_fpu
  174         nop
  175 
  176 .L3:
  177         lwz     %r6, PCB_FLAGS(%r17)
  178         /* Restore Altivec context if needed */
  179         andi.   %r6, %r6, PCB_VEC
  180         beq     .L4
  181         mr      %r3,%r13                /* Pass curthread to enable_vec */
  182         bl      enable_vec
  183         nop
  184 
  185         /* thread to restore is in r3 */
  186 .L4:
  187         addi    %r1,%r1,48
  188         mr      %r3,%r17                /* Recover PCB ptr */
  189         ld      %r12,PCB_CONTEXT(%r3)   /* Load the non-volatile GP regs. */
  190         ld      %r14,PCB_CONTEXT+2*8(%r3)       
  191         ld      %r15,PCB_CONTEXT+3*8(%r3)       
  192         ld      %r16,PCB_CONTEXT+4*8(%r3)       
  193         ld      %r17,PCB_CONTEXT+5*8(%r3)       
  194         ld      %r18,PCB_CONTEXT+6*8(%r3)       
  195         ld      %r19,PCB_CONTEXT+7*8(%r3)       
  196         ld      %r20,PCB_CONTEXT+8*8(%r3)       
  197         ld      %r21,PCB_CONTEXT+9*8(%r3)       
  198         ld      %r22,PCB_CONTEXT+10*8(%r3)      
  199         ld      %r23,PCB_CONTEXT+11*8(%r3)      
  200         ld      %r24,PCB_CONTEXT+12*8(%r3)      
  201         ld      %r25,PCB_CONTEXT+13*8(%r3)      
  202         ld      %r26,PCB_CONTEXT+14*8(%r3)      
  203         ld      %r27,PCB_CONTEXT+15*8(%r3)      
  204         ld      %r28,PCB_CONTEXT+16*8(%r3)
  205         ld      %r29,PCB_CONTEXT+17*8(%r3)      
  206         ld      %r30,PCB_CONTEXT+18*8(%r3)      
  207         ld      %r31,PCB_CONTEXT+19*8(%r3)      
  208         ld      %r5,PCB_CR(%r3)         /* Load the condition register */
  209         mtcr    %r5
  210         ld      %r5,PCB_LR(%r3)         /* Load the link register */
  211         mtlr    %r5
  212         ld      %r1,PCB_SP(%r3)         /* Load the stack pointer */
  213         ld      %r2,PCB_TOC(%r3)        /* Load the TOC pointer */
  214 
  215         lis     %r5,USER_ADDR@highesta  /* Load the copyin/out segment reg */
  216         ori     %r5,%r5,USER_ADDR@highera
  217         sldi    %r5,%r5,32
  218         oris    %r5,%r5,USER_ADDR@ha
  219         isync
  220         slbie   %r5
  221         lis     %r6,USER_SLB_SLBE@highesta
  222         ori     %r6,%r6,USER_SLB_SLBE@highera
  223         sldi    %r6,%r6,32
  224         oris    %r6,%r6,USER_SLB_SLBE@ha
  225         ori     %r6,%r6,USER_SLB_SLBE@l
  226         ld      %r5,PCB_AIM_USR_VSID(%r3)
  227         slbmte  %r5,%r6
  228         isync
  229 
  230         /*
  231          * Perform a dummy stdcx. to clear any reservations we may have
  232          * inherited from the previous thread. It doesn't matter if the
  233          * stdcx succeeds or not. pcb_context[0] can be clobbered.
  234          */
  235         stdcx.  %r1, 0, %r3
  236         blr
  237 
  238 /*
  239  * savectx(pcb)
  240  * Update pcb, saving current processor state
  241  */
  242 ENTRY(savectx)
  243         std     %r12,PCB_CONTEXT(%r3)   /* Save the non-volatile GP regs. */
  244         std     %r13,PCB_CONTEXT+1*8(%r3)       
  245         std     %r14,PCB_CONTEXT+2*8(%r3)       
  246         std     %r15,PCB_CONTEXT+3*8(%r3)       
  247         std     %r16,PCB_CONTEXT+4*8(%r3)       
  248         std     %r17,PCB_CONTEXT+5*8(%r3)       
  249         std     %r18,PCB_CONTEXT+6*8(%r3)       
  250         std     %r19,PCB_CONTEXT+7*8(%r3)       
  251         std     %r20,PCB_CONTEXT+8*8(%r3)       
  252         std     %r21,PCB_CONTEXT+9*8(%r3)       
  253         std     %r22,PCB_CONTEXT+10*8(%r3)      
  254         std     %r23,PCB_CONTEXT+11*8(%r3)      
  255         std     %r24,PCB_CONTEXT+12*8(%r3)      
  256         std     %r25,PCB_CONTEXT+13*8(%r3)      
  257         std     %r26,PCB_CONTEXT+14*8(%r3)      
  258         std     %r27,PCB_CONTEXT+15*8(%r3)      
  259         std     %r28,PCB_CONTEXT+16*8(%r3)
  260         std     %r29,PCB_CONTEXT+17*8(%r3)      
  261         std     %r30,PCB_CONTEXT+18*8(%r3)      
  262         std     %r31,PCB_CONTEXT+19*8(%r3)      
  263 
  264         mfcr    %r4                     /* Save the condition register */
  265         std     %r4,PCB_CR(%r3)
  266         std     %r2,PCB_TOC(%r3)        /* Save the TOC pointer */
  267         blr
  268 
  269 /*
  270  * fork_trampoline()
  271  * Set up the return from cpu_fork()
  272  */
  273 
  274 ENTRY_NOPROF(fork_trampoline)
  275         ld      %r3,CF_FUNC(%r1)
  276         ld      %r4,CF_ARG0(%r1)
  277         ld      %r5,CF_ARG1(%r1)
  278 
  279         stdu    %r1,-48(%r1)
  280         bl      fork_exit
  281         nop
  282         addi    %r1,%r1,48+CF_SIZE-FSP  /* Allow 8 bytes in front of
  283                                            trapframe to simulate FRAME_SETUP
  284                                            does when allocating space for
  285                                            a frame pointer/saved LR */
  286         b       trapexit
  287         nop

Cache object: 1ac0904db225c82821c0142290d7b67e


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