1 /* $FreeBSD: releng/11.1/sys/powerpc/powerpc/swtch64.S 291442 2015-11-29 07:16:08Z nwhitehorn $ */
2 /* $NetBSD: locore.S,v 1.24 2000/05/31 05:09:17 thorpej Exp $ */
3
4 /*-
5 * Copyright (C) 2001 Benno Rice
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 *
17 * THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
22 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
23 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
24 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
25 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
26 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28 /*-
29 * Copyright (C) 1995, 1996 Wolfgang Solfrank.
30 * Copyright (C) 1995, 1996 TooLs GmbH.
31 * All rights reserved.
32 *
33 * Redistribution and use in source and binary forms, with or without
34 * modification, are permitted provided that the following conditions
35 * are met:
36 * 1. Redistributions of source code must retain the above copyright
37 * notice, this list of conditions and the following disclaimer.
38 * 2. Redistributions in binary form must reproduce the above copyright
39 * notice, this list of conditions and the following disclaimer in the
40 * documentation and/or other materials provided with the distribution.
41 * 3. All advertising materials mentioning features or use of this software
42 * must display the following acknowledgement:
43 * This product includes software developed by TooLs GmbH.
44 * 4. The name of TooLs GmbH may not be used to endorse or promote products
45 * derived from this software without specific prior written permission.
46 *
47 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
48 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
49 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
50 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
51 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
52 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
53 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
54 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
55 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
56 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
57 */
58
59 #include "assym.s"
60 #include "opt_sched.h"
61
62 #include <sys/syscall.h>
63
64 #include <machine/trap.h>
65 #include <machine/param.h>
66 #include <machine/asm.h>
67
68 #ifdef _CALL_ELF
69 .abiversion _CALL_ELF
70 #endif
71
72 TOC_ENTRY(blocked_lock)
73
74 /*
75 * void cpu_throw(struct thread *old, struct thread *new)
76 */
77 ENTRY(cpu_throw)
78 mr %r13, %r4
79 li %r14,0 /* Tell cpu_switchin not to release a thread */
80
81 b cpu_switchin
82
83 /*
84 * void cpu_switch(struct thread *old,
85 * struct thread *new,
86 * struct mutex *mtx);
87 *
88 * Switch to a new thread saving the current state in the old thread.
89 */
90 ENTRY(cpu_switch)
91 ld %r6,TD_PCB(%r3) /* Get the old thread's PCB ptr */
92 std %r12,PCB_CONTEXT(%r6) /* Save the non-volatile GP regs.
93 These can now be used for scratch */
94 std %r14,PCB_CONTEXT+2*8(%r6)
95 std %r15,PCB_CONTEXT+3*8(%r6)
96 std %r16,PCB_CONTEXT+4*8(%r6)
97 std %r17,PCB_CONTEXT+5*8(%r6)
98 std %r18,PCB_CONTEXT+6*8(%r6)
99 std %r19,PCB_CONTEXT+7*8(%r6)
100 std %r20,PCB_CONTEXT+8*8(%r6)
101 std %r21,PCB_CONTEXT+9*8(%r6)
102 std %r22,PCB_CONTEXT+10*8(%r6)
103 std %r23,PCB_CONTEXT+11*8(%r6)
104 std %r24,PCB_CONTEXT+12*8(%r6)
105 std %r25,PCB_CONTEXT+13*8(%r6)
106 std %r26,PCB_CONTEXT+14*8(%r6)
107 std %r27,PCB_CONTEXT+15*8(%r6)
108 std %r28,PCB_CONTEXT+16*8(%r6)
109 std %r29,PCB_CONTEXT+17*8(%r6)
110 std %r30,PCB_CONTEXT+18*8(%r6)
111 std %r31,PCB_CONTEXT+19*8(%r6)
112
113 mfcr %r16 /* Save the condition register */
114 std %r16,PCB_CR(%r6)
115 mflr %r16 /* Save the link register */
116 std %r16,PCB_LR(%r6)
117 std %r1,PCB_SP(%r6) /* Save the stack pointer */
118 std %r2,PCB_TOC(%r6) /* Save the TOC pointer */
119
120 mr %r14,%r3 /* Copy the old thread ptr... */
121 mr %r13,%r4 /* and the new thread ptr in curthread*/
122 mr %r16,%r5 /* and the new lock */
123 mr %r17,%r6 /* and the PCB */
124
125 stdu %r1,-48(%r1)
126
127 lwz %r7,PCB_FLAGS(%r17)
128 /* Save FPU context if needed */
129 andi. %r7, %r7, PCB_FPU
130 beq .L1
131 bl save_fpu
132 nop
133
134 .L1:
135 mr %r3,%r14 /* restore old thread ptr */
136 lwz %r7,PCB_FLAGS(%r17)
137 /* Save Altivec context if needed */
138 andi. %r7, %r7, PCB_VEC
139 beq .L2
140 bl save_vec
141 nop
142
143 .L2:
144 mr %r3,%r14 /* restore old thread ptr */
145 bl pmap_deactivate /* Deactivate the current pmap */
146 nop
147
148 sync /* Make sure all of that finished */
149
150 cpu_switchin:
151 #if defined(SMP) && defined(SCHED_ULE)
152 /* Wait for the new thread to become unblocked */
153 ld %r6,TOC_REF(blocked_lock)(%r2)
154 blocked_loop:
155 ld %r7,TD_LOCK(%r13)
156 cmpd %r6,%r7
157 beq- blocked_loop
158 isync
159 #endif
160
161 ld %r17,TD_PCB(%r13) /* Get new PCB */
162 ld %r1,PCB_SP(%r17) /* Load the stack pointer */
163
164 /* Release old thread now that we have a stack pointer set up */
165 cmpdi %r14,0
166 beq- 1f
167 std %r16,TD_LOCK(%r14) /* ULE: update old thread's lock */
168
169 1: mfsprg %r7,0 /* Get the pcpu pointer */
170 std %r13,PC_CURTHREAD(%r7) /* Store new current thread */
171 ld %r17,TD_PCB(%r13) /* Store new current PCB */
172 std %r17,PC_CURPCB(%r7)
173
174 mr %r3,%r13 /* Get new thread ptr */
175 bl pmap_activate /* Activate the new address space */
176 nop
177
178 lwz %r6, PCB_FLAGS(%r17)
179 /* Restore FPU context if needed */
180 andi. %r6, %r6, PCB_FPU
181 beq .L3
182 mr %r3,%r13 /* Pass curthread to enable_fpu */
183 bl enable_fpu
184 nop
185
186 .L3:
187 lwz %r6, PCB_FLAGS(%r17)
188 /* Restore Altivec context if needed */
189 andi. %r6, %r6, PCB_VEC
190 beq .L4
191 mr %r3,%r13 /* Pass curthread to enable_vec */
192 bl enable_vec
193 nop
194
195 /* thread to restore is in r3 */
196 .L4:
197 addi %r1,%r1,48
198 mr %r3,%r17 /* Recover PCB ptr */
199 ld %r12,PCB_CONTEXT(%r3) /* Load the non-volatile GP regs. */
200 ld %r14,PCB_CONTEXT+2*8(%r3)
201 ld %r15,PCB_CONTEXT+3*8(%r3)
202 ld %r16,PCB_CONTEXT+4*8(%r3)
203 ld %r17,PCB_CONTEXT+5*8(%r3)
204 ld %r18,PCB_CONTEXT+6*8(%r3)
205 ld %r19,PCB_CONTEXT+7*8(%r3)
206 ld %r20,PCB_CONTEXT+8*8(%r3)
207 ld %r21,PCB_CONTEXT+9*8(%r3)
208 ld %r22,PCB_CONTEXT+10*8(%r3)
209 ld %r23,PCB_CONTEXT+11*8(%r3)
210 ld %r24,PCB_CONTEXT+12*8(%r3)
211 ld %r25,PCB_CONTEXT+13*8(%r3)
212 ld %r26,PCB_CONTEXT+14*8(%r3)
213 ld %r27,PCB_CONTEXT+15*8(%r3)
214 ld %r28,PCB_CONTEXT+16*8(%r3)
215 ld %r29,PCB_CONTEXT+17*8(%r3)
216 ld %r30,PCB_CONTEXT+18*8(%r3)
217 ld %r31,PCB_CONTEXT+19*8(%r3)
218 ld %r5,PCB_CR(%r3) /* Load the condition register */
219 mtcr %r5
220 ld %r5,PCB_LR(%r3) /* Load the link register */
221 mtlr %r5
222 ld %r1,PCB_SP(%r3) /* Load the stack pointer */
223 ld %r2,PCB_TOC(%r3) /* Load the TOC pointer */
224
225 /*
226 * Perform a dummy stdcx. to clear any reservations we may have
227 * inherited from the previous thread. It doesn't matter if the
228 * stdcx succeeds or not. pcb_context[0] can be clobbered.
229 */
230 stdcx. %r1, 0, %r3
231 blr
232
233 /*
234 * savectx(pcb)
235 * Update pcb, saving current processor state
236 */
237 ENTRY(savectx)
238 std %r12,PCB_CONTEXT(%r3) /* Save the non-volatile GP regs. */
239 std %r13,PCB_CONTEXT+1*8(%r3)
240 std %r14,PCB_CONTEXT+2*8(%r3)
241 std %r15,PCB_CONTEXT+3*8(%r3)
242 std %r16,PCB_CONTEXT+4*8(%r3)
243 std %r17,PCB_CONTEXT+5*8(%r3)
244 std %r18,PCB_CONTEXT+6*8(%r3)
245 std %r19,PCB_CONTEXT+7*8(%r3)
246 std %r20,PCB_CONTEXT+8*8(%r3)
247 std %r21,PCB_CONTEXT+9*8(%r3)
248 std %r22,PCB_CONTEXT+10*8(%r3)
249 std %r23,PCB_CONTEXT+11*8(%r3)
250 std %r24,PCB_CONTEXT+12*8(%r3)
251 std %r25,PCB_CONTEXT+13*8(%r3)
252 std %r26,PCB_CONTEXT+14*8(%r3)
253 std %r27,PCB_CONTEXT+15*8(%r3)
254 std %r28,PCB_CONTEXT+16*8(%r3)
255 std %r29,PCB_CONTEXT+17*8(%r3)
256 std %r30,PCB_CONTEXT+18*8(%r3)
257 std %r31,PCB_CONTEXT+19*8(%r3)
258
259 mfcr %r4 /* Save the condition register */
260 std %r4,PCB_CR(%r3)
261 std %r2,PCB_TOC(%r3) /* Save the TOC pointer */
262 mflr %r4 /* Save the link register */
263 std %r4,PCB_LR(%r3)
264 blr
265
266 /*
267 * fork_trampoline()
268 * Set up the return from cpu_fork()
269 */
270
271 ENTRY_NOPROF(fork_trampoline)
272 ld %r3,CF_FUNC(%r1)
273 ld %r4,CF_ARG0(%r1)
274 ld %r5,CF_ARG1(%r1)
275
276 stdu %r1,-48(%r1)
277 bl fork_exit
278 nop
279 addi %r1,%r1,48+CF_SIZE-FSP /* Allow 8 bytes in front of
280 trapframe to simulate FRAME_SETUP
281 does when allocating space for
282 a frame pointer/saved LR */
283 b trapexit
284 nop
Cache object: 79a34d07128111770ec647de8d5fce59
|