Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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FreeBSD/Linux Kernel Cross Reference
sys/powerpc/powerpc/swtch64.S
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1 /* $FreeBSD: releng/12.0/sys/powerpc/powerpc/swtch64.S 332807 2018-04-20 03:19:44Z jhibbits $ */ 2 /* $NetBSD: locore.S,v 1.24 2000/05/31 05:09:17 thorpej Exp $ */ 3 4 /*- 5 * Copyright (C) 2001 Benno Rice 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 22 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 23 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 24 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 25 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 26 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 /*- 29 * Copyright (C) 1995, 1996 Wolfgang Solfrank. 30 * Copyright (C) 1995, 1996 TooLs GmbH. 31 * All rights reserved. 32 * 33 * Redistribution and use in source and binary forms, with or without 34 * modification, are permitted provided that the following conditions 35 * are met: 36 * 1. Redistributions of source code must retain the above copyright 37 * notice, this list of conditions and the following disclaimer. 38 * 2. Redistributions in binary form must reproduce the above copyright 39 * notice, this list of conditions and the following disclaimer in the 40 * documentation and/or other materials provided with the distribution. 41 * 3. All advertising materials mentioning features or use of this software 42 * must display the following acknowledgement: 43 * This product includes software developed by TooLs GmbH. 44 * 4. The name of TooLs GmbH may not be used to endorse or promote products 45 * derived from this software without specific prior written permission. 46 * 47 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR 48 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 49 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 50 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 51 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 52 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 53 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 54 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 55 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 56 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 57 */ 58 59 #include "assym.inc" 60 #include "opt_sched.h" 61 62 #include <sys/syscall.h> 63 64 #include <machine/trap.h> 65 #include <machine/spr.h> 66 #include <machine/param.h> 67 #include <machine/asm.h> 68 69 #ifdef _CALL_ELF 70 .abiversion _CALL_ELF 71 #endif 72 73 TOC_ENTRY(blocked_lock) 74 75 /* 76 * void cpu_throw(struct thread *old, struct thread *new) 77 */ 78 ENTRY(cpu_throw) 79 mr %r13, %r4 80 li %r14,0 /* Tell cpu_switchin not to release a thread */ 81 82 b cpu_switchin 83 84 /* 85 * void cpu_switch(struct thread *old, 86 * struct thread *new, 87 * struct mutex *mtx); 88 * 89 * Switch to a new thread saving the current state in the old thread. 90 */ 91 ENTRY(cpu_switch) 92 ld %r6,TD_PCB(%r3) /* Get the old thread's PCB ptr */ 93 std %r12,PCB_CONTEXT(%r6) /* Save the non-volatile GP regs. 94 These can now be used for scratch */ 95 std %r14,PCB_CONTEXT+2*8(%r6) 96 std %r15,PCB_CONTEXT+3*8(%r6) 97 std %r16,PCB_CONTEXT+4*8(%r6) 98 std %r17,PCB_CONTEXT+5*8(%r6) 99 std %r18,PCB_CONTEXT+6*8(%r6) 100 std %r19,PCB_CONTEXT+7*8(%r6) 101 std %r20,PCB_CONTEXT+8*8(%r6) 102 std %r21,PCB_CONTEXT+9*8(%r6) 103 std %r22,PCB_CONTEXT+10*8(%r6) 104 std %r23,PCB_CONTEXT+11*8(%r6) 105 std %r24,PCB_CONTEXT+12*8(%r6) 106 std %r25,PCB_CONTEXT+13*8(%r6) 107 std %r26,PCB_CONTEXT+14*8(%r6) 108 std %r27,PCB_CONTEXT+15*8(%r6) 109 std %r28,PCB_CONTEXT+16*8(%r6) 110 std %r29,PCB_CONTEXT+17*8(%r6) 111 std %r30,PCB_CONTEXT+18*8(%r6) 112 std %r31,PCB_CONTEXT+19*8(%r6) 113 114 mfcr %r16 /* Save the condition register */ 115 std %r16,PCB_CR(%r6) 116 mflr %r16 /* Save the link register */ 117 std %r16,PCB_LR(%r6) 118 std %r1,PCB_SP(%r6) /* Save the stack pointer */ 119 std %r2,PCB_TOC(%r6) /* Save the TOC pointer */ 120 121 mr %r14,%r3 /* Copy the old thread ptr... */ 122 mr %r13,%r4 /* and the new thread ptr in curthread*/ 123 mr %r16,%r5 /* and the new lock */ 124 mr %r17,%r6 /* and the PCB */ 125 126 stdu %r1,-48(%r1) 127 128 lwz %r7, PCB_FLAGS(%r17) 129 andi. %r7, %r7, PCB_CDSCR 130 beq .L0 131 /* Custom DSCR was set. Reseting it to enter kernel */ 132 li %r7, 0x0 133 mtspr SPR_DSCR, %r7 134 135 .L0: 136 lwz %r7,PCB_FLAGS(%r17) 137 /* Save FPU context if needed */ 138 andi. %r7, %r7, PCB_FPU 139 beq .L1 140 bl save_fpu 141 nop 142 143 .L1: 144 mr %r3,%r14 /* restore old thread ptr */ 145 lwz %r7,PCB_FLAGS(%r17) 146 /* Save Altivec context if needed */ 147 andi. %r7, %r7, PCB_VEC 148 beq .L2 149 bl save_vec 150 nop 151 152 .L2: 153 mr %r3,%r14 /* restore old thread ptr */ 154 bl pmap_deactivate /* Deactivate the current pmap */ 155 nop 156 157 sync /* Make sure all of that finished */ 158 159 cpu_switchin: 160 #if defined(SMP) && defined(SCHED_ULE) 161 /* Wait for the new thread to become unblocked */ 162 ld %r6,TOC_REF(blocked_lock)(%r2) 163 blocked_loop: 164 ld %r7,TD_LOCK(%r13) 165 cmpd %r6,%r7 166 beq- blocked_loop 167 isync 168 #endif 169 170 ld %r17,TD_PCB(%r13) /* Get new PCB */ 171 ld %r1,PCB_SP(%r17) /* Load the stack pointer */ 172 addi %r1,%r1,-48 /* Remember about cpu_switch stack frame */ 173 174 /* Release old thread now that we have a stack pointer set up */ 175 cmpdi %r14,0 176 beq- 1f 177 std %r16,TD_LOCK(%r14) /* ULE: update old thread's lock */ 178 179 1: mfsprg %r7,0 /* Get the pcpu pointer */ 180 std %r13,PC_CURTHREAD(%r7) /* Store new current thread */ 181 ld %r17,TD_PCB(%r13) /* Store new current PCB */ 182 std %r17,PC_CURPCB(%r7) 183 184 mr %r3,%r13 /* Get new thread ptr */ 185 bl pmap_activate /* Activate the new address space */ 186 nop 187 188 lwz %r6, PCB_FLAGS(%r17) 189 /* Restore FPU context if needed */ 190 andi. %r6, %r6, PCB_FPU 191 beq .L3 192 mr %r3,%r13 /* Pass curthread to enable_fpu */ 193 bl enable_fpu 194 nop 195 196 .L3: 197 lwz %r6, PCB_FLAGS(%r17) 198 /* Restore Altivec context if needed */ 199 andi. %r6, %r6, PCB_VEC 200 beq .L31 201 mr %r3,%r13 /* Pass curthread to enable_vec */ 202 bl enable_vec 203 nop 204 205 .L31: 206 lwz %r6, PCB_FLAGS(%r17) 207 /* Restore Custom DSCR if needed */ 208 andi. %r6, %r6, PCB_CDSCR 209 beq .L4 210 ld %r6, PCB_DSCR(%r17) /* Load the DSCR register*/ 211 mtspr SPR_DSCR, %r6 212 213 /* thread to restore is in r3 */ 214 .L4: 215 addi %r1,%r1,48 216 mr %r3,%r17 /* Recover PCB ptr */ 217 ld %r12,PCB_CONTEXT(%r3) /* Load the non-volatile GP regs. */ 218 ld %r14,PCB_CONTEXT+2*8(%r3) 219 ld %r15,PCB_CONTEXT+3*8(%r3) 220 ld %r16,PCB_CONTEXT+4*8(%r3) 221 ld %r17,PCB_CONTEXT+5*8(%r3) 222 ld %r18,PCB_CONTEXT+6*8(%r3) 223 ld %r19,PCB_CONTEXT+7*8(%r3) 224 ld %r20,PCB_CONTEXT+8*8(%r3) 225 ld %r21,PCB_CONTEXT+9*8(%r3) 226 ld %r22,PCB_CONTEXT+10*8(%r3) 227 ld %r23,PCB_CONTEXT+11*8(%r3) 228 ld %r24,PCB_CONTEXT+12*8(%r3) 229 ld %r25,PCB_CONTEXT+13*8(%r3) 230 ld %r26,PCB_CONTEXT+14*8(%r3) 231 ld %r27,PCB_CONTEXT+15*8(%r3) 232 ld %r28,PCB_CONTEXT+16*8(%r3) 233 ld %r29,PCB_CONTEXT+17*8(%r3) 234 ld %r30,PCB_CONTEXT+18*8(%r3) 235 ld %r31,PCB_CONTEXT+19*8(%r3) 236 ld %r5,PCB_CR(%r3) /* Load the condition register */ 237 mtcr %r5 238 ld %r5,PCB_LR(%r3) /* Load the link register */ 239 mtlr %r5 240 ld %r1,PCB_SP(%r3) /* Load the stack pointer */ 241 ld %r2,PCB_TOC(%r3) /* Load the TOC pointer */ 242 243 /* 244 * Perform a dummy stdcx. to clear any reservations we may have 245 * inherited from the previous thread. It doesn't matter if the 246 * stdcx succeeds or not. pcb_context[0] can be clobbered. 247 */ 248 stdcx. %r1, 0, %r3 249 blr 250 251 /* 252 * savectx(pcb) 253 * Update pcb, saving current processor state 254 */ 255 ENTRY(savectx) 256 std %r12,PCB_CONTEXT(%r3) /* Save the non-volatile GP regs. */ 257 std %r13,PCB_CONTEXT+1*8(%r3) 258 std %r14,PCB_CONTEXT+2*8(%r3) 259 std %r15,PCB_CONTEXT+3*8(%r3) 260 std %r16,PCB_CONTEXT+4*8(%r3) 261 std %r17,PCB_CONTEXT+5*8(%r3) 262 std %r18,PCB_CONTEXT+6*8(%r3) 263 std %r19,PCB_CONTEXT+7*8(%r3) 264 std %r20,PCB_CONTEXT+8*8(%r3) 265 std %r21,PCB_CONTEXT+9*8(%r3) 266 std %r22,PCB_CONTEXT+10*8(%r3) 267 std %r23,PCB_CONTEXT+11*8(%r3) 268 std %r24,PCB_CONTEXT+12*8(%r3) 269 std %r25,PCB_CONTEXT+13*8(%r3) 270 std %r26,PCB_CONTEXT+14*8(%r3) 271 std %r27,PCB_CONTEXT+15*8(%r3) 272 std %r28,PCB_CONTEXT+16*8(%r3) 273 std %r29,PCB_CONTEXT+17*8(%r3) 274 std %r30,PCB_CONTEXT+18*8(%r3) 275 std %r31,PCB_CONTEXT+19*8(%r3) 276 277 mfcr %r4 /* Save the condition register */ 278 std %r4,PCB_CR(%r3) 279 std %r2,PCB_TOC(%r3) /* Save the TOC pointer */ 280 mflr %r4 /* Save the link register */ 281 std %r4,PCB_LR(%r3) 282 blr 283 284 /* 285 * fork_trampoline() 286 * Set up the return from cpu_fork() 287 */ 288 289 ENTRY_NOPROF(fork_trampoline) 290 ld %r3,CF_FUNC(%r1) 291 ld %r4,CF_ARG0(%r1) 292 ld %r5,CF_ARG1(%r1) 293 294 stdu %r1,-48(%r1) 295 bl fork_exit 296 nop 297 addi %r1,%r1,48+CF_SIZE-FSP /* Allow 8 bytes in front of 298 trapframe to simulate FRAME_SETUP 299 does when allocating space for 300 a frame pointer/saved LR */ 301 bl trapexit 302 nop
Cache object: a83425432f36b1f73140ecb87f80b202
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