Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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FreeBSD/Linux Kernel Cross Reference
sys/powerpc/powerpc/swtch64.S
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1 /* $FreeBSD$ */ 2 /* $NetBSD: locore.S,v 1.24 2000/05/31 05:09:17 thorpej Exp $ */ 3 4 /*- 5 * Copyright (C) 2001 Benno Rice 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 22 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 23 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 24 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 25 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 26 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 /*- 29 * Copyright (C) 1995, 1996 Wolfgang Solfrank. 30 * Copyright (C) 1995, 1996 TooLs GmbH. 31 * All rights reserved. 32 * 33 * Redistribution and use in source and binary forms, with or without 34 * modification, are permitted provided that the following conditions 35 * are met: 36 * 1. Redistributions of source code must retain the above copyright 37 * notice, this list of conditions and the following disclaimer. 38 * 2. Redistributions in binary form must reproduce the above copyright 39 * notice, this list of conditions and the following disclaimer in the 40 * documentation and/or other materials provided with the distribution. 41 * 3. All advertising materials mentioning features or use of this software 42 * must display the following acknowledgement: 43 * This product includes software developed by TooLs GmbH. 44 * 4. The name of TooLs GmbH may not be used to endorse or promote products 45 * derived from this software without specific prior written permission. 46 * 47 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR 48 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 49 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 50 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 51 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 52 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 53 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 54 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 55 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 56 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 57 */ 58 59 #include "assym.inc" 60 #include "opt_sched.h" 61 62 #include <sys/syscall.h> 63 64 #include <machine/trap.h> 65 #include <machine/spr.h> 66 #include <machine/param.h> 67 #include <machine/asm.h> 68 69 #ifdef _CALL_ELF 70 .abiversion _CALL_ELF 71 #endif 72 73 TOC_ENTRY(blocked_lock) 74 75 /* 76 * void cpu_throw(struct thread *old, struct thread *new) 77 */ 78 ENTRY(cpu_throw) 79 mr %r13, %r4 80 li %r14,0 /* Tell cpu_switchin not to release a thread */ 81 li %r18,0 /* No old pcb flags. The old thread is extinguished. */ 82 83 b cpu_switchin 84 END(cpu_throw) 85 86 /* 87 * void cpu_switch(struct thread *old, 88 * struct thread *new, 89 * struct mutex *mtx); 90 * 91 * Switch to a new thread saving the current state in the old thread. 92 * 93 * Internally clobbers (not visible outside of this file): 94 * r18 - old thread pcb_flags 95 * r19 - new thread pcb_flags 96 */ 97 ENTRY(cpu_switch) 98 ld %r6,TD_PCB(%r3) /* Get the old thread's PCB ptr */ 99 std %r12,PCB_CONTEXT(%r6) /* Save the non-volatile GP regs. 100 These can now be used for scratch */ 101 std %r14,PCB_CONTEXT+2*8(%r6) 102 std %r15,PCB_CONTEXT+3*8(%r6) 103 std %r16,PCB_CONTEXT+4*8(%r6) 104 std %r17,PCB_CONTEXT+5*8(%r6) 105 std %r18,PCB_CONTEXT+6*8(%r6) 106 std %r19,PCB_CONTEXT+7*8(%r6) 107 std %r20,PCB_CONTEXT+8*8(%r6) 108 std %r21,PCB_CONTEXT+9*8(%r6) 109 std %r22,PCB_CONTEXT+10*8(%r6) 110 std %r23,PCB_CONTEXT+11*8(%r6) 111 std %r24,PCB_CONTEXT+12*8(%r6) 112 std %r25,PCB_CONTEXT+13*8(%r6) 113 std %r26,PCB_CONTEXT+14*8(%r6) 114 std %r27,PCB_CONTEXT+15*8(%r6) 115 std %r28,PCB_CONTEXT+16*8(%r6) 116 std %r29,PCB_CONTEXT+17*8(%r6) 117 std %r30,PCB_CONTEXT+18*8(%r6) 118 std %r31,PCB_CONTEXT+19*8(%r6) 119 120 mfcr %r16 /* Save the condition register */ 121 std %r16,PCB_CR(%r6) 122 mflr %r16 /* Save the link register */ 123 std %r16,PCB_LR(%r6) 124 std %r1,PCB_SP(%r6) /* Save the stack pointer */ 125 std %r2,PCB_TOC(%r6) /* Save the TOC pointer */ 126 127 mr %r14,%r3 /* Copy the old thread ptr... */ 128 mr %r13,%r4 /* and the new thread ptr in curthread*/ 129 mr %r16,%r5 /* and the new lock */ 130 mr %r17,%r6 /* and the PCB */ 131 132 stdu %r1,-48(%r1) 133 134 lwz %r18, PCB_FLAGS(%r17) 135 andi. %r7, %r18, PCB_CFSCR 136 beq 1f 137 mfspr %r6, SPR_FSCR 138 std %r6, PCB_FSCR(%r17) 139 save_ebb: 140 andi. %r0, %r6, FSCR_EBB 141 beq save_lm 142 mfspr %r7, SPR_EBBHR 143 std %r7, PCB_EBB_EBBHR(%r17) 144 mfspr %r7, SPR_EBBRR 145 std %r7, PCB_EBB_EBBRR(%r17) 146 mfspr %r7, SPR_BESCR 147 std %r7, PCB_EBB_BESCR(%r17) 148 save_lm: 149 andi. %r0, %r6, FSCR_LM 150 beq save_tar 151 mfspr %r7, SPR_LMRR 152 std %r7, PCB_LMON_LMRR(%r17) 153 mfspr %r7, SPR_LMSER 154 std %r7, PCB_LMON_LMSER(%r17) 155 save_tar: 156 andi. %r0, %r6, FSCR_TAR 157 beq 1f 158 mfspr %r7, SPR_TAR 159 std %r7, PCB_TAR(%r17) 160 1: 161 andi. %r7, %r18, PCB_CDSCR 162 beq .L0 163 mfspr %r6, SPR_DSCRP 164 std %r6, PCB_DSCR(%r17) 165 166 .L0: 167 /* Save FPU context if needed */ 168 andi. %r7, %r18, PCB_FPU 169 beq .L1 170 bl save_fpu 171 nop 172 173 .L1: 174 mr %r3,%r14 /* restore old thread ptr */ 175 /* Save Altivec context if needed */ 176 andi. %r7, %r18, PCB_VEC 177 beq .L2 178 bl save_vec 179 nop 180 181 .L2: 182 mr %r3,%r14 /* restore old thread ptr */ 183 bl pmap_deactivate /* Deactivate the current pmap */ 184 nop 185 186 sync /* Make sure all of that finished */ 187 188 cpu_switchin: 189 #if defined(SMP) && defined(SCHED_ULE) 190 /* Wait for the new thread to become unblocked */ 191 addis %r6,%r2,TOC_REF(blocked_lock)@ha 192 ld %r6,TOC_REF(blocked_lock)@l(%r6) 193 blocked_loop: 194 ld %r7,TD_LOCK(%r13) 195 cmpd %r6,%r7 196 beq- blocked_loop 197 isync 198 #endif 199 200 ld %r17,TD_PCB(%r13) /* Get new PCB */ 201 ld %r1,PCB_SP(%r17) /* Load the stack pointer */ 202 addi %r1,%r1,-48 /* Remember about cpu_switch stack frame */ 203 204 /* Release old thread now that we have a stack pointer set up */ 205 cmpdi %r14,0 206 beq- 1f 207 std %r16,TD_LOCK(%r14) /* ULE: update old thread's lock */ 208 209 1: mfsprg %r7,0 /* Get the pcpu pointer */ 210 std %r13,PC_CURTHREAD(%r7) /* Store new current thread */ 211 ld %r17,TD_PCB(%r13) /* Store new current PCB */ 212 std %r17,PC_CURPCB(%r7) 213 214 mr %r3,%r13 /* Get new thread ptr */ 215 bl pmap_activate /* Activate the new address space */ 216 nop 217 218 lwz %r19, PCB_FLAGS(%r17) 219 /* Restore FPU context if needed */ 220 andi. %r6, %r19, PCB_FPU 221 beq .L3 222 mr %r3,%r13 /* Pass curthread to enable_fpu */ 223 bl enable_fpu 224 nop 225 226 .L3: 227 /* Restore Altivec context if needed */ 228 andi. %r6, %r19, PCB_VEC 229 beq .L31 230 mr %r3,%r13 /* Pass curthread to enable_vec */ 231 bl enable_vec 232 nop 233 234 .L31: 235 /* Load custom DSCR on PowerISA 2.06+ CPUs. */ 236 /* Load changed FSCR on PowerISA 2.07+ CPUs. */ 237 or %r18,%r18,%r19 238 /* Restore Custom DSCR if needed (zeroes if in old but not new) */ 239 andi. %r6, %r18, PCB_CDSCR 240 beq .L32 241 ld %r7, PCB_DSCR(%r17) /* Load the DSCR register*/ 242 mtspr SPR_DSCRP, %r7 243 .L32: 244 /* Restore FSCR if needed (zeroes if in old but not new) */ 245 andi. %r6, %r18, PCB_CFSCR 246 beq .L4 247 ld %r7, PCB_FSCR(%r17) /* Load the FSCR register*/ 248 mtspr SPR_FSCR, %r7 249 restore_ebb: 250 andi. %r0, %r7, FSCR_EBB 251 beq restore_lm 252 ld %r6, PCB_EBB_EBBHR(%r17) 253 mtspr SPR_EBBHR, %r6 254 ld %r6, PCB_EBB_EBBRR(%r17) 255 mtspr SPR_EBBRR, %r6 256 ld %r6, PCB_EBB_BESCR(%r17) 257 mtspr SPR_BESCR, %r6 258 restore_lm: 259 andi. %r0, %r7, FSCR_LM 260 beq restore_tar 261 ld %r6, PCB_LMON_LMRR(%r17) 262 mtspr SPR_LMRR, %r6 263 ld %r6, PCB_LMON_LMSER(%r17) 264 mtspr SPR_LMSER, %r6 265 restore_tar: 266 andi. %r0, %r7, FSCR_TAR 267 beq .L4 268 ld %r6, PCB_TAR(%r17) 269 mtspr SPR_TAR, %r6 270 271 /* thread to restore is in r3 */ 272 .L4: 273 addi %r1,%r1,48 274 mr %r3,%r17 /* Recover PCB ptr */ 275 ld %r12,PCB_CONTEXT(%r3) /* Load the non-volatile GP regs. */ 276 ld %r14,PCB_CONTEXT+2*8(%r3) 277 ld %r15,PCB_CONTEXT+3*8(%r3) 278 ld %r16,PCB_CONTEXT+4*8(%r3) 279 ld %r17,PCB_CONTEXT+5*8(%r3) 280 ld %r18,PCB_CONTEXT+6*8(%r3) 281 ld %r19,PCB_CONTEXT+7*8(%r3) 282 ld %r20,PCB_CONTEXT+8*8(%r3) 283 ld %r21,PCB_CONTEXT+9*8(%r3) 284 ld %r22,PCB_CONTEXT+10*8(%r3) 285 ld %r23,PCB_CONTEXT+11*8(%r3) 286 ld %r24,PCB_CONTEXT+12*8(%r3) 287 ld %r25,PCB_CONTEXT+13*8(%r3) 288 ld %r26,PCB_CONTEXT+14*8(%r3) 289 ld %r27,PCB_CONTEXT+15*8(%r3) 290 ld %r28,PCB_CONTEXT+16*8(%r3) 291 ld %r29,PCB_CONTEXT+17*8(%r3) 292 ld %r30,PCB_CONTEXT+18*8(%r3) 293 ld %r31,PCB_CONTEXT+19*8(%r3) 294 ld %r5,PCB_CR(%r3) /* Load the condition register */ 295 mtcr %r5 296 ld %r5,PCB_LR(%r3) /* Load the link register */ 297 mtlr %r5 298 ld %r1,PCB_SP(%r3) /* Load the stack pointer */ 299 ld %r2,PCB_TOC(%r3) /* Load the TOC pointer */ 300 301 /* 302 * Perform a dummy stdcx. to clear any reservations we may have 303 * inherited from the previous thread. It doesn't matter if the 304 * stdcx succeeds or not. pcb_context[0] can be clobbered. 305 */ 306 stdcx. %r1, 0, %r3 307 blr 308 END(cpu_switch) 309 310 /* 311 * savectx(pcb) 312 * Update pcb, saving current processor state 313 */ 314 ENTRY(savectx) 315 std %r12,PCB_CONTEXT(%r3) /* Save the non-volatile GP regs. */ 316 std %r13,PCB_CONTEXT+1*8(%r3) 317 std %r14,PCB_CONTEXT+2*8(%r3) 318 std %r15,PCB_CONTEXT+3*8(%r3) 319 std %r16,PCB_CONTEXT+4*8(%r3) 320 std %r17,PCB_CONTEXT+5*8(%r3) 321 std %r18,PCB_CONTEXT+6*8(%r3) 322 std %r19,PCB_CONTEXT+7*8(%r3) 323 std %r20,PCB_CONTEXT+8*8(%r3) 324 std %r21,PCB_CONTEXT+9*8(%r3) 325 std %r22,PCB_CONTEXT+10*8(%r3) 326 std %r23,PCB_CONTEXT+11*8(%r3) 327 std %r24,PCB_CONTEXT+12*8(%r3) 328 std %r25,PCB_CONTEXT+13*8(%r3) 329 std %r26,PCB_CONTEXT+14*8(%r3) 330 std %r27,PCB_CONTEXT+15*8(%r3) 331 std %r28,PCB_CONTEXT+16*8(%r3) 332 std %r29,PCB_CONTEXT+17*8(%r3) 333 std %r30,PCB_CONTEXT+18*8(%r3) 334 std %r31,PCB_CONTEXT+19*8(%r3) 335 336 mfcr %r4 /* Save the condition register */ 337 std %r4,PCB_CR(%r3) 338 std %r1,PCB_SP(%r3) /* Save the stack pointer */ 339 std %r2,PCB_TOC(%r3) /* Save the TOC pointer */ 340 mflr %r4 /* Save the link register */ 341 std %r4,PCB_LR(%r3) 342 blr 343 END(savectx) 344 345 /* 346 * fork_trampoline() 347 * Set up the return from cpu_fork() 348 */ 349 350 ENTRY_NOPROF(fork_trampoline) 351 ld %r3,CF_FUNC(%r1) 352 ld %r4,CF_ARG0(%r1) 353 ld %r5,CF_ARG1(%r1) 354 355 stdu %r1,-48(%r1) 356 bl fork_exit 357 nop 358 addi %r1,%r1,48+CF_SIZE-FSP /* Allow 8 bytes in front of 359 trapframe to simulate FRAME_SETUP 360 does when allocating space for 361 a frame pointer/saved LR */ 362 bl trapexit 363 nop 364 END(fork_trampoline)
Cache object: 892bf5630c1a0faa6340dba84b6cf936
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