The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/powerpc/ps3/mmu_ps3.c

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    1 /*-
    2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
    3  *
    4  * Copyright (C) 2010 Nathan Whitehorn
    5  * All rights reserved.
    6  *
    7  * Redistribution and use in source and binary forms, with or without
    8  * modification, are permitted provided that the following conditions
    9  * are met:
   10  * 1. Redistributions of source code must retain the above copyright
   11  *    notice, this list of conditions and the following disclaimer.
   12  * 2. Redistributions in binary form must reproduce the above copyright
   13  *    notice, this list of conditions and the following disclaimer in the
   14  *    documentation and/or other materials provided with the distribution.
   15  *
   16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
   17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
   18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
   19  * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
   20  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
   21  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
   22  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
   23  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
   24  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
   25  * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   26  */
   27 
   28 #include <sys/cdefs.h>
   29 __FBSDID("$FreeBSD$");
   30 
   31 #include <sys/param.h>
   32 #include <sys/kernel.h>
   33 #include <sys/ktr.h>
   34 #include <sys/lock.h>
   35 #include <sys/msgbuf.h>
   36 #include <sys/mutex.h>
   37 #include <sys/proc.h>
   38 #include <sys/sysctl.h>
   39 #include <sys/systm.h>
   40 #include <sys/vmmeter.h>
   41 
   42 #include <vm/vm.h>
   43 #include <vm/vm_param.h>
   44 #include <vm/vm_kern.h>
   45 #include <vm/vm_page.h>
   46 #include <vm/vm_map.h>
   47 #include <vm/vm_object.h>
   48 #include <vm/vm_extern.h>
   49 #include <vm/vm_pageout.h>
   50 #include <vm/uma.h>
   51 
   52 #include <powerpc/aim/mmu_oea64.h>
   53 
   54 #include "mmu_if.h"
   55 #include "moea64_if.h"
   56 #include "ps3-hvcall.h"
   57 
   58 #define VSID_HASH_MASK          0x0000007fffffffffUL
   59 #define PTESYNC()               __asm __volatile("ptesync")
   60 
   61 extern int ps3fb_remap(void);
   62 
   63 static uint64_t mps3_vas_id;
   64 
   65 /*
   66  * Kernel MMU interface
   67  */
   68 
   69 static void     mps3_bootstrap(mmu_t mmup, vm_offset_t kernelstart,
   70                     vm_offset_t kernelend);
   71 static void     mps3_cpu_bootstrap(mmu_t mmup, int ap);
   72 static int64_t  mps3_pte_synch(mmu_t, struct pvo_entry *);
   73 static int64_t  mps3_pte_clear(mmu_t, struct pvo_entry *, uint64_t ptebit);
   74 static int64_t  mps3_pte_unset(mmu_t, struct pvo_entry *);
   75 static int      mps3_pte_insert(mmu_t, struct pvo_entry *);
   76 
   77 
   78 static mmu_method_t mps3_methods[] = {
   79         MMUMETHOD(mmu_bootstrap,        mps3_bootstrap),
   80         MMUMETHOD(mmu_cpu_bootstrap,    mps3_cpu_bootstrap),
   81 
   82         MMUMETHOD(moea64_pte_synch,     mps3_pte_synch),
   83         MMUMETHOD(moea64_pte_clear,     mps3_pte_clear),
   84         MMUMETHOD(moea64_pte_unset,     mps3_pte_unset),
   85         MMUMETHOD(moea64_pte_insert,    mps3_pte_insert),
   86 
   87         { 0, 0 }
   88 };
   89 
   90 MMU_DEF_INHERIT(ps3_mmu, "mmu_ps3", mps3_methods, 0, oea64_mmu);
   91 
   92 static struct mtx mps3_table_lock;
   93 
   94 static void
   95 mps3_bootstrap(mmu_t mmup, vm_offset_t kernelstart, vm_offset_t kernelend)
   96 {
   97         uint64_t final_pteg_count;
   98 
   99         mtx_init(&mps3_table_lock, "page table", NULL, MTX_DEF);
  100 
  101         moea64_early_bootstrap(mmup, kernelstart, kernelend);
  102 
  103         /* In case we had a page table already */
  104         lv1_destruct_virtual_address_space(0);
  105 
  106         /* Allocate new hardware page table */
  107         lv1_construct_virtual_address_space(
  108             20 /* log_2(moea64_pteg_count) */, 2 /* n page sizes */,
  109             (24UL << 56) | (16UL << 48) /* page sizes 16 MB + 64 KB */,
  110             &mps3_vas_id, &final_pteg_count
  111         );
  112 
  113         lv1_select_virtual_address_space(mps3_vas_id);
  114 
  115         moea64_pteg_count = final_pteg_count / sizeof(struct lpteg);
  116 
  117         moea64_mid_bootstrap(mmup, kernelstart, kernelend);
  118         moea64_late_bootstrap(mmup, kernelstart, kernelend);
  119 }
  120 
  121 static void
  122 mps3_cpu_bootstrap(mmu_t mmup, int ap)
  123 {
  124         struct slb *slb = PCPU_GET(aim.slb);
  125         register_t seg0;
  126         int i;
  127 
  128         mtmsr(mfmsr() & ~PSL_DR & ~PSL_IR);
  129 
  130         /*
  131          * Select the page table we configured above and set up the FB mapping
  132          * so we can have a console.
  133          */
  134         lv1_select_virtual_address_space(mps3_vas_id);
  135 
  136         if (!ap)
  137                 ps3fb_remap();
  138 
  139         /*
  140          * Install kernel SLB entries
  141          */
  142 
  143         __asm __volatile ("slbia");
  144         __asm __volatile ("slbmfee %0,%1; slbie %0;" : "=r"(seg0) : "r"(0));
  145         for (i = 0; i < 64; i++) {
  146                 if (!(slb[i].slbe & SLBE_VALID))
  147                         continue;
  148 
  149                 __asm __volatile ("slbmte %0, %1" ::
  150                     "r"(slb[i].slbv), "r"(slb[i].slbe));
  151         }
  152 }
  153 
  154 static int64_t
  155 mps3_pte_synch_locked(struct pvo_entry *pvo)
  156 {
  157         uint64_t halfbucket[4], rcbits;
  158         
  159         PTESYNC();
  160         lv1_read_htab_entries(mps3_vas_id, pvo->pvo_pte.slot & ~0x3UL,
  161             &halfbucket[0], &halfbucket[1], &halfbucket[2], &halfbucket[3],
  162             &rcbits);
  163 
  164         /* Check if present in page table */
  165         if ((halfbucket[pvo->pvo_pte.slot & 0x3] & LPTE_AVPN_MASK) !=
  166             ((pvo->pvo_vpn >> (ADDR_API_SHFT64 - ADDR_PIDX_SHFT)) &
  167             LPTE_AVPN_MASK))
  168                 return (-1);
  169         if (!(halfbucket[pvo->pvo_pte.slot & 0x3] & LPTE_VALID))
  170                 return (-1);
  171 
  172         /*
  173          * rcbits contains the low 12 bits of each PTE's 2nd part,
  174          * spaced at 16-bit intervals
  175          */
  176 
  177         return ((rcbits >> ((3 - (pvo->pvo_pte.slot & 0x3))*16)) &
  178             (LPTE_CHG | LPTE_REF));
  179 }
  180 
  181 static int64_t
  182 mps3_pte_synch(mmu_t mmu, struct pvo_entry *pvo)
  183 {
  184         int64_t retval;
  185 
  186         mtx_lock(&mps3_table_lock);
  187         retval = mps3_pte_synch_locked(pvo);
  188         mtx_unlock(&mps3_table_lock);
  189 
  190         return (retval);
  191 }
  192 
  193 static int64_t
  194 mps3_pte_clear(mmu_t mmu, struct pvo_entry *pvo, uint64_t ptebit)
  195 {
  196         int64_t refchg;
  197         struct lpte pte;
  198 
  199         mtx_lock(&mps3_table_lock);
  200 
  201         refchg = mps3_pte_synch_locked(pvo);
  202         if (refchg < 0) {
  203                 mtx_unlock(&mps3_table_lock);
  204                 return (refchg);
  205         }
  206 
  207         moea64_pte_from_pvo(pvo, &pte);
  208 
  209         pte.pte_lo |= refchg;
  210         pte.pte_lo &= ~ptebit;
  211         /* XXX: race on RC bits between write and sync. Anything to do? */
  212         lv1_write_htab_entry(mps3_vas_id, pvo->pvo_pte.slot, pte.pte_hi,
  213             pte.pte_lo);
  214         mtx_unlock(&mps3_table_lock);
  215 
  216         return (refchg);
  217 }
  218 
  219 static int64_t
  220 mps3_pte_unset(mmu_t mmu, struct pvo_entry *pvo)
  221 {
  222         int64_t refchg;
  223 
  224         mtx_lock(&mps3_table_lock);
  225         refchg = mps3_pte_synch_locked(pvo);
  226         if (refchg < 0) {
  227                 moea64_pte_overflow--;
  228                 mtx_unlock(&mps3_table_lock);
  229                 return (-1);
  230         }
  231         /* XXX: race on RC bits between unset and sync. Anything to do? */
  232         lv1_write_htab_entry(mps3_vas_id, pvo->pvo_pte.slot, 0, 0);
  233         mtx_unlock(&mps3_table_lock);
  234         moea64_pte_valid--;
  235 
  236         return (refchg & (LPTE_REF | LPTE_CHG));
  237 }
  238 
  239 static int
  240 mps3_pte_insert(mmu_t mmu, struct pvo_entry *pvo)
  241 {
  242         int result;
  243         struct lpte pte, evicted;
  244         uint64_t index;
  245 
  246         if (pvo->pvo_vaddr & PVO_HID) {
  247                 /* Hypercall needs primary PTEG */
  248                 pvo->pvo_vaddr &= ~PVO_HID;
  249                 pvo->pvo_pte.slot ^= (moea64_pteg_mask << 3);
  250         }
  251 
  252         pvo->pvo_pte.slot &= ~7UL;
  253         moea64_pte_from_pvo(pvo, &pte);
  254         evicted.pte_hi = 0;
  255         PTESYNC();
  256         mtx_lock(&mps3_table_lock);
  257         result = lv1_insert_htab_entry(mps3_vas_id, pvo->pvo_pte.slot,
  258             pte.pte_hi, pte.pte_lo, LPTE_LOCKED | LPTE_WIRED, 0,
  259             &index, &evicted.pte_hi, &evicted.pte_lo);
  260         mtx_unlock(&mps3_table_lock);
  261 
  262         if (result != 0) {
  263                 /* No freeable slots in either PTEG? We're hosed. */
  264                 panic("mps3_pte_insert: overflow (%d)", result);
  265                 return (-1);
  266         }
  267 
  268         /*
  269          * See where we ended up.
  270          */
  271         if ((index & ~7UL) != pvo->pvo_pte.slot)
  272                 pvo->pvo_vaddr |= PVO_HID;
  273         pvo->pvo_pte.slot = index;
  274 
  275         moea64_pte_valid++;
  276 
  277         if (evicted.pte_hi) {
  278                 KASSERT((evicted.pte_hi & (LPTE_WIRED | LPTE_LOCKED)) == 0,
  279                     ("Evicted a wired PTE"));
  280                 moea64_pte_valid--;
  281                 moea64_pte_overflow++;
  282         }
  283 
  284         return (0);
  285 }
  286 

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