FreeBSD/Linux Kernel Cross Reference
sys/sparc64/fhc/fhc.c
1 /*-
2 * Copyright (c) 2003 Jake Burkholder.
3 * Copyright (c) 2005 Marius Strobl <marius@FreeBSD.org>
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 */
27
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
30
31 #include <sys/param.h>
32 #include <sys/systm.h>
33 #include <sys/bus.h>
34 #include <sys/kernel.h>
35 #include <sys/malloc.h>
36 #include <sys/module.h>
37 #include <sys/pcpu.h>
38
39 #include <dev/led/led.h>
40 #include <dev/ofw/ofw_bus.h>
41 #include <dev/ofw/ofw_bus_subr.h>
42 #include <dev/ofw/openfirm.h>
43
44 #include <machine/bus.h>
45 #include <machine/bus_common.h>
46 #include <machine/resource.h>
47
48 #include <sys/rman.h>
49
50 #include <sparc64/fhc/fhcreg.h>
51 #include <sparc64/sbus/ofw_sbus.h>
52
53 struct fhc_devinfo {
54 struct ofw_bus_devinfo fdi_obdinfo;
55 struct resource_list fdi_rl;
56 };
57
58 struct fhc_softc {
59 struct resource *sc_memres[FHC_NREG];
60 int sc_nrange;
61 struct sbus_ranges *sc_ranges;
62 int sc_ign;
63 struct cdev *sc_led_dev;
64 };
65
66 static device_probe_t fhc_probe;
67 static device_attach_t fhc_attach;
68 static bus_print_child_t fhc_print_child;
69 static bus_probe_nomatch_t fhc_probe_nomatch;
70 static bus_setup_intr_t fhc_setup_intr;
71 static bus_alloc_resource_t fhc_alloc_resource;
72 static bus_get_resource_list_t fhc_get_resource_list;
73 static ofw_bus_get_devinfo_t fhc_get_devinfo;
74
75 static void fhc_intr_enable(void *);
76 static void fhc_intr_disable(void *);
77 static void fhc_intr_eoi(void *);
78 static void fhc_led_func(void *, int);
79 static int fhc_print_res(struct fhc_devinfo *);
80
81 static device_method_t fhc_methods[] = {
82 /* Device interface */
83 DEVMETHOD(device_probe, fhc_probe),
84 DEVMETHOD(device_attach, fhc_attach),
85 DEVMETHOD(device_shutdown, bus_generic_shutdown),
86 DEVMETHOD(device_suspend, bus_generic_suspend),
87 DEVMETHOD(device_resume, bus_generic_resume),
88
89 /* Bus interface */
90 DEVMETHOD(bus_print_child, fhc_print_child),
91 DEVMETHOD(bus_probe_nomatch, fhc_probe_nomatch),
92 DEVMETHOD(bus_setup_intr, fhc_setup_intr),
93 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
94 DEVMETHOD(bus_alloc_resource, fhc_alloc_resource),
95 DEVMETHOD(bus_release_resource, bus_generic_rl_release_resource),
96 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
97 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
98 DEVMETHOD(bus_get_resource_list, fhc_get_resource_list),
99 DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource),
100
101 /* ofw_bus interface */
102 DEVMETHOD(ofw_bus_get_devinfo, fhc_get_devinfo),
103 DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat),
104 DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model),
105 DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name),
106 DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node),
107 DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type),
108
109 { NULL, NULL }
110 };
111
112 static driver_t fhc_driver = {
113 "fhc",
114 fhc_methods,
115 sizeof(struct fhc_softc),
116 };
117
118 static devclass_t fhc_devclass;
119
120 DRIVER_MODULE(fhc, central, fhc_driver, fhc_devclass, 0, 0);
121 DRIVER_MODULE(fhc, nexus, fhc_driver, fhc_devclass, 0, 0);
122
123 static const struct intr_controller fhc_ic = {
124 fhc_intr_enable,
125 fhc_intr_disable,
126 fhc_intr_eoi
127 };
128
129 struct fhc_icarg {
130 struct fhc_softc *fica_sc;
131 struct resource *fica_memres;
132 };
133
134 static int
135 fhc_probe(device_t dev)
136 {
137
138 if (strcmp(ofw_bus_get_name(dev), "fhc") == 0) {
139 device_set_desc(dev, "fhc");
140 return (0);
141 }
142 return (ENXIO);
143 }
144
145 static int
146 fhc_attach(device_t dev)
147 {
148 char ledname[sizeof("boardXX")];
149 struct fhc_devinfo *fdi;
150 struct fhc_icarg *fica;
151 struct fhc_softc *sc;
152 struct sbus_regs *reg;
153 phandle_t child;
154 phandle_t node;
155 device_t cdev;
156 uint32_t board;
157 uint32_t ctrl;
158 uint32_t *intr;
159 uint32_t iv;
160 char *name;
161 int central;
162 int error;
163 int i;
164 int nintr;
165 int nreg;
166 int rid;
167
168 sc = device_get_softc(dev);
169 node = ofw_bus_get_node(dev);
170
171 central = 0;
172 if (strcmp(device_get_name(device_get_parent(dev)), "central") == 0)
173 central = 1;
174
175 for (i = 0; i < FHC_NREG; i++) {
176 rid = i;
177 sc->sc_memres[i] = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
178 &rid, RF_ACTIVE);
179 if (sc->sc_memres[i] == NULL) {
180 device_printf(dev, "cannot allocate resource %d\n", i);
181 error = ENXIO;
182 goto fail_memres;
183 }
184 }
185
186 if (central != 0) {
187 board = bus_read_4(sc->sc_memres[FHC_INTERNAL], FHC_BSR);
188 board = ((board >> 16) & 0x1) | ((board >> 12) & 0xe);
189 } else {
190 if (OF_getprop(node, "board#", &board, sizeof(board)) == -1) {
191 device_printf(dev, "cannot get board number\n");
192 error = ENXIO;
193 goto fail_memres;
194 }
195 }
196
197 device_printf(dev, "board %d, ", board);
198 if (OF_getprop_alloc(node, "board-model", 1, (void **)&name) != -1) {
199 printf("model %s\n", name);
200 free(name, M_OFWPROP);
201 } else
202 printf("model unknown\n");
203
204 for (i = FHC_FANFAIL; i <= FHC_TOD; i++) {
205 bus_write_4(sc->sc_memres[i], FHC_ICLR, 0x0);
206 (void)bus_read_4(sc->sc_memres[i], FHC_ICLR);
207 }
208
209 sc->sc_ign = board << 1;
210 bus_write_4(sc->sc_memres[FHC_IGN], 0x0, sc->sc_ign);
211 sc->sc_ign = bus_read_4(sc->sc_memres[FHC_IGN], 0x0);
212
213 ctrl = bus_read_4(sc->sc_memres[FHC_INTERNAL], FHC_CTRL);
214 if (central == 0)
215 ctrl |= FHC_CTRL_IXIST;
216 ctrl &= ~(FHC_CTRL_AOFF | FHC_CTRL_BOFF | FHC_CTRL_SLINE);
217 bus_write_4(sc->sc_memres[FHC_INTERNAL], FHC_CTRL, ctrl);
218 (void)bus_read_4(sc->sc_memres[FHC_INTERNAL], FHC_CTRL);
219
220 sc->sc_nrange = OF_getprop_alloc(node, "ranges",
221 sizeof(*sc->sc_ranges), (void **)&sc->sc_ranges);
222 if (sc->sc_nrange == -1) {
223 device_printf(dev, "cannot get ranges\n");
224 error = ENXIO;
225 goto fail_memres;
226 }
227
228 /*
229 * Apparently only the interrupt controller of boards hanging off
230 * of central(4) is indented to be used, otherwise we would have
231 * conflicts registering the interrupt controllers for all FHC
232 * boards as the board number and thus the IGN isn't unique.
233 */
234 if (central == 1) {
235 /*
236 * Hunt through all the interrupt mapping regs and register
237 * our interrupt controller for the corresponding interrupt
238 * vectors.
239 */
240 for (i = FHC_FANFAIL; i <= FHC_TOD; i++) {
241 fica = malloc(sizeof(*fica), M_DEVBUF, M_NOWAIT);
242 if (fica == NULL)
243 panic("%s: could not allocate interrupt "
244 "controller argument", __func__);
245 fica->fica_sc = sc;
246 fica->fica_memres = sc->sc_memres[i];
247 #ifdef FHC_DEBUG
248 device_printf(dev, "intr map %d: %#lx, clr: %#lx\n", i,
249 (u_long)bus_read_4(fica->fica_memres, FHC_IMAP),
250 (u_long)bus_read_4(fica->fica_memres, FHC_ICLR));
251 #endif
252 /*
253 * XXX we only pick the INO rather than the INR
254 * from the IMR since the firmware may not provide
255 * the IGN and the IGN is constant for all devices
256 * on that FireHose controller.
257 */
258 if (intr_controller_register(INTMAP_VEC(sc->sc_ign,
259 INTINO(bus_read_4(fica->fica_memres, FHC_IMAP))),
260 &fhc_ic, fica) != 0)
261 panic("%s: could not register interrupt "
262 "controller for map %d", __func__, i);
263 }
264 } else {
265 snprintf(ledname, sizeof(ledname), "board%d", board);
266 sc->sc_led_dev = led_create(fhc_led_func, sc, ledname);
267 }
268
269 for (child = OF_child(node); child != 0; child = OF_peer(child)) {
270 fdi = malloc(sizeof(*fdi), M_DEVBUF, M_WAITOK | M_ZERO);
271 if (ofw_bus_gen_setup_devinfo(&fdi->fdi_obdinfo, child) != 0) {
272 free(fdi, M_DEVBUF);
273 continue;
274 }
275 nreg = OF_getprop_alloc(child, "reg", sizeof(*reg),
276 (void **)®);
277 if (nreg == -1) {
278 device_printf(dev, "<%s>: incomplete\n",
279 fdi->fdi_obdinfo.obd_name);
280 ofw_bus_gen_destroy_devinfo(&fdi->fdi_obdinfo);
281 free(fdi, M_DEVBUF);
282 continue;
283 }
284 resource_list_init(&fdi->fdi_rl);
285 for (i = 0; i < nreg; i++)
286 resource_list_add(&fdi->fdi_rl, SYS_RES_MEMORY, i,
287 reg[i].sbr_offset, reg[i].sbr_offset +
288 reg[i].sbr_size, reg[i].sbr_size);
289 free(reg, M_OFWPROP);
290 if (central == 1) {
291 nintr = OF_getprop_alloc(child, "interrupts",
292 sizeof(*intr), (void **)&intr);
293 if (nintr != -1) {
294 for (i = 0; i < nintr; i++) {
295 iv = INTMAP_VEC(sc->sc_ign, intr[i]);
296 resource_list_add(&fdi->fdi_rl,
297 SYS_RES_IRQ, i, iv, iv, 1);
298 }
299 free(intr, M_OFWPROP);
300 }
301 }
302 cdev = device_add_child(dev, NULL, -1);
303 if (cdev == NULL) {
304 device_printf(dev, "<%s>: device_add_child failed\n",
305 fdi->fdi_obdinfo.obd_name);
306 resource_list_free(&fdi->fdi_rl);
307 ofw_bus_gen_destroy_devinfo(&fdi->fdi_obdinfo);
308 free(fdi, M_DEVBUF);
309 continue;
310 }
311 device_set_ivars(cdev, fdi);
312 }
313
314 return (bus_generic_attach(dev));
315
316 fail_memres:
317 for (i = 0; i < FHC_NREG; i++)
318 if (sc->sc_memres[i] != NULL)
319 bus_release_resource(dev, SYS_RES_MEMORY,
320 rman_get_rid(sc->sc_memres[i]), sc->sc_memres[i]);
321 return (error);
322 }
323
324 static int
325 fhc_print_child(device_t dev, device_t child)
326 {
327 int rv;
328
329 rv = bus_print_child_header(dev, child);
330 rv += fhc_print_res(device_get_ivars(child));
331 rv += bus_print_child_footer(dev, child);
332 return (rv);
333 }
334
335 static void
336 fhc_probe_nomatch(device_t dev, device_t child)
337 {
338 const char *type;
339
340 device_printf(dev, "<%s>", ofw_bus_get_name(child));
341 fhc_print_res(device_get_ivars(child));
342 type = ofw_bus_get_type(child);
343 printf(" type %s (no driver attached)\n",
344 type != NULL ? type : "unknown");
345 }
346
347 static void
348 fhc_intr_enable(void *arg)
349 {
350 struct intr_vector *iv = arg;
351 struct fhc_icarg *fica = iv->iv_icarg;
352
353 bus_write_4(fica->fica_memres, FHC_IMAP,
354 INTMAP_ENABLE(iv->iv_vec, iv->iv_mid));
355 (void)bus_read_4(fica->fica_memres, FHC_IMAP);
356 }
357
358 static void
359 fhc_intr_disable(void *arg)
360 {
361 struct intr_vector *iv = arg;
362 struct fhc_icarg *fica = iv->iv_icarg;
363
364 bus_write_4(fica->fica_memres, FHC_IMAP, iv->iv_vec);
365 (void)bus_read_4(fica->fica_memres, FHC_IMAP);
366 }
367
368 static void
369 fhc_intr_eoi(void *arg)
370 {
371 struct intr_vector *iv = arg;
372 struct fhc_icarg *fica = iv->iv_icarg;
373
374 bus_write_4(fica->fica_memres, FHC_ICLR, 0x0);
375 (void)bus_read_4(fica->fica_memres, FHC_ICLR);
376 }
377
378 static int
379 fhc_setup_intr(device_t bus, device_t child, struct resource *r, int flags,
380 driver_filter_t *filt, driver_intr_t *func, void *arg, void **cookiep)
381 {
382 struct fhc_softc *sc;
383 u_long vec;
384
385 sc = device_get_softc(bus);
386 /*
387 * Make sure the vector is fully specified and we registered
388 * our interrupt controller for it.
389 */
390 vec = rman_get_start(r);
391 if (INTIGN(vec) != sc->sc_ign || intr_vectors[vec].iv_ic != &fhc_ic) {
392 device_printf(bus, "invalid interrupt vector 0x%lx\n", vec);
393 return (EINVAL);
394 }
395 return (bus_generic_setup_intr(bus, child, r, flags, filt, func,
396 arg, cookiep));
397 }
398
399 static struct resource *
400 fhc_alloc_resource(device_t bus, device_t child, int type, int *rid,
401 u_long start, u_long end, u_long count, u_int flags)
402 {
403 struct resource_list *rl;
404 struct resource_list_entry *rle;
405 struct fhc_softc *sc;
406 struct resource *res;
407 bus_addr_t coffset;
408 bus_addr_t cend;
409 bus_addr_t phys;
410 int isdefault;
411 int passthrough;
412 int i;
413
414 isdefault = (start == 0UL && end == ~0UL);
415 passthrough = (device_get_parent(child) != bus);
416 res = NULL;
417 rle = NULL;
418 rl = BUS_GET_RESOURCE_LIST(bus, child);
419 sc = device_get_softc(bus);
420 switch (type) {
421 case SYS_RES_IRQ:
422 return (resource_list_alloc(rl, bus, child, type, rid, start,
423 end, count, flags));
424 case SYS_RES_MEMORY:
425 if (!passthrough) {
426 rle = resource_list_find(rl, type, *rid);
427 if (rle == NULL)
428 return (NULL);
429 if (rle->res != NULL)
430 panic("%s: resource entry is busy", __func__);
431 if (isdefault) {
432 start = rle->start;
433 count = ulmax(count, rle->count);
434 end = ulmax(rle->end, start + count - 1);
435 }
436 }
437 for (i = 0; i < sc->sc_nrange; i++) {
438 coffset = sc->sc_ranges[i].coffset;
439 cend = coffset + sc->sc_ranges[i].size - 1;
440 if (start >= coffset && end <= cend) {
441 start -= coffset;
442 end -= coffset;
443 phys = sc->sc_ranges[i].poffset |
444 ((bus_addr_t)sc->sc_ranges[i].pspace << 32);
445 res = bus_generic_alloc_resource(bus, child,
446 type, rid, phys + start, phys + end,
447 count, flags);
448 if (!passthrough)
449 rle->res = res;
450 break;
451 }
452 }
453 break;
454 }
455 return (res);
456 }
457
458 static struct resource_list *
459 fhc_get_resource_list(device_t bus, device_t child)
460 {
461 struct fhc_devinfo *fdi;
462
463 fdi = device_get_ivars(child);
464 return (&fdi->fdi_rl);
465 }
466
467 static const struct ofw_bus_devinfo *
468 fhc_get_devinfo(device_t bus, device_t child)
469 {
470 struct fhc_devinfo *fdi;
471
472 fdi = device_get_ivars(child);
473 return (&fdi->fdi_obdinfo);
474 }
475
476 static void
477 fhc_led_func(void *arg, int onoff)
478 {
479 struct fhc_softc *sc;
480 uint32_t ctrl;
481
482 sc = (struct fhc_softc *)arg;
483
484 ctrl = bus_read_4(sc->sc_memres[FHC_INTERNAL], FHC_CTRL);
485 if (onoff)
486 ctrl |= FHC_CTRL_RLED;
487 else
488 ctrl &= ~FHC_CTRL_RLED;
489 ctrl &= ~(FHC_CTRL_AOFF | FHC_CTRL_BOFF | FHC_CTRL_SLINE);
490 bus_write_4(sc->sc_memres[FHC_INTERNAL], FHC_CTRL, ctrl);
491 (void)bus_read_4(sc->sc_memres[FHC_INTERNAL], FHC_CTRL);
492 }
493
494 static int
495 fhc_print_res(struct fhc_devinfo *fdi)
496 {
497 int rv;
498
499 rv = 0;
500 rv += resource_list_print_type(&fdi->fdi_rl, "mem", SYS_RES_MEMORY,
501 "%#lx");
502 rv += resource_list_print_type(&fdi->fdi_rl, "irq", SYS_RES_IRQ, "%ld");
503 return (rv);
504 }
Cache object: 38689dbb6c50e7b21022774e82bd65cd
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