The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/sparc64/fhc/fhcreg.h

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    1 /*-
    2  * Copyright (c) 2003 Jake Burkholder.
    3  * All rights reserved.
    4  *
    5  * Redistribution and use in source and binary forms, with or without
    6  * modification, are permitted provided that the following conditions
    7  * are met:
    8  * 1. Redistributions of source code must retain the above copyright
    9  *    notice, this list of conditions and the following disclaimer.
   10  * 2. Redistributions in binary form must reproduce the above copyright
   11  *    notice, this list of conditions and the following disclaimer in the
   12  *    documentation and/or other materials provided with the distribution.
   13  *
   14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   24  * SUCH DAMAGE.
   25  */
   26 /*-
   27  * Copyright (c) 2004 Jason L. Wright (jason@thought.net).
   28  * All rights reserved.
   29  *
   30  * Redistribution and use in source and binary forms, with or without
   31  * modification, are permitted provided that the following conditions
   32  * are met:
   33  * 1. Redistributions of source code must retain the above copyright
   34  *    notice, this list of conditions and the following disclaimer.
   35  * 2. Redistributions in binary form must reproduce the above copyright
   36  *    notice, this list of conditions and the following disclaimer in the
   37  *    documentation and/or other materials provided with the distribution.
   38  *
   39  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
   40  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
   41  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
   42  * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
   43  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
   44  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
   45  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   46  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
   47  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
   48  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
   49  * POSSIBILITY OF SUCH DAMAGE.
   50  *
   51  *      from: OpenBSD: fhcreg.h,v 1.3 2004/09/28 16:26:03 jason Exp
   52  *
   53  * $FreeBSD: releng/11.0/sys/sparc64/fhc/fhcreg.h 143825 2005-03-19 00:48:34Z marius $
   54  */
   55 
   56 #ifndef _SPARC64_FHC_FHCREG_H_
   57 #define _SPARC64_FHC_FHCREG_H_
   58 
   59 #define FHC_NREG        (6)
   60 
   61 #define FHC_INTERNAL    (0)
   62 #define FHC_IGN         (1)
   63 #define FHC_FANFAIL     (2)
   64 #define FHC_SYSTEM      (3)
   65 #define FHC_UART        (4)
   66 #define FHC_TOD         (5)
   67 
   68 #define FHC_IMAP        0x0
   69 #define FHC_ICLR        0x10
   70 
   71 #define FHC_ID          0x00000000      /* ID */
   72 #define FHC_RCS         0x00000010      /* reset ctrl/status */
   73 #define FHC_CTRL        0x00000020      /* control */
   74 #define FHC_BSR         0x00000030      /* board status */
   75 #define FHC_ECC         0x00000040      /* ECC control */
   76 #define FHC_JCTRL       0x000000f0      /* JTAG control */
   77 
   78 #define FHC_CTRL_ICS    0x00100000      /* ignore centerplane sigs */
   79 #define FHC_CTRL_FRST   0x00080000      /* fatal error reset enable */
   80 #define FHC_CTRL_LFAT   0x00040000      /* AC/DC local error */
   81 #define FHC_CTRL_SLINE  0x00010000      /* firmware sync line */
   82 #define FHC_CTRL_DCD    0x00008000      /* DC/DC converter disable */
   83 #define FHC_CTRL_POFF   0x00004000      /* AC/DC ctlr PLL disable */
   84 #define FHC_CTRL_FOFF   0x00002000      /* FHC ctlr PLL disable */
   85 #define FHC_CTRL_AOFF   0x00001000      /* cpu a sram low pwr mode */
   86 #define FHC_CTRL_BOFF   0x00000800      /* cpu b sram low pwr mode */
   87 #define FHC_CTRL_PSOFF  0x00000400      /* disable fhc power supply */
   88 #define FHC_CTRL_IXIST  0x00000200      /* fhc notifies clock-board */
   89 #define FHC_CTRL_XMSTR  0x00000100      /* xir master enable */
   90 #define FHC_CTRL_LLED   0x00000040      /* left led (reversed) */
   91 #define FHC_CTRL_MLED   0x00000020      /* middle led */
   92 #define FHC_CTRL_RLED   0x00000010      /* right led */
   93 #define FHC_CTRL_BPINS  0x00000003      /* spare bidir pins */
   94 
   95 #endif /* !_SPARC64_FHC_FHCREG_H_ */

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