The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/sparc64/include/bus_common.h

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    1 /*-
    2  * Copyright (c) 1992, 1993
    3  *      The Regents of the University of California.  All rights reserved.
    4  *
    5  * This software was developed by the Computer Systems Engineering group
    6  * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
    7  * contributed to Berkeley.
    8  *
    9  * Redistribution and use in source and binary forms, with or without
   10  * modification, are permitted provided that the following conditions
   11  * are met:
   12  * 1. Redistributions of source code must retain the above copyright
   13  *    notice, this list of conditions and the following disclaimer.
   14  * 2. Redistributions in binary form must reproduce the above copyright
   15  *    notice, this list of conditions and the following disclaimer in the
   16  *    documentation and/or other materials provided with the distribution.
   17  * 4. Neither the name of the University nor the names of its contributors
   18  *    may be used to endorse or promote products derived from this software
   19  *    without specific prior written permission.
   20  *
   21  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
   22  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   23  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   24  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
   25  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   26  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   27  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   28  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   29  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   30  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   31  * SUCH DAMAGE.
   32  *
   33  *      form: @(#)sbusreg.h     8.1 (Berkeley) 6/11/93
   34  *      from: NetBSD: iommureg.h,v 1.6 2001/07/20 00:07:13 eeh Exp
   35  *
   36  * $FreeBSD: releng/6.0/sys/sparc64/include/bus_common.h 139825 2005-01-07 02:29:27Z imp $
   37  */
   38 
   39 #ifndef _MACHINE_BUS_COMMON_H_
   40 #define _MACHINE_BUS_COMMON_H_
   41 
   42 #define INTMAP_V                0x080000000LL   /* Interrupt valid (enabled) */
   43 #define INTMAP_TID_MASK         0x07c000000LL   /* UPA target ID */
   44 #define INTMAP_TID_SHIFT        26
   45 #define INTMAP_IGN_MASK         0x0000007c0LL   /* Interrupt group no. */
   46 #define INTMAP_IGN_SHIFT        6
   47 #define INTMAP_INO_MASK         0x00000003fLL   /* Interrupt number */
   48 #define INTMAP_INR_MASK         (INTMAP_IGN_MASK | INTMAP_INO_MASK)
   49 #define INTMAP_SBUSSLOT_MASK    0x000000018LL   /* SBUS slot # */
   50 #define INTMAP_PCIBUS_MASK      0x000000010LL   /* PCI bus number (A or B) */
   51 #define INTMAP_PCISLOT_MASK     0x00000000cLL   /* PCI slot # */
   52 #define INTMAP_PCIINT_MASK      0x000000003LL   /* PCI interrupt #A,#B,#C,#D */
   53 #define INTMAP_OBIO_MASK        0x000000020LL   /* Onboard device */
   54 #define INTVEC(x)               ((x) & INTMAP_INR_MASK)
   55 #define INTSLOT(x)              (((x) >> 3) & 0x7)
   56 #define INTPRI(x)               ((x) & 0x7)
   57 #define INTINO(x)               ((x) & INTMAP_INO_MASK)
   58 #define INTMAP_ENABLE(mr, mid) \
   59         (((mr) & ~INTMAP_TID_MASK) | ((mid) << INTMAP_TID_SHIFT) | INTMAP_V)
   60 
   61 /* counter-timer support. */
   62 void sparc64_counter_init(bus_space_tag_t tag, bus_space_handle_t handle,
   63     bus_addr_t offset);
   64 
   65 #endif  /* !_MACHINE_BUS_COMMON_H_ */

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