The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/sparc64/include/smp.h

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    1 /*-
    2  * Copyright (c) 2001 Jake Burkholder.
    3  * All rights reserved.
    4  *
    5  * Redistribution and use in source and binary forms, with or without
    6  * modification, are permitted provided that the following conditions
    7  * are met:
    8  * 1. Redistributions of source code must retain the above copyright
    9  *    notice, this list of conditions and the following disclaimer.
   10  * 2. Redistributions in binary form must reproduce the above copyright
   11  *    notice, this list of conditions and the following disclaimer in the
   12  *    documentation and/or other materials provided with the distribution.
   13  *
   14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   24  * SUCH DAMAGE.
   25  *
   26  * $FreeBSD: releng/8.2/sys/sparc64/include/smp.h 215141 2010-11-11 19:39:38Z jhb $
   27  */
   28 
   29 #ifndef _MACHINE_SMP_H_
   30 #define _MACHINE_SMP_H_
   31 
   32 #ifdef SMP
   33 
   34 #define CPU_TICKSYNC            1
   35 #define CPU_STICKSYNC           2
   36 #define CPU_INIT                3
   37 #define CPU_BOOTSTRAP           4
   38 
   39 #ifndef LOCORE
   40 
   41 #include <sys/proc.h>
   42 #include <sys/sched.h>
   43 
   44 #include <machine/intr_machdep.h>
   45 #include <machine/pcb.h>
   46 #include <machine/tte.h>
   47 
   48 #define IDR_BUSY                        0x0000000000000001ULL
   49 #define IDR_NACK                        0x0000000000000002ULL
   50 #define IDR_CHEETAH_ALL_BUSY            0x5555555555555555ULL
   51 #define IDR_CHEETAH_ALL_NACK            (~IDR_CHEETAH_ALL_BUSY)
   52 #define IDR_CHEETAH_MAX_BN_PAIRS        32
   53 #define IDR_JALAPENO_MAX_BN_PAIRS       4
   54 
   55 #define IDC_ITID_SHIFT                  14
   56 #define IDC_BN_SHIFT                    24
   57 
   58 #define IPI_AST         PIL_AST
   59 #define IPI_RENDEZVOUS  PIL_RENDEZVOUS
   60 #define IPI_PREEMPT     PIL_PREEMPT
   61 #define IPI_STOP        PIL_STOP
   62 #define IPI_STOP_HARD   PIL_STOP
   63 
   64 #define IPI_RETRIES     5000
   65 
   66 struct cpu_start_args {
   67         u_int   csa_count;
   68         u_int   csa_mid;
   69         u_int   csa_state;
   70         vm_offset_t csa_pcpu;
   71         u_long  csa_tick;
   72         u_long  csa_stick;
   73         u_long  csa_ver;
   74         struct  tte csa_ttes[PCPU_PAGES];
   75 };
   76 
   77 struct ipi_cache_args {
   78         cpumask_t ica_mask;
   79         vm_paddr_t ica_pa;
   80 };
   81 
   82 struct ipi_rd_args {
   83         cpumask_t ira_mask;
   84         register_t *ira_val;
   85 };
   86 
   87 struct ipi_tlb_args {
   88         cpumask_t ita_mask;
   89         struct  pmap *ita_pmap;
   90         u_long  ita_start;
   91         u_long  ita_end;
   92 };
   93 #define ita_va  ita_start
   94 
   95 struct pcpu;
   96 
   97 extern struct pcb stoppcbs[];
   98 
   99 void    cpu_mp_bootstrap(struct pcpu *pc);
  100 void    cpu_mp_shutdown(void);
  101 
  102 typedef void cpu_ipi_selected_t(u_int, u_long, u_long, u_long);
  103 extern  cpu_ipi_selected_t *cpu_ipi_selected;
  104 typedef void cpu_ipi_single_t(u_int, u_long, u_long, u_long);
  105 extern  cpu_ipi_single_t *cpu_ipi_single;
  106 
  107 void    mp_init(u_int cpu_impl);
  108 
  109 extern  struct mtx ipi_mtx;
  110 extern  struct ipi_cache_args ipi_cache_args;
  111 extern  struct ipi_rd_args ipi_rd_args;
  112 extern  struct ipi_tlb_args ipi_tlb_args;
  113 
  114 extern  char *mp_tramp_code;
  115 extern  u_long mp_tramp_code_len;
  116 extern  u_long mp_tramp_tlb_slots;
  117 extern  u_long mp_tramp_func;
  118 
  119 extern  void mp_startup(void);
  120 
  121 extern  char tl_ipi_cheetah_dcache_page_inval[];
  122 extern  char tl_ipi_spitfire_dcache_page_inval[];
  123 extern  char tl_ipi_spitfire_icache_page_inval[];
  124 
  125 extern  char tl_ipi_level[];
  126 
  127 extern  char tl_ipi_stick_rd[];
  128 extern  char tl_ipi_tick_rd[];
  129 
  130 extern  char tl_ipi_tlb_context_demap[];
  131 extern  char tl_ipi_tlb_page_demap[];
  132 extern  char tl_ipi_tlb_range_demap[];
  133 
  134 static __inline void
  135 ipi_all_but_self(u_int ipi)
  136 {
  137 
  138         cpu_ipi_selected(PCPU_GET(other_cpus), 0, (u_long)tl_ipi_level, ipi);
  139 }
  140 
  141 static __inline void
  142 ipi_selected(u_int cpus, u_int ipi)
  143 {
  144 
  145         cpu_ipi_selected(cpus, 0, (u_long)tl_ipi_level, ipi);
  146 }
  147 
  148 static __inline void
  149 ipi_cpu(int cpu, u_int ipi)
  150 {
  151 
  152         cpu_ipi_single(cpu, 0, (u_long)tl_ipi_level, ipi);
  153 }
  154 
  155 #if defined(_MACHINE_PMAP_H_) && defined(_SYS_MUTEX_H_)
  156 
  157 static __inline void *
  158 ipi_dcache_page_inval(void *func, vm_paddr_t pa)
  159 {
  160         struct ipi_cache_args *ica;
  161 
  162         if (smp_cpus == 1)
  163                 return (NULL);
  164         sched_pin();
  165         ica = &ipi_cache_args;
  166         mtx_lock_spin(&ipi_mtx);
  167         ica->ica_mask = all_cpus;
  168         ica->ica_pa = pa;
  169         cpu_ipi_selected(PCPU_GET(other_cpus), 0, (u_long)func, (u_long)ica);
  170         return (&ica->ica_mask);
  171 }
  172 
  173 static __inline void *
  174 ipi_icache_page_inval(void *func, vm_paddr_t pa)
  175 {
  176         struct ipi_cache_args *ica;
  177 
  178         if (smp_cpus == 1)
  179                 return (NULL);
  180         sched_pin();
  181         ica = &ipi_cache_args;
  182         mtx_lock_spin(&ipi_mtx);
  183         ica->ica_mask = all_cpus;
  184         ica->ica_pa = pa;
  185         cpu_ipi_selected(PCPU_GET(other_cpus), 0, (u_long)func, (u_long)ica);
  186         return (&ica->ica_mask);
  187 }
  188 
  189 static __inline void *
  190 ipi_rd(u_int cpu, void *func, u_long *val)
  191 {
  192         struct ipi_rd_args *ira;
  193 
  194         if (smp_cpus == 1)
  195                 return (NULL);
  196         sched_pin();
  197         ira = &ipi_rd_args;
  198         mtx_lock_spin(&ipi_mtx);
  199         ira->ira_mask = 1 << cpu | PCPU_GET(cpumask);
  200         ira->ira_val = val;
  201         cpu_ipi_single(cpu, 0, (u_long)func, (u_long)ira);
  202         return (&ira->ira_mask);
  203 }
  204 
  205 static __inline void *
  206 ipi_tlb_context_demap(struct pmap *pm)
  207 {
  208         struct ipi_tlb_args *ita;
  209         cpumask_t cpus;
  210 
  211         if (smp_cpus == 1)
  212                 return (NULL);
  213         sched_pin();
  214         if ((cpus = (pm->pm_active & PCPU_GET(other_cpus))) == 0) {
  215                 sched_unpin();
  216                 return (NULL);
  217         }
  218         ita = &ipi_tlb_args;
  219         mtx_lock_spin(&ipi_mtx);
  220         ita->ita_mask = cpus | PCPU_GET(cpumask);
  221         ita->ita_pmap = pm;
  222         cpu_ipi_selected(cpus, 0, (u_long)tl_ipi_tlb_context_demap,
  223             (u_long)ita);
  224         return (&ita->ita_mask);
  225 }
  226 
  227 static __inline void *
  228 ipi_tlb_page_demap(struct pmap *pm, vm_offset_t va)
  229 {
  230         struct ipi_tlb_args *ita;
  231         cpumask_t cpus;
  232 
  233         if (smp_cpus == 1)
  234                 return (NULL);
  235         sched_pin();
  236         if ((cpus = (pm->pm_active & PCPU_GET(other_cpus))) == 0) {
  237                 sched_unpin();
  238                 return (NULL);
  239         }
  240         ita = &ipi_tlb_args;
  241         mtx_lock_spin(&ipi_mtx);
  242         ita->ita_mask = cpus | PCPU_GET(cpumask);
  243         ita->ita_pmap = pm;
  244         ita->ita_va = va;
  245         cpu_ipi_selected(cpus, 0, (u_long)tl_ipi_tlb_page_demap, (u_long)ita);
  246         return (&ita->ita_mask);
  247 }
  248 
  249 static __inline void *
  250 ipi_tlb_range_demap(struct pmap *pm, vm_offset_t start, vm_offset_t end)
  251 {
  252         struct ipi_tlb_args *ita;
  253         cpumask_t cpus;
  254 
  255         if (smp_cpus == 1)
  256                 return (NULL);
  257         sched_pin();
  258         if ((cpus = (pm->pm_active & PCPU_GET(other_cpus))) == 0) {
  259                 sched_unpin();
  260                 return (NULL);
  261         }
  262         ita = &ipi_tlb_args;
  263         mtx_lock_spin(&ipi_mtx);
  264         ita->ita_mask = cpus | PCPU_GET(cpumask);
  265         ita->ita_pmap = pm;
  266         ita->ita_start = start;
  267         ita->ita_end = end;
  268         cpu_ipi_selected(cpus, 0, (u_long)tl_ipi_tlb_range_demap,
  269             (u_long)ita);
  270         return (&ita->ita_mask);
  271 }
  272 
  273 static __inline void
  274 ipi_wait(void *cookie)
  275 {
  276         volatile cpumask_t *mask;
  277 
  278         if ((mask = cookie) != NULL) {
  279                 atomic_clear_int(mask, PCPU_GET(cpumask));
  280                 while (*mask != 0)
  281                         ;
  282                 mtx_unlock_spin(&ipi_mtx);
  283                 sched_unpin();
  284         }
  285 }
  286 
  287 #endif /* _MACHINE_PMAP_H_ && _SYS_MUTEX_H_ */
  288 
  289 #endif /* !LOCORE */
  290 
  291 #else
  292 
  293 #ifndef LOCORE
  294 
  295 static __inline void *
  296 ipi_dcache_page_inval(void *func __unused, vm_paddr_t pa __unused)
  297 {
  298 
  299         return (NULL);
  300 }
  301 
  302 static __inline void *
  303 ipi_icache_page_inval(void *func __unused, vm_paddr_t pa __unused)
  304 {
  305 
  306         return (NULL);
  307 }
  308 
  309 static __inline void *
  310 ipi_rd(u_int cpu __unused, void *func __unused, u_long *val __unused)
  311 {
  312 
  313         return (NULL);
  314 }
  315 
  316 static __inline void *
  317 ipi_tlb_context_demap(struct pmap *pm __unused)
  318 {
  319 
  320         return (NULL);
  321 }
  322 
  323 static __inline void *
  324 ipi_tlb_page_demap(struct pmap *pm __unused, vm_offset_t va __unused)
  325 {
  326 
  327         return (NULL);
  328 }
  329 
  330 static __inline void *
  331 ipi_tlb_range_demap(struct pmap *pm __unused, vm_offset_t start __unused,
  332     __unused vm_offset_t end)
  333 {
  334 
  335         return (NULL);
  336 }
  337 
  338 static __inline void
  339 ipi_wait(void *cookie)
  340 {
  341 
  342 }
  343 
  344 static __inline void
  345 tl_ipi_cheetah_dcache_page_inval(void)
  346 {
  347 
  348 }
  349 
  350 static __inline void
  351 tl_ipi_spitfire_dcache_page_inval(void)
  352 {
  353 
  354 }
  355 
  356 static __inline void
  357 tl_ipi_spitfire_icache_page_inval(void)
  358 {
  359 
  360 }
  361 
  362 #endif /* !LOCORE */
  363 
  364 #endif /* SMP */
  365 
  366 #endif /* !_MACHINE_SMP_H_ */

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