1 /*-
2 * Copyright (c) 2009 by Marius Strobl <marius@FreeBSD.org>.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions, and the following disclaimer,
10 * without modification, immediately at the beginning of the file.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in
13 * the documentation and/or other materials provided with the
14 * distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
20 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 *
28 * $FreeBSD$
29 */
30
31 #ifndef _SPARC64_PCI_FIREVAR_H_
32 #define _SPARC64_PCI_FIREVAR_H_
33
34 struct fire_softc {
35 struct iommu_state sc_is;
36 struct bus_dma_methods sc_dma_methods;
37
38 struct mtx sc_msi_mtx;
39 struct mtx sc_pcib_mtx;
40
41 struct resource *sc_mem_res[FIRE_NREG];
42 struct resource *sc_irq_res[FIRE_NINTR];
43 void *sc_ihand[FIRE_NINTR];
44
45 struct rman sc_pci_mem_rman;
46 struct rman sc_pci_io_rman;
47 bus_space_handle_t sc_pci_bh[FIRE_NRANGE];
48 bus_space_tag_t sc_pci_cfgt;
49 bus_space_tag_t sc_pci_iot;
50 bus_dma_tag_t sc_pci_dmat;
51
52 device_t sc_dev;
53
54 uint64_t *sc_msiq;
55 u_char *sc_msi_bitmap;
56 uint32_t *sc_msi_msiq_table;
57 u_char *sc_msiq_bitmap;
58 uint64_t sc_msi_addr32;
59 uint64_t sc_msi_addr64;
60 uint32_t sc_msi_count;
61 uint32_t sc_msi_first;
62 uint32_t sc_msi_data_mask;
63 uint32_t sc_msix_data_width;
64 uint32_t sc_msiq_count;
65 uint32_t sc_msiq_size;
66 uint32_t sc_msiq_first;
67 uint32_t sc_msiq_ino_first;
68
69 phandle_t sc_node;
70
71 u_int sc_mode;
72 #define FIRE_MODE_FIRE 0
73 #define FIRE_MODE_OBERON 1
74
75 u_int sc_flags;
76 #define FIRE_MSIX (1 << 0)
77
78 uint32_t sc_ign;
79
80 uint32_t sc_stats_ilu_err;
81 uint32_t sc_stats_jbc_ce_async;
82 uint32_t sc_stats_jbc_unsol_int;
83 uint32_t sc_stats_jbc_unsol_rd;
84 uint32_t sc_stats_mmu_err;
85 uint32_t sc_stats_tlu_ce;
86 uint32_t sc_stats_tlu_oe_non_fatal;
87 uint32_t sc_stats_tlu_oe_rx_err;
88 uint32_t sc_stats_tlu_oe_tx_err;
89 uint32_t sc_stats_ubc_dmardue;
90
91 uint8_t sc_pci_secbus;
92 uint8_t sc_pci_subbus;
93
94 struct ofw_bus_iinfo sc_pci_iinfo;
95 };
96
97 #endif /* !_SPARC64_PCI_FIREVAR_H_ */
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