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sys/sparc64/sbus/sbus.c
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1 /*- 2 * SPDX-License-Identifier: BSD-3-Clause 3 * 4 * Copyright (c) 1999-2002 Eduardo Horvath 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of the author may not be used to endorse or promote products 16 * derived from this software without specific prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 23 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 24 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 25 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 * 30 * from: NetBSD: sbus.c,v 1.50 2002/06/20 18:26:24 eeh Exp 31 */ 32 /*- 33 * Copyright (c) 2002 by Thomas Moestl <tmm@FreeBSD.org>. 34 * Copyright (c) 2005 Marius Strobl <marius@FreeBSD.org> 35 * All rights reserved. 36 * 37 * Redistribution and use in source and binary forms, with or without 38 * modification, are permitted provided that the following conditions 39 * are met: 40 * 1. Redistributions of source code must retain the above copyright 41 * notice, this list of conditions and the following disclaimer. 42 * 43 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND 44 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 45 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 46 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE 47 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 48 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 49 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 50 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 51 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 52 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 53 * SUCH DAMAGE. 54 */ 55 56 #include <sys/cdefs.h> 57 __FBSDID("$FreeBSD: releng/12.0/sys/sparc64/sbus/sbus.c 332310 2018-04-08 22:59:34Z gonzo $"); 58 59 /* 60 * SBus support. 61 */ 62 63 #include <sys/param.h> 64 #include <sys/systm.h> 65 #include <sys/bus.h> 66 #include <sys/kernel.h> 67 #include <sys/malloc.h> 68 #include <sys/module.h> 69 #include <sys/pcpu.h> 70 #include <sys/queue.h> 71 #include <sys/reboot.h> 72 #include <sys/rman.h> 73 74 #include <dev/ofw/ofw_bus.h> 75 #include <dev/ofw/ofw_bus_subr.h> 76 #include <dev/ofw/openfirm.h> 77 78 #include <machine/bus.h> 79 #include <machine/bus_common.h> 80 #include <machine/bus_private.h> 81 #include <machine/iommureg.h> 82 #include <machine/iommuvar.h> 83 #include <machine/resource.h> 84 85 #include <sparc64/sbus/ofw_sbus.h> 86 #include <sparc64/sbus/sbusreg.h> 87 #include <sparc64/sbus/sbusvar.h> 88 89 struct sbus_devinfo { 90 int sdi_burstsz; 91 int sdi_clockfreq; 92 int sdi_slot; 93 94 struct ofw_bus_devinfo sdi_obdinfo; 95 struct resource_list sdi_rl; 96 }; 97 98 /* Range descriptor, allocated for each sc_range. */ 99 struct sbus_rd { 100 bus_addr_t rd_poffset; 101 bus_addr_t rd_pend; 102 int rd_slot; 103 bus_addr_t rd_coffset; 104 bus_addr_t rd_cend; 105 struct rman rd_rman; 106 bus_space_handle_t rd_bushandle; 107 struct resource *rd_res; 108 }; 109 110 struct sbus_softc { 111 device_t sc_dev; 112 bus_dma_tag_t sc_cdmatag; 113 int sc_clockfreq; /* clock frequency (in Hz) */ 114 int sc_nrange; 115 struct sbus_rd *sc_rd; 116 int sc_burst; /* burst transfer sizes supp. */ 117 118 struct resource *sc_sysio_res; 119 int sc_ign; /* IGN for this sysio */ 120 struct iommu_state sc_is; /* IOMMU state (iommuvar.h) */ 121 122 struct resource *sc_ot_ires; 123 void *sc_ot_ihand; 124 struct resource *sc_pf_ires; 125 void *sc_pf_ihand; 126 }; 127 128 #define SYSIO_READ8(sc, off) \ 129 bus_read_8((sc)->sc_sysio_res, (off)) 130 #define SYSIO_WRITE8(sc, off, v) \ 131 bus_write_8((sc)->sc_sysio_res, (off), (v)) 132 133 static device_probe_t sbus_probe; 134 static device_attach_t sbus_attach; 135 static bus_print_child_t sbus_print_child; 136 static bus_probe_nomatch_t sbus_probe_nomatch; 137 static bus_read_ivar_t sbus_read_ivar; 138 static bus_get_resource_list_t sbus_get_resource_list; 139 static bus_setup_intr_t sbus_setup_intr; 140 static bus_alloc_resource_t sbus_alloc_resource; 141 static bus_activate_resource_t sbus_activate_resource; 142 static bus_adjust_resource_t sbus_adjust_resource; 143 static bus_release_resource_t sbus_release_resource; 144 static bus_get_dma_tag_t sbus_get_dma_tag; 145 static ofw_bus_get_devinfo_t sbus_get_devinfo; 146 147 static int sbus_inlist(const char *, const char *const *); 148 static struct sbus_devinfo * sbus_setup_dinfo(device_t, struct sbus_softc *, 149 phandle_t); 150 static void sbus_destroy_dinfo(struct sbus_devinfo *); 151 static void sbus_intr_enable(void *); 152 static void sbus_intr_disable(void *); 153 static void sbus_intr_assign(void *); 154 static void sbus_intr_clear(void *); 155 static int sbus_find_intrmap(struct sbus_softc *, u_int, bus_addr_t *, 156 bus_addr_t *); 157 static driver_intr_t sbus_overtemp; 158 static driver_intr_t sbus_pwrfail; 159 static int sbus_print_res(struct sbus_devinfo *); 160 161 static device_method_t sbus_methods[] = { 162 /* Device interface */ 163 DEVMETHOD(device_probe, sbus_probe), 164 DEVMETHOD(device_attach, sbus_attach), 165 DEVMETHOD(device_shutdown, bus_generic_shutdown), 166 DEVMETHOD(device_suspend, bus_generic_suspend), 167 DEVMETHOD(device_resume, bus_generic_resume), 168 169 /* Bus interface */ 170 DEVMETHOD(bus_print_child, sbus_print_child), 171 DEVMETHOD(bus_probe_nomatch, sbus_probe_nomatch), 172 DEVMETHOD(bus_read_ivar, sbus_read_ivar), 173 DEVMETHOD(bus_alloc_resource, sbus_alloc_resource), 174 DEVMETHOD(bus_activate_resource, sbus_activate_resource), 175 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), 176 DEVMETHOD(bus_adjust_resource, sbus_adjust_resource), 177 DEVMETHOD(bus_release_resource, sbus_release_resource), 178 DEVMETHOD(bus_setup_intr, sbus_setup_intr), 179 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), 180 DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource), 181 DEVMETHOD(bus_get_resource_list, sbus_get_resource_list), 182 DEVMETHOD(bus_child_pnpinfo_str, ofw_bus_gen_child_pnpinfo_str), 183 DEVMETHOD(bus_get_dma_tag, sbus_get_dma_tag), 184 185 /* ofw_bus interface */ 186 DEVMETHOD(ofw_bus_get_devinfo, sbus_get_devinfo), 187 DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat), 188 DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model), 189 DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name), 190 DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node), 191 DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type), 192 193 DEVMETHOD_END 194 }; 195 196 static driver_t sbus_driver = { 197 "sbus", 198 sbus_methods, 199 sizeof(struct sbus_softc), 200 }; 201 202 static devclass_t sbus_devclass; 203 204 EARLY_DRIVER_MODULE(sbus, nexus, sbus_driver, sbus_devclass, NULL, NULL, 205 BUS_PASS_BUS); 206 MODULE_DEPEND(sbus, nexus, 1, 1, 1); 207 MODULE_VERSION(sbus, 1); 208 209 #define OFW_SBUS_TYPE "sbus" 210 #define OFW_SBUS_NAME "sbus" 211 212 static const struct intr_controller sbus_ic = { 213 sbus_intr_enable, 214 sbus_intr_disable, 215 sbus_intr_assign, 216 sbus_intr_clear 217 }; 218 219 struct sbus_icarg { 220 struct sbus_softc *sica_sc; 221 bus_addr_t sica_map; 222 bus_addr_t sica_clr; 223 }; 224 225 static const char *const sbus_order_first[] = { 226 "auxio", 227 "dma", 228 NULL 229 }; 230 231 static int 232 sbus_inlist(const char *name, const char *const *list) 233 { 234 int i; 235 236 if (name == NULL) 237 return (0); 238 for (i = 0; list[i] != NULL; i++) { 239 if (strcmp(name, list[i]) == 0) 240 return (1); 241 } 242 return (0); 243 } 244 245 static int 246 sbus_probe(device_t dev) 247 { 248 const char *t; 249 250 t = ofw_bus_get_type(dev); 251 if (((t == NULL || strcmp(t, OFW_SBUS_TYPE) != 0)) && 252 strcmp(ofw_bus_get_name(dev), OFW_SBUS_NAME) != 0) 253 return (ENXIO); 254 device_set_desc(dev, "U2S UPA-SBus bridge"); 255 return (0); 256 } 257 258 static int 259 sbus_attach(device_t dev) 260 { 261 struct sbus_softc *sc; 262 struct sbus_devinfo *sdi; 263 struct sbus_icarg *sica; 264 struct sbus_ranges *range; 265 struct resource *res; 266 struct resource_list *rl; 267 device_t cdev; 268 bus_addr_t intrclr, intrmap, phys; 269 bus_size_t size; 270 u_long vec; 271 phandle_t child, node; 272 uint32_t prop; 273 int i, j; 274 275 sc = device_get_softc(dev); 276 sc->sc_dev = dev; 277 node = ofw_bus_get_node(dev); 278 279 i = 0; 280 sc->sc_sysio_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &i, 281 RF_ACTIVE); 282 if (sc->sc_sysio_res == NULL) 283 panic("%s: cannot allocate device memory", __func__); 284 285 if (OF_getprop(node, "interrupts", &prop, sizeof(prop)) == -1) 286 panic("%s: cannot get IGN", __func__); 287 sc->sc_ign = INTIGN(prop); 288 289 /* 290 * Record clock frequency for synchronous SCSI. 291 * IS THIS THE CORRECT DEFAULT?? 292 */ 293 if (OF_getprop(node, "clock-frequency", &prop, sizeof(prop)) == -1) 294 prop = 25000000; 295 sc->sc_clockfreq = prop; 296 prop /= 1000; 297 device_printf(dev, "clock %d.%03d MHz\n", prop / 1000, prop % 1000); 298 299 /* 300 * Collect address translations from the OBP. 301 */ 302 if ((sc->sc_nrange = OF_getprop_alloc_multi(node, "ranges", 303 sizeof(*range), (void **)&range)) == -1) { 304 panic("%s: error getting ranges property", __func__); 305 } 306 sc->sc_rd = malloc(sizeof(*sc->sc_rd) * sc->sc_nrange, M_DEVBUF, 307 M_NOWAIT | M_ZERO); 308 if (sc->sc_rd == NULL) 309 panic("%s: cannot allocate rmans", __func__); 310 /* 311 * Preallocate all space that the SBus bridge decodes, so that nothing 312 * else gets in the way; set up rmans etc. 313 */ 314 rl = BUS_GET_RESOURCE_LIST(device_get_parent(dev), dev); 315 for (i = 0; i < sc->sc_nrange; i++) { 316 phys = range[i].poffset | ((bus_addr_t)range[i].pspace << 32); 317 size = range[i].size; 318 sc->sc_rd[i].rd_slot = range[i].cspace; 319 sc->sc_rd[i].rd_coffset = range[i].coffset; 320 sc->sc_rd[i].rd_cend = sc->sc_rd[i].rd_coffset + size; 321 j = resource_list_add_next(rl, SYS_RES_MEMORY, phys, 322 phys + size - 1, size); 323 if ((res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &j, 324 RF_ACTIVE)) == NULL) 325 panic("%s: cannot allocate decoded range", __func__); 326 sc->sc_rd[i].rd_bushandle = rman_get_bushandle(res); 327 sc->sc_rd[i].rd_rman.rm_type = RMAN_ARRAY; 328 sc->sc_rd[i].rd_rman.rm_descr = "SBus Device Memory"; 329 if (rman_init(&sc->sc_rd[i].rd_rman) != 0 || 330 rman_manage_region(&sc->sc_rd[i].rd_rman, 0, size) != 0) 331 panic("%s: failed to set up memory rman", __func__); 332 sc->sc_rd[i].rd_poffset = phys; 333 sc->sc_rd[i].rd_pend = phys + size; 334 sc->sc_rd[i].rd_res = res; 335 } 336 OF_prop_free(range); 337 338 /* 339 * Get the SBus burst transfer size if burst transfers are supported. 340 */ 341 if (OF_getprop(node, "up-burst-sizes", &sc->sc_burst, 342 sizeof(sc->sc_burst)) == -1 || sc->sc_burst == 0) 343 sc->sc_burst = 344 (SBUS_BURST64_DEF << SBUS_BURST64_SHIFT) | SBUS_BURST_DEF; 345 346 /* initialise the IOMMU */ 347 348 /* punch in our copies */ 349 sc->sc_is.is_pmaxaddr = IOMMU_MAXADDR(SBUS_IOMMU_BITS); 350 sc->sc_is.is_bustag = rman_get_bustag(sc->sc_sysio_res); 351 sc->sc_is.is_bushandle = rman_get_bushandle(sc->sc_sysio_res); 352 sc->sc_is.is_iommu = SBR_IOMMU; 353 sc->sc_is.is_dtag = SBR_IOMMU_TLB_TAG_DIAG; 354 sc->sc_is.is_ddram = SBR_IOMMU_TLB_DATA_DIAG; 355 sc->sc_is.is_dqueue = SBR_IOMMU_QUEUE_DIAG; 356 sc->sc_is.is_dva = SBR_IOMMU_SVADIAG; 357 sc->sc_is.is_dtcmp = 0; 358 sc->sc_is.is_sb[0] = SBR_STRBUF; 359 sc->sc_is.is_sb[1] = 0; 360 361 /* 362 * Note: the SBus IOMMU ignores the high bits of an address, so a NULL 363 * DMA pointer will be translated by the first page of the IOTSB. 364 * To detect bugs we'll allocate and ignore the first entry. 365 */ 366 iommu_init(device_get_nameunit(dev), &sc->sc_is, 3, -1, 1); 367 368 /* Create the DMA tag. */ 369 if (bus_dma_tag_create(bus_get_dma_tag(dev), 8, 0, 370 sc->sc_is.is_pmaxaddr, ~0, NULL, NULL, sc->sc_is.is_pmaxaddr, 371 0xff, 0xffffffff, 0, NULL, NULL, &sc->sc_cdmatag) != 0) 372 panic("%s: bus_dma_tag_create failed", __func__); 373 /* Customize the tag. */ 374 sc->sc_cdmatag->dt_cookie = &sc->sc_is; 375 sc->sc_cdmatag->dt_mt = &iommu_dma_methods; 376 377 /* 378 * Hunt through all the interrupt mapping regs and register our 379 * interrupt controller for the corresponding interrupt vectors. 380 * We do this early in order to be able to catch stray interrupts. 381 */ 382 for (i = 0; i <= SBUS_MAX_INO; i++) { 383 if (sbus_find_intrmap(sc, i, &intrmap, &intrclr) == 0) 384 continue; 385 sica = malloc(sizeof(*sica), M_DEVBUF, M_NOWAIT); 386 if (sica == NULL) 387 panic("%s: could not allocate interrupt controller " 388 "argument", __func__); 389 sica->sica_sc = sc; 390 sica->sica_map = intrmap; 391 sica->sica_clr = intrclr; 392 #ifdef SBUS_DEBUG 393 device_printf(dev, 394 "intr map (INO %d, %s) %#lx: %#lx, clr: %#lx\n", 395 i, (i & INTMAP_OBIO_MASK) == 0 ? "SBus slot" : "OBIO", 396 (u_long)intrmap, (u_long)SYSIO_READ8(sc, intrmap), 397 (u_long)intrclr); 398 #endif 399 j = intr_controller_register(INTMAP_VEC(sc->sc_ign, i), 400 &sbus_ic, sica); 401 if (j != 0) 402 device_printf(dev, "could not register interrupt " 403 "controller for INO %d (%d)\n", i, j); 404 } 405 406 /* Enable the over-temperature and power-fail interrupts. */ 407 i = 4; 408 sc->sc_ot_ires = bus_alloc_resource_any(dev, SYS_RES_IRQ, &i, 409 RF_ACTIVE); 410 if (sc->sc_ot_ires == NULL || 411 INTIGN(vec = rman_get_start(sc->sc_ot_ires)) != sc->sc_ign || 412 INTVEC(SYSIO_READ8(sc, SBR_THERM_INT_MAP)) != vec || 413 intr_vectors[vec].iv_ic != &sbus_ic || 414 bus_setup_intr(dev, sc->sc_ot_ires, INTR_TYPE_MISC | INTR_BRIDGE | INTR_MPSAFE, 415 NULL, sbus_overtemp, sc, &sc->sc_ot_ihand) != 0) 416 panic("%s: failed to set up temperature interrupt", __func__); 417 i = 3; 418 sc->sc_pf_ires = bus_alloc_resource_any(dev, SYS_RES_IRQ, &i, 419 RF_ACTIVE); 420 if (sc->sc_pf_ires == NULL || 421 INTIGN(vec = rman_get_start(sc->sc_pf_ires)) != sc->sc_ign || 422 INTVEC(SYSIO_READ8(sc, SBR_POWER_INT_MAP)) != vec || 423 intr_vectors[vec].iv_ic != &sbus_ic || 424 bus_setup_intr(dev, sc->sc_pf_ires, INTR_TYPE_MISC | INTR_BRIDGE | INTR_MPSAFE, 425 NULL, sbus_pwrfail, sc, &sc->sc_pf_ihand) != 0) 426 panic("%s: failed to set up power fail interrupt", __func__); 427 428 /* Initialize the counter-timer. */ 429 sparc64_counter_init(device_get_nameunit(dev), 430 rman_get_bustag(sc->sc_sysio_res), 431 rman_get_bushandle(sc->sc_sysio_res), SBR_TC0); 432 433 /* 434 * Loop through ROM children, fixing any relative addresses 435 * and then configuring each device. 436 */ 437 for (child = OF_child(node); child != 0; child = OF_peer(child)) { 438 if ((sdi = sbus_setup_dinfo(dev, sc, child)) == NULL) 439 continue; 440 /* 441 * For devices where there are variants that are actually 442 * split into two SBus devices (as opposed to the first 443 * half of the device being a SBus device and the second 444 * half hanging off of the first one) like 'auxio' and 445 * 'SUNW,fdtwo' or 'dma' and 'esp' probe the SBus device 446 * which is a prerequisite to the driver attaching to the 447 * second one with a lower order. Saves us from dealing 448 * with different probe orders in the respective device 449 * drivers which generally is more hackish. 450 */ 451 cdev = device_add_child_ordered(dev, (OF_child(child) == 0 && 452 sbus_inlist(sdi->sdi_obdinfo.obd_name, sbus_order_first)) ? 453 SBUS_ORDER_FIRST : SBUS_ORDER_NORMAL, NULL, -1); 454 if (cdev == NULL) { 455 device_printf(dev, 456 "<%s>: device_add_child_ordered failed\n", 457 sdi->sdi_obdinfo.obd_name); 458 sbus_destroy_dinfo(sdi); 459 continue; 460 } 461 device_set_ivars(cdev, sdi); 462 } 463 return (bus_generic_attach(dev)); 464 } 465 466 static struct sbus_devinfo * 467 sbus_setup_dinfo(device_t dev, struct sbus_softc *sc, phandle_t node) 468 { 469 struct sbus_devinfo *sdi; 470 struct sbus_regs *reg; 471 u_int32_t base, iv, *intr; 472 int i, nreg, nintr, slot, rslot; 473 474 sdi = malloc(sizeof(*sdi), M_DEVBUF, M_ZERO | M_WAITOK); 475 if (ofw_bus_gen_setup_devinfo(&sdi->sdi_obdinfo, node) != 0) { 476 free(sdi, M_DEVBUF); 477 return (NULL); 478 } 479 resource_list_init(&sdi->sdi_rl); 480 slot = -1; 481 nreg = OF_getprop_alloc_multi(node, "reg", sizeof(*reg), (void **)®); 482 if (nreg == -1) { 483 if (sdi->sdi_obdinfo.obd_type == NULL || 484 strcmp(sdi->sdi_obdinfo.obd_type, "hierarchical") != 0) { 485 device_printf(dev, "<%s>: incomplete\n", 486 sdi->sdi_obdinfo.obd_name); 487 goto fail; 488 } 489 } else { 490 for (i = 0; i < nreg; i++) { 491 base = reg[i].sbr_offset; 492 if (SBUS_ABS(base)) { 493 rslot = SBUS_ABS_TO_SLOT(base); 494 base = SBUS_ABS_TO_OFFSET(base); 495 } else 496 rslot = reg[i].sbr_slot; 497 if (slot != -1 && slot != rslot) { 498 device_printf(dev, "<%s>: multiple slots\n", 499 sdi->sdi_obdinfo.obd_name); 500 OF_prop_free(reg); 501 goto fail; 502 } 503 slot = rslot; 504 505 resource_list_add(&sdi->sdi_rl, SYS_RES_MEMORY, i, 506 base, base + reg[i].sbr_size, reg[i].sbr_size); 507 } 508 OF_prop_free(reg); 509 } 510 sdi->sdi_slot = slot; 511 512 /* 513 * The `interrupts' property contains the SBus interrupt level. 514 */ 515 nintr = OF_getprop_alloc_multi(node, "interrupts", sizeof(*intr), 516 (void **)&intr); 517 if (nintr != -1) { 518 for (i = 0; i < nintr; i++) { 519 iv = intr[i]; 520 /* 521 * SBus card devices need the slot number encoded into 522 * the vector as this is generally not done. 523 */ 524 if ((iv & INTMAP_OBIO_MASK) == 0) 525 iv |= slot << 3; 526 iv = INTMAP_VEC(sc->sc_ign, iv); 527 resource_list_add(&sdi->sdi_rl, SYS_RES_IRQ, i, 528 iv, iv, 1); 529 } 530 OF_prop_free(intr); 531 } 532 if (OF_getprop(node, "burst-sizes", &sdi->sdi_burstsz, 533 sizeof(sdi->sdi_burstsz)) == -1) 534 sdi->sdi_burstsz = sc->sc_burst; 535 else 536 sdi->sdi_burstsz &= sc->sc_burst; 537 if (OF_getprop(node, "clock-frequency", &sdi->sdi_clockfreq, 538 sizeof(sdi->sdi_clockfreq)) == -1) 539 sdi->sdi_clockfreq = sc->sc_clockfreq; 540 541 return (sdi); 542 543 fail: 544 sbus_destroy_dinfo(sdi); 545 return (NULL); 546 } 547 548 static void 549 sbus_destroy_dinfo(struct sbus_devinfo *dinfo) 550 { 551 552 resource_list_free(&dinfo->sdi_rl); 553 ofw_bus_gen_destroy_devinfo(&dinfo->sdi_obdinfo); 554 free(dinfo, M_DEVBUF); 555 } 556 557 static int 558 sbus_print_child(device_t dev, device_t child) 559 { 560 int rv; 561 562 rv = bus_print_child_header(dev, child); 563 rv += sbus_print_res(device_get_ivars(child)); 564 rv += bus_print_child_footer(dev, child); 565 return (rv); 566 } 567 568 static void 569 sbus_probe_nomatch(device_t dev, device_t child) 570 { 571 const char *type; 572 573 device_printf(dev, "<%s>", ofw_bus_get_name(child)); 574 sbus_print_res(device_get_ivars(child)); 575 type = ofw_bus_get_type(child); 576 printf(" type %s (no driver attached)\n", 577 type != NULL ? type : "unknown"); 578 } 579 580 static int 581 sbus_read_ivar(device_t dev, device_t child, int which, uintptr_t *result) 582 { 583 struct sbus_softc *sc; 584 struct sbus_devinfo *dinfo; 585 586 sc = device_get_softc(dev); 587 if ((dinfo = device_get_ivars(child)) == NULL) 588 return (ENOENT); 589 switch (which) { 590 case SBUS_IVAR_BURSTSZ: 591 *result = dinfo->sdi_burstsz; 592 break; 593 case SBUS_IVAR_CLOCKFREQ: 594 *result = dinfo->sdi_clockfreq; 595 break; 596 case SBUS_IVAR_IGN: 597 *result = sc->sc_ign; 598 break; 599 case SBUS_IVAR_SLOT: 600 *result = dinfo->sdi_slot; 601 break; 602 default: 603 return (ENOENT); 604 } 605 return (0); 606 } 607 608 static struct resource_list * 609 sbus_get_resource_list(device_t dev, device_t child) 610 { 611 struct sbus_devinfo *sdi; 612 613 sdi = device_get_ivars(child); 614 return (&sdi->sdi_rl); 615 } 616 617 static void 618 sbus_intr_enable(void *arg) 619 { 620 struct intr_vector *iv = arg; 621 struct sbus_icarg *sica = iv->iv_icarg; 622 623 SYSIO_WRITE8(sica->sica_sc, sica->sica_map, 624 INTMAP_ENABLE(iv->iv_vec, iv->iv_mid)); 625 } 626 627 static void 628 sbus_intr_disable(void *arg) 629 { 630 struct intr_vector *iv = arg; 631 struct sbus_icarg *sica = iv->iv_icarg; 632 633 SYSIO_WRITE8(sica->sica_sc, sica->sica_map, iv->iv_vec); 634 } 635 636 static void 637 sbus_intr_assign(void *arg) 638 { 639 struct intr_vector *iv = arg; 640 struct sbus_icarg *sica = iv->iv_icarg; 641 642 SYSIO_WRITE8(sica->sica_sc, sica->sica_map, INTMAP_TID( 643 SYSIO_READ8(sica->sica_sc, sica->sica_map), iv->iv_mid)); 644 } 645 646 static void 647 sbus_intr_clear(void *arg) 648 { 649 struct intr_vector *iv = arg; 650 struct sbus_icarg *sica = iv->iv_icarg; 651 652 SYSIO_WRITE8(sica->sica_sc, sica->sica_clr, INTCLR_IDLE); 653 } 654 655 static int 656 sbus_find_intrmap(struct sbus_softc *sc, u_int ino, bus_addr_t *intrmapptr, 657 bus_addr_t *intrclrptr) 658 { 659 bus_addr_t intrclr, intrmap; 660 int i; 661 662 if (ino > SBUS_MAX_INO) { 663 device_printf(sc->sc_dev, "out of range INO %d requested\n", 664 ino); 665 return (0); 666 } 667 668 if ((ino & INTMAP_OBIO_MASK) == 0) { 669 intrmap = SBR_SLOT0_INT_MAP + INTSLOT(ino) * 8; 670 intrclr = SBR_SLOT0_INT_CLR + 671 (INTSLOT(ino) * 8 * 8) + (INTPRI(ino) * 8); 672 } else { 673 intrclr = 0; 674 for (i = 0, intrmap = SBR_SCSI_INT_MAP; 675 intrmap <= SBR_RESERVED_INT_MAP; intrmap += 8, i++) { 676 if (INTVEC(SYSIO_READ8(sc, intrmap)) == 677 INTMAP_VEC(sc->sc_ign, ino)) { 678 intrclr = SBR_SCSI_INT_CLR + i * 8; 679 break; 680 } 681 } 682 if (intrclr == 0) 683 return (0); 684 } 685 if (intrmapptr != NULL) 686 *intrmapptr = intrmap; 687 if (intrclrptr != NULL) 688 *intrclrptr = intrclr; 689 return (1); 690 } 691 692 static int 693 sbus_setup_intr(device_t dev, device_t child, struct resource *ires, int flags, 694 driver_filter_t *filt, driver_intr_t *intr, void *arg, void **cookiep) 695 { 696 struct sbus_softc *sc; 697 u_long vec; 698 699 sc = device_get_softc(dev); 700 /* 701 * Make sure the vector is fully specified and we registered 702 * our interrupt controller for it. 703 */ 704 vec = rman_get_start(ires); 705 if (INTIGN(vec) != sc->sc_ign || intr_vectors[vec].iv_ic != &sbus_ic) { 706 device_printf(dev, "invalid interrupt vector 0x%lx\n", vec); 707 return (EINVAL); 708 } 709 return (bus_generic_setup_intr(dev, child, ires, flags, filt, intr, 710 arg, cookiep)); 711 } 712 713 static struct resource * 714 sbus_alloc_resource(device_t bus, device_t child, int type, int *rid, 715 rman_res_t start, rman_res_t end, rman_res_t count, u_int flags) 716 { 717 struct sbus_softc *sc; 718 struct rman *rm; 719 struct resource *rv; 720 struct resource_list *rl; 721 struct resource_list_entry *rle; 722 device_t schild; 723 bus_addr_t toffs; 724 bus_size_t tend; 725 int i, slot; 726 int isdefault, passthrough; 727 728 isdefault = RMAN_IS_DEFAULT_RANGE(start, end); 729 passthrough = (device_get_parent(child) != bus); 730 rle = NULL; 731 sc = device_get_softc(bus); 732 rl = BUS_GET_RESOURCE_LIST(bus, child); 733 switch (type) { 734 case SYS_RES_IRQ: 735 return (resource_list_alloc(rl, bus, child, type, rid, start, 736 end, count, flags)); 737 case SYS_RES_MEMORY: 738 if (!passthrough) { 739 rle = resource_list_find(rl, type, *rid); 740 if (rle == NULL) 741 return (NULL); 742 if (rle->res != NULL) 743 panic("%s: resource entry is busy", __func__); 744 if (isdefault) { 745 start = rle->start; 746 count = ulmax(count, rle->count); 747 end = ulmax(rle->end, start + count - 1); 748 } 749 } 750 rm = NULL; 751 schild = child; 752 while (device_get_parent(schild) != bus) 753 schild = device_get_parent(schild); 754 slot = sbus_get_slot(schild); 755 for (i = 0; i < sc->sc_nrange; i++) { 756 if (sc->sc_rd[i].rd_slot != slot || 757 start < sc->sc_rd[i].rd_coffset || 758 start > sc->sc_rd[i].rd_cend) 759 continue; 760 /* Disallow cross-range allocations. */ 761 if (end > sc->sc_rd[i].rd_cend) 762 return (NULL); 763 /* We've found the connection to the parent bus */ 764 toffs = start - sc->sc_rd[i].rd_coffset; 765 tend = end - sc->sc_rd[i].rd_coffset; 766 rm = &sc->sc_rd[i].rd_rman; 767 break; 768 } 769 if (rm == NULL) 770 return (NULL); 771 772 rv = rman_reserve_resource(rm, toffs, tend, count, flags & 773 ~RF_ACTIVE, child); 774 if (rv == NULL) 775 return (NULL); 776 rman_set_rid(rv, *rid); 777 778 if ((flags & RF_ACTIVE) != 0 && bus_activate_resource(child, 779 type, *rid, rv)) { 780 rman_release_resource(rv); 781 return (NULL); 782 } 783 if (!passthrough) 784 rle->res = rv; 785 return (rv); 786 default: 787 return (NULL); 788 } 789 } 790 791 static int 792 sbus_activate_resource(device_t bus, device_t child, int type, int rid, 793 struct resource *r) 794 { 795 struct sbus_softc *sc; 796 struct bus_space_tag *tag; 797 int i; 798 799 switch (type) { 800 case SYS_RES_IRQ: 801 return (bus_generic_activate_resource(bus, child, type, rid, 802 r)); 803 case SYS_RES_MEMORY: 804 sc = device_get_softc(bus); 805 for (i = 0; i < sc->sc_nrange; i++) { 806 if (rman_is_region_manager(r, 807 &sc->sc_rd[i].rd_rman) != 0) { 808 tag = sparc64_alloc_bus_tag(r, SBUS_BUS_SPACE); 809 if (tag == NULL) 810 return (ENOMEM); 811 rman_set_bustag(r, tag); 812 rman_set_bushandle(r, 813 sc->sc_rd[i].rd_bushandle + 814 rman_get_start(r)); 815 return (rman_activate_resource(r)); 816 } 817 } 818 /* FALLTHROUGH */ 819 default: 820 return (EINVAL); 821 } 822 } 823 824 static int 825 sbus_adjust_resource(device_t bus, device_t child, int type, 826 struct resource *r, rman_res_t start, rman_res_t end) 827 { 828 struct sbus_softc *sc; 829 int i; 830 831 if (type == SYS_RES_MEMORY) { 832 sc = device_get_softc(bus); 833 for (i = 0; i < sc->sc_nrange; i++) 834 if (rman_is_region_manager(r, 835 &sc->sc_rd[i].rd_rman) != 0) 836 return (rman_adjust_resource(r, start, end)); 837 return (EINVAL); 838 } 839 return (bus_generic_adjust_resource(bus, child, type, r, start, end)); 840 } 841 842 static int 843 sbus_release_resource(device_t bus, device_t child, int type, int rid, 844 struct resource *r) 845 { 846 struct resource_list *rl; 847 struct resource_list_entry *rle; 848 int error, passthrough; 849 850 passthrough = (device_get_parent(child) != bus); 851 rl = BUS_GET_RESOURCE_LIST(bus, child); 852 if (type == SYS_RES_MEMORY) { 853 if ((rman_get_flags(r) & RF_ACTIVE) != 0) { 854 error = bus_deactivate_resource(child, type, rid, r); 855 if (error) 856 return (error); 857 } 858 error = rman_release_resource(r); 859 if (error != 0) 860 return (error); 861 if (!passthrough) { 862 rle = resource_list_find(rl, type, rid); 863 KASSERT(rle != NULL, 864 ("%s: resource entry not found!", __func__)); 865 KASSERT(rle->res != NULL, 866 ("%s: resource entry is not busy", __func__)); 867 rle->res = NULL; 868 } 869 return (0); 870 } 871 return (resource_list_release(rl, bus, child, type, rid, r)); 872 } 873 874 static bus_dma_tag_t 875 sbus_get_dma_tag(device_t bus, device_t child) 876 { 877 struct sbus_softc *sc; 878 879 sc = device_get_softc(bus); 880 return (sc->sc_cdmatag); 881 } 882 883 static const struct ofw_bus_devinfo * 884 sbus_get_devinfo(device_t bus, device_t child) 885 { 886 struct sbus_devinfo *sdi; 887 888 sdi = device_get_ivars(child); 889 return (&sdi->sdi_obdinfo); 890 } 891 892 /* 893 * Handle an overtemp situation. 894 * 895 * SPARCs have temperature sensors which generate interrupts 896 * if the machine's temperature exceeds a certain threshold. 897 * This handles the interrupt and powers off the machine. 898 * The same needs to be done to PCI controller drivers. 899 */ 900 static void 901 sbus_overtemp(void *arg __unused) 902 { 903 static int shutdown; 904 905 /* As the interrupt is cleared we may be called multiple times. */ 906 if (shutdown != 0) 907 return; 908 shutdown++; 909 printf("DANGER: OVER TEMPERATURE detected\nShutting down NOW.\n"); 910 shutdown_nice(RB_POWEROFF); 911 } 912 913 /* Try to shut down in time in case of power failure. */ 914 static void 915 sbus_pwrfail(void *arg __unused) 916 { 917 static int shutdown; 918 919 /* As the interrupt is cleared we may be called multiple times. */ 920 if (shutdown != 0) 921 return; 922 shutdown++; 923 printf("Power failure detected\nShutting down NOW.\n"); 924 shutdown_nice(RB_POWEROFF); 925 } 926 927 static int 928 sbus_print_res(struct sbus_devinfo *sdi) 929 { 930 int rv; 931 932 rv = 0; 933 rv += resource_list_print_type(&sdi->sdi_rl, "mem", SYS_RES_MEMORY, 934 "%#jx"); 935 rv += resource_list_print_type(&sdi->sdi_rl, "irq", SYS_RES_IRQ, 936 "%jd"); 937 return (rv); 938 }
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