1 /*-
2 * Copyright (c) 1998 The NetBSD Foundation, Inc.
3 * All rights reserved.
4 *
5 * This code is derived from software contributed to The NetBSD Foundation
6 * by Paul Kranenburg.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. All advertising materials mentioning features or use of this software
17 * must display the following acknowledgement:
18 * This product includes software developed by the NetBSD
19 * Foundation, Inc. and its contributors.
20 * 4. Neither the name of The NetBSD Foundation nor the names of its
21 * contributors may be used to endorse or promote products derived
22 * from this software without specific prior written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
25 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
26 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
27 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
28 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 * POSSIBILITY OF SUCH DAMAGE.
35 */
36 /*
37 * Copyright (c) 1992, 1993
38 * The Regents of the University of California. All rights reserved.
39 *
40 * This software was developed by the Computer Systems Engineering group
41 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
42 * contributed to Berkeley.
43 *
44 * All advertising materials mentioning features or use of this software
45 * must display the following acknowledgement:
46 * This product includes software developed by the University of
47 * California, Lawrence Berkeley Laboratory.
48 *
49 * Redistribution and use in source and binary forms, with or without
50 * modification, are permitted provided that the following conditions
51 * are met:
52 * 1. Redistributions of source code must retain the above copyright
53 * notice, this list of conditions and the following disclaimer.
54 * 2. Redistributions in binary form must reproduce the above copyright
55 * notice, this list of conditions and the following disclaimer in the
56 * documentation and/or other materials provided with the distribution.
57 * 4. Neither the name of the University nor the names of its contributors
58 * may be used to endorse or promote products derived from this software
59 * without specific prior written permission.
60 *
61 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
62 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
63 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
64 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
65 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
66 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
67 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
68 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
69 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
70 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
71 * SUCH DAMAGE.
72 */
73 /*
74 * Copyright (c) 1999 Eduardo Horvath
75 * Copyright (c) 2002 by Thomas Moestl <tmm@FreeBSD.org>.
76 * All rights reserved.
77 *
78 * Redistribution and use in source and binary forms, with or without
79 * modification, are permitted provided that the following conditions
80 * are met:
81 * 1. Redistributions of source code must retain the above copyright
82 * notice, this list of conditions and the following disclaimer.
83 *
84 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND
85 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
86 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
87 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE
88 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
89 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
90 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
91 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
92 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
93 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
94 * SUCH DAMAGE.
95 *
96 * from: @(#)sbus.c 8.1 (Berkeley) 6/11/93
97 * from: NetBSD: sbus.c,v 1.46 2001/10/07 20:30:41 eeh Exp
98 *
99 * $FreeBSD: releng/5.3/sys/sparc64/sbus/sbus.c 133589 2004-08-12 17:41:33Z marius $
100 */
101
102 /*
103 * Sbus support.
104 */
105
106 #include <sys/param.h>
107 #include <sys/systm.h>
108 #include <sys/bus.h>
109 #include <sys/kernel.h>
110 #include <sys/malloc.h>
111 #include <sys/module.h>
112 #include <sys/pcpu.h>
113 #include <sys/reboot.h>
114
115 #include <dev/ofw/ofw_bus.h>
116 #include <dev/ofw/openfirm.h>
117
118 #include <machine/bus.h>
119 #include <machine/bus_private.h>
120 #include <machine/iommureg.h>
121 #include <machine/bus_common.h>
122 #include <machine/frame.h>
123 #include <machine/intr_machdep.h>
124 #include <machine/nexusvar.h>
125 #include <machine/ofw_upa.h>
126 #include <machine/resource.h>
127
128 #include <sys/rman.h>
129
130 #include <machine/iommuvar.h>
131
132 #include <sparc64/sbus/ofw_sbus.h>
133 #include <sparc64/sbus/sbusreg.h>
134 #include <sparc64/sbus/sbusvar.h>
135
136 #ifdef DEBUG
137 #define SDB_DVMA 0x1
138 #define SDB_INTR 0x2
139 int sbus_debug = 0;
140 #define DPRINTF(l, s) do { if (sbus_debug & l) printf s; } while (0)
141 #else
142 #define DPRINTF(l, s)
143 #endif
144
145 struct sbus_devinfo {
146 int sdi_burstsz;
147 char *sdi_compat; /* PROM compatible */
148 char *sdi_model; /* PROM model */
149 char *sdi_name; /* PROM name */
150 phandle_t sdi_node; /* PROM node */
151 int sdi_slot;
152 char *sdi_type; /* PROM device_type */
153
154 struct resource_list sdi_rl;
155 };
156
157 /* Range descriptor, allocated for each sc_range. */
158 struct sbus_rd {
159 bus_addr_t rd_poffset;
160 bus_addr_t rd_pend;
161 int rd_slot;
162 bus_addr_t rd_coffset;
163 bus_addr_t rd_cend;
164 struct rman rd_rman;
165 bus_space_handle_t rd_bushandle;
166 struct resource *rd_res;
167 };
168
169 struct sbus_softc {
170 bus_space_tag_t sc_bustag;
171 bus_space_handle_t sc_bushandle;
172 bus_dma_tag_t sc_dmatag;
173 bus_dma_tag_t sc_cdmatag;
174 bus_space_tag_t sc_cbustag;
175 int sc_clockfreq; /* clock frequency (in Hz) */
176 struct upa_regs *sc_reg;
177 int sc_nreg;
178 int sc_nrange;
179 struct sbus_rd *sc_rd;
180 int sc_burst; /* burst transfer sizes supported */
181 int *sc_intr_compat;/* `intr' property to sbus compat */
182
183 struct resource *sc_sysio_res;
184 int sc_ign; /* Interrupt group number for this sysio */
185 struct iommu_state sc_is; /* IOMMU state, see iommureg.h */
186
187 struct resource *sc_ot_ires;
188 void *sc_ot_ihand;
189 struct resource *sc_pf_ires;
190 void *sc_pf_ihand;
191 };
192
193 struct sbus_clr {
194 struct sbus_softc *scl_sc;
195 bus_addr_t scl_clr; /* clear register */
196 driver_intr_t *scl_handler; /* handler to call */
197 void *scl_arg; /* argument for the handler */
198 void *scl_cookie; /* interrupt cookie of parent bus */
199 };
200
201 #define SYSIO_READ8(sc, off) \
202 bus_space_read_8((sc)->sc_bustag, (sc)->sc_bushandle, (off))
203 #define SYSIO_WRITE8(sc, off, v) \
204 bus_space_write_8((sc)->sc_bustag, (sc)->sc_bushandle, (off), (v))
205
206 static int sbus_probe(device_t dev);
207 static int sbus_print_child(device_t dev, device_t child);
208 static void sbus_probe_nomatch(device_t dev, device_t child);
209 static int sbus_read_ivar(device_t, device_t, int, u_long *);
210 static struct resource_list *sbus_get_resource_list(device_t dev,
211 device_t child);
212 static int sbus_setup_intr(device_t, device_t, struct resource *, int,
213 driver_intr_t *, void *, void **);
214 static int sbus_teardown_intr(device_t, device_t, struct resource *, void *);
215 static struct resource *sbus_alloc_resource(device_t, device_t, int, int *,
216 u_long, u_long, u_long, u_int);
217 static int sbus_activate_resource(device_t, device_t, int, int,
218 struct resource *);
219 static int sbus_deactivate_resource(device_t, device_t, int, int,
220 struct resource *);
221 static int sbus_release_resource(device_t, device_t, int, int,
222 struct resource *);
223 static ofw_bus_get_compat_t sbus_get_compat;
224 static ofw_bus_get_model_t sbus_get_model;
225 static ofw_bus_get_name_t sbus_get_name;
226 static ofw_bus_get_node_t sbus_get_node;
227 static ofw_bus_get_type_t sbus_get_type;
228
229 static struct sbus_devinfo * sbus_setup_dinfo(struct sbus_softc *sc,
230 phandle_t node, char *name);
231 static void sbus_destroy_dinfo(struct sbus_devinfo *dinfo);
232 static void sbus_intr_stub(void *);
233 static bus_space_tag_t sbus_alloc_bustag(struct sbus_softc *);
234 static void sbus_overtemp(void *);
235 static void sbus_pwrfail(void *);
236
237 static device_method_t sbus_methods[] = {
238 /* Device interface */
239 DEVMETHOD(device_probe, sbus_probe),
240 DEVMETHOD(device_attach, bus_generic_attach),
241
242 /* Bus interface */
243 DEVMETHOD(bus_print_child, sbus_print_child),
244 DEVMETHOD(bus_probe_nomatch, sbus_probe_nomatch),
245 DEVMETHOD(bus_read_ivar, sbus_read_ivar),
246 DEVMETHOD(bus_setup_intr, sbus_setup_intr),
247 DEVMETHOD(bus_teardown_intr, sbus_teardown_intr),
248 DEVMETHOD(bus_alloc_resource, sbus_alloc_resource),
249 DEVMETHOD(bus_activate_resource, sbus_activate_resource),
250 DEVMETHOD(bus_deactivate_resource, sbus_deactivate_resource),
251 DEVMETHOD(bus_release_resource, sbus_release_resource),
252 DEVMETHOD(bus_get_resource_list, sbus_get_resource_list),
253 DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource),
254
255 /* ofw_bus interface */
256 DEVMETHOD(ofw_bus_get_compat, sbus_get_compat),
257 DEVMETHOD(ofw_bus_get_model, sbus_get_model),
258 DEVMETHOD(ofw_bus_get_name, sbus_get_name),
259 DEVMETHOD(ofw_bus_get_node, sbus_get_node),
260 DEVMETHOD(ofw_bus_get_type, sbus_get_type),
261
262 { 0, 0 }
263 };
264
265 static driver_t sbus_driver = {
266 "sbus",
267 sbus_methods,
268 sizeof(struct sbus_softc),
269 };
270
271 static devclass_t sbus_devclass;
272
273 DRIVER_MODULE(sbus, nexus, sbus_driver, sbus_devclass, 0, 0);
274
275 #define OFW_SBUS_TYPE "sbus"
276 #define OFW_SBUS_NAME "sbus"
277
278 static int
279 sbus_probe(device_t dev)
280 {
281 struct sbus_softc *sc = device_get_softc(dev);
282 struct sbus_devinfo *sdi;
283 struct sbus_ranges *range;
284 struct resource *res;
285 device_t cdev;
286 bus_addr_t phys;
287 bus_size_t size;
288 char *name, *cname, *t;
289 phandle_t child, node = nexus_get_node(dev);
290 u_int64_t mr;
291 int intr, clock, rid, vec, i;
292
293 t = nexus_get_device_type(dev);
294 if (((t == NULL || strcmp(t, OFW_SBUS_TYPE) != 0)) &&
295 strcmp(nexus_get_name(dev), OFW_SBUS_NAME) != 0)
296 return (ENXIO);
297 device_set_desc(dev, "U2S UPA-SBus bridge");
298
299 if ((sc->sc_nreg = OF_getprop_alloc(node, "reg", sizeof(*sc->sc_reg),
300 (void **)&sc->sc_reg)) == -1) {
301 panic("sbus_probe: error getting reg property");
302 }
303 if (sc->sc_nreg < 1)
304 panic("sbus_probe: bogus properties");
305 phys = UPA_REG_PHYS(&sc->sc_reg[0]);
306 size = UPA_REG_SIZE(&sc->sc_reg[0]);
307 rid = 0;
308 sc->sc_sysio_res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid, phys,
309 phys + size - 1, size, RF_ACTIVE);
310 if (sc->sc_sysio_res == NULL ||
311 rman_get_start(sc->sc_sysio_res) != phys)
312 panic("sbus_probe: can't allocate device memory");
313 sc->sc_bustag = rman_get_bustag(sc->sc_sysio_res);
314 sc->sc_bushandle = rman_get_bushandle(sc->sc_sysio_res);
315
316 if (OF_getprop(node, "interrupts", &intr, sizeof(intr)) == -1)
317 panic("sbus_probe: cannot get IGN");
318 sc->sc_ign = intr & INTMAP_IGN_MASK; /* Find interrupt group no */
319 sc->sc_cbustag = sbus_alloc_bustag(sc);
320
321 /*
322 * Record clock frequency for synchronous SCSI.
323 * IS THIS THE CORRECT DEFAULT??
324 */
325 if (OF_getprop(node, "clock-frequency", &clock, sizeof(clock)) == -1)
326 clock = 25000000;
327 sc->sc_clockfreq = clock;
328 clock /= 1000;
329 device_printf(dev, "clock %d.%03d MHz\n", clock / 1000, clock % 1000);
330
331 /*
332 * Collect address translations from the OBP.
333 */
334 if ((sc->sc_nrange = OF_getprop_alloc(node, "ranges",
335 sizeof(*range), (void **)&range)) == -1) {
336 panic("%s: error getting ranges property",
337 device_get_name(dev));
338 }
339 sc->sc_rd = (struct sbus_rd *)malloc(sizeof(*sc->sc_rd) * sc->sc_nrange,
340 M_DEVBUF, M_NOWAIT);
341 if (sc->sc_rd == NULL)
342 panic("sbus_probe: could not allocate rmans");
343 /*
344 * Preallocate all space that the SBus bridge decodes, so that nothing
345 * else gets in the way; set up rmans etc.
346 */
347 for (i = 0; i < sc->sc_nrange; i++) {
348 phys = range[i].poffset | ((bus_addr_t)range[i].pspace << 32);
349 size = range[i].size;
350 sc->sc_rd[i].rd_slot = range[i].cspace;
351 sc->sc_rd[i].rd_coffset = range[i].coffset;
352 sc->sc_rd[i].rd_cend = sc->sc_rd[i].rd_coffset + size;
353 rid = 0;
354 if ((res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid, phys,
355 phys + size - 1, size, RF_ACTIVE)) == NULL)
356 panic("sbus_probe: could not allocate decoded range");
357 sc->sc_rd[i].rd_bushandle = rman_get_bushandle(res);
358 sc->sc_rd[i].rd_rman.rm_type = RMAN_ARRAY;
359 sc->sc_rd[i].rd_rman.rm_descr = "SBus Device Memory";
360 if (rman_init(&sc->sc_rd[i].rd_rman) != 0 ||
361 rman_manage_region(&sc->sc_rd[i].rd_rman, 0, size) != 0)
362 panic("sbus_probe: failed to set up memory rman");
363 sc->sc_rd[i].rd_poffset = phys;
364 sc->sc_rd[i].rd_pend = phys + size;
365 sc->sc_rd[i].rd_res = res;
366 }
367 free(range, M_OFWPROP);
368
369 /*
370 * Get the SBus burst transfer size if burst transfers are supported.
371 * XXX: is the default correct?
372 */
373 if (OF_getprop(node, "burst-sizes", &sc->sc_burst,
374 sizeof(sc->sc_burst)) == -1 || sc->sc_burst == 0)
375 sc->sc_burst = SBUS_BURST_DEF;
376
377 /* initalise the IOMMU */
378
379 /* punch in our copies */
380 sc->sc_is.is_bustag = sc->sc_bustag;
381 sc->sc_is.is_bushandle = sc->sc_bushandle;
382 sc->sc_is.is_iommu = SBR_IOMMU;
383 sc->sc_is.is_dtag = SBR_IOMMU_TLB_TAG_DIAG;
384 sc->sc_is.is_ddram = SBR_IOMMU_TLB_DATA_DIAG;
385 sc->sc_is.is_dqueue = SBR_IOMMU_QUEUE_DIAG;
386 sc->sc_is.is_dva = SBR_IOMMU_SVADIAG;
387 sc->sc_is.is_dtcmp = 0;
388 sc->sc_is.is_sb[0] = SBR_STRBUF;
389 sc->sc_is.is_sb[1] = 0;
390
391 /* give us a nice name.. */
392 name = (char *)malloc(32, M_DEVBUF, M_NOWAIT);
393 if (name == 0)
394 panic("sbus_probe: couldn't malloc iommu name");
395 snprintf(name, 32, "%s dvma", device_get_name(dev));
396
397 /*
398 * Note: the SBus IOMMU ignores the high bits of an address, so a NULL
399 * DMA pointer will be translated by the first page of the IOTSB.
400 * To detect bugs we'll allocate and ignore the first entry.
401 */
402 iommu_init(name, &sc->sc_is, 3, -1, 1);
403
404 /* Create the DMA tag. */
405 sc->sc_dmatag = nexus_get_dmatag(dev);
406 if (bus_dma_tag_create(sc->sc_dmatag, 8, 1, 0, 0x3ffffffff, NULL, NULL,
407 0x3ffffffff, 0xff, 0xffffffff, 0, NULL, NULL, &sc->sc_cdmatag) != 0)
408 panic("bus_dma_tag_create failed");
409 /* Customize the tag. */
410 sc->sc_cdmatag->dt_cookie = &sc->sc_is;
411 sc->sc_cdmatag->dt_mt = &iommu_dma_methods;
412 /* XXX: register as root dma tag (kludge). */
413 sparc64_root_dma_tag = sc->sc_cdmatag;
414
415 /* Enable the over-temperature and power-fail intrrupts. */
416 rid = 0;
417 mr = SYSIO_READ8(sc, SBR_THERM_INT_MAP);
418 vec = INTVEC(mr);
419 if ((sc->sc_ot_ires = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, vec,
420 vec, 1, RF_ACTIVE)) == NULL)
421 panic("sbus_probe: failed to get temperature interrupt");
422 bus_setup_intr(dev, sc->sc_ot_ires, INTR_TYPE_MISC | INTR_FAST,
423 sbus_overtemp, sc, &sc->sc_ot_ihand);
424 SYSIO_WRITE8(sc, SBR_THERM_INT_MAP, INTMAP_ENABLE(mr, PCPU_GET(mid)));
425 rid = 0;
426 mr = SYSIO_READ8(sc, SBR_POWER_INT_MAP);
427 vec = INTVEC(mr);
428 if ((sc->sc_pf_ires = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, vec,
429 vec, 1, RF_ACTIVE)) == NULL)
430 panic("sbus_probe: failed to get power fail interrupt");
431 bus_setup_intr(dev, sc->sc_pf_ires, INTR_TYPE_MISC | INTR_FAST,
432 sbus_pwrfail, sc, &sc->sc_pf_ihand);
433 SYSIO_WRITE8(sc, SBR_POWER_INT_MAP, INTMAP_ENABLE(mr, PCPU_GET(mid)));
434
435 /* Initialize the counter-timer. */
436 sparc64_counter_init(sc->sc_bustag, sc->sc_bushandle, SBR_TC0);
437
438 /*
439 * Loop through ROM children, fixing any relative addresses
440 * and then configuring each device.
441 * `specials' is an array of device names that are treated
442 * specially:
443 */
444 for (child = OF_child(node); child != 0; child = OF_peer(child)) {
445 if ((OF_getprop_alloc(child, "name", 1, (void **)&cname)) == -1)
446 continue;
447
448 if ((sdi = sbus_setup_dinfo(sc, child, cname)) == NULL) {
449 device_printf(dev, "<%s>: incomplete\n", cname);
450 free(cname, M_OFWPROP);
451 continue;
452 }
453 if ((cdev = device_add_child(dev, NULL, -1)) == NULL)
454 panic("sbus_probe: device_add_child failed");
455 device_set_ivars(cdev, sdi);
456 }
457 return (0);
458 }
459
460 static struct sbus_devinfo *
461 sbus_setup_dinfo(struct sbus_softc *sc, phandle_t node, char *name)
462 {
463 struct sbus_devinfo *sdi;
464 struct sbus_regs *reg;
465 u_int32_t base, iv, *intr;
466 int i, nreg, nintr, slot, rslot;
467
468 sdi = malloc(sizeof(*sdi), M_DEVBUF, M_ZERO | M_WAITOK);
469 if (sdi == NULL)
470 return (NULL);
471 resource_list_init(&sdi->sdi_rl);
472 sdi->sdi_name = name;
473 sdi->sdi_node = node;
474 OF_getprop_alloc(node, "compatible", 1, (void **)&sdi->sdi_compat);
475 OF_getprop_alloc(node, "device_type", 1, (void **)&sdi->sdi_type);
476 OF_getprop_alloc(node, "model", 1, (void **)&sdi->sdi_model);
477 slot = -1;
478 nreg = OF_getprop_alloc(node, "reg", sizeof(*reg), (void **)®);
479 if (nreg == -1) {
480 if (sdi->sdi_type == NULL ||
481 strcmp(sdi->sdi_type, "hierarchical") != 0) {
482 sbus_destroy_dinfo(sdi);
483 return (NULL);
484 }
485 } else {
486 for (i = 0; i < nreg; i++) {
487 base = reg[i].sbr_offset;
488 if (SBUS_ABS(base)) {
489 rslot = SBUS_ABS_TO_SLOT(base);
490 base = SBUS_ABS_TO_OFFSET(base);
491 } else
492 rslot = reg[i].sbr_slot;
493 if (slot != -1 && slot != rslot)
494 panic("sbus_setup_dinfo: multiple slots");
495 slot = rslot;
496
497 resource_list_add(&sdi->sdi_rl, SYS_RES_MEMORY, i,
498 base, base + reg[i].sbr_size, reg[i].sbr_size);
499 }
500 free(reg, M_OFWPROP);
501 }
502 sdi->sdi_slot = slot;
503
504 /*
505 * The `interrupts' property contains the Sbus interrupt level.
506 */
507 nintr = OF_getprop_alloc(node, "interrupts", sizeof(*intr), (void **)&intr);
508 if (nintr != -1) {
509 for (i = 0; i < nintr; i++) {
510 iv = intr[i];
511 /*
512 * Sbus card devices need the slot number encoded into
513 * the vector as this is generally not done.
514 */
515 if ((iv & INTMAP_OBIO_MASK) == 0)
516 iv |= slot << 3;
517 /* Set the ign as appropriate. */
518 iv |= sc->sc_ign;
519 resource_list_add(&sdi->sdi_rl, SYS_RES_IRQ, i,
520 iv, iv, 1);
521 }
522 free(intr, M_OFWPROP);
523 }
524 if (OF_getprop(node, "burst-sizes", &sdi->sdi_burstsz,
525 sizeof(sdi->sdi_burstsz)) == -1)
526 sdi->sdi_burstsz = sc->sc_burst;
527 else
528 sdi->sdi_burstsz &= sc->sc_burst;
529
530 return (sdi);
531 }
532
533 /* Free everything except sdi_name, which is handled separately. */
534 static void
535 sbus_destroy_dinfo(struct sbus_devinfo *dinfo)
536 {
537
538 resource_list_free(&dinfo->sdi_rl);
539 if (dinfo->sdi_compat != NULL)
540 free(dinfo->sdi_compat, M_OFWPROP);
541 if (dinfo->sdi_model != NULL)
542 free(dinfo->sdi_model, M_OFWPROP);
543 if (dinfo->sdi_type != NULL)
544 free(dinfo->sdi_type, M_OFWPROP);
545 free(dinfo, M_DEVBUF);
546 }
547
548 static int
549 sbus_print_child(device_t dev, device_t child)
550 {
551 struct sbus_devinfo *dinfo;
552 struct resource_list *rl;
553 int rv;
554
555 dinfo = device_get_ivars(child);
556 rl = &dinfo->sdi_rl;
557 rv = bus_print_child_header(dev, child);
558 rv += resource_list_print_type(rl, "mem", SYS_RES_MEMORY, "%#lx");
559 rv += resource_list_print_type(rl, "irq", SYS_RES_IRQ, "%ld");
560 rv += bus_print_child_footer(dev, child);
561 return (rv);
562 }
563
564 static void
565 sbus_probe_nomatch(device_t dev, device_t child)
566 {
567 const char *type;
568
569 if ((type = ofw_bus_get_type(child)) == NULL)
570 type = "(unknown)";
571 device_printf(dev, "<%s>, type %s (no driver attached)\n",
572 ofw_bus_get_name(child), type);
573 }
574
575 static int
576 sbus_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
577 {
578 struct sbus_softc *sc = device_get_softc(dev);
579 struct sbus_devinfo *dinfo;
580
581 if ((dinfo = device_get_ivars(child)) == NULL)
582 return (ENOENT);
583 switch (which) {
584 case SBUS_IVAR_BURSTSZ:
585 *result = dinfo->sdi_burstsz;
586 break;
587 case SBUS_IVAR_CLOCKFREQ:
588 *result = sc->sc_clockfreq;
589 break;
590 case SBUS_IVAR_SLOT:
591 *result = dinfo->sdi_slot;
592 break;
593 default:
594 return (ENOENT);
595 }
596 return 0;
597 }
598
599 static struct resource_list *
600 sbus_get_resource_list(device_t dev, device_t child)
601 {
602 struct sbus_devinfo *sdi;
603
604 sdi = device_get_ivars(child);
605 return (&sdi->sdi_rl);
606 }
607
608 /* Write to the correct clr register, and call the actual handler. */
609 static void
610 sbus_intr_stub(void *arg)
611 {
612 struct sbus_clr *scl;
613
614 scl = (struct sbus_clr *)arg;
615 scl->scl_handler(scl->scl_arg);
616 SYSIO_WRITE8(scl->scl_sc, scl->scl_clr, 0);
617 }
618
619 static int
620 sbus_setup_intr(device_t dev, device_t child,
621 struct resource *ires, int flags, driver_intr_t *intr, void *arg,
622 void **cookiep)
623 {
624 struct sbus_softc *sc;
625 struct sbus_clr *scl;
626 bus_addr_t intrmapptr, intrclrptr, intrptr;
627 u_int64_t intrmap;
628 u_int32_t inr, slot;
629 int error, i;
630 long vec = rman_get_start(ires);
631
632 sc = (struct sbus_softc *)device_get_softc(dev);
633 scl = (struct sbus_clr *)malloc(sizeof(*scl), M_DEVBUF, M_NOWAIT);
634 if (scl == NULL)
635 return (0);
636 intrptr = intrmapptr = intrclrptr = 0;
637 intrmap = 0;
638 inr = INTVEC(vec);
639 if ((inr & INTMAP_OBIO_MASK) == 0) {
640 /*
641 * We're in an SBUS slot, register the map and clear
642 * intr registers.
643 */
644 slot = INTSLOT(vec);
645 intrmapptr = SBR_SLOT0_INT_MAP + slot * 8;
646 intrclrptr = SBR_SLOT0_INT_CLR +
647 (slot * 8 * 8) + (INTPRI(vec) * 8);
648 /* Enable the interrupt, insert IGN. */
649 intrmap = inr | sc->sc_ign;
650 } else {
651 intrptr = SBR_SCSI_INT_MAP;
652 /* Insert IGN */
653 inr |= sc->sc_ign;
654 for (i = 0; intrptr <= SBR_RESERVED_INT_MAP &&
655 INTVEC(intrmap = SYSIO_READ8(sc, intrptr)) !=
656 INTVEC(inr); intrptr += 8, i++)
657 ;
658 if (INTVEC(intrmap) == INTVEC(inr)) {
659 /* Register the map and clear intr registers */
660 intrmapptr = intrptr;
661 intrclrptr = SBR_SCSI_INT_CLR + i * 8;
662 /* Enable the interrupt */
663 } else
664 panic("sbus_setup_intr: IRQ not found!");
665 }
666
667 scl->scl_sc = sc;
668 scl->scl_arg = arg;
669 scl->scl_handler = intr;
670 scl->scl_clr = intrclrptr;
671 /* Disable the interrupt while we fiddle with it */
672 SYSIO_WRITE8(sc, intrmapptr, intrmap);
673 error = BUS_SETUP_INTR(device_get_parent(dev), child, ires, flags,
674 sbus_intr_stub, scl, cookiep);
675 if (error != 0) {
676 free(scl, M_DEVBUF);
677 return (error);
678 }
679 scl->scl_cookie = *cookiep;
680 *cookiep = scl;
681
682 /*
683 * Clear the interrupt, it might have been triggered before it was
684 * set up.
685 */
686 SYSIO_WRITE8(sc, intrclrptr, 0);
687 /*
688 * Enable the interrupt and program the target module now we have the
689 * handler installed.
690 */
691 SYSIO_WRITE8(sc, intrmapptr, INTMAP_ENABLE(intrmap, PCPU_GET(mid)));
692 return (error);
693 }
694
695 static int
696 sbus_teardown_intr(device_t dev, device_t child,
697 struct resource *vec, void *cookie)
698 {
699 struct sbus_clr *scl;
700 int error;
701
702 scl = (struct sbus_clr *)cookie;
703 error = BUS_TEARDOWN_INTR(device_get_parent(dev), child, vec,
704 scl->scl_cookie);
705 /*
706 * Don't disable the interrupt for now, so that stray interupts get
707 * detected...
708 */
709 if (error != 0)
710 free(scl, M_DEVBUF);
711 return (error);
712 }
713
714 /*
715 * There is no need to handle pass-throughs here; there are no bridges to
716 * SBuses.
717 */
718 static struct resource *
719 sbus_alloc_resource(device_t bus, device_t child, int type, int *rid,
720 u_long start, u_long end, u_long count, u_int flags)
721 {
722 struct sbus_softc *sc;
723 struct sbus_devinfo *sdi;
724 struct rman *rm;
725 struct resource *rv;
726 struct resource_list *rl;
727 struct resource_list_entry *rle;
728 bus_space_handle_t bh;
729 bus_addr_t toffs;
730 bus_size_t tend;
731 int i;
732 int isdefault = (start == 0UL && end == ~0UL);
733 int needactivate = flags & RF_ACTIVE;
734
735 sc = (struct sbus_softc *)device_get_softc(bus);
736 sdi = device_get_ivars(child);
737 rl = &sdi->sdi_rl;
738 rle = resource_list_find(rl, type, *rid);
739 if (rle == NULL)
740 return (NULL);
741 if (rle->res != NULL)
742 panic("sbus_alloc_resource: resource entry is busy");
743 if (isdefault) {
744 start = rle->start;
745 count = ulmax(count, rle->count);
746 end = ulmax(rle->end, start + count - 1);
747 }
748 switch (type) {
749 case SYS_RES_IRQ:
750 rv = BUS_ALLOC_RESOURCE(device_get_parent(bus), child, type,
751 rid, start, end, count, flags);
752 if (rv == NULL)
753 return (NULL);
754 break;
755 case SYS_RES_MEMORY:
756 rm = NULL;
757 bh = toffs = tend = 0;
758 for (i = 0; i < sc->sc_nrange; i++) {
759 if (sc->sc_rd[i].rd_slot != sdi->sdi_slot ||
760 start < sc->sc_rd[i].rd_coffset ||
761 start > sc->sc_rd[i].rd_cend)
762 continue;
763 /* Disallow cross-range allocations. */
764 if (end > sc->sc_rd[i].rd_cend)
765 return (NULL);
766 /* We've found the connection to the parent bus */
767 toffs = start - sc->sc_rd[i].rd_coffset;
768 tend = end - sc->sc_rd[i].rd_coffset;
769 rm = &sc->sc_rd[i].rd_rman;
770 bh = sc->sc_rd[i].rd_bushandle;
771 }
772 if (toffs == 0L)
773 return (NULL);
774 flags &= ~RF_ACTIVE;
775 rv = rman_reserve_resource(rm, toffs, tend, count, flags,
776 child);
777 if (rv == NULL)
778 return (NULL);
779 rman_set_bustag(rv, sc->sc_cbustag);
780 rman_set_bushandle(rv, bh + rman_get_start(rv));
781 if (needactivate) {
782 if (bus_activate_resource(child, type, *rid, rv)) {
783 rman_release_resource(rv);
784 return (NULL);
785 }
786 }
787 break;
788 default:
789 return (NULL);
790 }
791 rle->res = rv;
792 return (rv);
793 }
794
795 static int
796 sbus_activate_resource(device_t bus, device_t child, int type, int rid,
797 struct resource *r)
798 {
799
800 if (type == SYS_RES_IRQ) {
801 return (BUS_ACTIVATE_RESOURCE(device_get_parent(bus),
802 child, type, rid, r));
803 }
804 return (rman_activate_resource(r));
805 }
806
807 static int
808 sbus_deactivate_resource(device_t bus, device_t child, int type, int rid,
809 struct resource *r)
810 {
811
812 if (type == SYS_RES_IRQ) {
813 return (BUS_DEACTIVATE_RESOURCE(device_get_parent(bus),
814 child, type, rid, r));
815 }
816 return (rman_deactivate_resource(r));
817 }
818
819 static int
820 sbus_release_resource(device_t bus, device_t child, int type, int rid,
821 struct resource *r)
822 {
823 struct sbus_devinfo *sdi;
824 struct resource_list_entry *rle;
825 int error = 0;
826
827 if (type == SYS_RES_IRQ)
828 error = BUS_RELEASE_RESOURCE(device_get_parent(bus), child,
829 type, rid, r);
830 else {
831 if ((rman_get_flags(r) & RF_ACTIVE) != 0)
832 error = bus_deactivate_resource(child, type, rid, r);
833 if (error != 0)
834 return (error);
835 error = rman_release_resource(r);
836 }
837 if (error != 0)
838 return (error);
839 sdi = device_get_ivars(child);
840 rle = resource_list_find(&sdi->sdi_rl, type, rid);
841 if (rle == NULL)
842 panic("sbus_release_resource: can't find resource");
843 if (rle->res == NULL)
844 panic("sbus_release_resource: resource entry is not busy");
845 rle->res = NULL;
846 return (0);
847 }
848
849 /*
850 * Handle an overtemp situation.
851 *
852 * SPARCs have temperature sensors which generate interrupts
853 * if the machine's temperature exceeds a certain threshold.
854 * This handles the interrupt and powers off the machine.
855 * The same needs to be done to PCI controller drivers.
856 */
857 static void
858 sbus_overtemp(void *arg)
859 {
860
861 printf("DANGER: OVER TEMPERATURE detected\nShutting down NOW.\n");
862 shutdown_nice(RB_POWEROFF);
863 }
864
865 /* Try to shut down in time in case of power failure. */
866 static void
867 sbus_pwrfail(void *arg)
868 {
869
870 printf("Power failure detected\nShutting down NOW.\n");
871 shutdown_nice(0);
872 }
873
874 static bus_space_tag_t
875 sbus_alloc_bustag(struct sbus_softc *sc)
876 {
877 bus_space_tag_t sbt;
878
879 sbt = (bus_space_tag_t)malloc(sizeof(struct bus_space_tag), M_DEVBUF,
880 M_NOWAIT | M_ZERO);
881 if (sbt == NULL)
882 panic("sbus_alloc_bustag: out of memory");
883
884 bzero(sbt, sizeof *sbt);
885 sbt->bst_cookie = sc;
886 sbt->bst_parent = sc->sc_bustag;
887 sbt->bst_type = SBUS_BUS_SPACE;
888 return (sbt);
889 }
890
891 const char *
892 sbus_get_compat(device_t bus, device_t dev)
893 {
894 struct sbus_devinfo *dinfo;
895
896 dinfo = device_get_ivars(dev);
897 return (dinfo->sdi_compat);
898 }
899
900 const char *
901 sbus_get_model(device_t bus, device_t dev)
902 {
903 struct sbus_devinfo *dinfo;
904
905 dinfo = device_get_ivars(dev);
906 return (dinfo->sdi_model);
907 }
908
909 const char *
910 sbus_get_name(device_t bus, device_t dev)
911 {
912 struct sbus_devinfo *dinfo;
913
914 dinfo = device_get_ivars(dev);
915 return (dinfo->sdi_name);
916 }
917
918 static phandle_t
919 sbus_get_node(device_t bus, device_t dev)
920 {
921 struct sbus_devinfo *dinfo;
922
923 dinfo = device_get_ivars(dev);
924 return (dinfo->sdi_node);
925 }
926
927 const char *
928 sbus_get_type(device_t bus, device_t dev)
929 {
930 struct sbus_devinfo *dinfo;
931
932 dinfo = device_get_ivars(dev);
933 return (dinfo->sdi_type);
934 }
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