1 /*-
2 * Copyright (c) 1998 The NetBSD Foundation, Inc.
3 * All rights reserved.
4 *
5 * This code is derived from software contributed to The NetBSD Foundation
6 * by Paul Kranenburg.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. All advertising materials mentioning features or use of this software
17 * must display the following acknowledgement:
18 * This product includes software developed by the NetBSD
19 * Foundation, Inc. and its contributors.
20 * 4. Neither the name of The NetBSD Foundation nor the names of its
21 * contributors may be used to endorse or promote products derived
22 * from this software without specific prior written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
25 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
26 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
27 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
28 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 * POSSIBILITY OF SUCH DAMAGE.
35 */
36 /*-
37 * Copyright (c) 1992, 1993
38 * The Regents of the University of California. All rights reserved.
39 *
40 * This software was developed by the Computer Systems Engineering group
41 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
42 * contributed to Berkeley.
43 *
44 * All advertising materials mentioning features or use of this software
45 * must display the following acknowledgement:
46 * This product includes software developed by the University of
47 * California, Lawrence Berkeley Laboratory.
48 *
49 * Redistribution and use in source and binary forms, with or without
50 * modification, are permitted provided that the following conditions
51 * are met:
52 * 1. Redistributions of source code must retain the above copyright
53 * notice, this list of conditions and the following disclaimer.
54 * 2. Redistributions in binary form must reproduce the above copyright
55 * notice, this list of conditions and the following disclaimer in the
56 * documentation and/or other materials provided with the distribution.
57 * 4. Neither the name of the University nor the names of its contributors
58 * may be used to endorse or promote products derived from this software
59 * without specific prior written permission.
60 *
61 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
62 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
63 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
64 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
65 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
66 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
67 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
68 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
69 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
70 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
71 * SUCH DAMAGE.
72 */
73 /*-
74 * Copyright (c) 1999 Eduardo Horvath
75 * Copyright (c) 2002 by Thomas Moestl <tmm@FreeBSD.org>.
76 * All rights reserved.
77 *
78 * Redistribution and use in source and binary forms, with or without
79 * modification, are permitted provided that the following conditions
80 * are met:
81 * 1. Redistributions of source code must retain the above copyright
82 * notice, this list of conditions and the following disclaimer.
83 *
84 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND
85 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
86 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
87 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE
88 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
89 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
90 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
91 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
92 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
93 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
94 * SUCH DAMAGE.
95 *
96 * from: @(#)sbus.c 8.1 (Berkeley) 6/11/93
97 * from: NetBSD: sbus.c,v 1.46 2001/10/07 20:30:41 eeh Exp
98 */
99
100 #include <sys/cdefs.h>
101 __FBSDID("$FreeBSD: releng/6.1/sys/sparc64/sbus/sbus.c 155069 2006-01-30 22:30:51Z marius $");
102
103 /*
104 * SBus support.
105 */
106
107 #include <sys/param.h>
108 #include <sys/systm.h>
109 #include <sys/bus.h>
110 #include <sys/kernel.h>
111 #include <sys/malloc.h>
112 #include <sys/module.h>
113 #include <sys/pcpu.h>
114 #include <sys/reboot.h>
115
116 #include <dev/ofw/ofw_bus.h>
117 #include <dev/ofw/openfirm.h>
118
119 #include <machine/bus.h>
120 #include <machine/bus_private.h>
121 #include <machine/iommureg.h>
122 #include <machine/bus_common.h>
123 #include <machine/intr_machdep.h>
124 #include <machine/nexusvar.h>
125 #include <machine/ofw_upa.h>
126 #include <machine/resource.h>
127
128 #include <sys/rman.h>
129
130 #include <machine/iommuvar.h>
131
132 #include <sparc64/sbus/ofw_sbus.h>
133 #include <sparc64/sbus/sbusreg.h>
134 #include <sparc64/sbus/sbusvar.h>
135
136 struct sbus_devinfo {
137 int sdi_burstsz;
138 int sdi_clockfreq;
139 char *sdi_compat; /* PROM compatible */
140 char *sdi_model; /* PROM model */
141 char *sdi_name; /* PROM name */
142 phandle_t sdi_node; /* PROM node */
143 int sdi_slot;
144 char *sdi_type; /* PROM device_type */
145
146 struct resource_list sdi_rl;
147 };
148
149 /* Range descriptor, allocated for each sc_range. */
150 struct sbus_rd {
151 bus_addr_t rd_poffset;
152 bus_addr_t rd_pend;
153 int rd_slot;
154 bus_addr_t rd_coffset;
155 bus_addr_t rd_cend;
156 struct rman rd_rman;
157 bus_space_handle_t rd_bushandle;
158 struct resource *rd_res;
159 };
160
161 struct sbus_softc {
162 bus_space_tag_t sc_bustag;
163 bus_space_handle_t sc_bushandle;
164 bus_dma_tag_t sc_dmatag;
165 bus_dma_tag_t sc_cdmatag;
166 bus_space_tag_t sc_cbustag;
167 int sc_clockfreq; /* clock frequency (in Hz) */
168 struct upa_regs *sc_reg;
169 int sc_nreg;
170 int sc_nrange;
171 struct sbus_rd *sc_rd;
172 int sc_burst; /* burst transfer sizes supp. */
173
174 struct resource *sc_sysio_res;
175 int sc_ign; /* IGN for this sysio */
176 struct iommu_state sc_is; /* IOMMU state (iommuvar.h) */
177
178 struct resource *sc_ot_ires;
179 void *sc_ot_ihand;
180 struct resource *sc_pf_ires;
181 void *sc_pf_ihand;
182 };
183
184 struct sbus_clr {
185 struct sbus_softc *scl_sc;
186 bus_addr_t scl_clr; /* clear register */
187 driver_intr_t *scl_handler; /* handler to call */
188 void *scl_arg; /* argument for the handler */
189 void *scl_cookie; /* parent bus int. cookie */
190 };
191
192 #define SYSIO_READ8(sc, off) \
193 bus_space_read_8((sc)->sc_bustag, (sc)->sc_bushandle, (off))
194 #define SYSIO_WRITE8(sc, off, v) \
195 bus_space_write_8((sc)->sc_bustag, (sc)->sc_bushandle, (off), (v))
196
197 static device_probe_t sbus_probe;
198 static device_attach_t sbus_attach;
199 static bus_print_child_t sbus_print_child;
200 static bus_probe_nomatch_t sbus_probe_nomatch;
201 static bus_read_ivar_t sbus_read_ivar;
202 static bus_get_resource_list_t sbus_get_resource_list;
203 static bus_setup_intr_t sbus_setup_intr;
204 static bus_teardown_intr_t sbus_teardown_intr;
205 static bus_alloc_resource_t sbus_alloc_resource;
206 static bus_release_resource_t sbus_release_resource;
207 static bus_activate_resource_t sbus_activate_resource;
208 static bus_deactivate_resource_t sbus_deactivate_resource;
209 static ofw_bus_get_compat_t sbus_get_compat;
210 static ofw_bus_get_model_t sbus_get_model;
211 static ofw_bus_get_name_t sbus_get_name;
212 static ofw_bus_get_node_t sbus_get_node;
213 static ofw_bus_get_type_t sbus_get_type;
214
215 static int sbus_inlist(const char *, const char **);
216 static struct sbus_devinfo * sbus_setup_dinfo(struct sbus_softc *sc,
217 phandle_t node, char *name);
218 static void sbus_destroy_dinfo(struct sbus_devinfo *dinfo);
219 static void sbus_intr_stub(void *);
220 static bus_space_tag_t sbus_alloc_bustag(struct sbus_softc *);
221 static void sbus_overtemp(void *);
222 static void sbus_pwrfail(void *);
223
224 static device_method_t sbus_methods[] = {
225 /* Device interface */
226 DEVMETHOD(device_probe, sbus_probe),
227 DEVMETHOD(device_attach, sbus_attach),
228 DEVMETHOD(device_shutdown, bus_generic_shutdown),
229 DEVMETHOD(device_suspend, bus_generic_suspend),
230 DEVMETHOD(device_resume, bus_generic_resume),
231
232 /* Bus interface */
233 DEVMETHOD(bus_print_child, sbus_print_child),
234 DEVMETHOD(bus_probe_nomatch, sbus_probe_nomatch),
235 DEVMETHOD(bus_read_ivar, sbus_read_ivar),
236 DEVMETHOD(bus_setup_intr, sbus_setup_intr),
237 DEVMETHOD(bus_teardown_intr, sbus_teardown_intr),
238 DEVMETHOD(bus_alloc_resource, sbus_alloc_resource),
239 DEVMETHOD(bus_activate_resource, sbus_activate_resource),
240 DEVMETHOD(bus_deactivate_resource, sbus_deactivate_resource),
241 DEVMETHOD(bus_release_resource, sbus_release_resource),
242 DEVMETHOD(bus_get_resource_list, sbus_get_resource_list),
243 DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource),
244
245 /* ofw_bus interface */
246 DEVMETHOD(ofw_bus_get_compat, sbus_get_compat),
247 DEVMETHOD(ofw_bus_get_model, sbus_get_model),
248 DEVMETHOD(ofw_bus_get_name, sbus_get_name),
249 DEVMETHOD(ofw_bus_get_node, sbus_get_node),
250 DEVMETHOD(ofw_bus_get_type, sbus_get_type),
251
252 { 0, 0 }
253 };
254
255 static driver_t sbus_driver = {
256 "sbus",
257 sbus_methods,
258 sizeof(struct sbus_softc),
259 };
260
261 static devclass_t sbus_devclass;
262
263 DRIVER_MODULE(sbus, nexus, sbus_driver, sbus_devclass, 0, 0);
264
265 #define OFW_SBUS_TYPE "sbus"
266 #define OFW_SBUS_NAME "sbus"
267
268 static const char *sbus_order_first[] = {
269 "auxio",
270 "dma",
271 NULL
272 };
273
274 static int
275 sbus_inlist(const char *name, const char **list)
276 {
277 int i;
278
279 if (name == NULL)
280 return (0);
281 for (i = 0; list[i] != NULL; i++) {
282 if (strcmp(name, list[i]) == 0)
283 return (1);
284 }
285 return (0);
286 }
287
288 static int
289 sbus_probe(device_t dev)
290 {
291 char *t;
292
293 t = nexus_get_device_type(dev);
294 if (((t == NULL || strcmp(t, OFW_SBUS_TYPE) != 0)) &&
295 strcmp(nexus_get_name(dev), OFW_SBUS_NAME) != 0)
296 return (ENXIO);
297 device_set_desc(dev, "U2S UPA-SBus bridge");
298 return (0);
299 }
300
301 static int
302 sbus_attach(device_t dev)
303 {
304 struct sbus_softc *sc;
305 struct sbus_devinfo *sdi;
306 struct sbus_ranges *range;
307 struct resource *res;
308 device_t cdev;
309 bus_addr_t phys;
310 bus_size_t size;
311 char *name, *cname;
312 phandle_t child, node;
313 u_int64_t mr;
314 int intr, clock, rid, vec, i;
315
316 sc = device_get_softc(dev);
317 node = nexus_get_node(dev);
318
319 if ((sc->sc_nreg = OF_getprop_alloc(node, "reg", sizeof(*sc->sc_reg),
320 (void **)&sc->sc_reg)) == -1) {
321 panic("%s: error getting reg property", __func__);
322 }
323 if (sc->sc_nreg < 1)
324 panic("%s: bogus properties", __func__);
325 phys = UPA_REG_PHYS(&sc->sc_reg[0]);
326 size = UPA_REG_SIZE(&sc->sc_reg[0]);
327 rid = 0;
328 sc->sc_sysio_res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid, phys,
329 phys + size - 1, size, RF_ACTIVE);
330 if (sc->sc_sysio_res == NULL ||
331 rman_get_start(sc->sc_sysio_res) != phys)
332 panic("%s: cannot allocate device memory", __func__);
333 sc->sc_bustag = rman_get_bustag(sc->sc_sysio_res);
334 sc->sc_bushandle = rman_get_bushandle(sc->sc_sysio_res);
335
336 if (OF_getprop(node, "interrupts", &intr, sizeof(intr)) == -1)
337 panic("%s: cannot get IGN", __func__);
338 sc->sc_ign = (intr & INTMAP_IGN_MASK) >> INTMAP_IGN_SHIFT;
339 sc->sc_cbustag = sbus_alloc_bustag(sc);
340
341 /*
342 * Record clock frequency for synchronous SCSI.
343 * IS THIS THE CORRECT DEFAULT??
344 */
345 if (OF_getprop(node, "clock-frequency", &clock, sizeof(clock)) == -1)
346 clock = 25000000;
347 sc->sc_clockfreq = clock;
348 clock /= 1000;
349 device_printf(dev, "clock %d.%03d MHz\n", clock / 1000, clock % 1000);
350
351 /*
352 * Collect address translations from the OBP.
353 */
354 if ((sc->sc_nrange = OF_getprop_alloc(node, "ranges",
355 sizeof(*range), (void **)&range)) == -1) {
356 panic("%s: error getting ranges property", __func__);
357 }
358 sc->sc_rd = (struct sbus_rd *)malloc(sizeof(*sc->sc_rd) * sc->sc_nrange,
359 M_DEVBUF, M_NOWAIT);
360 if (sc->sc_rd == NULL)
361 panic("%s: cannot allocate rmans", __func__);
362 /*
363 * Preallocate all space that the SBus bridge decodes, so that nothing
364 * else gets in the way; set up rmans etc.
365 */
366 for (i = 0; i < sc->sc_nrange; i++) {
367 phys = range[i].poffset | ((bus_addr_t)range[i].pspace << 32);
368 size = range[i].size;
369 sc->sc_rd[i].rd_slot = range[i].cspace;
370 sc->sc_rd[i].rd_coffset = range[i].coffset;
371 sc->sc_rd[i].rd_cend = sc->sc_rd[i].rd_coffset + size;
372 rid = 0;
373 if ((res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid, phys,
374 phys + size - 1, size, RF_ACTIVE)) == NULL)
375 panic("%s: cannot allocate decoded range", __func__);
376 sc->sc_rd[i].rd_bushandle = rman_get_bushandle(res);
377 sc->sc_rd[i].rd_rman.rm_type = RMAN_ARRAY;
378 sc->sc_rd[i].rd_rman.rm_descr = "SBus Device Memory";
379 if (rman_init(&sc->sc_rd[i].rd_rman) != 0 ||
380 rman_manage_region(&sc->sc_rd[i].rd_rman, 0, size) != 0)
381 panic("%s: failed to set up memory rman", __func__);
382 sc->sc_rd[i].rd_poffset = phys;
383 sc->sc_rd[i].rd_pend = phys + size;
384 sc->sc_rd[i].rd_res = res;
385 }
386 free(range, M_OFWPROP);
387
388 /*
389 * Get the SBus burst transfer size if burst transfers are supported.
390 * XXX: is the default correct?
391 */
392 if (OF_getprop(node, "burst-sizes", &sc->sc_burst,
393 sizeof(sc->sc_burst)) == -1 || sc->sc_burst == 0)
394 sc->sc_burst = SBUS_BURST_DEF;
395
396 /* initalise the IOMMU */
397
398 /* punch in our copies */
399 sc->sc_is.is_bustag = sc->sc_bustag;
400 sc->sc_is.is_bushandle = sc->sc_bushandle;
401 sc->sc_is.is_iommu = SBR_IOMMU;
402 sc->sc_is.is_dtag = SBR_IOMMU_TLB_TAG_DIAG;
403 sc->sc_is.is_ddram = SBR_IOMMU_TLB_DATA_DIAG;
404 sc->sc_is.is_dqueue = SBR_IOMMU_QUEUE_DIAG;
405 sc->sc_is.is_dva = SBR_IOMMU_SVADIAG;
406 sc->sc_is.is_dtcmp = 0;
407 sc->sc_is.is_sb[0] = SBR_STRBUF;
408 sc->sc_is.is_sb[1] = 0;
409
410 /* give us a nice name.. */
411 name = (char *)malloc(32, M_DEVBUF, M_NOWAIT);
412 if (name == NULL)
413 panic("%s: cannot malloc iommu name", __func__);
414 snprintf(name, 32, "%s dvma", device_get_name(dev));
415
416 /*
417 * Note: the SBus IOMMU ignores the high bits of an address, so a NULL
418 * DMA pointer will be translated by the first page of the IOTSB.
419 * To detect bugs we'll allocate and ignore the first entry.
420 */
421 iommu_init(name, &sc->sc_is, 3, -1, 1);
422
423 /* Create the DMA tag. */
424 sc->sc_dmatag = nexus_get_dmatag(dev);
425 if (bus_dma_tag_create(sc->sc_dmatag, 8, 1, 0, 0x3ffffffff, NULL, NULL,
426 0x3ffffffff, 0xff, 0xffffffff, 0, NULL, NULL, &sc->sc_cdmatag) != 0)
427 panic("%s: bus_dma_tag_create failed", __func__);
428 /* Customize the tag. */
429 sc->sc_cdmatag->dt_cookie = &sc->sc_is;
430 sc->sc_cdmatag->dt_mt = &iommu_dma_methods;
431 /* XXX: register as root dma tag (kludge). */
432 sparc64_root_dma_tag = sc->sc_cdmatag;
433
434 /* Enable the over-temperature and power-fail interrupts. */
435 rid = 0;
436 mr = SYSIO_READ8(sc, SBR_THERM_INT_MAP);
437 vec = INTVEC(mr);
438 if ((sc->sc_ot_ires = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, vec,
439 vec, 1, RF_ACTIVE)) == NULL)
440 panic("%s: failed to get temperature interrupt", __func__);
441 bus_setup_intr(dev, sc->sc_ot_ires, INTR_TYPE_MISC | INTR_FAST,
442 sbus_overtemp, sc, &sc->sc_ot_ihand);
443 SYSIO_WRITE8(sc, SBR_THERM_INT_MAP, INTMAP_ENABLE(mr, PCPU_GET(mid)));
444 rid = 0;
445 mr = SYSIO_READ8(sc, SBR_POWER_INT_MAP);
446 vec = INTVEC(mr);
447 if ((sc->sc_pf_ires = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, vec,
448 vec, 1, RF_ACTIVE)) == NULL)
449 panic("%s: failed to get power fail interrupt", __func__);
450 bus_setup_intr(dev, sc->sc_pf_ires, INTR_TYPE_MISC | INTR_FAST,
451 sbus_pwrfail, sc, &sc->sc_pf_ihand);
452 SYSIO_WRITE8(sc, SBR_POWER_INT_MAP, INTMAP_ENABLE(mr, PCPU_GET(mid)));
453
454 /* Initialize the counter-timer. */
455 sparc64_counter_init(sc->sc_bustag, sc->sc_bushandle, SBR_TC0);
456
457 /*
458 * Loop through ROM children, fixing any relative addresses
459 * and then configuring each device.
460 */
461 for (child = OF_child(node); child != 0; child = OF_peer(child)) {
462 if ((OF_getprop_alloc(child, "name", 1, (void **)&cname)) == -1)
463 continue;
464
465 if ((sdi = sbus_setup_dinfo(sc, child, cname)) == NULL) {
466 device_printf(dev, "<%s>: incomplete\n", cname);
467 free(cname, M_OFWPROP);
468 continue;
469 }
470 /*
471 * For devices where there are variants that are actually
472 * split into two SBus devices (as opposed to the first
473 * half of the device being a SBus device and the second
474 * half hanging off of the first one) like 'auxio' and
475 * 'SUNW,fdtwo' or 'dma' and 'esp' probe the SBus device
476 * which is a prerequisite to the driver attaching to the
477 * second one with a lower order. Saves us from dealing
478 * with different probe orders in the respective device
479 * drivers which generally is more hackish.
480 */
481 cdev = device_add_child_ordered(dev, (OF_child(child) == 0 &&
482 sbus_inlist(cname, sbus_order_first)) ? SBUS_ORDER_FIRST :
483 SBUS_ORDER_NORMAL, NULL, -1);
484 if (cdev == NULL)
485 panic("%s: device_add_child_ordered failed", __func__);
486 device_set_ivars(cdev, sdi);
487 }
488 return (bus_generic_attach(dev));
489 }
490
491 static struct sbus_devinfo *
492 sbus_setup_dinfo(struct sbus_softc *sc, phandle_t node, char *name)
493 {
494 struct sbus_devinfo *sdi;
495 struct sbus_regs *reg;
496 u_int32_t base, iv, *intr;
497 int i, nreg, nintr, slot, rslot;
498
499 sdi = malloc(sizeof(*sdi), M_DEVBUF, M_ZERO | M_WAITOK);
500 if (sdi == NULL)
501 return (NULL);
502 resource_list_init(&sdi->sdi_rl);
503 sdi->sdi_name = name;
504 sdi->sdi_node = node;
505 OF_getprop_alloc(node, "compatible", 1, (void **)&sdi->sdi_compat);
506 OF_getprop_alloc(node, "device_type", 1, (void **)&sdi->sdi_type);
507 OF_getprop_alloc(node, "model", 1, (void **)&sdi->sdi_model);
508 slot = -1;
509 nreg = OF_getprop_alloc(node, "reg", sizeof(*reg), (void **)®);
510 if (nreg == -1) {
511 if (sdi->sdi_type == NULL ||
512 strcmp(sdi->sdi_type, "hierarchical") != 0) {
513 sbus_destroy_dinfo(sdi);
514 return (NULL);
515 }
516 } else {
517 for (i = 0; i < nreg; i++) {
518 base = reg[i].sbr_offset;
519 if (SBUS_ABS(base)) {
520 rslot = SBUS_ABS_TO_SLOT(base);
521 base = SBUS_ABS_TO_OFFSET(base);
522 } else
523 rslot = reg[i].sbr_slot;
524 if (slot != -1 && slot != rslot)
525 panic("%s: multiple slots", __func__);
526 slot = rslot;
527
528 resource_list_add(&sdi->sdi_rl, SYS_RES_MEMORY, i,
529 base, base + reg[i].sbr_size, reg[i].sbr_size);
530 }
531 free(reg, M_OFWPROP);
532 }
533 sdi->sdi_slot = slot;
534
535 /*
536 * The `interrupts' property contains the SBus interrupt level.
537 */
538 nintr = OF_getprop_alloc(node, "interrupts", sizeof(*intr),
539 (void **)&intr);
540 if (nintr != -1) {
541 for (i = 0; i < nintr; i++) {
542 iv = intr[i];
543 /*
544 * SBus card devices need the slot number encoded into
545 * the vector as this is generally not done.
546 */
547 if ((iv & INTMAP_OBIO_MASK) == 0)
548 iv |= slot << 3;
549 /* Set the ign as appropriate. */
550 iv |= sc->sc_ign << INTMAP_IGN_SHIFT;
551 resource_list_add(&sdi->sdi_rl, SYS_RES_IRQ, i,
552 iv, iv, 1);
553 }
554 free(intr, M_OFWPROP);
555 }
556 if (OF_getprop(node, "burst-sizes", &sdi->sdi_burstsz,
557 sizeof(sdi->sdi_burstsz)) == -1)
558 sdi->sdi_burstsz = sc->sc_burst;
559 else
560 sdi->sdi_burstsz &= sc->sc_burst;
561 if (OF_getprop(node, "clock-frequency", &sdi->sdi_clockfreq,
562 sizeof(sdi->sdi_clockfreq)) == -1)
563 sdi->sdi_clockfreq = sc->sc_clockfreq;
564
565 return (sdi);
566 }
567
568 /* Free everything except sdi_name, which is handled separately. */
569 static void
570 sbus_destroy_dinfo(struct sbus_devinfo *dinfo)
571 {
572
573 resource_list_free(&dinfo->sdi_rl);
574 if (dinfo->sdi_compat != NULL)
575 free(dinfo->sdi_compat, M_OFWPROP);
576 if (dinfo->sdi_model != NULL)
577 free(dinfo->sdi_model, M_OFWPROP);
578 if (dinfo->sdi_type != NULL)
579 free(dinfo->sdi_type, M_OFWPROP);
580 free(dinfo, M_DEVBUF);
581 }
582
583 static int
584 sbus_print_child(device_t dev, device_t child)
585 {
586 struct sbus_devinfo *dinfo;
587 struct resource_list *rl;
588 int rv;
589
590 dinfo = device_get_ivars(child);
591 rl = &dinfo->sdi_rl;
592 rv = bus_print_child_header(dev, child);
593 rv += resource_list_print_type(rl, "mem", SYS_RES_MEMORY, "%#lx");
594 rv += resource_list_print_type(rl, "irq", SYS_RES_IRQ, "%ld");
595 rv += bus_print_child_footer(dev, child);
596 return (rv);
597 }
598
599 static void
600 sbus_probe_nomatch(device_t dev, device_t child)
601 {
602 struct sbus_devinfo *dinfo;
603 struct resource_list *rl;
604
605 dinfo = device_get_ivars(child);
606 rl = &dinfo->sdi_rl;
607 device_printf(dev, "<%s>", dinfo->sdi_name);
608 resource_list_print_type(rl, "mem", SYS_RES_MEMORY, "%#lx");
609 resource_list_print_type(rl, "irq", SYS_RES_IRQ, "%ld");
610 printf(" type %s (no driver attached)\n",
611 dinfo->sdi_type != NULL ? dinfo->sdi_type : "unknown");
612 }
613
614 static int
615 sbus_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
616 {
617 struct sbus_softc *sc;
618 struct sbus_devinfo *dinfo;
619
620 sc = device_get_softc(dev);
621 if ((dinfo = device_get_ivars(child)) == NULL)
622 return (ENOENT);
623 switch (which) {
624 case SBUS_IVAR_BURSTSZ:
625 *result = dinfo->sdi_burstsz;
626 break;
627 case SBUS_IVAR_CLOCKFREQ:
628 *result = dinfo->sdi_clockfreq;
629 break;
630 case SBUS_IVAR_IGN:
631 *result = sc->sc_ign;
632 break;
633 case SBUS_IVAR_SLOT:
634 *result = dinfo->sdi_slot;
635 break;
636 default:
637 return (ENOENT);
638 }
639 return (0);
640 }
641
642 static struct resource_list *
643 sbus_get_resource_list(device_t dev, device_t child)
644 {
645 struct sbus_devinfo *sdi;
646
647 sdi = device_get_ivars(child);
648 return (&sdi->sdi_rl);
649 }
650
651 /* Write to the correct clr register, and call the actual handler. */
652 static void
653 sbus_intr_stub(void *arg)
654 {
655 struct sbus_clr *scl;
656
657 scl = (struct sbus_clr *)arg;
658 scl->scl_handler(scl->scl_arg);
659 SYSIO_WRITE8(scl->scl_sc, scl->scl_clr, 0);
660 }
661
662 static int
663 sbus_setup_intr(device_t dev, device_t child, struct resource *ires, int flags,
664 driver_intr_t *intr, void *arg, void **cookiep)
665 {
666 struct sbus_softc *sc;
667 struct sbus_clr *scl;
668 bus_addr_t intrmapptr, intrclrptr, intrptr;
669 u_int64_t intrmap;
670 u_int32_t inr, slot;
671 int error, i;
672 long vec = rman_get_start(ires);
673
674 sc = device_get_softc(dev);
675 scl = (struct sbus_clr *)malloc(sizeof(*scl), M_DEVBUF, M_NOWAIT);
676 if (scl == NULL)
677 return (0);
678 intrptr = intrmapptr = intrclrptr = 0;
679 intrmap = 0;
680 inr = INTVEC(vec);
681 if ((inr & INTMAP_OBIO_MASK) == 0) {
682 /*
683 * We're in an SBus slot, register the map and clear
684 * intr registers.
685 */
686 slot = INTSLOT(vec);
687 intrmapptr = SBR_SLOT0_INT_MAP + slot * 8;
688 intrclrptr = SBR_SLOT0_INT_CLR +
689 (slot * 8 * 8) + (INTPRI(vec) * 8);
690 /* Enable the interrupt, insert IGN. */
691 intrmap = inr | (sc->sc_ign << INTMAP_IGN_SHIFT);
692 } else {
693 intrptr = SBR_SCSI_INT_MAP;
694 /* Insert IGN */
695 inr |= sc->sc_ign << INTMAP_IGN_SHIFT;
696 for (i = 0; intrptr <= SBR_RESERVED_INT_MAP &&
697 INTVEC(intrmap = SYSIO_READ8(sc, intrptr)) !=
698 INTVEC(inr); intrptr += 8, i++)
699 ;
700 if (INTVEC(intrmap) == INTVEC(inr)) {
701 /* Register the map and clear intr registers */
702 intrmapptr = intrptr;
703 intrclrptr = SBR_SCSI_INT_CLR + i * 8;
704 /* Enable the interrupt */
705 } else
706 panic("%s: IRQ not found!", __func__);
707 }
708
709 scl->scl_sc = sc;
710 scl->scl_arg = arg;
711 scl->scl_handler = intr;
712 scl->scl_clr = intrclrptr;
713 /* Disable the interrupt while we fiddle with it */
714 SYSIO_WRITE8(sc, intrmapptr, intrmap);
715 error = BUS_SETUP_INTR(device_get_parent(dev), child, ires, flags,
716 sbus_intr_stub, scl, cookiep);
717 if (error != 0) {
718 free(scl, M_DEVBUF);
719 return (error);
720 }
721 scl->scl_cookie = *cookiep;
722 *cookiep = scl;
723
724 /*
725 * Clear the interrupt, it might have been triggered before it was
726 * set up.
727 */
728 SYSIO_WRITE8(sc, intrclrptr, 0);
729 /*
730 * Enable the interrupt and program the target module now we have the
731 * handler installed.
732 */
733 SYSIO_WRITE8(sc, intrmapptr, INTMAP_ENABLE(intrmap, PCPU_GET(mid)));
734 return (error);
735 }
736
737 static int
738 sbus_teardown_intr(device_t dev, device_t child,
739 struct resource *vec, void *cookie)
740 {
741 struct sbus_clr *scl;
742 int error;
743
744 scl = (struct sbus_clr *)cookie;
745 error = BUS_TEARDOWN_INTR(device_get_parent(dev), child, vec,
746 scl->scl_cookie);
747 /*
748 * Don't disable the interrupt for now, so that stray interrupts get
749 * detected...
750 */
751 if (error != 0)
752 free(scl, M_DEVBUF);
753 return (error);
754 }
755
756 static struct resource *
757 sbus_alloc_resource(device_t bus, device_t child, int type, int *rid,
758 u_long start, u_long end, u_long count, u_int flags)
759 {
760 struct sbus_softc *sc;
761 struct rman *rm;
762 struct resource *rv;
763 struct resource_list *rl;
764 struct resource_list_entry *rle;
765 device_t schild;
766 bus_space_handle_t bh;
767 bus_addr_t toffs;
768 bus_size_t tend;
769 int i, slot;
770 int isdefault, needactivate, passthrough;
771
772 isdefault = (start == 0UL && end == ~0UL);
773 needactivate = flags & RF_ACTIVE;
774 passthrough = (device_get_parent(child) != bus);
775 rle = NULL;
776 sc = device_get_softc(bus);
777 rl = BUS_GET_RESOURCE_LIST(bus, child);
778 switch (type) {
779 case SYS_RES_IRQ:
780 return (resource_list_alloc(rl, bus, child, type, rid, start,
781 end, count, flags));
782 case SYS_RES_MEMORY:
783 if (!passthrough) {
784 rle = resource_list_find(rl, type, *rid);
785 if (rle == NULL)
786 return (NULL);
787 if (rle->res != NULL)
788 panic("%s: resource entry is busy", __func__);
789 if (isdefault) {
790 start = rle->start;
791 count = ulmax(count, rle->count);
792 end = ulmax(rle->end, start + count - 1);
793 }
794 }
795 rm = NULL;
796 bh = toffs = tend = 0;
797 schild = child;
798 while (device_get_parent(schild) != bus)
799 schild = device_get_parent(child);
800 slot = sbus_get_slot(schild);
801 for (i = 0; i < sc->sc_nrange; i++) {
802 if (sc->sc_rd[i].rd_slot != slot ||
803 start < sc->sc_rd[i].rd_coffset ||
804 start > sc->sc_rd[i].rd_cend)
805 continue;
806 /* Disallow cross-range allocations. */
807 if (end > sc->sc_rd[i].rd_cend)
808 return (NULL);
809 /* We've found the connection to the parent bus */
810 toffs = start - sc->sc_rd[i].rd_coffset;
811 tend = end - sc->sc_rd[i].rd_coffset;
812 rm = &sc->sc_rd[i].rd_rman;
813 bh = sc->sc_rd[i].rd_bushandle;
814 }
815 if (toffs == 0L)
816 return (NULL);
817 flags &= ~RF_ACTIVE;
818 rv = rman_reserve_resource(rm, toffs, tend, count, flags,
819 child);
820 if (rv == NULL)
821 return (NULL);
822 rman_set_bustag(rv, sc->sc_cbustag);
823 rman_set_bushandle(rv, bh + rman_get_start(rv));
824 if (needactivate) {
825 if (bus_activate_resource(child, type, *rid, rv)) {
826 rman_release_resource(rv);
827 return (NULL);
828 }
829 }
830 if (!passthrough)
831 rle->res = rv;
832 return (rv);
833 default:
834 return (NULL);
835 }
836 }
837
838 static int
839 sbus_activate_resource(device_t bus, device_t child, int type, int rid,
840 struct resource *r)
841 {
842
843 if (type == SYS_RES_IRQ) {
844 return (BUS_ACTIVATE_RESOURCE(device_get_parent(bus),
845 child, type, rid, r));
846 }
847 return (rman_activate_resource(r));
848 }
849
850 static int
851 sbus_deactivate_resource(device_t bus, device_t child, int type, int rid,
852 struct resource *r)
853 {
854
855 if (type == SYS_RES_IRQ) {
856 return (BUS_DEACTIVATE_RESOURCE(device_get_parent(bus),
857 child, type, rid, r));
858 }
859 return (rman_deactivate_resource(r));
860 }
861
862 static int
863 sbus_release_resource(device_t bus, device_t child, int type, int rid,
864 struct resource *r)
865 {
866 struct resource_list *rl;
867 struct resource_list_entry *rle;
868 int error, passthrough;
869
870 passthrough = (device_get_parent(child) != bus);
871 rl = BUS_GET_RESOURCE_LIST(bus, child);
872 if (type == SYS_RES_IRQ)
873 return (resource_list_release(rl, bus, child, type, rid, r));
874 if ((rman_get_flags(r) & RF_ACTIVE) != 0) {
875 error = bus_deactivate_resource(child, type, rid, r);
876 if (error != 0)
877 return (error);
878 }
879 error = rman_release_resource(r);
880 if (error != 0 || passthrough)
881 return (error);
882 rle = resource_list_find(rl, type, rid);
883 if (rle == NULL)
884 panic("%s: cannot find resource", __func__);
885 if (rle->res == NULL)
886 panic("%s: resource entry is not busy", __func__);
887 rle->res = NULL;
888 return (0);
889 }
890
891 /*
892 * Handle an overtemp situation.
893 *
894 * SPARCs have temperature sensors which generate interrupts
895 * if the machine's temperature exceeds a certain threshold.
896 * This handles the interrupt and powers off the machine.
897 * The same needs to be done to PCI controller drivers.
898 */
899 static void
900 sbus_overtemp(void *arg)
901 {
902
903 printf("DANGER: OVER TEMPERATURE detected\nShutting down NOW.\n");
904 shutdown_nice(RB_POWEROFF);
905 }
906
907 /* Try to shut down in time in case of power failure. */
908 static void
909 sbus_pwrfail(void *arg)
910 {
911
912 printf("Power failure detected\nShutting down NOW.\n");
913 shutdown_nice(0);
914 }
915
916 static bus_space_tag_t
917 sbus_alloc_bustag(struct sbus_softc *sc)
918 {
919 bus_space_tag_t sbt;
920
921 sbt = (bus_space_tag_t)malloc(sizeof(struct bus_space_tag), M_DEVBUF,
922 M_NOWAIT | M_ZERO);
923 if (sbt == NULL)
924 panic("%s: out of memory", __func__);
925
926 sbt->bst_cookie = sc;
927 sbt->bst_parent = sc->sc_bustag;
928 sbt->bst_type = SBUS_BUS_SPACE;
929 return (sbt);
930 }
931
932 static const char *
933 sbus_get_compat(device_t bus, device_t dev)
934 {
935 struct sbus_devinfo *dinfo;
936
937 dinfo = device_get_ivars(dev);
938 return (dinfo->sdi_compat);
939 }
940
941 static const char *
942 sbus_get_model(device_t bus, device_t dev)
943 {
944 struct sbus_devinfo *dinfo;
945
946 dinfo = device_get_ivars(dev);
947 return (dinfo->sdi_model);
948 }
949
950 static const char *
951 sbus_get_name(device_t bus, device_t dev)
952 {
953 struct sbus_devinfo *dinfo;
954
955 dinfo = device_get_ivars(dev);
956 return (dinfo->sdi_name);
957 }
958
959 static phandle_t
960 sbus_get_node(device_t bus, device_t dev)
961 {
962 struct sbus_devinfo *dinfo;
963
964 dinfo = device_get_ivars(dev);
965 return (dinfo->sdi_node);
966 }
967
968 static const char *
969 sbus_get_type(device_t bus, device_t dev)
970 {
971 struct sbus_devinfo *dinfo;
972
973 dinfo = device_get_ivars(dev);
974 return (dinfo->sdi_type);
975 }
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