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sys/sparc64/sbus/sbus.c
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1 /*- 2 * Copyright (c) 1998 The NetBSD Foundation, Inc. 3 * All rights reserved. 4 * 5 * This code is derived from software contributed to The NetBSD Foundation 6 * by Paul Kranenburg. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by the NetBSD 19 * Foundation, Inc. and its contributors. 20 * 4. Neither the name of The NetBSD Foundation nor the names of its 21 * contributors may be used to endorse or promote products derived 22 * from this software without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 25 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 26 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 27 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 28 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 34 * POSSIBILITY OF SUCH DAMAGE. 35 */ 36 /*- 37 * Copyright (c) 1992, 1993 38 * The Regents of the University of California. All rights reserved. 39 * 40 * This software was developed by the Computer Systems Engineering group 41 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 42 * contributed to Berkeley. 43 * 44 * All advertising materials mentioning features or use of this software 45 * must display the following acknowledgement: 46 * This product includes software developed by the University of 47 * California, Lawrence Berkeley Laboratory. 48 * 49 * Redistribution and use in source and binary forms, with or without 50 * modification, are permitted provided that the following conditions 51 * are met: 52 * 1. Redistributions of source code must retain the above copyright 53 * notice, this list of conditions and the following disclaimer. 54 * 2. Redistributions in binary form must reproduce the above copyright 55 * notice, this list of conditions and the following disclaimer in the 56 * documentation and/or other materials provided with the distribution. 57 * 4. Neither the name of the University nor the names of its contributors 58 * may be used to endorse or promote products derived from this software 59 * without specific prior written permission. 60 * 61 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 62 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 63 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 64 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 65 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 66 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 67 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 68 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 69 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 70 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 71 * SUCH DAMAGE. 72 */ 73 /*- 74 * Copyright (c) 1999 Eduardo Horvath 75 * Copyright (c) 2002 by Thomas Moestl <tmm@FreeBSD.org>. 76 * All rights reserved. 77 * 78 * Redistribution and use in source and binary forms, with or without 79 * modification, are permitted provided that the following conditions 80 * are met: 81 * 1. Redistributions of source code must retain the above copyright 82 * notice, this list of conditions and the following disclaimer. 83 * 84 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND 85 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 86 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 87 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE 88 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 89 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 90 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 91 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 92 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 93 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 94 * SUCH DAMAGE. 95 * 96 * from: @(#)sbus.c 8.1 (Berkeley) 6/11/93 97 * from: NetBSD: sbus.c,v 1.46 2001/10/07 20:30:41 eeh Exp 98 */ 99 100 #include <sys/cdefs.h> 101 __FBSDID("$FreeBSD: releng/6.3/sys/sparc64/sbus/sbus.c 172427 2007-10-03 20:41:35Z jhb $"); 102 103 /* 104 * SBus support. 105 */ 106 107 #include <sys/param.h> 108 #include <sys/systm.h> 109 #include <sys/bus.h> 110 #include <sys/kernel.h> 111 #include <sys/malloc.h> 112 #include <sys/module.h> 113 #include <sys/pcpu.h> 114 #include <sys/reboot.h> 115 116 #include <dev/ofw/ofw_bus.h> 117 #include <dev/ofw/openfirm.h> 118 119 #include <machine/bus.h> 120 #include <machine/bus_private.h> 121 #include <machine/iommureg.h> 122 #include <machine/bus_common.h> 123 #include <machine/intr_machdep.h> 124 #include <machine/nexusvar.h> 125 #include <machine/ofw_upa.h> 126 #include <machine/resource.h> 127 128 #include <sys/rman.h> 129 130 #include <machine/iommuvar.h> 131 132 #include <sparc64/sbus/ofw_sbus.h> 133 #include <sparc64/sbus/sbusreg.h> 134 #include <sparc64/sbus/sbusvar.h> 135 136 struct sbus_devinfo { 137 int sdi_burstsz; 138 int sdi_clockfreq; 139 char *sdi_compat; /* PROM compatible */ 140 char *sdi_model; /* PROM model */ 141 char *sdi_name; /* PROM name */ 142 phandle_t sdi_node; /* PROM node */ 143 int sdi_slot; 144 char *sdi_type; /* PROM device_type */ 145 146 struct resource_list sdi_rl; 147 }; 148 149 /* Range descriptor, allocated for each sc_range. */ 150 struct sbus_rd { 151 bus_addr_t rd_poffset; 152 bus_addr_t rd_pend; 153 int rd_slot; 154 bus_addr_t rd_coffset; 155 bus_addr_t rd_cend; 156 struct rman rd_rman; 157 bus_space_handle_t rd_bushandle; 158 struct resource *rd_res; 159 }; 160 161 struct sbus_softc { 162 bus_space_tag_t sc_bustag; 163 bus_space_handle_t sc_bushandle; 164 bus_dma_tag_t sc_dmatag; 165 bus_dma_tag_t sc_cdmatag; 166 bus_space_tag_t sc_cbustag; 167 int sc_clockfreq; /* clock frequency (in Hz) */ 168 struct upa_regs *sc_reg; 169 int sc_nreg; 170 int sc_nrange; 171 struct sbus_rd *sc_rd; 172 int sc_burst; /* burst transfer sizes supp. */ 173 174 struct resource *sc_sysio_res; 175 int sc_ign; /* IGN for this sysio */ 176 struct iommu_state sc_is; /* IOMMU state (iommuvar.h) */ 177 178 struct resource *sc_ot_ires; 179 void *sc_ot_ihand; 180 struct resource *sc_pf_ires; 181 void *sc_pf_ihand; 182 }; 183 184 struct sbus_clr { 185 struct sbus_softc *scl_sc; 186 bus_addr_t scl_clr; /* clear register */ 187 driver_intr_t *scl_handler; /* handler to call */ 188 void *scl_arg; /* argument for the handler */ 189 void *scl_cookie; /* parent bus int. cookie */ 190 }; 191 192 #define SYSIO_READ8(sc, off) \ 193 bus_space_read_8((sc)->sc_bustag, (sc)->sc_bushandle, (off)) 194 #define SYSIO_WRITE8(sc, off, v) \ 195 bus_space_write_8((sc)->sc_bustag, (sc)->sc_bushandle, (off), (v)) 196 197 static device_probe_t sbus_probe; 198 static device_attach_t sbus_attach; 199 static bus_print_child_t sbus_print_child; 200 static bus_probe_nomatch_t sbus_probe_nomatch; 201 static bus_read_ivar_t sbus_read_ivar; 202 static bus_get_resource_list_t sbus_get_resource_list; 203 static bus_setup_intr_t sbus_setup_intr; 204 static bus_teardown_intr_t sbus_teardown_intr; 205 static bus_alloc_resource_t sbus_alloc_resource; 206 static bus_release_resource_t sbus_release_resource; 207 static bus_activate_resource_t sbus_activate_resource; 208 static bus_deactivate_resource_t sbus_deactivate_resource; 209 static ofw_bus_get_compat_t sbus_get_compat; 210 static ofw_bus_get_model_t sbus_get_model; 211 static ofw_bus_get_name_t sbus_get_name; 212 static ofw_bus_get_node_t sbus_get_node; 213 static ofw_bus_get_type_t sbus_get_type; 214 215 static int sbus_inlist(const char *, const char **); 216 static struct sbus_devinfo * sbus_setup_dinfo(struct sbus_softc *sc, 217 phandle_t node, char *name); 218 static void sbus_destroy_dinfo(struct sbus_devinfo *dinfo); 219 static void sbus_intr_stub(void *); 220 static bus_space_tag_t sbus_alloc_bustag(struct sbus_softc *); 221 static void sbus_overtemp(void *); 222 static void sbus_pwrfail(void *); 223 224 static device_method_t sbus_methods[] = { 225 /* Device interface */ 226 DEVMETHOD(device_probe, sbus_probe), 227 DEVMETHOD(device_attach, sbus_attach), 228 DEVMETHOD(device_shutdown, bus_generic_shutdown), 229 DEVMETHOD(device_suspend, bus_generic_suspend), 230 DEVMETHOD(device_resume, bus_generic_resume), 231 232 /* Bus interface */ 233 DEVMETHOD(bus_print_child, sbus_print_child), 234 DEVMETHOD(bus_probe_nomatch, sbus_probe_nomatch), 235 DEVMETHOD(bus_read_ivar, sbus_read_ivar), 236 DEVMETHOD(bus_setup_intr, sbus_setup_intr), 237 DEVMETHOD(bus_teardown_intr, sbus_teardown_intr), 238 DEVMETHOD(bus_alloc_resource, sbus_alloc_resource), 239 DEVMETHOD(bus_activate_resource, sbus_activate_resource), 240 DEVMETHOD(bus_deactivate_resource, sbus_deactivate_resource), 241 DEVMETHOD(bus_release_resource, sbus_release_resource), 242 DEVMETHOD(bus_get_resource_list, sbus_get_resource_list), 243 DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource), 244 245 /* ofw_bus interface */ 246 DEVMETHOD(ofw_bus_get_compat, sbus_get_compat), 247 DEVMETHOD(ofw_bus_get_model, sbus_get_model), 248 DEVMETHOD(ofw_bus_get_name, sbus_get_name), 249 DEVMETHOD(ofw_bus_get_node, sbus_get_node), 250 DEVMETHOD(ofw_bus_get_type, sbus_get_type), 251 252 { 0, 0 } 253 }; 254 255 static driver_t sbus_driver = { 256 "sbus", 257 sbus_methods, 258 sizeof(struct sbus_softc), 259 }; 260 261 static devclass_t sbus_devclass; 262 263 DRIVER_MODULE(sbus, nexus, sbus_driver, sbus_devclass, 0, 0); 264 265 #define OFW_SBUS_TYPE "sbus" 266 #define OFW_SBUS_NAME "sbus" 267 268 static const char *sbus_order_first[] = { 269 "auxio", 270 "dma", 271 NULL 272 }; 273 274 static int 275 sbus_inlist(const char *name, const char **list) 276 { 277 int i; 278 279 if (name == NULL) 280 return (0); 281 for (i = 0; list[i] != NULL; i++) { 282 if (strcmp(name, list[i]) == 0) 283 return (1); 284 } 285 return (0); 286 } 287 288 static int 289 sbus_probe(device_t dev) 290 { 291 char *t; 292 293 t = nexus_get_device_type(dev); 294 if (((t == NULL || strcmp(t, OFW_SBUS_TYPE) != 0)) && 295 strcmp(nexus_get_name(dev), OFW_SBUS_NAME) != 0) 296 return (ENXIO); 297 device_set_desc(dev, "U2S UPA-SBus bridge"); 298 return (0); 299 } 300 301 static int 302 sbus_attach(device_t dev) 303 { 304 struct sbus_softc *sc; 305 struct sbus_devinfo *sdi; 306 struct sbus_ranges *range; 307 struct resource *res; 308 device_t cdev; 309 bus_addr_t phys; 310 bus_size_t size; 311 char *name, *cname; 312 phandle_t child, node; 313 u_int64_t mr; 314 int intr, clock, rid, vec, i; 315 316 sc = device_get_softc(dev); 317 node = nexus_get_node(dev); 318 319 if ((sc->sc_nreg = OF_getprop_alloc(node, "reg", sizeof(*sc->sc_reg), 320 (void **)&sc->sc_reg)) == -1) { 321 panic("%s: error getting reg property", __func__); 322 } 323 if (sc->sc_nreg < 1) 324 panic("%s: bogus properties", __func__); 325 phys = UPA_REG_PHYS(&sc->sc_reg[0]); 326 size = UPA_REG_SIZE(&sc->sc_reg[0]); 327 rid = 0; 328 sc->sc_sysio_res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid, phys, 329 phys + size - 1, size, RF_ACTIVE); 330 if (sc->sc_sysio_res == NULL || 331 rman_get_start(sc->sc_sysio_res) != phys) 332 panic("%s: cannot allocate device memory", __func__); 333 sc->sc_bustag = rman_get_bustag(sc->sc_sysio_res); 334 sc->sc_bushandle = rman_get_bushandle(sc->sc_sysio_res); 335 336 if (OF_getprop(node, "interrupts", &intr, sizeof(intr)) == -1) 337 panic("%s: cannot get IGN", __func__); 338 sc->sc_ign = (intr & INTMAP_IGN_MASK) >> INTMAP_IGN_SHIFT; 339 sc->sc_cbustag = sbus_alloc_bustag(sc); 340 341 /* 342 * Record clock frequency for synchronous SCSI. 343 * IS THIS THE CORRECT DEFAULT?? 344 */ 345 if (OF_getprop(node, "clock-frequency", &clock, sizeof(clock)) == -1) 346 clock = 25000000; 347 sc->sc_clockfreq = clock; 348 clock /= 1000; 349 device_printf(dev, "clock %d.%03d MHz\n", clock / 1000, clock % 1000); 350 351 /* 352 * Collect address translations from the OBP. 353 */ 354 if ((sc->sc_nrange = OF_getprop_alloc(node, "ranges", 355 sizeof(*range), (void **)&range)) == -1) { 356 panic("%s: error getting ranges property", __func__); 357 } 358 sc->sc_rd = (struct sbus_rd *)malloc(sizeof(*sc->sc_rd) * sc->sc_nrange, 359 M_DEVBUF, M_NOWAIT); 360 if (sc->sc_rd == NULL) 361 panic("%s: cannot allocate rmans", __func__); 362 /* 363 * Preallocate all space that the SBus bridge decodes, so that nothing 364 * else gets in the way; set up rmans etc. 365 */ 366 for (i = 0; i < sc->sc_nrange; i++) { 367 phys = range[i].poffset | ((bus_addr_t)range[i].pspace << 32); 368 size = range[i].size; 369 sc->sc_rd[i].rd_slot = range[i].cspace; 370 sc->sc_rd[i].rd_coffset = range[i].coffset; 371 sc->sc_rd[i].rd_cend = sc->sc_rd[i].rd_coffset + size; 372 rid = 0; 373 if ((res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid, phys, 374 phys + size - 1, size, RF_ACTIVE)) == NULL) 375 panic("%s: cannot allocate decoded range", __func__); 376 sc->sc_rd[i].rd_bushandle = rman_get_bushandle(res); 377 sc->sc_rd[i].rd_rman.rm_type = RMAN_ARRAY; 378 sc->sc_rd[i].rd_rman.rm_descr = "SBus Device Memory"; 379 if (rman_init(&sc->sc_rd[i].rd_rman) != 0 || 380 rman_manage_region(&sc->sc_rd[i].rd_rman, 0, size) != 0) 381 panic("%s: failed to set up memory rman", __func__); 382 sc->sc_rd[i].rd_poffset = phys; 383 sc->sc_rd[i].rd_pend = phys + size; 384 sc->sc_rd[i].rd_res = res; 385 } 386 free(range, M_OFWPROP); 387 388 /* 389 * Get the SBus burst transfer size if burst transfers are supported. 390 * XXX: is the default correct? 391 */ 392 if (OF_getprop(node, "burst-sizes", &sc->sc_burst, 393 sizeof(sc->sc_burst)) == -1 || sc->sc_burst == 0) 394 sc->sc_burst = SBUS_BURST_DEF; 395 396 /* initalise the IOMMU */ 397 398 /* punch in our copies */ 399 sc->sc_is.is_bustag = sc->sc_bustag; 400 sc->sc_is.is_bushandle = sc->sc_bushandle; 401 sc->sc_is.is_iommu = SBR_IOMMU; 402 sc->sc_is.is_dtag = SBR_IOMMU_TLB_TAG_DIAG; 403 sc->sc_is.is_ddram = SBR_IOMMU_TLB_DATA_DIAG; 404 sc->sc_is.is_dqueue = SBR_IOMMU_QUEUE_DIAG; 405 sc->sc_is.is_dva = SBR_IOMMU_SVADIAG; 406 sc->sc_is.is_dtcmp = 0; 407 sc->sc_is.is_sb[0] = SBR_STRBUF; 408 sc->sc_is.is_sb[1] = 0; 409 410 /* give us a nice name.. */ 411 name = (char *)malloc(32, M_DEVBUF, M_NOWAIT); 412 if (name == NULL) 413 panic("%s: cannot malloc iommu name", __func__); 414 snprintf(name, 32, "%s dvma", device_get_name(dev)); 415 416 /* 417 * Note: the SBus IOMMU ignores the high bits of an address, so a NULL 418 * DMA pointer will be translated by the first page of the IOTSB. 419 * To detect bugs we'll allocate and ignore the first entry. 420 */ 421 iommu_init(name, &sc->sc_is, 3, -1, 1); 422 423 /* Create the DMA tag. */ 424 sc->sc_dmatag = nexus_get_dmatag(dev); 425 if (bus_dma_tag_create(sc->sc_dmatag, 8, 1, 0, 0x3ffffffff, NULL, NULL, 426 0x3ffffffff, 0xff, 0xffffffff, 0, NULL, NULL, &sc->sc_cdmatag) != 0) 427 panic("%s: bus_dma_tag_create failed", __func__); 428 /* Customize the tag. */ 429 sc->sc_cdmatag->dt_cookie = &sc->sc_is; 430 sc->sc_cdmatag->dt_mt = &iommu_dma_methods; 431 /* XXX: register as root dma tag (kludge). */ 432 sparc64_root_dma_tag = sc->sc_cdmatag; 433 434 /* Enable the over-temperature and power-fail interrupts. */ 435 rid = 0; 436 mr = SYSIO_READ8(sc, SBR_THERM_INT_MAP); 437 vec = INTVEC(mr); 438 sc->sc_ot_ires = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, vec, 439 vec, 1, RF_ACTIVE); 440 if (sc->sc_ot_ires == NULL || 441 bus_setup_intr(dev, sc->sc_ot_ires, INTR_TYPE_MISC | INTR_FAST, 442 sbus_overtemp, sc, &sc->sc_ot_ihand) != 0) 443 panic("%s: failed to set up temperature interrupt", __func__); 444 SYSIO_WRITE8(sc, SBR_THERM_INT_MAP, INTMAP_ENABLE(mr, PCPU_GET(mid))); 445 rid = 0; 446 mr = SYSIO_READ8(sc, SBR_POWER_INT_MAP); 447 vec = INTVEC(mr); 448 sc->sc_pf_ires = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, vec, 449 vec, 1, RF_ACTIVE); 450 if (sc->sc_pf_ires == NULL || 451 bus_setup_intr(dev, sc->sc_pf_ires, INTR_TYPE_MISC | INTR_FAST, 452 sbus_pwrfail, sc, &sc->sc_pf_ihand) != 0) 453 panic("%s: failed to set up power fail interrupt", __func__); 454 SYSIO_WRITE8(sc, SBR_POWER_INT_MAP, INTMAP_ENABLE(mr, PCPU_GET(mid))); 455 456 /* Initialize the counter-timer. */ 457 sparc64_counter_init(sc->sc_bustag, sc->sc_bushandle, SBR_TC0); 458 459 /* 460 * Loop through ROM children, fixing any relative addresses 461 * and then configuring each device. 462 */ 463 for (child = OF_child(node); child != 0; child = OF_peer(child)) { 464 if ((OF_getprop_alloc(child, "name", 1, (void **)&cname)) == -1) 465 continue; 466 467 if ((sdi = sbus_setup_dinfo(sc, child, cname)) == NULL) { 468 device_printf(dev, "<%s>: incomplete\n", cname); 469 free(cname, M_OFWPROP); 470 continue; 471 } 472 /* 473 * For devices where there are variants that are actually 474 * split into two SBus devices (as opposed to the first 475 * half of the device being a SBus device and the second 476 * half hanging off of the first one) like 'auxio' and 477 * 'SUNW,fdtwo' or 'dma' and 'esp' probe the SBus device 478 * which is a prerequisite to the driver attaching to the 479 * second one with a lower order. Saves us from dealing 480 * with different probe orders in the respective device 481 * drivers which generally is more hackish. 482 */ 483 cdev = device_add_child_ordered(dev, (OF_child(child) == 0 && 484 sbus_inlist(cname, sbus_order_first)) ? SBUS_ORDER_FIRST : 485 SBUS_ORDER_NORMAL, NULL, -1); 486 if (cdev == NULL) 487 panic("%s: device_add_child_ordered failed", __func__); 488 device_set_ivars(cdev, sdi); 489 } 490 return (bus_generic_attach(dev)); 491 } 492 493 static struct sbus_devinfo * 494 sbus_setup_dinfo(struct sbus_softc *sc, phandle_t node, char *name) 495 { 496 struct sbus_devinfo *sdi; 497 struct sbus_regs *reg; 498 u_int32_t base, iv, *intr; 499 int i, nreg, nintr, slot, rslot; 500 501 sdi = malloc(sizeof(*sdi), M_DEVBUF, M_ZERO | M_WAITOK); 502 if (sdi == NULL) 503 return (NULL); 504 resource_list_init(&sdi->sdi_rl); 505 sdi->sdi_name = name; 506 sdi->sdi_node = node; 507 OF_getprop_alloc(node, "compatible", 1, (void **)&sdi->sdi_compat); 508 OF_getprop_alloc(node, "device_type", 1, (void **)&sdi->sdi_type); 509 OF_getprop_alloc(node, "model", 1, (void **)&sdi->sdi_model); 510 slot = -1; 511 nreg = OF_getprop_alloc(node, "reg", sizeof(*reg), (void **)®); 512 if (nreg == -1) { 513 if (sdi->sdi_type == NULL || 514 strcmp(sdi->sdi_type, "hierarchical") != 0) { 515 sbus_destroy_dinfo(sdi); 516 return (NULL); 517 } 518 } else { 519 for (i = 0; i < nreg; i++) { 520 base = reg[i].sbr_offset; 521 if (SBUS_ABS(base)) { 522 rslot = SBUS_ABS_TO_SLOT(base); 523 base = SBUS_ABS_TO_OFFSET(base); 524 } else 525 rslot = reg[i].sbr_slot; 526 if (slot != -1 && slot != rslot) 527 panic("%s: multiple slots", __func__); 528 slot = rslot; 529 530 resource_list_add(&sdi->sdi_rl, SYS_RES_MEMORY, i, 531 base, base + reg[i].sbr_size, reg[i].sbr_size); 532 } 533 free(reg, M_OFWPROP); 534 } 535 sdi->sdi_slot = slot; 536 537 /* 538 * The `interrupts' property contains the SBus interrupt level. 539 */ 540 nintr = OF_getprop_alloc(node, "interrupts", sizeof(*intr), 541 (void **)&intr); 542 if (nintr != -1) { 543 for (i = 0; i < nintr; i++) { 544 iv = intr[i]; 545 /* 546 * SBus card devices need the slot number encoded into 547 * the vector as this is generally not done. 548 */ 549 if ((iv & INTMAP_OBIO_MASK) == 0) 550 iv |= slot << 3; 551 /* Set the ign as appropriate. */ 552 iv |= sc->sc_ign << INTMAP_IGN_SHIFT; 553 resource_list_add(&sdi->sdi_rl, SYS_RES_IRQ, i, 554 iv, iv, 1); 555 } 556 free(intr, M_OFWPROP); 557 } 558 if (OF_getprop(node, "burst-sizes", &sdi->sdi_burstsz, 559 sizeof(sdi->sdi_burstsz)) == -1) 560 sdi->sdi_burstsz = sc->sc_burst; 561 else 562 sdi->sdi_burstsz &= sc->sc_burst; 563 if (OF_getprop(node, "clock-frequency", &sdi->sdi_clockfreq, 564 sizeof(sdi->sdi_clockfreq)) == -1) 565 sdi->sdi_clockfreq = sc->sc_clockfreq; 566 567 return (sdi); 568 } 569 570 /* Free everything except sdi_name, which is handled separately. */ 571 static void 572 sbus_destroy_dinfo(struct sbus_devinfo *dinfo) 573 { 574 575 resource_list_free(&dinfo->sdi_rl); 576 if (dinfo->sdi_compat != NULL) 577 free(dinfo->sdi_compat, M_OFWPROP); 578 if (dinfo->sdi_model != NULL) 579 free(dinfo->sdi_model, M_OFWPROP); 580 if (dinfo->sdi_type != NULL) 581 free(dinfo->sdi_type, M_OFWPROP); 582 free(dinfo, M_DEVBUF); 583 } 584 585 static int 586 sbus_print_child(device_t dev, device_t child) 587 { 588 struct sbus_devinfo *dinfo; 589 struct resource_list *rl; 590 int rv; 591 592 dinfo = device_get_ivars(child); 593 rl = &dinfo->sdi_rl; 594 rv = bus_print_child_header(dev, child); 595 rv += resource_list_print_type(rl, "mem", SYS_RES_MEMORY, "%#lx"); 596 rv += resource_list_print_type(rl, "irq", SYS_RES_IRQ, "%ld"); 597 rv += bus_print_child_footer(dev, child); 598 return (rv); 599 } 600 601 static void 602 sbus_probe_nomatch(device_t dev, device_t child) 603 { 604 struct sbus_devinfo *dinfo; 605 struct resource_list *rl; 606 607 dinfo = device_get_ivars(child); 608 rl = &dinfo->sdi_rl; 609 device_printf(dev, "<%s>", dinfo->sdi_name); 610 resource_list_print_type(rl, "mem", SYS_RES_MEMORY, "%#lx"); 611 resource_list_print_type(rl, "irq", SYS_RES_IRQ, "%ld"); 612 printf(" type %s (no driver attached)\n", 613 dinfo->sdi_type != NULL ? dinfo->sdi_type : "unknown"); 614 } 615 616 static int 617 sbus_read_ivar(device_t dev, device_t child, int which, uintptr_t *result) 618 { 619 struct sbus_softc *sc; 620 struct sbus_devinfo *dinfo; 621 622 sc = device_get_softc(dev); 623 if ((dinfo = device_get_ivars(child)) == NULL) 624 return (ENOENT); 625 switch (which) { 626 case SBUS_IVAR_BURSTSZ: 627 *result = dinfo->sdi_burstsz; 628 break; 629 case SBUS_IVAR_CLOCKFREQ: 630 *result = dinfo->sdi_clockfreq; 631 break; 632 case SBUS_IVAR_IGN: 633 *result = sc->sc_ign; 634 break; 635 case SBUS_IVAR_SLOT: 636 *result = dinfo->sdi_slot; 637 break; 638 default: 639 return (ENOENT); 640 } 641 return (0); 642 } 643 644 static struct resource_list * 645 sbus_get_resource_list(device_t dev, device_t child) 646 { 647 struct sbus_devinfo *sdi; 648 649 sdi = device_get_ivars(child); 650 return (&sdi->sdi_rl); 651 } 652 653 /* Write to the correct clr register, and call the actual handler. */ 654 static void 655 sbus_intr_stub(void *arg) 656 { 657 struct sbus_clr *scl; 658 659 scl = (struct sbus_clr *)arg; 660 scl->scl_handler(scl->scl_arg); 661 SYSIO_WRITE8(scl->scl_sc, scl->scl_clr, 0); 662 } 663 664 static int 665 sbus_setup_intr(device_t dev, device_t child, struct resource *ires, int flags, 666 driver_intr_t *intr, void *arg, void **cookiep) 667 { 668 struct sbus_softc *sc; 669 struct sbus_clr *scl; 670 bus_addr_t intrmapptr, intrclrptr, intrptr; 671 u_int64_t intrmap; 672 u_int32_t inr, slot; 673 int error, i; 674 long vec; 675 676 sc = device_get_softc(dev); 677 scl = (struct sbus_clr *)malloc(sizeof(*scl), M_DEVBUF, M_NOWAIT); 678 if (scl == NULL) 679 return (ENOMEM); 680 intrptr = intrmapptr = intrclrptr = 0; 681 intrmap = 0; 682 vec = rman_get_start(ires); 683 inr = INTVEC(vec); 684 if ((inr & INTMAP_OBIO_MASK) == 0) { 685 /* 686 * We're in an SBus slot, register the map and clear 687 * intr registers. 688 */ 689 slot = INTSLOT(vec); 690 intrmapptr = SBR_SLOT0_INT_MAP + slot * 8; 691 intrclrptr = SBR_SLOT0_INT_CLR + 692 (slot * 8 * 8) + (INTPRI(vec) * 8); 693 /* Enable the interrupt, insert IGN. */ 694 intrmap = inr | (sc->sc_ign << INTMAP_IGN_SHIFT); 695 } else { 696 intrptr = SBR_SCSI_INT_MAP; 697 /* Insert IGN */ 698 inr |= sc->sc_ign << INTMAP_IGN_SHIFT; 699 for (i = 0; intrptr <= SBR_RESERVED_INT_MAP && 700 INTVEC(intrmap = SYSIO_READ8(sc, intrptr)) != inr; 701 intrptr += 8, i++) 702 ; 703 if (INTVEC(intrmap) == inr) { 704 /* Register the map and clear intr registers */ 705 intrmapptr = intrptr; 706 intrclrptr = SBR_SCSI_INT_CLR + i * 8; 707 /* Enable the interrupt */ 708 } else 709 panic("%s: IRQ not found!", __func__); 710 } 711 712 scl->scl_sc = sc; 713 scl->scl_arg = arg; 714 scl->scl_handler = intr; 715 scl->scl_clr = intrclrptr; 716 /* Disable the interrupt while we fiddle with it */ 717 SYSIO_WRITE8(sc, intrmapptr, intrmap & ~INTMAP_V); 718 error = BUS_SETUP_INTR(device_get_parent(dev), child, ires, flags, 719 sbus_intr_stub, scl, cookiep); 720 if (error != 0) { 721 free(scl, M_DEVBUF); 722 return (error); 723 } 724 scl->scl_cookie = *cookiep; 725 *cookiep = scl; 726 727 /* 728 * Clear the interrupt, it might have been triggered before it was 729 * set up. 730 */ 731 SYSIO_WRITE8(sc, intrclrptr, 0); 732 /* 733 * Enable the interrupt and program the target module now we have the 734 * handler installed. 735 */ 736 SYSIO_WRITE8(sc, intrmapptr, INTMAP_ENABLE(intrmap, PCPU_GET(mid))); 737 return (error); 738 } 739 740 static int 741 sbus_teardown_intr(device_t dev, device_t child, 742 struct resource *vec, void *cookie) 743 { 744 struct sbus_clr *scl; 745 int error; 746 747 scl = (struct sbus_clr *)cookie; 748 error = BUS_TEARDOWN_INTR(device_get_parent(dev), child, vec, 749 scl->scl_cookie); 750 /* 751 * Don't disable the interrupt for now, so that stray interrupts get 752 * detected... 753 */ 754 if (error != 0) 755 free(scl, M_DEVBUF); 756 return (error); 757 } 758 759 static struct resource * 760 sbus_alloc_resource(device_t bus, device_t child, int type, int *rid, 761 u_long start, u_long end, u_long count, u_int flags) 762 { 763 struct sbus_softc *sc; 764 struct rman *rm; 765 struct resource *rv; 766 struct resource_list *rl; 767 struct resource_list_entry *rle; 768 device_t schild; 769 bus_space_handle_t bh; 770 bus_addr_t toffs; 771 bus_size_t tend; 772 int i, slot; 773 int isdefault, needactivate, passthrough; 774 775 isdefault = (start == 0UL && end == ~0UL); 776 needactivate = flags & RF_ACTIVE; 777 passthrough = (device_get_parent(child) != bus); 778 rle = NULL; 779 sc = device_get_softc(bus); 780 rl = BUS_GET_RESOURCE_LIST(bus, child); 781 switch (type) { 782 case SYS_RES_IRQ: 783 return (resource_list_alloc(rl, bus, child, type, rid, start, 784 end, count, flags)); 785 case SYS_RES_MEMORY: 786 if (!passthrough) { 787 rle = resource_list_find(rl, type, *rid); 788 if (rle == NULL) 789 return (NULL); 790 if (rle->res != NULL) 791 panic("%s: resource entry is busy", __func__); 792 if (isdefault) { 793 start = rle->start; 794 count = ulmax(count, rle->count); 795 end = ulmax(rle->end, start + count - 1); 796 } 797 } 798 rm = NULL; 799 bh = toffs = tend = 0; 800 schild = child; 801 while (device_get_parent(schild) != bus) 802 schild = device_get_parent(child); 803 slot = sbus_get_slot(schild); 804 for (i = 0; i < sc->sc_nrange; i++) { 805 if (sc->sc_rd[i].rd_slot != slot || 806 start < sc->sc_rd[i].rd_coffset || 807 start > sc->sc_rd[i].rd_cend) 808 continue; 809 /* Disallow cross-range allocations. */ 810 if (end > sc->sc_rd[i].rd_cend) 811 return (NULL); 812 /* We've found the connection to the parent bus */ 813 toffs = start - sc->sc_rd[i].rd_coffset; 814 tend = end - sc->sc_rd[i].rd_coffset; 815 rm = &sc->sc_rd[i].rd_rman; 816 bh = sc->sc_rd[i].rd_bushandle; 817 break; 818 } 819 if (rm == NULL) 820 return (NULL); 821 flags &= ~RF_ACTIVE; 822 rv = rman_reserve_resource(rm, toffs, tend, count, flags, 823 child); 824 if (rv == NULL) 825 return (NULL); 826 rman_set_rid(rv, *rid); 827 rman_set_bustag(rv, sc->sc_cbustag); 828 rman_set_bushandle(rv, bh + rman_get_start(rv)); 829 if (needactivate) { 830 if (bus_activate_resource(child, type, *rid, rv)) { 831 rman_release_resource(rv); 832 return (NULL); 833 } 834 } 835 if (!passthrough) 836 rle->res = rv; 837 return (rv); 838 default: 839 return (NULL); 840 } 841 } 842 843 static int 844 sbus_activate_resource(device_t bus, device_t child, int type, int rid, 845 struct resource *r) 846 { 847 void *p; 848 int error; 849 850 if (type == SYS_RES_IRQ) { 851 return (BUS_ACTIVATE_RESOURCE(device_get_parent(bus), 852 child, type, rid, r)); 853 } 854 if (type == SYS_RES_MEMORY) { 855 /* 856 * Need to memory-map the device space, as some drivers depend 857 * on the virtual address being set and useable. 858 */ 859 error = sparc64_bus_mem_map(rman_get_bustag(r), 860 rman_get_bushandle(r), rman_get_size(r), 0, 0, &p); 861 if (error != 0) 862 return (error); 863 rman_set_virtual(r, p); 864 } 865 return (rman_activate_resource(r)); 866 } 867 868 static int 869 sbus_deactivate_resource(device_t bus, device_t child, int type, int rid, 870 struct resource *r) 871 { 872 873 if (type == SYS_RES_IRQ) { 874 return (BUS_DEACTIVATE_RESOURCE(device_get_parent(bus), 875 child, type, rid, r)); 876 } 877 if (type == SYS_RES_MEMORY) { 878 sparc64_bus_mem_unmap(rman_get_virtual(r), rman_get_size(r)); 879 rman_set_virtual(r, NULL); 880 } 881 return (rman_deactivate_resource(r)); 882 } 883 884 static int 885 sbus_release_resource(device_t bus, device_t child, int type, int rid, 886 struct resource *r) 887 { 888 struct resource_list *rl; 889 struct resource_list_entry *rle; 890 int error, passthrough; 891 892 passthrough = (device_get_parent(child) != bus); 893 rl = BUS_GET_RESOURCE_LIST(bus, child); 894 if (type == SYS_RES_IRQ) 895 return (resource_list_release(rl, bus, child, type, rid, r)); 896 if ((rman_get_flags(r) & RF_ACTIVE) != 0) { 897 error = bus_deactivate_resource(child, type, rid, r); 898 if (error != 0) 899 return (error); 900 } 901 error = rman_release_resource(r); 902 if (error != 0 || passthrough) 903 return (error); 904 rle = resource_list_find(rl, type, rid); 905 if (rle == NULL) 906 panic("%s: cannot find resource", __func__); 907 if (rle->res == NULL) 908 panic("%s: resource entry is not busy", __func__); 909 rle->res = NULL; 910 return (0); 911 } 912 913 /* 914 * Handle an overtemp situation. 915 * 916 * SPARCs have temperature sensors which generate interrupts 917 * if the machine's temperature exceeds a certain threshold. 918 * This handles the interrupt and powers off the machine. 919 * The same needs to be done to PCI controller drivers. 920 */ 921 static void 922 sbus_overtemp(void *arg) 923 { 924 925 printf("DANGER: OVER TEMPERATURE detected\nShutting down NOW.\n"); 926 shutdown_nice(RB_POWEROFF); 927 } 928 929 /* Try to shut down in time in case of power failure. */ 930 static void 931 sbus_pwrfail(void *arg) 932 { 933 934 printf("Power failure detected\nShutting down NOW.\n"); 935 shutdown_nice(0); 936 } 937 938 static bus_space_tag_t 939 sbus_alloc_bustag(struct sbus_softc *sc) 940 { 941 bus_space_tag_t sbt; 942 943 sbt = (bus_space_tag_t)malloc(sizeof(struct bus_space_tag), M_DEVBUF, 944 M_NOWAIT | M_ZERO); 945 if (sbt == NULL) 946 panic("%s: out of memory", __func__); 947 948 sbt->bst_cookie = sc; 949 sbt->bst_parent = sc->sc_bustag; 950 sbt->bst_type = SBUS_BUS_SPACE; 951 return (sbt); 952 } 953 954 static const char * 955 sbus_get_compat(device_t bus, device_t dev) 956 { 957 struct sbus_devinfo *dinfo; 958 959 dinfo = device_get_ivars(dev); 960 return (dinfo->sdi_compat); 961 } 962 963 static const char * 964 sbus_get_model(device_t bus, device_t dev) 965 { 966 struct sbus_devinfo *dinfo; 967 968 dinfo = device_get_ivars(dev); 969 return (dinfo->sdi_model); 970 } 971 972 static const char * 973 sbus_get_name(device_t bus, device_t dev) 974 { 975 struct sbus_devinfo *dinfo; 976 977 dinfo = device_get_ivars(dev); 978 return (dinfo->sdi_name); 979 } 980 981 static phandle_t 982 sbus_get_node(device_t bus, device_t dev) 983 { 984 struct sbus_devinfo *dinfo; 985 986 dinfo = device_get_ivars(dev); 987 return (dinfo->sdi_node); 988 } 989 990 static const char * 991 sbus_get_type(device_t bus, device_t dev) 992 { 993 struct sbus_devinfo *dinfo; 994 995 dinfo = device_get_ivars(dev); 996 return (dinfo->sdi_type); 997 }
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