The Design and Implementation of the FreeBSD Operating System, Second Edition
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FreeBSD/Linux Kernel Cross Reference
sys/sparc64/sbus/sbus.c

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    1 /*-
    2  * Copyright (c) 1998 The NetBSD Foundation, Inc.
    3  * All rights reserved.
    4  *
    5  * This code is derived from software contributed to The NetBSD Foundation
    6  * by Paul Kranenburg.
    7  *
    8  * Redistribution and use in source and binary forms, with or without
    9  * modification, are permitted provided that the following conditions
   10  * are met:
   11  * 1. Redistributions of source code must retain the above copyright
   12  *    notice, this list of conditions and the following disclaimer.
   13  * 2. Redistributions in binary form must reproduce the above copyright
   14  *    notice, this list of conditions and the following disclaimer in the
   15  *    documentation and/or other materials provided with the distribution.
   16  * 3. All advertising materials mentioning features or use of this software
   17  *    must display the following acknowledgement:
   18  *        This product includes software developed by the NetBSD
   19  *        Foundation, Inc. and its contributors.
   20  * 4. Neither the name of The NetBSD Foundation nor the names of its
   21  *    contributors may be used to endorse or promote products derived
   22  *    from this software without specific prior written permission.
   23  *
   24  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
   25  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
   26  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
   27  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
   28  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
   29  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
   30  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
   31  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
   32  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
   33  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
   34  * POSSIBILITY OF SUCH DAMAGE.
   35  */
   36 /*-
   37  * Copyright (c) 1992, 1993
   38  *      The Regents of the University of California.  All rights reserved.
   39  *
   40  * This software was developed by the Computer Systems Engineering group
   41  * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
   42  * contributed to Berkeley.
   43  *
   44  * All advertising materials mentioning features or use of this software
   45  * must display the following acknowledgement:
   46  *      This product includes software developed by the University of
   47  *      California, Lawrence Berkeley Laboratory.
   48  *
   49  * Redistribution and use in source and binary forms, with or without
   50  * modification, are permitted provided that the following conditions
   51  * are met:
   52  * 1. Redistributions of source code must retain the above copyright
   53  *    notice, this list of conditions and the following disclaimer.
   54  * 2. Redistributions in binary form must reproduce the above copyright
   55  *    notice, this list of conditions and the following disclaimer in the
   56  *    documentation and/or other materials provided with the distribution.
   57  * 4. Neither the name of the University nor the names of its contributors
   58  *    may be used to endorse or promote products derived from this software
   59  *    without specific prior written permission.
   60  *
   61  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
   62  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   63  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   64  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
   65  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   66  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   67  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   68  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   69  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   70  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   71  * SUCH DAMAGE.
   72  */
   73 /*-
   74  * Copyright (c) 1999 Eduardo Horvath
   75  * Copyright (c) 2002 by Thomas Moestl <tmm@FreeBSD.org>.
   76  * Copyright (c) 2005 Marius Strobl <marius@FreeBSD.org>
   77  * All rights reserved.
   78  *
   79  * Redistribution and use in source and binary forms, with or without
   80  * modification, are permitted provided that the following conditions
   81  * are met:
   82  * 1. Redistributions of source code must retain the above copyright
   83  *    notice, this list of conditions and the following disclaimer.
   84  *
   85  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR  ``AS IS'' AND
   86  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   87  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   88  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR  BE LIABLE
   89  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   90  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   91  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   92  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   93  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   94  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   95  * SUCH DAMAGE.
   96  *
   97  *      from: @(#)sbus.c        8.1 (Berkeley) 6/11/93
   98  *      from: NetBSD: sbus.c,v 1.46 2001/10/07 20:30:41 eeh Exp
   99  */
  100 
  101 #include <sys/cdefs.h>
  102 __FBSDID("$FreeBSD: releng/7.4/sys/sparc64/sbus/sbus.c 206189 2010-04-05 17:57:46Z marius $");
  103 
  104 /*
  105  * SBus support.
  106  */
  107 
  108 #include <sys/param.h>
  109 #include <sys/systm.h>
  110 #include <sys/bus.h>
  111 #include <sys/kernel.h>
  112 #include <sys/malloc.h>
  113 #include <sys/module.h>
  114 #include <sys/pcpu.h>
  115 #include <sys/queue.h>
  116 #include <sys/reboot.h>
  117 #include <sys/rman.h>
  118 
  119 #include <dev/ofw/ofw_bus.h>
  120 #include <dev/ofw/ofw_bus_subr.h>
  121 #include <dev/ofw/openfirm.h>
  122 
  123 #include <machine/bus.h>
  124 #include <machine/bus_common.h>
  125 #include <machine/bus_private.h>
  126 #include <machine/iommureg.h>
  127 #include <machine/iommuvar.h>
  128 #include <machine/resource.h>
  129 
  130 #include <sparc64/sbus/ofw_sbus.h>
  131 #include <sparc64/sbus/sbusreg.h>
  132 #include <sparc64/sbus/sbusvar.h>
  133 
  134 struct sbus_devinfo {
  135         int                     sdi_burstsz;
  136         int                     sdi_clockfreq;
  137         int                     sdi_slot;
  138 
  139         struct ofw_bus_devinfo  sdi_obdinfo;
  140         struct resource_list    sdi_rl;
  141 };
  142 
  143 /* Range descriptor, allocated for each sc_range. */
  144 struct sbus_rd {
  145         bus_addr_t              rd_poffset;
  146         bus_addr_t              rd_pend;
  147         int                     rd_slot;
  148         bus_addr_t              rd_coffset;
  149         bus_addr_t              rd_cend;
  150         struct rman             rd_rman;
  151         bus_space_handle_t      rd_bushandle;
  152         struct resource         *rd_res;
  153 };
  154 
  155 struct sbus_softc {
  156         device_t                sc_dev;
  157         bus_dma_tag_t           sc_cdmatag;
  158         bus_space_tag_t         sc_cbustag;
  159         int                     sc_clockfreq;   /* clock frequency (in Hz) */
  160         int                     sc_nrange;
  161         struct sbus_rd          *sc_rd;
  162         int                     sc_burst;       /* burst transfer sizes supp. */
  163 
  164         struct resource         *sc_sysio_res;
  165         int                     sc_ign;         /* IGN for this sysio */
  166         struct iommu_state      sc_is;          /* IOMMU state (iommuvar.h) */
  167 
  168         struct resource         *sc_ot_ires;
  169         void                    *sc_ot_ihand;
  170         struct resource         *sc_pf_ires;
  171         void                    *sc_pf_ihand;
  172 };
  173 
  174 #define SYSIO_READ8(sc, off)                                            \
  175         bus_read_8((sc)->sc_sysio_res, (off))
  176 #define SYSIO_WRITE8(sc, off, v)                                        \
  177         bus_write_8((sc)->sc_sysio_res, (off), (v))
  178 
  179 static device_probe_t sbus_probe;
  180 static device_attach_t sbus_attach;
  181 static bus_print_child_t sbus_print_child;
  182 static bus_probe_nomatch_t sbus_probe_nomatch;
  183 static bus_read_ivar_t sbus_read_ivar;
  184 static bus_get_resource_list_t sbus_get_resource_list;
  185 static bus_setup_intr_t sbus_setup_intr;
  186 static bus_alloc_resource_t sbus_alloc_resource;
  187 static bus_release_resource_t sbus_release_resource;
  188 static bus_activate_resource_t sbus_activate_resource;
  189 static bus_deactivate_resource_t sbus_deactivate_resource;
  190 static bus_get_dma_tag_t sbus_get_dma_tag;
  191 static ofw_bus_get_devinfo_t sbus_get_devinfo;
  192 
  193 static int sbus_inlist(const char *, const char *const *);
  194 static struct sbus_devinfo * sbus_setup_dinfo(device_t, struct sbus_softc *,
  195     phandle_t);
  196 static void sbus_destroy_dinfo(struct sbus_devinfo *);
  197 static void sbus_intr_enable(void *);
  198 static void sbus_intr_disable(void *);
  199 static void sbus_intr_assign(void *);
  200 static void sbus_intr_clear(void *);
  201 static int sbus_find_intrmap(struct sbus_softc *, u_int, bus_addr_t *,
  202     bus_addr_t *);
  203 static bus_space_tag_t sbus_alloc_bustag(struct sbus_softc *);
  204 static driver_intr_t sbus_overtemp;
  205 static driver_intr_t sbus_pwrfail;
  206 static int sbus_print_res(struct sbus_devinfo *);
  207 
  208 static device_method_t sbus_methods[] = {
  209         /* Device interface */
  210         DEVMETHOD(device_probe,         sbus_probe),
  211         DEVMETHOD(device_attach,        sbus_attach),
  212         DEVMETHOD(device_shutdown,      bus_generic_shutdown),
  213         DEVMETHOD(device_suspend,       bus_generic_suspend),
  214         DEVMETHOD(device_resume,        bus_generic_resume),
  215 
  216         /* Bus interface */
  217         DEVMETHOD(bus_print_child,      sbus_print_child),
  218         DEVMETHOD(bus_probe_nomatch,    sbus_probe_nomatch),
  219         DEVMETHOD(bus_read_ivar,        sbus_read_ivar),
  220         DEVMETHOD(bus_alloc_resource,   sbus_alloc_resource),
  221         DEVMETHOD(bus_activate_resource,        sbus_activate_resource),
  222         DEVMETHOD(bus_deactivate_resource,      sbus_deactivate_resource),
  223         DEVMETHOD(bus_release_resource, sbus_release_resource),
  224         DEVMETHOD(bus_setup_intr,       sbus_setup_intr),
  225         DEVMETHOD(bus_teardown_intr,    bus_generic_teardown_intr),
  226         DEVMETHOD(bus_get_resource,     bus_generic_rl_get_resource),
  227         DEVMETHOD(bus_get_resource_list, sbus_get_resource_list),
  228         DEVMETHOD(bus_get_dma_tag,      sbus_get_dma_tag),
  229 
  230         /* ofw_bus interface */
  231         DEVMETHOD(ofw_bus_get_devinfo,  sbus_get_devinfo),
  232         DEVMETHOD(ofw_bus_get_compat,   ofw_bus_gen_get_compat),
  233         DEVMETHOD(ofw_bus_get_model,    ofw_bus_gen_get_model),
  234         DEVMETHOD(ofw_bus_get_name,     ofw_bus_gen_get_name),
  235         DEVMETHOD(ofw_bus_get_node,     ofw_bus_gen_get_node),
  236         DEVMETHOD(ofw_bus_get_type,     ofw_bus_gen_get_type),
  237 
  238         KOBJMETHOD_END
  239 };
  240 
  241 static driver_t sbus_driver = {
  242         "sbus",
  243         sbus_methods,
  244         sizeof(struct sbus_softc),
  245 };
  246 
  247 static devclass_t sbus_devclass;
  248 
  249 DRIVER_MODULE(sbus, nexus, sbus_driver, sbus_devclass, 0, 0);
  250 MODULE_DEPEND(sbus, nexus, 1, 1, 1);
  251 MODULE_VERSION(sbus, 1);
  252 
  253 #define OFW_SBUS_TYPE   "sbus"
  254 #define OFW_SBUS_NAME   "sbus"
  255 
  256 static const struct intr_controller sbus_ic = {
  257         sbus_intr_enable,
  258         sbus_intr_disable,
  259         sbus_intr_assign,
  260         sbus_intr_clear
  261 };
  262 
  263 struct sbus_icarg {
  264         struct sbus_softc       *sica_sc;
  265         bus_addr_t              sica_map;
  266         bus_addr_t              sica_clr;
  267 };
  268 
  269 static const char *const sbus_order_first[] = {
  270         "auxio",
  271         "dma",
  272         NULL
  273 };
  274 
  275 static int
  276 sbus_inlist(const char *name, const char *const *list)
  277 {
  278         int i;
  279 
  280         if (name == NULL)
  281                 return (0);
  282         for (i = 0; list[i] != NULL; i++) {
  283                 if (strcmp(name, list[i]) == 0)
  284                         return (1);
  285         }
  286         return (0);
  287 }
  288 
  289 static int
  290 sbus_probe(device_t dev)
  291 {
  292         const char *t;
  293 
  294         t = ofw_bus_get_type(dev);
  295         if (((t == NULL || strcmp(t, OFW_SBUS_TYPE) != 0)) &&
  296             strcmp(ofw_bus_get_name(dev), OFW_SBUS_NAME) != 0)
  297                 return (ENXIO);
  298         device_set_desc(dev, "U2S UPA-SBus bridge");
  299         return (0);
  300 }
  301 
  302 static int
  303 sbus_attach(device_t dev)
  304 {
  305         struct sbus_softc *sc;
  306         struct sbus_devinfo *sdi;
  307         struct sbus_icarg *sica;
  308         struct sbus_ranges *range;
  309         struct resource *res;
  310         struct resource_list *rl;
  311         device_t cdev;
  312         bus_addr_t intrclr, intrmap, phys;
  313         bus_size_t size;
  314         u_long vec;
  315         phandle_t child, node;
  316         uint32_t prop;
  317         int i, j;
  318 
  319         sc = device_get_softc(dev);
  320         sc->sc_dev = dev;
  321         node = ofw_bus_get_node(dev);
  322 
  323         i = 0;
  324         sc->sc_sysio_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &i,
  325             RF_ACTIVE);
  326         if (sc->sc_sysio_res == NULL)
  327                 panic("%s: cannot allocate device memory", __func__);
  328 
  329         if (OF_getprop(node, "interrupts", &prop, sizeof(prop)) == -1)
  330                 panic("%s: cannot get IGN", __func__);
  331         sc->sc_ign = INTIGN(prop);
  332         sc->sc_cbustag = sbus_alloc_bustag(sc);
  333 
  334         /*
  335          * Record clock frequency for synchronous SCSI.
  336          * IS THIS THE CORRECT DEFAULT??
  337          */
  338         if (OF_getprop(node, "clock-frequency", &prop, sizeof(prop)) == -1)
  339                 prop = 25000000;
  340         sc->sc_clockfreq = prop;
  341         prop /= 1000;
  342         device_printf(dev, "clock %d.%03d MHz\n", prop / 1000, prop % 1000);
  343 
  344         /*
  345          * Collect address translations from the OBP.
  346          */
  347         if ((sc->sc_nrange = OF_getprop_alloc(node, "ranges",
  348             sizeof(*range), (void **)&range)) == -1) {
  349                 panic("%s: error getting ranges property", __func__);
  350         }
  351         sc->sc_rd = (struct sbus_rd *)malloc(sizeof(*sc->sc_rd) * sc->sc_nrange,
  352             M_DEVBUF, M_NOWAIT);
  353         if (sc->sc_rd == NULL)
  354                 panic("%s: cannot allocate rmans", __func__);
  355         /*
  356          * Preallocate all space that the SBus bridge decodes, so that nothing
  357          * else gets in the way; set up rmans etc.
  358          */
  359         rl = BUS_GET_RESOURCE_LIST(device_get_parent(dev), dev);
  360         for (i = 0; i < sc->sc_nrange; i++) {
  361                 phys = range[i].poffset | ((bus_addr_t)range[i].pspace << 32);
  362                 size = range[i].size;
  363                 sc->sc_rd[i].rd_slot = range[i].cspace;
  364                 sc->sc_rd[i].rd_coffset = range[i].coffset;
  365                 sc->sc_rd[i].rd_cend = sc->sc_rd[i].rd_coffset + size;
  366                 j = resource_list_add_next(rl, SYS_RES_MEMORY, phys,
  367                     phys + size - 1, size);
  368                 if ((res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &j,
  369                     RF_ACTIVE)) == NULL)
  370                         panic("%s: cannot allocate decoded range", __func__);
  371                 sc->sc_rd[i].rd_bushandle = rman_get_bushandle(res);
  372                 sc->sc_rd[i].rd_rman.rm_type = RMAN_ARRAY;
  373                 sc->sc_rd[i].rd_rman.rm_descr = "SBus Device Memory";
  374                 if (rman_init(&sc->sc_rd[i].rd_rman) != 0 ||
  375                     rman_manage_region(&sc->sc_rd[i].rd_rman, 0, size) != 0)
  376                         panic("%s: failed to set up memory rman", __func__);
  377                 sc->sc_rd[i].rd_poffset = phys;
  378                 sc->sc_rd[i].rd_pend = phys + size;
  379                 sc->sc_rd[i].rd_res = res;
  380         }
  381         free(range, M_OFWPROP);
  382 
  383         /*
  384          * Get the SBus burst transfer size if burst transfers are supported.
  385          */
  386         if (OF_getprop(node, "up-burst-sizes", &sc->sc_burst,
  387             sizeof(sc->sc_burst)) == -1 || sc->sc_burst == 0)
  388                 sc->sc_burst =
  389                     (SBUS_BURST64_DEF << SBUS_BURST64_SHIFT) | SBUS_BURST_DEF;
  390 
  391 
  392         /* initalise the IOMMU */
  393 
  394         /* punch in our copies */
  395         sc->sc_is.is_pmaxaddr = IOMMU_MAXADDR(SBUS_IOMMU_BITS);
  396         sc->sc_is.is_bustag = rman_get_bustag(sc->sc_sysio_res);
  397         sc->sc_is.is_bushandle = rman_get_bushandle(sc->sc_sysio_res);
  398         sc->sc_is.is_iommu = SBR_IOMMU;
  399         sc->sc_is.is_dtag = SBR_IOMMU_TLB_TAG_DIAG;
  400         sc->sc_is.is_ddram = SBR_IOMMU_TLB_DATA_DIAG;
  401         sc->sc_is.is_dqueue = SBR_IOMMU_QUEUE_DIAG;
  402         sc->sc_is.is_dva = SBR_IOMMU_SVADIAG;
  403         sc->sc_is.is_dtcmp = 0;
  404         sc->sc_is.is_sb[0] = SBR_STRBUF;
  405         sc->sc_is.is_sb[1] = 0;
  406 
  407         /*
  408          * Note: the SBus IOMMU ignores the high bits of an address, so a NULL
  409          * DMA pointer will be translated by the first page of the IOTSB.
  410          * To detect bugs we'll allocate and ignore the first entry.
  411          */
  412         iommu_init(device_get_nameunit(dev), &sc->sc_is, 3, -1, 1);
  413 
  414         /* Create the DMA tag. */
  415         if (bus_dma_tag_create(bus_get_dma_tag(dev), 8, 0,
  416             sc->sc_is.is_pmaxaddr, ~0, NULL, NULL, sc->sc_is.is_pmaxaddr,
  417             0xff, 0xffffffff, 0, NULL, NULL, &sc->sc_cdmatag) != 0)
  418                 panic("%s: bus_dma_tag_create failed", __func__);
  419         /* Customize the tag. */
  420         sc->sc_cdmatag->dt_cookie = &sc->sc_is;
  421         sc->sc_cdmatag->dt_mt = &iommu_dma_methods;
  422 
  423         /*
  424          * Hunt through all the interrupt mapping regs and register our
  425          * interrupt controller for the corresponding interrupt vectors.
  426          * We do this early in order to be able to catch stray interrupts.
  427          */
  428         for (i = 0; i <= SBUS_MAX_INO; i++) {
  429                 if (sbus_find_intrmap(sc, i, &intrmap, &intrclr) == 0)
  430                         continue;
  431                 sica = malloc(sizeof(*sica), M_DEVBUF, M_NOWAIT);
  432                 if (sica == NULL)
  433                         panic("%s: could not allocate interrupt controller "
  434                             "argument", __func__);
  435                 sica->sica_sc = sc;
  436                 sica->sica_map = intrmap;
  437                 sica->sica_clr = intrclr;
  438 #ifdef SBUS_DEBUG
  439                 device_printf(dev,
  440                     "intr map (INO %d, %s) %#lx: %#lx, clr: %#lx\n",
  441                     i, (i & INTMAP_OBIO_MASK) == 0 ? "SBus slot" : "OBIO",
  442                     (u_long)intrmap, (u_long)SYSIO_READ8(sc, intrmap),
  443                     (u_long)intrclr);
  444 #endif
  445                 j = intr_controller_register(INTMAP_VEC(sc->sc_ign, i),
  446                     &sbus_ic, sica);
  447                 if (j != 0)
  448                         device_printf(dev, "could not register interrupt "
  449                             "controller for INO %d (%d)\n", i, j);
  450         }
  451 
  452         /* Enable the over-temperature and power-fail interrupts. */
  453         i = 4;
  454         sc->sc_ot_ires = bus_alloc_resource_any(dev, SYS_RES_IRQ, &i,
  455             RF_ACTIVE);
  456         if (sc->sc_ot_ires == NULL ||
  457             INTIGN(vec = rman_get_start(sc->sc_ot_ires)) != sc->sc_ign ||
  458             INTVEC(SYSIO_READ8(sc, SBR_THERM_INT_MAP)) != vec ||
  459             intr_vectors[vec].iv_ic != &sbus_ic ||
  460             bus_setup_intr(dev, sc->sc_ot_ires, INTR_TYPE_MISC | INTR_FAST,
  461             NULL, sbus_overtemp, sc, &sc->sc_ot_ihand) != 0)
  462                 panic("%s: failed to set up temperature interrupt", __func__);
  463         i = 3;
  464         sc->sc_pf_ires = bus_alloc_resource_any(dev, SYS_RES_IRQ, &i,
  465             RF_ACTIVE);
  466         if (sc->sc_pf_ires == NULL ||
  467             INTIGN(vec = rman_get_start(sc->sc_pf_ires)) != sc->sc_ign ||
  468             INTVEC(SYSIO_READ8(sc, SBR_POWER_INT_MAP)) != vec ||
  469             intr_vectors[vec].iv_ic != &sbus_ic ||
  470             bus_setup_intr(dev, sc->sc_pf_ires, INTR_TYPE_MISC | INTR_FAST,
  471             NULL, sbus_pwrfail, sc, &sc->sc_pf_ihand) != 0)
  472                 panic("%s: failed to set up power fail interrupt", __func__);
  473 
  474         /* Initialize the counter-timer. */
  475         sparc64_counter_init(device_get_nameunit(dev),
  476             rman_get_bustag(sc->sc_sysio_res),
  477             rman_get_bushandle(sc->sc_sysio_res), SBR_TC0);
  478 
  479         /*
  480          * Loop through ROM children, fixing any relative addresses
  481          * and then configuring each device.
  482          */
  483         for (child = OF_child(node); child != 0; child = OF_peer(child)) {
  484                 if ((sdi = sbus_setup_dinfo(dev, sc, child)) == NULL)
  485                         continue;
  486                 /*
  487                  * For devices where there are variants that are actually
  488                  * split into two SBus devices (as opposed to the first
  489                  * half of the device being a SBus device and the second
  490                  * half hanging off of the first one) like 'auxio' and
  491                  * 'SUNW,fdtwo' or 'dma' and 'esp' probe the SBus device
  492                  * which is a prerequisite to the driver attaching to the
  493                  * second one with a lower order. Saves us from dealing
  494                  * with different probe orders in the respective device
  495                  * drivers which generally is more hackish.
  496                  */
  497                 cdev = device_add_child_ordered(dev, (OF_child(child) == 0 &&
  498                     sbus_inlist(sdi->sdi_obdinfo.obd_name, sbus_order_first)) ?
  499                     SBUS_ORDER_FIRST : SBUS_ORDER_NORMAL, NULL, -1);
  500                 if (cdev == NULL) {
  501                         device_printf(dev,
  502                             "<%s>: device_add_child_ordered failed\n",
  503                             sdi->sdi_obdinfo.obd_name);
  504                         sbus_destroy_dinfo(sdi);
  505                         continue;
  506                 }
  507                 device_set_ivars(cdev, sdi);
  508         }
  509         return (bus_generic_attach(dev));
  510 }
  511 
  512 static struct sbus_devinfo *
  513 sbus_setup_dinfo(device_t dev, struct sbus_softc *sc, phandle_t node)
  514 {
  515         struct sbus_devinfo *sdi;
  516         struct sbus_regs *reg;
  517         u_int32_t base, iv, *intr;
  518         int i, nreg, nintr, slot, rslot;
  519 
  520         sdi = malloc(sizeof(*sdi), M_DEVBUF, M_ZERO | M_WAITOK);
  521         if (ofw_bus_gen_setup_devinfo(&sdi->sdi_obdinfo, node) != 0) {
  522                 free(sdi, M_DEVBUF);
  523                 return (NULL);
  524         }
  525         resource_list_init(&sdi->sdi_rl);
  526         slot = -1;
  527         nreg = OF_getprop_alloc(node, "reg", sizeof(*reg), (void **)&reg);
  528         if (nreg == -1) {
  529                 if (sdi->sdi_obdinfo.obd_type == NULL ||
  530                     strcmp(sdi->sdi_obdinfo.obd_type, "hierarchical") != 0) {
  531                         device_printf(dev, "<%s>: incomplete\n",
  532                             sdi->sdi_obdinfo.obd_name);
  533                         goto fail;
  534                 }
  535         } else {
  536                 for (i = 0; i < nreg; i++) {
  537                         base = reg[i].sbr_offset;
  538                         if (SBUS_ABS(base)) {
  539                                 rslot = SBUS_ABS_TO_SLOT(base);
  540                                 base = SBUS_ABS_TO_OFFSET(base);
  541                         } else
  542                                 rslot = reg[i].sbr_slot;
  543                         if (slot != -1 && slot != rslot) {
  544                                 device_printf(dev, "<%s>: multiple slots\n",
  545                                     sdi->sdi_obdinfo.obd_name);
  546                                 free(reg, M_OFWPROP);
  547                                 goto fail;
  548                         }
  549                         slot = rslot;
  550 
  551                         resource_list_add(&sdi->sdi_rl, SYS_RES_MEMORY, i,
  552                             base, base + reg[i].sbr_size, reg[i].sbr_size);
  553                 }
  554                 free(reg, M_OFWPROP);
  555         }
  556         sdi->sdi_slot = slot;
  557 
  558         /*
  559          * The `interrupts' property contains the SBus interrupt level.
  560          */
  561         nintr = OF_getprop_alloc(node, "interrupts", sizeof(*intr),
  562             (void **)&intr);
  563         if (nintr != -1) {
  564                 for (i = 0; i < nintr; i++) {
  565                         iv = intr[i];
  566                         /*
  567                          * SBus card devices need the slot number encoded into
  568                          * the vector as this is generally not done.
  569                          */
  570                         if ((iv & INTMAP_OBIO_MASK) == 0)
  571                                 iv |= slot << 3;
  572                         iv = INTMAP_VEC(sc->sc_ign, iv);
  573                         resource_list_add(&sdi->sdi_rl, SYS_RES_IRQ, i,
  574                             iv, iv, 1);
  575                 }
  576                 free(intr, M_OFWPROP);
  577         }
  578         if (OF_getprop(node, "burst-sizes", &sdi->sdi_burstsz,
  579             sizeof(sdi->sdi_burstsz)) == -1)
  580                 sdi->sdi_burstsz = sc->sc_burst;
  581         else
  582                 sdi->sdi_burstsz &= sc->sc_burst;
  583         if (OF_getprop(node, "clock-frequency", &sdi->sdi_clockfreq,
  584             sizeof(sdi->sdi_clockfreq)) == -1)
  585                 sdi->sdi_clockfreq = sc->sc_clockfreq;
  586 
  587         return (sdi);
  588 
  589 fail:
  590         sbus_destroy_dinfo(sdi);
  591         return (NULL);
  592 }
  593 
  594 static void
  595 sbus_destroy_dinfo(struct sbus_devinfo *dinfo)
  596 {
  597 
  598         resource_list_free(&dinfo->sdi_rl);
  599         ofw_bus_gen_destroy_devinfo(&dinfo->sdi_obdinfo);
  600         free(dinfo, M_DEVBUF);
  601 }
  602 
  603 static int
  604 sbus_print_child(device_t dev, device_t child)
  605 {
  606         int rv;
  607 
  608         rv = bus_print_child_header(dev, child);
  609         rv += sbus_print_res(device_get_ivars(child));
  610         rv += bus_print_child_footer(dev, child);
  611         return (rv);
  612 }
  613 
  614 static void
  615 sbus_probe_nomatch(device_t dev, device_t child)
  616 {
  617         const char *type;
  618 
  619         device_printf(dev, "<%s>", ofw_bus_get_name(child));
  620         sbus_print_res(device_get_ivars(child));
  621         type = ofw_bus_get_type(child);
  622         printf(" type %s (no driver attached)\n",
  623             type != NULL ? type : "unknown");
  624 }
  625 
  626 static int
  627 sbus_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
  628 {
  629         struct sbus_softc *sc;
  630         struct sbus_devinfo *dinfo;
  631 
  632         sc = device_get_softc(dev);
  633         if ((dinfo = device_get_ivars(child)) == NULL)
  634                 return (ENOENT);
  635         switch (which) {
  636         case SBUS_IVAR_BURSTSZ:
  637                 *result = dinfo->sdi_burstsz;
  638                 break;
  639         case SBUS_IVAR_CLOCKFREQ:
  640                 *result = dinfo->sdi_clockfreq;
  641                 break;
  642         case SBUS_IVAR_IGN:
  643                 *result = sc->sc_ign;
  644                 break;
  645         case SBUS_IVAR_SLOT:
  646                 *result = dinfo->sdi_slot;
  647                 break;
  648         default:
  649                 return (ENOENT);
  650         }
  651         return (0);
  652 }
  653 
  654 static struct resource_list *
  655 sbus_get_resource_list(device_t dev, device_t child)
  656 {
  657         struct sbus_devinfo *sdi;
  658 
  659         sdi = device_get_ivars(child);
  660         return (&sdi->sdi_rl);
  661 }
  662 
  663 static void
  664 sbus_intr_enable(void *arg)
  665 {
  666         struct intr_vector *iv = arg;
  667         struct sbus_icarg *sica = iv->iv_icarg;
  668 
  669         SYSIO_WRITE8(sica->sica_sc, sica->sica_map,
  670             INTMAP_ENABLE(iv->iv_vec, iv->iv_mid));
  671 }
  672 
  673 static void
  674 sbus_intr_disable(void *arg)
  675 {
  676         struct intr_vector *iv = arg;
  677         struct sbus_icarg *sica = iv->iv_icarg;
  678 
  679         SYSIO_WRITE8(sica->sica_sc, sica->sica_map, iv->iv_vec);
  680 }
  681 
  682 static void
  683 sbus_intr_assign(void *arg)
  684 {
  685         struct intr_vector *iv = arg;
  686         struct sbus_icarg *sica = iv->iv_icarg;
  687 
  688         SYSIO_WRITE8(sica->sica_sc, sica->sica_map, INTMAP_TID(
  689             SYSIO_READ8(sica->sica_sc, sica->sica_map), iv->iv_mid));
  690 }
  691 
  692 static void
  693 sbus_intr_clear(void *arg)
  694 {
  695         struct intr_vector *iv = arg;
  696         struct sbus_icarg *sica = iv->iv_icarg;
  697 
  698         SYSIO_WRITE8(sica->sica_sc, sica->sica_clr, INTCLR_IDLE);
  699 }
  700 
  701 static int
  702 sbus_find_intrmap(struct sbus_softc *sc, u_int ino, bus_addr_t *intrmapptr,
  703     bus_addr_t *intrclrptr)
  704 {
  705         bus_addr_t intrclr, intrmap;
  706         int i;
  707 
  708         if (ino > SBUS_MAX_INO) {
  709                 device_printf(sc->sc_dev, "out of range INO %d requested\n",
  710                     ino);
  711                 return (0);
  712         }
  713 
  714         if ((ino & INTMAP_OBIO_MASK) == 0) {
  715                 intrmap = SBR_SLOT0_INT_MAP + INTSLOT(ino) * 8;
  716                 intrclr = SBR_SLOT0_INT_CLR +
  717                     (INTSLOT(ino) * 8 * 8) + (INTPRI(ino) * 8);
  718         } else {
  719                 intrclr = 0;
  720                 for (i = 0, intrmap = SBR_SCSI_INT_MAP;
  721                     intrmap <= SBR_RESERVED_INT_MAP; intrmap += 8, i++) {
  722                         if (INTVEC(SYSIO_READ8(sc, intrmap)) ==
  723                             INTMAP_VEC(sc->sc_ign, ino)) {
  724                                 intrclr = SBR_SCSI_INT_CLR + i * 8;
  725                                 break;
  726                         }
  727                 }
  728                 if (intrclr == 0)
  729                         return (0);
  730         }
  731         if (intrmapptr != NULL)
  732                 *intrmapptr = intrmap;
  733         if (intrclrptr != NULL)
  734                 *intrclrptr = intrclr;
  735         return (1);
  736 }
  737 
  738 static int
  739 sbus_setup_intr(device_t dev, device_t child, struct resource *ires, int flags,
  740     driver_filter_t *filt, driver_intr_t *intr, void *arg, void **cookiep)
  741 {
  742         struct sbus_softc *sc;
  743         u_long vec;
  744 
  745         sc = device_get_softc(dev);
  746         /*
  747          * Make sure the vector is fully specified and we registered
  748          * our interrupt controller for it.
  749          */
  750         vec = rman_get_start(ires);
  751         if (INTIGN(vec) != sc->sc_ign || intr_vectors[vec].iv_ic != &sbus_ic) {
  752                 device_printf(dev, "invalid interrupt vector 0x%lx\n", vec);
  753                 return (EINVAL);
  754         }
  755         return (bus_generic_setup_intr(dev, child, ires, flags, filt, intr,
  756             arg, cookiep));
  757 }
  758 
  759 static struct resource *
  760 sbus_alloc_resource(device_t bus, device_t child, int type, int *rid,
  761     u_long start, u_long end, u_long count, u_int flags)
  762 {
  763         struct sbus_softc *sc;
  764         struct rman *rm;
  765         struct resource *rv;
  766         struct resource_list *rl;
  767         struct resource_list_entry *rle;
  768         device_t schild;
  769         bus_space_handle_t bh;
  770         bus_addr_t toffs;
  771         bus_size_t tend;
  772         int i, slot;
  773         int isdefault, needactivate, passthrough;
  774 
  775         isdefault = (start == 0UL && end == ~0UL);
  776         needactivate = flags & RF_ACTIVE;
  777         passthrough = (device_get_parent(child) != bus);
  778         rle = NULL;
  779         sc = device_get_softc(bus);
  780         rl = BUS_GET_RESOURCE_LIST(bus, child);
  781         switch (type) {
  782         case SYS_RES_IRQ:
  783                 return (resource_list_alloc(rl, bus, child, type, rid, start,
  784                     end, count, flags));
  785         case SYS_RES_MEMORY:
  786                 if (!passthrough) {
  787                         rle = resource_list_find(rl, type, *rid);
  788                         if (rle == NULL)
  789                                 return (NULL);
  790                         if (rle->res != NULL)
  791                                 panic("%s: resource entry is busy", __func__);
  792                         if (isdefault) {
  793                                 start = rle->start;
  794                                 count = ulmax(count, rle->count);
  795                                 end = ulmax(rle->end, start + count - 1);
  796                         }
  797                 }
  798                 rm = NULL;
  799                 bh = toffs = tend = 0;
  800                 schild = child;
  801                 while (device_get_parent(schild) != bus)
  802                         schild = device_get_parent(schild);
  803                 slot = sbus_get_slot(schild);
  804                 for (i = 0; i < sc->sc_nrange; i++) {
  805                         if (sc->sc_rd[i].rd_slot != slot ||
  806                             start < sc->sc_rd[i].rd_coffset ||
  807                             start > sc->sc_rd[i].rd_cend)
  808                                 continue;
  809                         /* Disallow cross-range allocations. */
  810                         if (end > sc->sc_rd[i].rd_cend)
  811                                 return (NULL);
  812                         /* We've found the connection to the parent bus */
  813                         toffs = start - sc->sc_rd[i].rd_coffset;
  814                         tend = end - sc->sc_rd[i].rd_coffset;
  815                         rm = &sc->sc_rd[i].rd_rman;
  816                         bh = sc->sc_rd[i].rd_bushandle;
  817                         break;
  818                 }
  819                 if (rm == NULL)
  820                         return (NULL);
  821                 flags &= ~RF_ACTIVE;
  822                 rv = rman_reserve_resource(rm, toffs, tend, count, flags,
  823                     child);
  824                 if (rv == NULL)
  825                         return (NULL);
  826                 rman_set_rid(rv, *rid);
  827                 rman_set_bustag(rv, sc->sc_cbustag);
  828                 rman_set_bushandle(rv, bh + rman_get_start(rv));
  829                 if (needactivate) {
  830                         if (bus_activate_resource(child, type, *rid, rv)) {
  831                                 rman_release_resource(rv);
  832                                 return (NULL);
  833                         }
  834                 }
  835                 if (!passthrough)
  836                         rle->res = rv;
  837                 return (rv);
  838         default:
  839                 return (NULL);
  840         }
  841 }
  842 
  843 static int
  844 sbus_activate_resource(device_t bus, device_t child, int type, int rid,
  845     struct resource *r)
  846 {
  847         void *p;
  848         int error;
  849 
  850         if (type == SYS_RES_IRQ) {
  851                 return (BUS_ACTIVATE_RESOURCE(device_get_parent(bus),
  852                     child, type, rid, r));
  853         }
  854         if (type == SYS_RES_MEMORY) {
  855                 /*
  856                  * Need to memory-map the device space, as some drivers
  857                  * depend on the virtual address being set and usable.
  858                  */
  859                 error = sparc64_bus_mem_map(rman_get_bustag(r),
  860                     rman_get_bushandle(r), rman_get_size(r), 0, 0, &p);
  861                 if (error != 0)
  862                         return (error);
  863                 rman_set_virtual(r, p);
  864         }
  865         return (rman_activate_resource(r));
  866 }
  867 
  868 static int
  869 sbus_deactivate_resource(device_t bus, device_t child, int type, int rid,
  870     struct resource *r)
  871 {
  872 
  873         if (type == SYS_RES_IRQ) {
  874                 return (BUS_DEACTIVATE_RESOURCE(device_get_parent(bus),
  875                     child, type, rid, r));
  876         }
  877         if (type == SYS_RES_MEMORY) {
  878                 sparc64_bus_mem_unmap(rman_get_virtual(r), rman_get_size(r));
  879                 rman_set_virtual(r, NULL);
  880         }
  881         return (rman_deactivate_resource(r));
  882 }
  883 
  884 static int
  885 sbus_release_resource(device_t bus, device_t child, int type, int rid,
  886     struct resource *r)
  887 {
  888         struct resource_list *rl;
  889         struct resource_list_entry *rle;
  890         int error, passthrough;
  891 
  892         passthrough = (device_get_parent(child) != bus);
  893         rl = BUS_GET_RESOURCE_LIST(bus, child);
  894         if (type == SYS_RES_IRQ)
  895                 return (resource_list_release(rl, bus, child, type, rid, r));
  896         if ((rman_get_flags(r) & RF_ACTIVE) != 0) {
  897                 error = bus_deactivate_resource(child, type, rid, r);
  898                 if (error != 0)
  899                         return (error);
  900         }
  901         error = rman_release_resource(r);
  902         if (error != 0 || passthrough)
  903                 return (error);
  904         rle = resource_list_find(rl, type, rid);
  905         if (rle == NULL)
  906                 panic("%s: cannot find resource", __func__);
  907         if (rle->res == NULL)
  908                 panic("%s: resource entry is not busy", __func__);
  909         rle->res = NULL;
  910         return (0);
  911 }
  912 
  913 static bus_dma_tag_t
  914 sbus_get_dma_tag(device_t bus, device_t child)
  915 {
  916         struct sbus_softc *sc;
  917 
  918         sc = device_get_softc(bus);
  919         return (sc->sc_cdmatag);
  920 }
  921 
  922 static const struct ofw_bus_devinfo *
  923 sbus_get_devinfo(device_t bus, device_t child)
  924 {
  925         struct sbus_devinfo *sdi;
  926 
  927         sdi = device_get_ivars(child);
  928         return (&sdi->sdi_obdinfo);
  929 }
  930 
  931 /*
  932  * Handle an overtemp situation.
  933  *
  934  * SPARCs have temperature sensors which generate interrupts
  935  * if the machine's temperature exceeds a certain threshold.
  936  * This handles the interrupt and powers off the machine.
  937  * The same needs to be done to PCI controller drivers.
  938  */
  939 static void
  940 sbus_overtemp(void *arg)
  941 {
  942         static int shutdown;
  943 
  944         /* As the interrupt is cleared we may be called multiple times. */
  945         if (shutdown != 0)
  946                 return;
  947         shutdown++;
  948         printf("DANGER: OVER TEMPERATURE detected\nShutting down NOW.\n");
  949         shutdown_nice(RB_POWEROFF);
  950 }
  951 
  952 /* Try to shut down in time in case of power failure. */
  953 static void
  954 sbus_pwrfail(void *arg)
  955 {
  956         static int shutdown;
  957 
  958         /* As the interrupt is cleared we may be called multiple times. */
  959         if (shutdown != 0)
  960                 return;
  961         shutdown++;
  962         printf("Power failure detected\nShutting down NOW.\n");
  963         shutdown_nice(0);
  964 }
  965 
  966 static bus_space_tag_t
  967 sbus_alloc_bustag(struct sbus_softc *sc)
  968 {
  969         bus_space_tag_t sbt;
  970 
  971         sbt = (bus_space_tag_t)malloc(sizeof(struct bus_space_tag), M_DEVBUF,
  972             M_NOWAIT | M_ZERO);
  973         if (sbt == NULL)
  974                 panic("%s: out of memory", __func__);
  975 
  976         sbt->bst_cookie = sc;
  977         sbt->bst_parent = rman_get_bustag(sc->sc_sysio_res);
  978         sbt->bst_type = SBUS_BUS_SPACE;
  979         return (sbt);
  980 }
  981 
  982 static int
  983 sbus_print_res(struct sbus_devinfo *sdi)
  984 {
  985         int rv;
  986 
  987         rv = 0;
  988         rv += resource_list_print_type(&sdi->sdi_rl, "mem", SYS_RES_MEMORY,
  989             "%#lx");
  990         rv += resource_list_print_type(&sdi->sdi_rl, "irq", SYS_RES_IRQ,
  991             "%ld");
  992         return (rv);
  993 }

Cache object: b80953c65ee16746cc9ab1775972ea78


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