The Design and Implementation of the FreeBSD Operating System, Second Edition
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FreeBSD/Linux Kernel Cross Reference
sys/sparc64/sbus/sbus.c

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    1 /*-
    2  * Copyright (c) 1998 The NetBSD Foundation, Inc.
    3  * All rights reserved.
    4  *
    5  * This code is derived from software contributed to The NetBSD Foundation
    6  * by Paul Kranenburg.
    7  *
    8  * Redistribution and use in source and binary forms, with or without
    9  * modification, are permitted provided that the following conditions
   10  * are met:
   11  * 1. Redistributions of source code must retain the above copyright
   12  *    notice, this list of conditions and the following disclaimer.
   13  * 2. Redistributions in binary form must reproduce the above copyright
   14  *    notice, this list of conditions and the following disclaimer in the
   15  *    documentation and/or other materials provided with the distribution.
   16  * 3. All advertising materials mentioning features or use of this software
   17  *    must display the following acknowledgement:
   18  *        This product includes software developed by the NetBSD
   19  *        Foundation, Inc. and its contributors.
   20  * 4. Neither the name of The NetBSD Foundation nor the names of its
   21  *    contributors may be used to endorse or promote products derived
   22  *    from this software without specific prior written permission.
   23  *
   24  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
   25  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
   26  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
   27  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
   28  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
   29  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
   30  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
   31  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
   32  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
   33  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
   34  * POSSIBILITY OF SUCH DAMAGE.
   35  */
   36 /*-
   37  * Copyright (c) 1992, 1993
   38  *      The Regents of the University of California.  All rights reserved.
   39  *
   40  * This software was developed by the Computer Systems Engineering group
   41  * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
   42  * contributed to Berkeley.
   43  *
   44  * All advertising materials mentioning features or use of this software
   45  * must display the following acknowledgement:
   46  *      This product includes software developed by the University of
   47  *      California, Lawrence Berkeley Laboratory.
   48  *
   49  * Redistribution and use in source and binary forms, with or without
   50  * modification, are permitted provided that the following conditions
   51  * are met:
   52  * 1. Redistributions of source code must retain the above copyright
   53  *    notice, this list of conditions and the following disclaimer.
   54  * 2. Redistributions in binary form must reproduce the above copyright
   55  *    notice, this list of conditions and the following disclaimer in the
   56  *    documentation and/or other materials provided with the distribution.
   57  * 4. Neither the name of the University nor the names of its contributors
   58  *    may be used to endorse or promote products derived from this software
   59  *    without specific prior written permission.
   60  *
   61  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
   62  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   63  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   64  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
   65  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   66  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   67  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   68  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   69  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   70  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   71  * SUCH DAMAGE.
   72  */
   73 /*-
   74  * Copyright (c) 1999 Eduardo Horvath
   75  * Copyright (c) 2002 by Thomas Moestl <tmm@FreeBSD.org>.
   76  * Copyright (c) 2005 Marius Strobl <marius@FreeBSD.org>
   77  * All rights reserved.
   78  *
   79  * Redistribution and use in source and binary forms, with or without
   80  * modification, are permitted provided that the following conditions
   81  * are met:
   82  * 1. Redistributions of source code must retain the above copyright
   83  *    notice, this list of conditions and the following disclaimer.
   84  *
   85  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR  ``AS IS'' AND
   86  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   87  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   88  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR  BE LIABLE
   89  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   90  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   91  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   92  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   93  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   94  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   95  * SUCH DAMAGE.
   96  *
   97  *      from: @(#)sbus.c        8.1 (Berkeley) 6/11/93
   98  *      from: NetBSD: sbus.c,v 1.46 2001/10/07 20:30:41 eeh Exp
   99  */
  100 
  101 #include <sys/cdefs.h>
  102 __FBSDID("$FreeBSD: releng/8.2/sys/sparc64/sbus/sbus.c 206188 2010-04-05 17:56:40Z marius $");
  103 
  104 /*
  105  * SBus support.
  106  */
  107 
  108 #include <sys/param.h>
  109 #include <sys/systm.h>
  110 #include <sys/bus.h>
  111 #include <sys/kernel.h>
  112 #include <sys/malloc.h>
  113 #include <sys/module.h>
  114 #include <sys/pcpu.h>
  115 #include <sys/queue.h>
  116 #include <sys/reboot.h>
  117 #include <sys/rman.h>
  118 
  119 #include <dev/ofw/ofw_bus.h>
  120 #include <dev/ofw/ofw_bus_subr.h>
  121 #include <dev/ofw/openfirm.h>
  122 
  123 #include <machine/bus.h>
  124 #include <machine/bus_common.h>
  125 #include <machine/bus_private.h>
  126 #include <machine/iommureg.h>
  127 #include <machine/iommuvar.h>
  128 #include <machine/resource.h>
  129 
  130 #include <sparc64/sbus/ofw_sbus.h>
  131 #include <sparc64/sbus/sbusreg.h>
  132 #include <sparc64/sbus/sbusvar.h>
  133 
  134 struct sbus_devinfo {
  135         int                     sdi_burstsz;
  136         int                     sdi_clockfreq;
  137         int                     sdi_slot;
  138 
  139         struct ofw_bus_devinfo  sdi_obdinfo;
  140         struct resource_list    sdi_rl;
  141 };
  142 
  143 /* Range descriptor, allocated for each sc_range. */
  144 struct sbus_rd {
  145         bus_addr_t              rd_poffset;
  146         bus_addr_t              rd_pend;
  147         int                     rd_slot;
  148         bus_addr_t              rd_coffset;
  149         bus_addr_t              rd_cend;
  150         struct rman             rd_rman;
  151         bus_space_handle_t      rd_bushandle;
  152         struct resource         *rd_res;
  153 };
  154 
  155 struct sbus_softc {
  156         device_t                sc_dev;
  157         bus_dma_tag_t           sc_cdmatag;
  158         bus_space_tag_t         sc_cbustag;
  159         int                     sc_clockfreq;   /* clock frequency (in Hz) */
  160         int                     sc_nrange;
  161         struct sbus_rd          *sc_rd;
  162         int                     sc_burst;       /* burst transfer sizes supp. */
  163 
  164         struct resource         *sc_sysio_res;
  165         int                     sc_ign;         /* IGN for this sysio */
  166         struct iommu_state      sc_is;          /* IOMMU state (iommuvar.h) */
  167 
  168         struct resource         *sc_ot_ires;
  169         void                    *sc_ot_ihand;
  170         struct resource         *sc_pf_ires;
  171         void                    *sc_pf_ihand;
  172 };
  173 
  174 #define SYSIO_READ8(sc, off)                                            \
  175         bus_read_8((sc)->sc_sysio_res, (off))
  176 #define SYSIO_WRITE8(sc, off, v)                                        \
  177         bus_write_8((sc)->sc_sysio_res, (off), (v))
  178 
  179 static device_probe_t sbus_probe;
  180 static device_attach_t sbus_attach;
  181 static bus_print_child_t sbus_print_child;
  182 static bus_probe_nomatch_t sbus_probe_nomatch;
  183 static bus_read_ivar_t sbus_read_ivar;
  184 static bus_get_resource_list_t sbus_get_resource_list;
  185 static bus_setup_intr_t sbus_setup_intr;
  186 static bus_alloc_resource_t sbus_alloc_resource;
  187 static bus_release_resource_t sbus_release_resource;
  188 static bus_activate_resource_t sbus_activate_resource;
  189 static bus_deactivate_resource_t sbus_deactivate_resource;
  190 static bus_get_dma_tag_t sbus_get_dma_tag;
  191 static ofw_bus_get_devinfo_t sbus_get_devinfo;
  192 
  193 static int sbus_inlist(const char *, const char *const *);
  194 static struct sbus_devinfo * sbus_setup_dinfo(device_t, struct sbus_softc *,
  195     phandle_t);
  196 static void sbus_destroy_dinfo(struct sbus_devinfo *);
  197 static void sbus_intr_enable(void *);
  198 static void sbus_intr_disable(void *);
  199 static void sbus_intr_assign(void *);
  200 static void sbus_intr_clear(void *);
  201 static int sbus_find_intrmap(struct sbus_softc *, u_int, bus_addr_t *,
  202     bus_addr_t *);
  203 static bus_space_tag_t sbus_alloc_bustag(struct sbus_softc *);
  204 static driver_intr_t sbus_overtemp;
  205 static driver_intr_t sbus_pwrfail;
  206 static int sbus_print_res(struct sbus_devinfo *);
  207 
  208 static device_method_t sbus_methods[] = {
  209         /* Device interface */
  210         DEVMETHOD(device_probe,         sbus_probe),
  211         DEVMETHOD(device_attach,        sbus_attach),
  212         DEVMETHOD(device_shutdown,      bus_generic_shutdown),
  213         DEVMETHOD(device_suspend,       bus_generic_suspend),
  214         DEVMETHOD(device_resume,        bus_generic_resume),
  215 
  216         /* Bus interface */
  217         DEVMETHOD(bus_print_child,      sbus_print_child),
  218         DEVMETHOD(bus_probe_nomatch,    sbus_probe_nomatch),
  219         DEVMETHOD(bus_read_ivar,        sbus_read_ivar),
  220         DEVMETHOD(bus_alloc_resource,   sbus_alloc_resource),
  221         DEVMETHOD(bus_activate_resource,        sbus_activate_resource),
  222         DEVMETHOD(bus_deactivate_resource,      sbus_deactivate_resource),
  223         DEVMETHOD(bus_release_resource, sbus_release_resource),
  224         DEVMETHOD(bus_setup_intr,       sbus_setup_intr),
  225         DEVMETHOD(bus_teardown_intr,    bus_generic_teardown_intr),
  226         DEVMETHOD(bus_get_resource,     bus_generic_rl_get_resource),
  227         DEVMETHOD(bus_get_resource_list, sbus_get_resource_list),
  228         DEVMETHOD(bus_child_pnpinfo_str, ofw_bus_gen_child_pnpinfo_str),
  229         DEVMETHOD(bus_get_dma_tag,      sbus_get_dma_tag),
  230 
  231         /* ofw_bus interface */
  232         DEVMETHOD(ofw_bus_get_devinfo,  sbus_get_devinfo),
  233         DEVMETHOD(ofw_bus_get_compat,   ofw_bus_gen_get_compat),
  234         DEVMETHOD(ofw_bus_get_model,    ofw_bus_gen_get_model),
  235         DEVMETHOD(ofw_bus_get_name,     ofw_bus_gen_get_name),
  236         DEVMETHOD(ofw_bus_get_node,     ofw_bus_gen_get_node),
  237         DEVMETHOD(ofw_bus_get_type,     ofw_bus_gen_get_type),
  238 
  239         KOBJMETHOD_END
  240 };
  241 
  242 static driver_t sbus_driver = {
  243         "sbus",
  244         sbus_methods,
  245         sizeof(struct sbus_softc),
  246 };
  247 
  248 static devclass_t sbus_devclass;
  249 
  250 EARLY_DRIVER_MODULE(sbus, nexus, sbus_driver, sbus_devclass, 0, 0,
  251     BUS_PASS_BUS);
  252 MODULE_DEPEND(sbus, nexus, 1, 1, 1);
  253 MODULE_VERSION(sbus, 1);
  254 
  255 #define OFW_SBUS_TYPE   "sbus"
  256 #define OFW_SBUS_NAME   "sbus"
  257 
  258 static const struct intr_controller sbus_ic = {
  259         sbus_intr_enable,
  260         sbus_intr_disable,
  261         sbus_intr_assign,
  262         sbus_intr_clear
  263 };
  264 
  265 struct sbus_icarg {
  266         struct sbus_softc       *sica_sc;
  267         bus_addr_t              sica_map;
  268         bus_addr_t              sica_clr;
  269 };
  270 
  271 static const char *const sbus_order_first[] = {
  272         "auxio",
  273         "dma",
  274         NULL
  275 };
  276 
  277 static int
  278 sbus_inlist(const char *name, const char *const *list)
  279 {
  280         int i;
  281 
  282         if (name == NULL)
  283                 return (0);
  284         for (i = 0; list[i] != NULL; i++) {
  285                 if (strcmp(name, list[i]) == 0)
  286                         return (1);
  287         }
  288         return (0);
  289 }
  290 
  291 static int
  292 sbus_probe(device_t dev)
  293 {
  294         const char *t;
  295 
  296         t = ofw_bus_get_type(dev);
  297         if (((t == NULL || strcmp(t, OFW_SBUS_TYPE) != 0)) &&
  298             strcmp(ofw_bus_get_name(dev), OFW_SBUS_NAME) != 0)
  299                 return (ENXIO);
  300         device_set_desc(dev, "U2S UPA-SBus bridge");
  301         return (0);
  302 }
  303 
  304 static int
  305 sbus_attach(device_t dev)
  306 {
  307         struct sbus_softc *sc;
  308         struct sbus_devinfo *sdi;
  309         struct sbus_icarg *sica;
  310         struct sbus_ranges *range;
  311         struct resource *res;
  312         struct resource_list *rl;
  313         device_t cdev;
  314         bus_addr_t intrclr, intrmap, phys;
  315         bus_size_t size;
  316         u_long vec;
  317         phandle_t child, node;
  318         uint32_t prop;
  319         int i, j;
  320 
  321         sc = device_get_softc(dev);
  322         sc->sc_dev = dev;
  323         node = ofw_bus_get_node(dev);
  324 
  325         i = 0;
  326         sc->sc_sysio_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &i,
  327             RF_ACTIVE);
  328         if (sc->sc_sysio_res == NULL)
  329                 panic("%s: cannot allocate device memory", __func__);
  330 
  331         if (OF_getprop(node, "interrupts", &prop, sizeof(prop)) == -1)
  332                 panic("%s: cannot get IGN", __func__);
  333         sc->sc_ign = INTIGN(prop);
  334         sc->sc_cbustag = sbus_alloc_bustag(sc);
  335 
  336         /*
  337          * Record clock frequency for synchronous SCSI.
  338          * IS THIS THE CORRECT DEFAULT??
  339          */
  340         if (OF_getprop(node, "clock-frequency", &prop, sizeof(prop)) == -1)
  341                 prop = 25000000;
  342         sc->sc_clockfreq = prop;
  343         prop /= 1000;
  344         device_printf(dev, "clock %d.%03d MHz\n", prop / 1000, prop % 1000);
  345 
  346         /*
  347          * Collect address translations from the OBP.
  348          */
  349         if ((sc->sc_nrange = OF_getprop_alloc(node, "ranges",
  350             sizeof(*range), (void **)&range)) == -1) {
  351                 panic("%s: error getting ranges property", __func__);
  352         }
  353         sc->sc_rd = (struct sbus_rd *)malloc(sizeof(*sc->sc_rd) * sc->sc_nrange,
  354             M_DEVBUF, M_NOWAIT);
  355         if (sc->sc_rd == NULL)
  356                 panic("%s: cannot allocate rmans", __func__);
  357         /*
  358          * Preallocate all space that the SBus bridge decodes, so that nothing
  359          * else gets in the way; set up rmans etc.
  360          */
  361         rl = BUS_GET_RESOURCE_LIST(device_get_parent(dev), dev);
  362         for (i = 0; i < sc->sc_nrange; i++) {
  363                 phys = range[i].poffset | ((bus_addr_t)range[i].pspace << 32);
  364                 size = range[i].size;
  365                 sc->sc_rd[i].rd_slot = range[i].cspace;
  366                 sc->sc_rd[i].rd_coffset = range[i].coffset;
  367                 sc->sc_rd[i].rd_cend = sc->sc_rd[i].rd_coffset + size;
  368                 j = resource_list_add_next(rl, SYS_RES_MEMORY, phys,
  369                     phys + size - 1, size);
  370                 if ((res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &j,
  371                     RF_ACTIVE)) == NULL)
  372                         panic("%s: cannot allocate decoded range", __func__);
  373                 sc->sc_rd[i].rd_bushandle = rman_get_bushandle(res);
  374                 sc->sc_rd[i].rd_rman.rm_type = RMAN_ARRAY;
  375                 sc->sc_rd[i].rd_rman.rm_descr = "SBus Device Memory";
  376                 if (rman_init(&sc->sc_rd[i].rd_rman) != 0 ||
  377                     rman_manage_region(&sc->sc_rd[i].rd_rman, 0, size) != 0)
  378                         panic("%s: failed to set up memory rman", __func__);
  379                 sc->sc_rd[i].rd_poffset = phys;
  380                 sc->sc_rd[i].rd_pend = phys + size;
  381                 sc->sc_rd[i].rd_res = res;
  382         }
  383         free(range, M_OFWPROP);
  384 
  385         /*
  386          * Get the SBus burst transfer size if burst transfers are supported.
  387          */
  388         if (OF_getprop(node, "up-burst-sizes", &sc->sc_burst,
  389             sizeof(sc->sc_burst)) == -1 || sc->sc_burst == 0)
  390                 sc->sc_burst =
  391                     (SBUS_BURST64_DEF << SBUS_BURST64_SHIFT) | SBUS_BURST_DEF;
  392 
  393 
  394         /* initalise the IOMMU */
  395 
  396         /* punch in our copies */
  397         sc->sc_is.is_pmaxaddr = IOMMU_MAXADDR(SBUS_IOMMU_BITS);
  398         sc->sc_is.is_bustag = rman_get_bustag(sc->sc_sysio_res);
  399         sc->sc_is.is_bushandle = rman_get_bushandle(sc->sc_sysio_res);
  400         sc->sc_is.is_iommu = SBR_IOMMU;
  401         sc->sc_is.is_dtag = SBR_IOMMU_TLB_TAG_DIAG;
  402         sc->sc_is.is_ddram = SBR_IOMMU_TLB_DATA_DIAG;
  403         sc->sc_is.is_dqueue = SBR_IOMMU_QUEUE_DIAG;
  404         sc->sc_is.is_dva = SBR_IOMMU_SVADIAG;
  405         sc->sc_is.is_dtcmp = 0;
  406         sc->sc_is.is_sb[0] = SBR_STRBUF;
  407         sc->sc_is.is_sb[1] = 0;
  408 
  409         /*
  410          * Note: the SBus IOMMU ignores the high bits of an address, so a NULL
  411          * DMA pointer will be translated by the first page of the IOTSB.
  412          * To detect bugs we'll allocate and ignore the first entry.
  413          */
  414         iommu_init(device_get_nameunit(dev), &sc->sc_is, 3, -1, 1);
  415 
  416         /* Create the DMA tag. */
  417         if (bus_dma_tag_create(bus_get_dma_tag(dev), 8, 0,
  418             sc->sc_is.is_pmaxaddr, ~0, NULL, NULL, sc->sc_is.is_pmaxaddr,
  419             0xff, 0xffffffff, 0, NULL, NULL, &sc->sc_cdmatag) != 0)
  420                 panic("%s: bus_dma_tag_create failed", __func__);
  421         /* Customize the tag. */
  422         sc->sc_cdmatag->dt_cookie = &sc->sc_is;
  423         sc->sc_cdmatag->dt_mt = &iommu_dma_methods;
  424 
  425         /*
  426          * Hunt through all the interrupt mapping regs and register our
  427          * interrupt controller for the corresponding interrupt vectors.
  428          * We do this early in order to be able to catch stray interrupts.
  429          */
  430         for (i = 0; i <= SBUS_MAX_INO; i++) {
  431                 if (sbus_find_intrmap(sc, i, &intrmap, &intrclr) == 0)
  432                         continue;
  433                 sica = malloc(sizeof(*sica), M_DEVBUF, M_NOWAIT);
  434                 if (sica == NULL)
  435                         panic("%s: could not allocate interrupt controller "
  436                             "argument", __func__);
  437                 sica->sica_sc = sc;
  438                 sica->sica_map = intrmap;
  439                 sica->sica_clr = intrclr;
  440 #ifdef SBUS_DEBUG
  441                 device_printf(dev,
  442                     "intr map (INO %d, %s) %#lx: %#lx, clr: %#lx\n",
  443                     i, (i & INTMAP_OBIO_MASK) == 0 ? "SBus slot" : "OBIO",
  444                     (u_long)intrmap, (u_long)SYSIO_READ8(sc, intrmap),
  445                     (u_long)intrclr);
  446 #endif
  447                 j = intr_controller_register(INTMAP_VEC(sc->sc_ign, i),
  448                     &sbus_ic, sica);
  449                 if (j != 0)
  450                         device_printf(dev, "could not register interrupt "
  451                             "controller for INO %d (%d)\n", i, j);
  452         }
  453 
  454         /* Enable the over-temperature and power-fail interrupts. */
  455         i = 4;
  456         sc->sc_ot_ires = bus_alloc_resource_any(dev, SYS_RES_IRQ, &i,
  457             RF_ACTIVE);
  458         if (sc->sc_ot_ires == NULL ||
  459             INTIGN(vec = rman_get_start(sc->sc_ot_ires)) != sc->sc_ign ||
  460             INTVEC(SYSIO_READ8(sc, SBR_THERM_INT_MAP)) != vec ||
  461             intr_vectors[vec].iv_ic != &sbus_ic ||
  462             bus_setup_intr(dev, sc->sc_ot_ires, INTR_TYPE_MISC | INTR_FAST,
  463             NULL, sbus_overtemp, sc, &sc->sc_ot_ihand) != 0)
  464                 panic("%s: failed to set up temperature interrupt", __func__);
  465         i = 3;
  466         sc->sc_pf_ires = bus_alloc_resource_any(dev, SYS_RES_IRQ, &i,
  467             RF_ACTIVE);
  468         if (sc->sc_pf_ires == NULL ||
  469             INTIGN(vec = rman_get_start(sc->sc_pf_ires)) != sc->sc_ign ||
  470             INTVEC(SYSIO_READ8(sc, SBR_POWER_INT_MAP)) != vec ||
  471             intr_vectors[vec].iv_ic != &sbus_ic ||
  472             bus_setup_intr(dev, sc->sc_pf_ires, INTR_TYPE_MISC | INTR_FAST,
  473             NULL, sbus_pwrfail, sc, &sc->sc_pf_ihand) != 0)
  474                 panic("%s: failed to set up power fail interrupt", __func__);
  475 
  476         /* Initialize the counter-timer. */
  477         sparc64_counter_init(device_get_nameunit(dev),
  478             rman_get_bustag(sc->sc_sysio_res),
  479             rman_get_bushandle(sc->sc_sysio_res), SBR_TC0);
  480 
  481         /*
  482          * Loop through ROM children, fixing any relative addresses
  483          * and then configuring each device.
  484          */
  485         for (child = OF_child(node); child != 0; child = OF_peer(child)) {
  486                 if ((sdi = sbus_setup_dinfo(dev, sc, child)) == NULL)
  487                         continue;
  488                 /*
  489                  * For devices where there are variants that are actually
  490                  * split into two SBus devices (as opposed to the first
  491                  * half of the device being a SBus device and the second
  492                  * half hanging off of the first one) like 'auxio' and
  493                  * 'SUNW,fdtwo' or 'dma' and 'esp' probe the SBus device
  494                  * which is a prerequisite to the driver attaching to the
  495                  * second one with a lower order. Saves us from dealing
  496                  * with different probe orders in the respective device
  497                  * drivers which generally is more hackish.
  498                  */
  499                 cdev = device_add_child_ordered(dev, (OF_child(child) == 0 &&
  500                     sbus_inlist(sdi->sdi_obdinfo.obd_name, sbus_order_first)) ?
  501                     SBUS_ORDER_FIRST : SBUS_ORDER_NORMAL, NULL, -1);
  502                 if (cdev == NULL) {
  503                         device_printf(dev,
  504                             "<%s>: device_add_child_ordered failed\n",
  505                             sdi->sdi_obdinfo.obd_name);
  506                         sbus_destroy_dinfo(sdi);
  507                         continue;
  508                 }
  509                 device_set_ivars(cdev, sdi);
  510         }
  511         return (bus_generic_attach(dev));
  512 }
  513 
  514 static struct sbus_devinfo *
  515 sbus_setup_dinfo(device_t dev, struct sbus_softc *sc, phandle_t node)
  516 {
  517         struct sbus_devinfo *sdi;
  518         struct sbus_regs *reg;
  519         u_int32_t base, iv, *intr;
  520         int i, nreg, nintr, slot, rslot;
  521 
  522         sdi = malloc(sizeof(*sdi), M_DEVBUF, M_ZERO | M_WAITOK);
  523         if (ofw_bus_gen_setup_devinfo(&sdi->sdi_obdinfo, node) != 0) {
  524                 free(sdi, M_DEVBUF);
  525                 return (NULL);
  526         }
  527         resource_list_init(&sdi->sdi_rl);
  528         slot = -1;
  529         nreg = OF_getprop_alloc(node, "reg", sizeof(*reg), (void **)&reg);
  530         if (nreg == -1) {
  531                 if (sdi->sdi_obdinfo.obd_type == NULL ||
  532                     strcmp(sdi->sdi_obdinfo.obd_type, "hierarchical") != 0) {
  533                         device_printf(dev, "<%s>: incomplete\n",
  534                             sdi->sdi_obdinfo.obd_name);
  535                         goto fail;
  536                 }
  537         } else {
  538                 for (i = 0; i < nreg; i++) {
  539                         base = reg[i].sbr_offset;
  540                         if (SBUS_ABS(base)) {
  541                                 rslot = SBUS_ABS_TO_SLOT(base);
  542                                 base = SBUS_ABS_TO_OFFSET(base);
  543                         } else
  544                                 rslot = reg[i].sbr_slot;
  545                         if (slot != -1 && slot != rslot) {
  546                                 device_printf(dev, "<%s>: multiple slots\n",
  547                                     sdi->sdi_obdinfo.obd_name);
  548                                 free(reg, M_OFWPROP);
  549                                 goto fail;
  550                         }
  551                         slot = rslot;
  552 
  553                         resource_list_add(&sdi->sdi_rl, SYS_RES_MEMORY, i,
  554                             base, base + reg[i].sbr_size, reg[i].sbr_size);
  555                 }
  556                 free(reg, M_OFWPROP);
  557         }
  558         sdi->sdi_slot = slot;
  559 
  560         /*
  561          * The `interrupts' property contains the SBus interrupt level.
  562          */
  563         nintr = OF_getprop_alloc(node, "interrupts", sizeof(*intr),
  564             (void **)&intr);
  565         if (nintr != -1) {
  566                 for (i = 0; i < nintr; i++) {
  567                         iv = intr[i];
  568                         /*
  569                          * SBus card devices need the slot number encoded into
  570                          * the vector as this is generally not done.
  571                          */
  572                         if ((iv & INTMAP_OBIO_MASK) == 0)
  573                                 iv |= slot << 3;
  574                         iv = INTMAP_VEC(sc->sc_ign, iv);
  575                         resource_list_add(&sdi->sdi_rl, SYS_RES_IRQ, i,
  576                             iv, iv, 1);
  577                 }
  578                 free(intr, M_OFWPROP);
  579         }
  580         if (OF_getprop(node, "burst-sizes", &sdi->sdi_burstsz,
  581             sizeof(sdi->sdi_burstsz)) == -1)
  582                 sdi->sdi_burstsz = sc->sc_burst;
  583         else
  584                 sdi->sdi_burstsz &= sc->sc_burst;
  585         if (OF_getprop(node, "clock-frequency", &sdi->sdi_clockfreq,
  586             sizeof(sdi->sdi_clockfreq)) == -1)
  587                 sdi->sdi_clockfreq = sc->sc_clockfreq;
  588 
  589         return (sdi);
  590 
  591 fail:
  592         sbus_destroy_dinfo(sdi);
  593         return (NULL);
  594 }
  595 
  596 static void
  597 sbus_destroy_dinfo(struct sbus_devinfo *dinfo)
  598 {
  599 
  600         resource_list_free(&dinfo->sdi_rl);
  601         ofw_bus_gen_destroy_devinfo(&dinfo->sdi_obdinfo);
  602         free(dinfo, M_DEVBUF);
  603 }
  604 
  605 static int
  606 sbus_print_child(device_t dev, device_t child)
  607 {
  608         int rv;
  609 
  610         rv = bus_print_child_header(dev, child);
  611         rv += sbus_print_res(device_get_ivars(child));
  612         rv += bus_print_child_footer(dev, child);
  613         return (rv);
  614 }
  615 
  616 static void
  617 sbus_probe_nomatch(device_t dev, device_t child)
  618 {
  619         const char *type;
  620 
  621         device_printf(dev, "<%s>", ofw_bus_get_name(child));
  622         sbus_print_res(device_get_ivars(child));
  623         type = ofw_bus_get_type(child);
  624         printf(" type %s (no driver attached)\n",
  625             type != NULL ? type : "unknown");
  626 }
  627 
  628 static int
  629 sbus_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
  630 {
  631         struct sbus_softc *sc;
  632         struct sbus_devinfo *dinfo;
  633 
  634         sc = device_get_softc(dev);
  635         if ((dinfo = device_get_ivars(child)) == NULL)
  636                 return (ENOENT);
  637         switch (which) {
  638         case SBUS_IVAR_BURSTSZ:
  639                 *result = dinfo->sdi_burstsz;
  640                 break;
  641         case SBUS_IVAR_CLOCKFREQ:
  642                 *result = dinfo->sdi_clockfreq;
  643                 break;
  644         case SBUS_IVAR_IGN:
  645                 *result = sc->sc_ign;
  646                 break;
  647         case SBUS_IVAR_SLOT:
  648                 *result = dinfo->sdi_slot;
  649                 break;
  650         default:
  651                 return (ENOENT);
  652         }
  653         return (0);
  654 }
  655 
  656 static struct resource_list *
  657 sbus_get_resource_list(device_t dev, device_t child)
  658 {
  659         struct sbus_devinfo *sdi;
  660 
  661         sdi = device_get_ivars(child);
  662         return (&sdi->sdi_rl);
  663 }
  664 
  665 static void
  666 sbus_intr_enable(void *arg)
  667 {
  668         struct intr_vector *iv = arg;
  669         struct sbus_icarg *sica = iv->iv_icarg;
  670 
  671         SYSIO_WRITE8(sica->sica_sc, sica->sica_map,
  672             INTMAP_ENABLE(iv->iv_vec, iv->iv_mid));
  673 }
  674 
  675 static void
  676 sbus_intr_disable(void *arg)
  677 {
  678         struct intr_vector *iv = arg;
  679         struct sbus_icarg *sica = iv->iv_icarg;
  680 
  681         SYSIO_WRITE8(sica->sica_sc, sica->sica_map, iv->iv_vec);
  682 }
  683 
  684 static void
  685 sbus_intr_assign(void *arg)
  686 {
  687         struct intr_vector *iv = arg;
  688         struct sbus_icarg *sica = iv->iv_icarg;
  689 
  690         SYSIO_WRITE8(sica->sica_sc, sica->sica_map, INTMAP_TID(
  691             SYSIO_READ8(sica->sica_sc, sica->sica_map), iv->iv_mid));
  692 }
  693 
  694 static void
  695 sbus_intr_clear(void *arg)
  696 {
  697         struct intr_vector *iv = arg;
  698         struct sbus_icarg *sica = iv->iv_icarg;
  699 
  700         SYSIO_WRITE8(sica->sica_sc, sica->sica_clr, INTCLR_IDLE);
  701 }
  702 
  703 static int
  704 sbus_find_intrmap(struct sbus_softc *sc, u_int ino, bus_addr_t *intrmapptr,
  705     bus_addr_t *intrclrptr)
  706 {
  707         bus_addr_t intrclr, intrmap;
  708         int i;
  709 
  710         if (ino > SBUS_MAX_INO) {
  711                 device_printf(sc->sc_dev, "out of range INO %d requested\n",
  712                     ino);
  713                 return (0);
  714         }
  715 
  716         if ((ino & INTMAP_OBIO_MASK) == 0) {
  717                 intrmap = SBR_SLOT0_INT_MAP + INTSLOT(ino) * 8;
  718                 intrclr = SBR_SLOT0_INT_CLR +
  719                     (INTSLOT(ino) * 8 * 8) + (INTPRI(ino) * 8);
  720         } else {
  721                 intrclr = 0;
  722                 for (i = 0, intrmap = SBR_SCSI_INT_MAP;
  723                     intrmap <= SBR_RESERVED_INT_MAP; intrmap += 8, i++) {
  724                         if (INTVEC(SYSIO_READ8(sc, intrmap)) ==
  725                             INTMAP_VEC(sc->sc_ign, ino)) {
  726                                 intrclr = SBR_SCSI_INT_CLR + i * 8;
  727                                 break;
  728                         }
  729                 }
  730                 if (intrclr == 0)
  731                         return (0);
  732         }
  733         if (intrmapptr != NULL)
  734                 *intrmapptr = intrmap;
  735         if (intrclrptr != NULL)
  736                 *intrclrptr = intrclr;
  737         return (1);
  738 }
  739 
  740 static int
  741 sbus_setup_intr(device_t dev, device_t child, struct resource *ires, int flags,
  742     driver_filter_t *filt, driver_intr_t *intr, void *arg, void **cookiep)
  743 {
  744         struct sbus_softc *sc;
  745         u_long vec;
  746 
  747         sc = device_get_softc(dev);
  748         /*
  749          * Make sure the vector is fully specified and we registered
  750          * our interrupt controller for it.
  751          */
  752         vec = rman_get_start(ires);
  753         if (INTIGN(vec) != sc->sc_ign || intr_vectors[vec].iv_ic != &sbus_ic) {
  754                 device_printf(dev, "invalid interrupt vector 0x%lx\n", vec);
  755                 return (EINVAL);
  756         }
  757         return (bus_generic_setup_intr(dev, child, ires, flags, filt, intr,
  758             arg, cookiep));
  759 }
  760 
  761 static struct resource *
  762 sbus_alloc_resource(device_t bus, device_t child, int type, int *rid,
  763     u_long start, u_long end, u_long count, u_int flags)
  764 {
  765         struct sbus_softc *sc;
  766         struct rman *rm;
  767         struct resource *rv;
  768         struct resource_list *rl;
  769         struct resource_list_entry *rle;
  770         device_t schild;
  771         bus_space_handle_t bh;
  772         bus_addr_t toffs;
  773         bus_size_t tend;
  774         int i, slot;
  775         int isdefault, needactivate, passthrough;
  776 
  777         isdefault = (start == 0UL && end == ~0UL);
  778         needactivate = flags & RF_ACTIVE;
  779         passthrough = (device_get_parent(child) != bus);
  780         rle = NULL;
  781         sc = device_get_softc(bus);
  782         rl = BUS_GET_RESOURCE_LIST(bus, child);
  783         switch (type) {
  784         case SYS_RES_IRQ:
  785                 return (resource_list_alloc(rl, bus, child, type, rid, start,
  786                     end, count, flags));
  787         case SYS_RES_MEMORY:
  788                 if (!passthrough) {
  789                         rle = resource_list_find(rl, type, *rid);
  790                         if (rle == NULL)
  791                                 return (NULL);
  792                         if (rle->res != NULL)
  793                                 panic("%s: resource entry is busy", __func__);
  794                         if (isdefault) {
  795                                 start = rle->start;
  796                                 count = ulmax(count, rle->count);
  797                                 end = ulmax(rle->end, start + count - 1);
  798                         }
  799                 }
  800                 rm = NULL;
  801                 bh = toffs = tend = 0;
  802                 schild = child;
  803                 while (device_get_parent(schild) != bus)
  804                         schild = device_get_parent(schild);
  805                 slot = sbus_get_slot(schild);
  806                 for (i = 0; i < sc->sc_nrange; i++) {
  807                         if (sc->sc_rd[i].rd_slot != slot ||
  808                             start < sc->sc_rd[i].rd_coffset ||
  809                             start > sc->sc_rd[i].rd_cend)
  810                                 continue;
  811                         /* Disallow cross-range allocations. */
  812                         if (end > sc->sc_rd[i].rd_cend)
  813                                 return (NULL);
  814                         /* We've found the connection to the parent bus */
  815                         toffs = start - sc->sc_rd[i].rd_coffset;
  816                         tend = end - sc->sc_rd[i].rd_coffset;
  817                         rm = &sc->sc_rd[i].rd_rman;
  818                         bh = sc->sc_rd[i].rd_bushandle;
  819                         break;
  820                 }
  821                 if (rm == NULL)
  822                         return (NULL);
  823                 flags &= ~RF_ACTIVE;
  824                 rv = rman_reserve_resource(rm, toffs, tend, count, flags,
  825                     child);
  826                 if (rv == NULL)
  827                         return (NULL);
  828                 rman_set_rid(rv, *rid);
  829                 rman_set_bustag(rv, sc->sc_cbustag);
  830                 rman_set_bushandle(rv, bh + rman_get_start(rv));
  831                 if (needactivate) {
  832                         if (bus_activate_resource(child, type, *rid, rv)) {
  833                                 rman_release_resource(rv);
  834                                 return (NULL);
  835                         }
  836                 }
  837                 if (!passthrough)
  838                         rle->res = rv;
  839                 return (rv);
  840         default:
  841                 return (NULL);
  842         }
  843 }
  844 
  845 static int
  846 sbus_activate_resource(device_t bus, device_t child, int type, int rid,
  847     struct resource *r)
  848 {
  849         void *p;
  850         int error;
  851 
  852         if (type == SYS_RES_IRQ) {
  853                 return (BUS_ACTIVATE_RESOURCE(device_get_parent(bus),
  854                     child, type, rid, r));
  855         }
  856         if (type == SYS_RES_MEMORY) {
  857                 /*
  858                  * Need to memory-map the device space, as some drivers
  859                  * depend on the virtual address being set and usable.
  860                  */
  861                 error = sparc64_bus_mem_map(rman_get_bustag(r),
  862                     rman_get_bushandle(r), rman_get_size(r), 0, 0, &p);
  863                 if (error != 0)
  864                         return (error);
  865                 rman_set_virtual(r, p);
  866         }
  867         return (rman_activate_resource(r));
  868 }
  869 
  870 static int
  871 sbus_deactivate_resource(device_t bus, device_t child, int type, int rid,
  872     struct resource *r)
  873 {
  874 
  875         if (type == SYS_RES_IRQ) {
  876                 return (BUS_DEACTIVATE_RESOURCE(device_get_parent(bus),
  877                     child, type, rid, r));
  878         }
  879         if (type == SYS_RES_MEMORY) {
  880                 sparc64_bus_mem_unmap(rman_get_virtual(r), rman_get_size(r));
  881                 rman_set_virtual(r, NULL);
  882         }
  883         return (rman_deactivate_resource(r));
  884 }
  885 
  886 static int
  887 sbus_release_resource(device_t bus, device_t child, int type, int rid,
  888     struct resource *r)
  889 {
  890         struct resource_list *rl;
  891         struct resource_list_entry *rle;
  892         int error, passthrough;
  893 
  894         passthrough = (device_get_parent(child) != bus);
  895         rl = BUS_GET_RESOURCE_LIST(bus, child);
  896         if (type == SYS_RES_IRQ)
  897                 return (resource_list_release(rl, bus, child, type, rid, r));
  898         if ((rman_get_flags(r) & RF_ACTIVE) != 0) {
  899                 error = bus_deactivate_resource(child, type, rid, r);
  900                 if (error != 0)
  901                         return (error);
  902         }
  903         error = rman_release_resource(r);
  904         if (error != 0 || passthrough)
  905                 return (error);
  906         rle = resource_list_find(rl, type, rid);
  907         if (rle == NULL)
  908                 panic("%s: cannot find resource", __func__);
  909         if (rle->res == NULL)
  910                 panic("%s: resource entry is not busy", __func__);
  911         rle->res = NULL;
  912         return (0);
  913 }
  914 
  915 static bus_dma_tag_t
  916 sbus_get_dma_tag(device_t bus, device_t child)
  917 {
  918         struct sbus_softc *sc;
  919 
  920         sc = device_get_softc(bus);
  921         return (sc->sc_cdmatag);
  922 }
  923 
  924 static const struct ofw_bus_devinfo *
  925 sbus_get_devinfo(device_t bus, device_t child)
  926 {
  927         struct sbus_devinfo *sdi;
  928 
  929         sdi = device_get_ivars(child);
  930         return (&sdi->sdi_obdinfo);
  931 }
  932 
  933 /*
  934  * Handle an overtemp situation.
  935  *
  936  * SPARCs have temperature sensors which generate interrupts
  937  * if the machine's temperature exceeds a certain threshold.
  938  * This handles the interrupt and powers off the machine.
  939  * The same needs to be done to PCI controller drivers.
  940  */
  941 static void
  942 sbus_overtemp(void *arg)
  943 {
  944         static int shutdown;
  945 
  946         /* As the interrupt is cleared we may be called multiple times. */
  947         if (shutdown != 0)
  948                 return;
  949         shutdown++;
  950         printf("DANGER: OVER TEMPERATURE detected\nShutting down NOW.\n");
  951         shutdown_nice(RB_POWEROFF);
  952 }
  953 
  954 /* Try to shut down in time in case of power failure. */
  955 static void
  956 sbus_pwrfail(void *arg)
  957 {
  958         static int shutdown;
  959 
  960         /* As the interrupt is cleared we may be called multiple times. */
  961         if (shutdown != 0)
  962                 return;
  963         shutdown++;
  964         printf("Power failure detected\nShutting down NOW.\n");
  965         shutdown_nice(0);
  966 }
  967 
  968 static bus_space_tag_t
  969 sbus_alloc_bustag(struct sbus_softc *sc)
  970 {
  971         bus_space_tag_t sbt;
  972 
  973         sbt = (bus_space_tag_t)malloc(sizeof(struct bus_space_tag), M_DEVBUF,
  974             M_NOWAIT | M_ZERO);
  975         if (sbt == NULL)
  976                 panic("%s: out of memory", __func__);
  977 
  978         sbt->bst_cookie = sc;
  979         sbt->bst_parent = rman_get_bustag(sc->sc_sysio_res);
  980         sbt->bst_type = SBUS_BUS_SPACE;
  981         return (sbt);
  982 }
  983 
  984 static int
  985 sbus_print_res(struct sbus_devinfo *sdi)
  986 {
  987         int rv;
  988 
  989         rv = 0;
  990         rv += resource_list_print_type(&sdi->sdi_rl, "mem", SYS_RES_MEMORY,
  991             "%#lx");
  992         rv += resource_list_print_type(&sdi->sdi_rl, "irq", SYS_RES_IRQ,
  993             "%ld");
  994         return (rv);
  995 }

Cache object: 3c9480a700977ed4f5102d1f555900d2


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