1 /*-
2 * Copyright (c) 1999-2002 Eduardo Horvath
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. The name of the author may not be used to endorse or promote products
14 * derived from this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 *
28 * from: NetBSD: sbus.c,v 1.50 2002/06/20 18:26:24 eeh Exp
29 */
30 /*-
31 * Copyright (c) 2002 by Thomas Moestl <tmm@FreeBSD.org>.
32 * Copyright (c) 2005 Marius Strobl <marius@FreeBSD.org>
33 * All rights reserved.
34 *
35 * Redistribution and use in source and binary forms, with or without
36 * modification, are permitted provided that the following conditions
37 * are met:
38 * 1. Redistributions of source code must retain the above copyright
39 * notice, this list of conditions and the following disclaimer.
40 *
41 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND
42 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
43 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
44 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE
45 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
46 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
47 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
48 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
49 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
50 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
51 * SUCH DAMAGE.
52 */
53
54 #include <sys/cdefs.h>
55 __FBSDID("$FreeBSD: releng/9.0/sys/sparc64/sbus/sbus.c 225229 2011-08-28 11:49:53Z marius $");
56
57 /*
58 * SBus support.
59 */
60
61 #include <sys/param.h>
62 #include <sys/systm.h>
63 #include <sys/bus.h>
64 #include <sys/kernel.h>
65 #include <sys/malloc.h>
66 #include <sys/module.h>
67 #include <sys/pcpu.h>
68 #include <sys/queue.h>
69 #include <sys/reboot.h>
70 #include <sys/rman.h>
71
72 #include <dev/ofw/ofw_bus.h>
73 #include <dev/ofw/ofw_bus_subr.h>
74 #include <dev/ofw/openfirm.h>
75
76 #include <machine/bus.h>
77 #include <machine/bus_common.h>
78 #include <machine/bus_private.h>
79 #include <machine/iommureg.h>
80 #include <machine/iommuvar.h>
81 #include <machine/resource.h>
82
83 #include <sparc64/sbus/ofw_sbus.h>
84 #include <sparc64/sbus/sbusreg.h>
85 #include <sparc64/sbus/sbusvar.h>
86
87 struct sbus_devinfo {
88 int sdi_burstsz;
89 int sdi_clockfreq;
90 int sdi_slot;
91
92 struct ofw_bus_devinfo sdi_obdinfo;
93 struct resource_list sdi_rl;
94 };
95
96 /* Range descriptor, allocated for each sc_range. */
97 struct sbus_rd {
98 bus_addr_t rd_poffset;
99 bus_addr_t rd_pend;
100 int rd_slot;
101 bus_addr_t rd_coffset;
102 bus_addr_t rd_cend;
103 struct rman rd_rman;
104 bus_space_handle_t rd_bushandle;
105 struct resource *rd_res;
106 };
107
108 struct sbus_softc {
109 device_t sc_dev;
110 bus_dma_tag_t sc_cdmatag;
111 bus_space_tag_t sc_cbustag;
112 int sc_clockfreq; /* clock frequency (in Hz) */
113 int sc_nrange;
114 struct sbus_rd *sc_rd;
115 int sc_burst; /* burst transfer sizes supp. */
116
117 struct resource *sc_sysio_res;
118 int sc_ign; /* IGN for this sysio */
119 struct iommu_state sc_is; /* IOMMU state (iommuvar.h) */
120
121 struct resource *sc_ot_ires;
122 void *sc_ot_ihand;
123 struct resource *sc_pf_ires;
124 void *sc_pf_ihand;
125 };
126
127 #define SYSIO_READ8(sc, off) \
128 bus_read_8((sc)->sc_sysio_res, (off))
129 #define SYSIO_WRITE8(sc, off, v) \
130 bus_write_8((sc)->sc_sysio_res, (off), (v))
131
132 static device_probe_t sbus_probe;
133 static device_attach_t sbus_attach;
134 static bus_print_child_t sbus_print_child;
135 static bus_probe_nomatch_t sbus_probe_nomatch;
136 static bus_read_ivar_t sbus_read_ivar;
137 static bus_get_resource_list_t sbus_get_resource_list;
138 static bus_setup_intr_t sbus_setup_intr;
139 static bus_alloc_resource_t sbus_alloc_resource;
140 static bus_release_resource_t sbus_release_resource;
141 static bus_activate_resource_t sbus_activate_resource;
142 static bus_deactivate_resource_t sbus_deactivate_resource;
143 static bus_get_dma_tag_t sbus_get_dma_tag;
144 static ofw_bus_get_devinfo_t sbus_get_devinfo;
145
146 static int sbus_inlist(const char *, const char *const *);
147 static struct sbus_devinfo * sbus_setup_dinfo(device_t, struct sbus_softc *,
148 phandle_t);
149 static void sbus_destroy_dinfo(struct sbus_devinfo *);
150 static void sbus_intr_enable(void *);
151 static void sbus_intr_disable(void *);
152 static void sbus_intr_assign(void *);
153 static void sbus_intr_clear(void *);
154 static int sbus_find_intrmap(struct sbus_softc *, u_int, bus_addr_t *,
155 bus_addr_t *);
156 static bus_space_tag_t sbus_alloc_bustag(struct sbus_softc *);
157 static driver_intr_t sbus_overtemp;
158 static driver_intr_t sbus_pwrfail;
159 static int sbus_print_res(struct sbus_devinfo *);
160
161 static device_method_t sbus_methods[] = {
162 /* Device interface */
163 DEVMETHOD(device_probe, sbus_probe),
164 DEVMETHOD(device_attach, sbus_attach),
165 DEVMETHOD(device_shutdown, bus_generic_shutdown),
166 DEVMETHOD(device_suspend, bus_generic_suspend),
167 DEVMETHOD(device_resume, bus_generic_resume),
168
169 /* Bus interface */
170 DEVMETHOD(bus_print_child, sbus_print_child),
171 DEVMETHOD(bus_probe_nomatch, sbus_probe_nomatch),
172 DEVMETHOD(bus_read_ivar, sbus_read_ivar),
173 DEVMETHOD(bus_alloc_resource, sbus_alloc_resource),
174 DEVMETHOD(bus_activate_resource, sbus_activate_resource),
175 DEVMETHOD(bus_deactivate_resource, sbus_deactivate_resource),
176 DEVMETHOD(bus_release_resource, sbus_release_resource),
177 DEVMETHOD(bus_setup_intr, sbus_setup_intr),
178 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
179 DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource),
180 DEVMETHOD(bus_get_resource_list, sbus_get_resource_list),
181 DEVMETHOD(bus_child_pnpinfo_str, ofw_bus_gen_child_pnpinfo_str),
182 DEVMETHOD(bus_get_dma_tag, sbus_get_dma_tag),
183
184 /* ofw_bus interface */
185 DEVMETHOD(ofw_bus_get_devinfo, sbus_get_devinfo),
186 DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat),
187 DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model),
188 DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name),
189 DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node),
190 DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type),
191
192 KOBJMETHOD_END
193 };
194
195 static driver_t sbus_driver = {
196 "sbus",
197 sbus_methods,
198 sizeof(struct sbus_softc),
199 };
200
201 static devclass_t sbus_devclass;
202
203 EARLY_DRIVER_MODULE(sbus, nexus, sbus_driver, sbus_devclass, 0, 0,
204 BUS_PASS_BUS);
205 MODULE_DEPEND(sbus, nexus, 1, 1, 1);
206 MODULE_VERSION(sbus, 1);
207
208 #define OFW_SBUS_TYPE "sbus"
209 #define OFW_SBUS_NAME "sbus"
210
211 static const struct intr_controller sbus_ic = {
212 sbus_intr_enable,
213 sbus_intr_disable,
214 sbus_intr_assign,
215 sbus_intr_clear
216 };
217
218 struct sbus_icarg {
219 struct sbus_softc *sica_sc;
220 bus_addr_t sica_map;
221 bus_addr_t sica_clr;
222 };
223
224 static const char *const sbus_order_first[] = {
225 "auxio",
226 "dma",
227 NULL
228 };
229
230 static int
231 sbus_inlist(const char *name, const char *const *list)
232 {
233 int i;
234
235 if (name == NULL)
236 return (0);
237 for (i = 0; list[i] != NULL; i++) {
238 if (strcmp(name, list[i]) == 0)
239 return (1);
240 }
241 return (0);
242 }
243
244 static int
245 sbus_probe(device_t dev)
246 {
247 const char *t;
248
249 t = ofw_bus_get_type(dev);
250 if (((t == NULL || strcmp(t, OFW_SBUS_TYPE) != 0)) &&
251 strcmp(ofw_bus_get_name(dev), OFW_SBUS_NAME) != 0)
252 return (ENXIO);
253 device_set_desc(dev, "U2S UPA-SBus bridge");
254 return (0);
255 }
256
257 static int
258 sbus_attach(device_t dev)
259 {
260 struct sbus_softc *sc;
261 struct sbus_devinfo *sdi;
262 struct sbus_icarg *sica;
263 struct sbus_ranges *range;
264 struct resource *res;
265 struct resource_list *rl;
266 device_t cdev;
267 bus_addr_t intrclr, intrmap, phys;
268 bus_size_t size;
269 u_long vec;
270 phandle_t child, node;
271 uint32_t prop;
272 int i, j;
273
274 sc = device_get_softc(dev);
275 sc->sc_dev = dev;
276 node = ofw_bus_get_node(dev);
277
278 i = 0;
279 sc->sc_sysio_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &i,
280 RF_ACTIVE);
281 if (sc->sc_sysio_res == NULL)
282 panic("%s: cannot allocate device memory", __func__);
283
284 if (OF_getprop(node, "interrupts", &prop, sizeof(prop)) == -1)
285 panic("%s: cannot get IGN", __func__);
286 sc->sc_ign = INTIGN(prop);
287 sc->sc_cbustag = sbus_alloc_bustag(sc);
288
289 /*
290 * Record clock frequency for synchronous SCSI.
291 * IS THIS THE CORRECT DEFAULT??
292 */
293 if (OF_getprop(node, "clock-frequency", &prop, sizeof(prop)) == -1)
294 prop = 25000000;
295 sc->sc_clockfreq = prop;
296 prop /= 1000;
297 device_printf(dev, "clock %d.%03d MHz\n", prop / 1000, prop % 1000);
298
299 /*
300 * Collect address translations from the OBP.
301 */
302 if ((sc->sc_nrange = OF_getprop_alloc(node, "ranges",
303 sizeof(*range), (void **)&range)) == -1) {
304 panic("%s: error getting ranges property", __func__);
305 }
306 sc->sc_rd = malloc(sizeof(*sc->sc_rd) * sc->sc_nrange, M_DEVBUF,
307 M_NOWAIT | M_ZERO);
308 if (sc->sc_rd == NULL)
309 panic("%s: cannot allocate rmans", __func__);
310 /*
311 * Preallocate all space that the SBus bridge decodes, so that nothing
312 * else gets in the way; set up rmans etc.
313 */
314 rl = BUS_GET_RESOURCE_LIST(device_get_parent(dev), dev);
315 for (i = 0; i < sc->sc_nrange; i++) {
316 phys = range[i].poffset | ((bus_addr_t)range[i].pspace << 32);
317 size = range[i].size;
318 sc->sc_rd[i].rd_slot = range[i].cspace;
319 sc->sc_rd[i].rd_coffset = range[i].coffset;
320 sc->sc_rd[i].rd_cend = sc->sc_rd[i].rd_coffset + size;
321 j = resource_list_add_next(rl, SYS_RES_MEMORY, phys,
322 phys + size - 1, size);
323 if ((res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &j,
324 RF_ACTIVE)) == NULL)
325 panic("%s: cannot allocate decoded range", __func__);
326 sc->sc_rd[i].rd_bushandle = rman_get_bushandle(res);
327 sc->sc_rd[i].rd_rman.rm_type = RMAN_ARRAY;
328 sc->sc_rd[i].rd_rman.rm_descr = "SBus Device Memory";
329 if (rman_init(&sc->sc_rd[i].rd_rman) != 0 ||
330 rman_manage_region(&sc->sc_rd[i].rd_rman, 0, size) != 0)
331 panic("%s: failed to set up memory rman", __func__);
332 sc->sc_rd[i].rd_poffset = phys;
333 sc->sc_rd[i].rd_pend = phys + size;
334 sc->sc_rd[i].rd_res = res;
335 }
336 free(range, M_OFWPROP);
337
338 /*
339 * Get the SBus burst transfer size if burst transfers are supported.
340 */
341 if (OF_getprop(node, "up-burst-sizes", &sc->sc_burst,
342 sizeof(sc->sc_burst)) == -1 || sc->sc_burst == 0)
343 sc->sc_burst =
344 (SBUS_BURST64_DEF << SBUS_BURST64_SHIFT) | SBUS_BURST_DEF;
345
346
347 /* initalise the IOMMU */
348
349 /* punch in our copies */
350 sc->sc_is.is_pmaxaddr = IOMMU_MAXADDR(SBUS_IOMMU_BITS);
351 sc->sc_is.is_bustag = rman_get_bustag(sc->sc_sysio_res);
352 sc->sc_is.is_bushandle = rman_get_bushandle(sc->sc_sysio_res);
353 sc->sc_is.is_iommu = SBR_IOMMU;
354 sc->sc_is.is_dtag = SBR_IOMMU_TLB_TAG_DIAG;
355 sc->sc_is.is_ddram = SBR_IOMMU_TLB_DATA_DIAG;
356 sc->sc_is.is_dqueue = SBR_IOMMU_QUEUE_DIAG;
357 sc->sc_is.is_dva = SBR_IOMMU_SVADIAG;
358 sc->sc_is.is_dtcmp = 0;
359 sc->sc_is.is_sb[0] = SBR_STRBUF;
360 sc->sc_is.is_sb[1] = 0;
361
362 /*
363 * Note: the SBus IOMMU ignores the high bits of an address, so a NULL
364 * DMA pointer will be translated by the first page of the IOTSB.
365 * To detect bugs we'll allocate and ignore the first entry.
366 */
367 iommu_init(device_get_nameunit(dev), &sc->sc_is, 3, -1, 1);
368
369 /* Create the DMA tag. */
370 if (bus_dma_tag_create(bus_get_dma_tag(dev), 8, 0,
371 sc->sc_is.is_pmaxaddr, ~0, NULL, NULL, sc->sc_is.is_pmaxaddr,
372 0xff, 0xffffffff, 0, NULL, NULL, &sc->sc_cdmatag) != 0)
373 panic("%s: bus_dma_tag_create failed", __func__);
374 /* Customize the tag. */
375 sc->sc_cdmatag->dt_cookie = &sc->sc_is;
376 sc->sc_cdmatag->dt_mt = &iommu_dma_methods;
377
378 /*
379 * Hunt through all the interrupt mapping regs and register our
380 * interrupt controller for the corresponding interrupt vectors.
381 * We do this early in order to be able to catch stray interrupts.
382 */
383 for (i = 0; i <= SBUS_MAX_INO; i++) {
384 if (sbus_find_intrmap(sc, i, &intrmap, &intrclr) == 0)
385 continue;
386 sica = malloc(sizeof(*sica), M_DEVBUF, M_NOWAIT);
387 if (sica == NULL)
388 panic("%s: could not allocate interrupt controller "
389 "argument", __func__);
390 sica->sica_sc = sc;
391 sica->sica_map = intrmap;
392 sica->sica_clr = intrclr;
393 #ifdef SBUS_DEBUG
394 device_printf(dev,
395 "intr map (INO %d, %s) %#lx: %#lx, clr: %#lx\n",
396 i, (i & INTMAP_OBIO_MASK) == 0 ? "SBus slot" : "OBIO",
397 (u_long)intrmap, (u_long)SYSIO_READ8(sc, intrmap),
398 (u_long)intrclr);
399 #endif
400 j = intr_controller_register(INTMAP_VEC(sc->sc_ign, i),
401 &sbus_ic, sica);
402 if (j != 0)
403 device_printf(dev, "could not register interrupt "
404 "controller for INO %d (%d)\n", i, j);
405 }
406
407 /* Enable the over-temperature and power-fail interrupts. */
408 i = 4;
409 sc->sc_ot_ires = bus_alloc_resource_any(dev, SYS_RES_IRQ, &i,
410 RF_ACTIVE);
411 if (sc->sc_ot_ires == NULL ||
412 INTIGN(vec = rman_get_start(sc->sc_ot_ires)) != sc->sc_ign ||
413 INTVEC(SYSIO_READ8(sc, SBR_THERM_INT_MAP)) != vec ||
414 intr_vectors[vec].iv_ic != &sbus_ic ||
415 bus_setup_intr(dev, sc->sc_ot_ires, INTR_TYPE_MISC | INTR_BRIDGE,
416 NULL, sbus_overtemp, sc, &sc->sc_ot_ihand) != 0)
417 panic("%s: failed to set up temperature interrupt", __func__);
418 i = 3;
419 sc->sc_pf_ires = bus_alloc_resource_any(dev, SYS_RES_IRQ, &i,
420 RF_ACTIVE);
421 if (sc->sc_pf_ires == NULL ||
422 INTIGN(vec = rman_get_start(sc->sc_pf_ires)) != sc->sc_ign ||
423 INTVEC(SYSIO_READ8(sc, SBR_POWER_INT_MAP)) != vec ||
424 intr_vectors[vec].iv_ic != &sbus_ic ||
425 bus_setup_intr(dev, sc->sc_pf_ires, INTR_TYPE_MISC | INTR_BRIDGE,
426 NULL, sbus_pwrfail, sc, &sc->sc_pf_ihand) != 0)
427 panic("%s: failed to set up power fail interrupt", __func__);
428
429 /* Initialize the counter-timer. */
430 sparc64_counter_init(device_get_nameunit(dev),
431 rman_get_bustag(sc->sc_sysio_res),
432 rman_get_bushandle(sc->sc_sysio_res), SBR_TC0);
433
434 /*
435 * Loop through ROM children, fixing any relative addresses
436 * and then configuring each device.
437 */
438 for (child = OF_child(node); child != 0; child = OF_peer(child)) {
439 if ((sdi = sbus_setup_dinfo(dev, sc, child)) == NULL)
440 continue;
441 /*
442 * For devices where there are variants that are actually
443 * split into two SBus devices (as opposed to the first
444 * half of the device being a SBus device and the second
445 * half hanging off of the first one) like 'auxio' and
446 * 'SUNW,fdtwo' or 'dma' and 'esp' probe the SBus device
447 * which is a prerequisite to the driver attaching to the
448 * second one with a lower order. Saves us from dealing
449 * with different probe orders in the respective device
450 * drivers which generally is more hackish.
451 */
452 cdev = device_add_child_ordered(dev, (OF_child(child) == 0 &&
453 sbus_inlist(sdi->sdi_obdinfo.obd_name, sbus_order_first)) ?
454 SBUS_ORDER_FIRST : SBUS_ORDER_NORMAL, NULL, -1);
455 if (cdev == NULL) {
456 device_printf(dev,
457 "<%s>: device_add_child_ordered failed\n",
458 sdi->sdi_obdinfo.obd_name);
459 sbus_destroy_dinfo(sdi);
460 continue;
461 }
462 device_set_ivars(cdev, sdi);
463 }
464 return (bus_generic_attach(dev));
465 }
466
467 static struct sbus_devinfo *
468 sbus_setup_dinfo(device_t dev, struct sbus_softc *sc, phandle_t node)
469 {
470 struct sbus_devinfo *sdi;
471 struct sbus_regs *reg;
472 u_int32_t base, iv, *intr;
473 int i, nreg, nintr, slot, rslot;
474
475 sdi = malloc(sizeof(*sdi), M_DEVBUF, M_ZERO | M_WAITOK);
476 if (ofw_bus_gen_setup_devinfo(&sdi->sdi_obdinfo, node) != 0) {
477 free(sdi, M_DEVBUF);
478 return (NULL);
479 }
480 resource_list_init(&sdi->sdi_rl);
481 slot = -1;
482 nreg = OF_getprop_alloc(node, "reg", sizeof(*reg), (void **)®);
483 if (nreg == -1) {
484 if (sdi->sdi_obdinfo.obd_type == NULL ||
485 strcmp(sdi->sdi_obdinfo.obd_type, "hierarchical") != 0) {
486 device_printf(dev, "<%s>: incomplete\n",
487 sdi->sdi_obdinfo.obd_name);
488 goto fail;
489 }
490 } else {
491 for (i = 0; i < nreg; i++) {
492 base = reg[i].sbr_offset;
493 if (SBUS_ABS(base)) {
494 rslot = SBUS_ABS_TO_SLOT(base);
495 base = SBUS_ABS_TO_OFFSET(base);
496 } else
497 rslot = reg[i].sbr_slot;
498 if (slot != -1 && slot != rslot) {
499 device_printf(dev, "<%s>: multiple slots\n",
500 sdi->sdi_obdinfo.obd_name);
501 free(reg, M_OFWPROP);
502 goto fail;
503 }
504 slot = rslot;
505
506 resource_list_add(&sdi->sdi_rl, SYS_RES_MEMORY, i,
507 base, base + reg[i].sbr_size, reg[i].sbr_size);
508 }
509 free(reg, M_OFWPROP);
510 }
511 sdi->sdi_slot = slot;
512
513 /*
514 * The `interrupts' property contains the SBus interrupt level.
515 */
516 nintr = OF_getprop_alloc(node, "interrupts", sizeof(*intr),
517 (void **)&intr);
518 if (nintr != -1) {
519 for (i = 0; i < nintr; i++) {
520 iv = intr[i];
521 /*
522 * SBus card devices need the slot number encoded into
523 * the vector as this is generally not done.
524 */
525 if ((iv & INTMAP_OBIO_MASK) == 0)
526 iv |= slot << 3;
527 iv = INTMAP_VEC(sc->sc_ign, iv);
528 resource_list_add(&sdi->sdi_rl, SYS_RES_IRQ, i,
529 iv, iv, 1);
530 }
531 free(intr, M_OFWPROP);
532 }
533 if (OF_getprop(node, "burst-sizes", &sdi->sdi_burstsz,
534 sizeof(sdi->sdi_burstsz)) == -1)
535 sdi->sdi_burstsz = sc->sc_burst;
536 else
537 sdi->sdi_burstsz &= sc->sc_burst;
538 if (OF_getprop(node, "clock-frequency", &sdi->sdi_clockfreq,
539 sizeof(sdi->sdi_clockfreq)) == -1)
540 sdi->sdi_clockfreq = sc->sc_clockfreq;
541
542 return (sdi);
543
544 fail:
545 sbus_destroy_dinfo(sdi);
546 return (NULL);
547 }
548
549 static void
550 sbus_destroy_dinfo(struct sbus_devinfo *dinfo)
551 {
552
553 resource_list_free(&dinfo->sdi_rl);
554 ofw_bus_gen_destroy_devinfo(&dinfo->sdi_obdinfo);
555 free(dinfo, M_DEVBUF);
556 }
557
558 static int
559 sbus_print_child(device_t dev, device_t child)
560 {
561 int rv;
562
563 rv = bus_print_child_header(dev, child);
564 rv += sbus_print_res(device_get_ivars(child));
565 rv += bus_print_child_footer(dev, child);
566 return (rv);
567 }
568
569 static void
570 sbus_probe_nomatch(device_t dev, device_t child)
571 {
572 const char *type;
573
574 device_printf(dev, "<%s>", ofw_bus_get_name(child));
575 sbus_print_res(device_get_ivars(child));
576 type = ofw_bus_get_type(child);
577 printf(" type %s (no driver attached)\n",
578 type != NULL ? type : "unknown");
579 }
580
581 static int
582 sbus_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
583 {
584 struct sbus_softc *sc;
585 struct sbus_devinfo *dinfo;
586
587 sc = device_get_softc(dev);
588 if ((dinfo = device_get_ivars(child)) == NULL)
589 return (ENOENT);
590 switch (which) {
591 case SBUS_IVAR_BURSTSZ:
592 *result = dinfo->sdi_burstsz;
593 break;
594 case SBUS_IVAR_CLOCKFREQ:
595 *result = dinfo->sdi_clockfreq;
596 break;
597 case SBUS_IVAR_IGN:
598 *result = sc->sc_ign;
599 break;
600 case SBUS_IVAR_SLOT:
601 *result = dinfo->sdi_slot;
602 break;
603 default:
604 return (ENOENT);
605 }
606 return (0);
607 }
608
609 static struct resource_list *
610 sbus_get_resource_list(device_t dev, device_t child)
611 {
612 struct sbus_devinfo *sdi;
613
614 sdi = device_get_ivars(child);
615 return (&sdi->sdi_rl);
616 }
617
618 static void
619 sbus_intr_enable(void *arg)
620 {
621 struct intr_vector *iv = arg;
622 struct sbus_icarg *sica = iv->iv_icarg;
623
624 SYSIO_WRITE8(sica->sica_sc, sica->sica_map,
625 INTMAP_ENABLE(iv->iv_vec, iv->iv_mid));
626 }
627
628 static void
629 sbus_intr_disable(void *arg)
630 {
631 struct intr_vector *iv = arg;
632 struct sbus_icarg *sica = iv->iv_icarg;
633
634 SYSIO_WRITE8(sica->sica_sc, sica->sica_map, iv->iv_vec);
635 }
636
637 static void
638 sbus_intr_assign(void *arg)
639 {
640 struct intr_vector *iv = arg;
641 struct sbus_icarg *sica = iv->iv_icarg;
642
643 SYSIO_WRITE8(sica->sica_sc, sica->sica_map, INTMAP_TID(
644 SYSIO_READ8(sica->sica_sc, sica->sica_map), iv->iv_mid));
645 }
646
647 static void
648 sbus_intr_clear(void *arg)
649 {
650 struct intr_vector *iv = arg;
651 struct sbus_icarg *sica = iv->iv_icarg;
652
653 SYSIO_WRITE8(sica->sica_sc, sica->sica_clr, INTCLR_IDLE);
654 }
655
656 static int
657 sbus_find_intrmap(struct sbus_softc *sc, u_int ino, bus_addr_t *intrmapptr,
658 bus_addr_t *intrclrptr)
659 {
660 bus_addr_t intrclr, intrmap;
661 int i;
662
663 if (ino > SBUS_MAX_INO) {
664 device_printf(sc->sc_dev, "out of range INO %d requested\n",
665 ino);
666 return (0);
667 }
668
669 if ((ino & INTMAP_OBIO_MASK) == 0) {
670 intrmap = SBR_SLOT0_INT_MAP + INTSLOT(ino) * 8;
671 intrclr = SBR_SLOT0_INT_CLR +
672 (INTSLOT(ino) * 8 * 8) + (INTPRI(ino) * 8);
673 } else {
674 intrclr = 0;
675 for (i = 0, intrmap = SBR_SCSI_INT_MAP;
676 intrmap <= SBR_RESERVED_INT_MAP; intrmap += 8, i++) {
677 if (INTVEC(SYSIO_READ8(sc, intrmap)) ==
678 INTMAP_VEC(sc->sc_ign, ino)) {
679 intrclr = SBR_SCSI_INT_CLR + i * 8;
680 break;
681 }
682 }
683 if (intrclr == 0)
684 return (0);
685 }
686 if (intrmapptr != NULL)
687 *intrmapptr = intrmap;
688 if (intrclrptr != NULL)
689 *intrclrptr = intrclr;
690 return (1);
691 }
692
693 static int
694 sbus_setup_intr(device_t dev, device_t child, struct resource *ires, int flags,
695 driver_filter_t *filt, driver_intr_t *intr, void *arg, void **cookiep)
696 {
697 struct sbus_softc *sc;
698 u_long vec;
699
700 sc = device_get_softc(dev);
701 /*
702 * Make sure the vector is fully specified and we registered
703 * our interrupt controller for it.
704 */
705 vec = rman_get_start(ires);
706 if (INTIGN(vec) != sc->sc_ign || intr_vectors[vec].iv_ic != &sbus_ic) {
707 device_printf(dev, "invalid interrupt vector 0x%lx\n", vec);
708 return (EINVAL);
709 }
710 return (bus_generic_setup_intr(dev, child, ires, flags, filt, intr,
711 arg, cookiep));
712 }
713
714 static struct resource *
715 sbus_alloc_resource(device_t bus, device_t child, int type, int *rid,
716 u_long start, u_long end, u_long count, u_int flags)
717 {
718 struct sbus_softc *sc;
719 struct rman *rm;
720 struct resource *rv;
721 struct resource_list *rl;
722 struct resource_list_entry *rle;
723 device_t schild;
724 bus_space_handle_t bh;
725 bus_addr_t toffs;
726 bus_size_t tend;
727 int i, slot;
728 int isdefault, needactivate, passthrough;
729
730 isdefault = (start == 0UL && end == ~0UL);
731 needactivate = flags & RF_ACTIVE;
732 passthrough = (device_get_parent(child) != bus);
733 rle = NULL;
734 sc = device_get_softc(bus);
735 rl = BUS_GET_RESOURCE_LIST(bus, child);
736 switch (type) {
737 case SYS_RES_IRQ:
738 return (resource_list_alloc(rl, bus, child, type, rid, start,
739 end, count, flags));
740 case SYS_RES_MEMORY:
741 if (!passthrough) {
742 rle = resource_list_find(rl, type, *rid);
743 if (rle == NULL)
744 return (NULL);
745 if (rle->res != NULL)
746 panic("%s: resource entry is busy", __func__);
747 if (isdefault) {
748 start = rle->start;
749 count = ulmax(count, rle->count);
750 end = ulmax(rle->end, start + count - 1);
751 }
752 }
753 rm = NULL;
754 bh = toffs = tend = 0;
755 schild = child;
756 while (device_get_parent(schild) != bus)
757 schild = device_get_parent(schild);
758 slot = sbus_get_slot(schild);
759 for (i = 0; i < sc->sc_nrange; i++) {
760 if (sc->sc_rd[i].rd_slot != slot ||
761 start < sc->sc_rd[i].rd_coffset ||
762 start > sc->sc_rd[i].rd_cend)
763 continue;
764 /* Disallow cross-range allocations. */
765 if (end > sc->sc_rd[i].rd_cend)
766 return (NULL);
767 /* We've found the connection to the parent bus */
768 toffs = start - sc->sc_rd[i].rd_coffset;
769 tend = end - sc->sc_rd[i].rd_coffset;
770 rm = &sc->sc_rd[i].rd_rman;
771 bh = sc->sc_rd[i].rd_bushandle;
772 break;
773 }
774 if (rm == NULL)
775 return (NULL);
776 flags &= ~RF_ACTIVE;
777 rv = rman_reserve_resource(rm, toffs, tend, count, flags,
778 child);
779 if (rv == NULL)
780 return (NULL);
781 rman_set_rid(rv, *rid);
782 rman_set_bustag(rv, sc->sc_cbustag);
783 rman_set_bushandle(rv, bh + rman_get_start(rv));
784 if (needactivate) {
785 if (bus_activate_resource(child, type, *rid, rv)) {
786 rman_release_resource(rv);
787 return (NULL);
788 }
789 }
790 if (!passthrough)
791 rle->res = rv;
792 return (rv);
793 default:
794 return (NULL);
795 }
796 }
797
798 static int
799 sbus_activate_resource(device_t bus, device_t child, int type, int rid,
800 struct resource *r)
801 {
802 void *p;
803 int error;
804
805 if (type == SYS_RES_IRQ) {
806 return (BUS_ACTIVATE_RESOURCE(device_get_parent(bus),
807 child, type, rid, r));
808 }
809 if (type == SYS_RES_MEMORY) {
810 /*
811 * Need to memory-map the device space, as some drivers
812 * depend on the virtual address being set and usable.
813 */
814 error = sparc64_bus_mem_map(rman_get_bustag(r),
815 rman_get_bushandle(r), rman_get_size(r), 0, 0, &p);
816 if (error != 0)
817 return (error);
818 rman_set_virtual(r, p);
819 }
820 return (rman_activate_resource(r));
821 }
822
823 static int
824 sbus_deactivate_resource(device_t bus, device_t child, int type, int rid,
825 struct resource *r)
826 {
827
828 if (type == SYS_RES_IRQ) {
829 return (BUS_DEACTIVATE_RESOURCE(device_get_parent(bus),
830 child, type, rid, r));
831 }
832 if (type == SYS_RES_MEMORY) {
833 sparc64_bus_mem_unmap(rman_get_virtual(r), rman_get_size(r));
834 rman_set_virtual(r, NULL);
835 }
836 return (rman_deactivate_resource(r));
837 }
838
839 static int
840 sbus_release_resource(device_t bus, device_t child, int type, int rid,
841 struct resource *r)
842 {
843 struct resource_list *rl;
844 struct resource_list_entry *rle;
845 int error, passthrough;
846
847 passthrough = (device_get_parent(child) != bus);
848 rl = BUS_GET_RESOURCE_LIST(bus, child);
849 if (type == SYS_RES_IRQ)
850 return (resource_list_release(rl, bus, child, type, rid, r));
851 if ((rman_get_flags(r) & RF_ACTIVE) != 0) {
852 error = bus_deactivate_resource(child, type, rid, r);
853 if (error != 0)
854 return (error);
855 }
856 error = rman_release_resource(r);
857 if (error != 0 || passthrough)
858 return (error);
859 rle = resource_list_find(rl, type, rid);
860 if (rle == NULL)
861 panic("%s: cannot find resource", __func__);
862 if (rle->res == NULL)
863 panic("%s: resource entry is not busy", __func__);
864 rle->res = NULL;
865 return (0);
866 }
867
868 static bus_dma_tag_t
869 sbus_get_dma_tag(device_t bus, device_t child)
870 {
871 struct sbus_softc *sc;
872
873 sc = device_get_softc(bus);
874 return (sc->sc_cdmatag);
875 }
876
877 static const struct ofw_bus_devinfo *
878 sbus_get_devinfo(device_t bus, device_t child)
879 {
880 struct sbus_devinfo *sdi;
881
882 sdi = device_get_ivars(child);
883 return (&sdi->sdi_obdinfo);
884 }
885
886 /*
887 * Handle an overtemp situation.
888 *
889 * SPARCs have temperature sensors which generate interrupts
890 * if the machine's temperature exceeds a certain threshold.
891 * This handles the interrupt and powers off the machine.
892 * The same needs to be done to PCI controller drivers.
893 */
894 static void
895 sbus_overtemp(void *arg)
896 {
897 static int shutdown;
898
899 /* As the interrupt is cleared we may be called multiple times. */
900 if (shutdown != 0)
901 return;
902 shutdown++;
903 printf("DANGER: OVER TEMPERATURE detected\nShutting down NOW.\n");
904 shutdown_nice(RB_POWEROFF);
905 }
906
907 /* Try to shut down in time in case of power failure. */
908 static void
909 sbus_pwrfail(void *arg)
910 {
911 static int shutdown;
912
913 /* As the interrupt is cleared we may be called multiple times. */
914 if (shutdown != 0)
915 return;
916 shutdown++;
917 printf("Power failure detected\nShutting down NOW.\n");
918 shutdown_nice(0);
919 }
920
921 static bus_space_tag_t
922 sbus_alloc_bustag(struct sbus_softc *sc)
923 {
924 bus_space_tag_t sbt;
925
926 sbt = (bus_space_tag_t)malloc(sizeof(struct bus_space_tag), M_DEVBUF,
927 M_NOWAIT | M_ZERO);
928 if (sbt == NULL)
929 panic("%s: out of memory", __func__);
930
931 sbt->bst_cookie = sc;
932 sbt->bst_parent = rman_get_bustag(sc->sc_sysio_res);
933 sbt->bst_type = SBUS_BUS_SPACE;
934 return (sbt);
935 }
936
937 static int
938 sbus_print_res(struct sbus_devinfo *sdi)
939 {
940 int rv;
941
942 rv = 0;
943 rv += resource_list_print_type(&sdi->sdi_rl, "mem", SYS_RES_MEMORY,
944 "%#lx");
945 rv += resource_list_print_type(&sdi->sdi_rl, "irq", SYS_RES_IRQ,
946 "%ld");
947 return (rv);
948 }
Cache object: 82f2b43e13be80bf3d87450cc14c979d
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