Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]
FreeBSD/Linux Kernel Cross Reference
sys/sparc64/sparc64/db_disasm.c
Version:
- FREEBSD - FREEBSD-13-STABLE - FREEBSD-13-0 - FREEBSD-12-STABLE - FREEBSD-12-0 - FREEBSD-11-STABLE - FREEBSD-11-0 - FREEBSD-10-STABLE - FREEBSD-10-0 - FREEBSD-9-STABLE - FREEBSD-9-0 - FREEBSD-8-STABLE - FREEBSD-8-0 - FREEBSD-7-STABLE - FREEBSD-7-0 - FREEBSD-6-STABLE - FREEBSD-6-0 - FREEBSD-5-STABLE - FREEBSD-5-0 - FREEBSD-4-STABLE - FREEBSD-3-STABLE - FREEBSD22 - l41 - OPENBSD - linux-2.6 - MK84 - PLAN9 - xnu-8792
SearchContext: - none - 3 - 10
SearchContext: - none - 3 - 10
1 /*- 2 * Copyright (c) 1994 David S. Miller, davem@nadzieja.rutgers.edu 3 * Copyright (c) 1995 Paul Kranenburg 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by David Miller. 17 * 4. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 * from: NetBSD: db_disasm.c,v 1.9 2000/08/16 11:29:42 pk Exp 31 * $FreeBSD: releng/6.0/sys/sparc64/sparc64/db_disasm.c 139825 2005-01-07 02:29:27Z imp $ 32 */ 33 34 #include <sys/param.h> 35 #include <sys/systm.h> 36 37 #include <ddb/ddb.h> 38 #include <ddb/db_access.h> 39 #include <ddb/db_sym.h> 40 41 #include <machine/db_machdep.h> 42 #include <machine/instr.h> 43 44 #define SIGN(v) (((v)<0)?"-":"") 45 46 /* 47 * All Sparc instructions are 32-bits, with the one exception being 48 * the set instruction which is actually a macro which expands into 49 * two instructions... 50 * 51 * There are 5 different fields that can be used to identify which 52 * operation is encoded into a particular 32-bit insn. There are 3 53 * formats for instuctions, which one being used is determined by 54 * bits 30-31 of the insn. Here are the bit fields and their names: 55 * 56 * 1100 0000 0000 0000 0000 0000 0000 0000 op field, determines format 57 * 0000 0001 1100 0000 0000 0000 0000 0000 op2 field, format 2 only 58 * 0000 0001 1111 1000 0000 0000 0000 0000 op3 field, format 3 only 59 * 0000 0000 0000 0000 0010 0000 0000 0000 f3i bit, format 3 only 60 * 0000 0000 0000 0000 0001 0000 0000 0000 X bit, format 3 only 61 */ 62 63 /* FORMAT macros used in sparc_i table to decode each opcode */ 64 #define FORMAT1(a) (EIF_OP(a)) 65 #define FORMAT2(a,b) (EIF_OP(a) | EIF_F2_OP2(b)) 66 /* For formats 3 and 4 */ 67 #define FORMAT3(a,b,c) (EIF_OP(a) | EIF_F3_OP3(b) | EIF_F3_I(c)) 68 #define FORMAT3F(a,b,c) (EIF_OP(a) | EIF_F3_OP3(b) | EIF_F3_OPF(c)) 69 70 /* Helper macros to construct OP3 & OPF */ 71 #define OP3_X(x,y) ((((x) & 3) << 4) | ((y) & 0xf)) 72 #define OPF_X(x,y) ((((x) & 0x1f) << 4) | ((y) & 0xf)) 73 74 /* COND condition codes field... */ 75 #define COND2(y,x) (((((y)<<4) & 1)|((x) & 0xf)) << 14) 76 77 struct sparc_insn { 78 unsigned int match; 79 char* name; 80 char* format; 81 }; 82 83 char* regs[] = { 84 "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7", 85 "o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7", 86 "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7", 87 "i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7" 88 }; 89 90 char* priv_regs[] = { 91 "tpc", "tnpc", "tstate", "tt", "tick", "tba", "pstate", "tl", 92 "pil", "cwp", "cansave", "canrestore", "cleanwin", "otherwin", 93 "wstate", "fq", 94 "", "", "", "", "", "", "", "", 95 "", "", "", "", "", "", "", "ver" 96 }; 97 98 char* state_regs[] = { 99 "y", "", "ccr", "asi", "tick", "pc", "fprs", "asr", 100 "", "", "", "", "", "", "", "", 101 "pcr", "pic", "dcr", "gsr", "set_softint", "clr_softint", "softint", "tick_cmpr", "", 102 "", "", "", "", "", "", "", "" 103 }; 104 105 char* ccodes[] = { 106 "fcc0", "fcc1", "fcc2", "fcc3", "icc", "", "xcc", "" 107 }; 108 109 char* prefetch[] = { 110 "n_reads", "one_read", "n_writes", "one_write", "page" 111 }; 112 113 114 /* The sparc instruction table has a format field which tells what 115 the operand structure for this instruction is. Here are the codes: 116 117 Modifiers (nust be first): 118 a -- opcode has annul bit 119 p -- opcode has branch prediction bit 120 121 Codes: 122 1 -- source register operand stored in rs1 123 2 -- source register operand stored in rs2 124 d -- destination register operand stored in rd 125 3 -- floating source register in rs1 126 4 -- floating source register in rs2 127 e -- floating destination register in rd 128 i -- 13-bit immediate value stored in simm13 129 j -- 11-bit immediate value stored in simm11 130 l -- displacement using d16lo and d16hi 131 m -- 22-bit fcc displacement value 132 n -- 30-bit displacement used in call insns 133 o -- %fcc number specified in cc1 and cc0 fields 134 p -- address computed by the contents of rs1+rs2 135 q -- address computed by the contents of rs1+simm13 136 r -- prefetch 137 s -- %asi is implicit in the insn, rs1 value not used 138 t -- immediate 8-bit asi value 139 u -- 19-bit fcc displacement value 140 5 -- hard register, %fsr lower-half 141 6 -- hard register, %fsr all 142 7 -- [reg_addr rs1+rs2] imm_asi 143 8 -- [reg_addr rs1+simm13] %asi 144 9 -- logical or of the cmask and mmask fields (membar insn) 145 0 -- icc or xcc condition codes register 146 . -- %fcc, %icc, or %xcc in opf_cc field 147 r -- prefection function stored in fcn field 148 A -- privileged register encoded in rs1 149 B -- state register encoded in rs1 150 C -- %hi(value) where value is stored in imm22 field 151 D -- 32-bit shift count in shcnt32 152 E -- 64-bit shift count in shcnt64 153 F -- software trap number stored in sw_trap 154 G -- privileged register encoded in rd 155 H -- state register encoded in rd 156 157 V8 only: 158 Y -- write y register 159 P -- write psr register 160 T -- write tbr register 161 W -- write wim register 162 */ 163 164 165 struct sparc_insn sparc_i[] = { 166 167 /* 168 * Format 1: Call 169 */ 170 {(FORMAT1(1)), "call", "n"}, 171 172 /* 173 * Format 0: Sethi & Branches 174 */ 175 /* Illegal Instruction Trap */ 176 {(FORMAT2(0, 0)), "illtrap", "m"}, 177 178 /* Note: if imm22 is zero then this is actually a "nop" grrr... */ 179 {(FORMAT2(0, 0x4)), "sethi", "Cd"}, 180 181 /* Branch on Integer Co`ndition Codes "Bicc" */ 182 {(FORMAT2(0, 2) | EIF_F2_COND(8)), "ba", "a,m"}, 183 {(FORMAT2(0, 2) | EIF_F2_COND(0)), "bn", "a,m"}, 184 {(FORMAT2(0, 2) | EIF_F2_COND(9)), "bne", "a,m"}, 185 {(FORMAT2(0, 2) | EIF_F2_COND(1)), "be", "a,m"}, 186 {(FORMAT2(0, 2) | EIF_F2_COND(10)), "bg", "a,m"}, 187 {(FORMAT2(0, 2) | EIF_F2_COND(2)), "ble", "a,m"}, 188 {(FORMAT2(0, 2) | EIF_F2_COND(11)), "bge", "a,m"}, 189 {(FORMAT2(0, 2) | EIF_F2_COND(3)), "bl", "a,m"}, 190 {(FORMAT2(0, 2) | EIF_F2_COND(12)), "bgu", "a,m"}, 191 {(FORMAT2(0, 2) | EIF_F2_COND(4)), "bleu", "a,m"}, 192 {(FORMAT2(0, 2) | EIF_F2_COND(13)), "bcc", "a,m"}, 193 {(FORMAT2(0, 2) | EIF_F2_COND(5)), "bcs", "a,m"}, 194 {(FORMAT2(0, 2) | EIF_F2_COND(14)), "bpos", "a,m"}, 195 {(FORMAT2(0, 2) | EIF_F2_COND(6)), "bneg", "a,m"}, 196 {(FORMAT2(0, 2) | EIF_F2_COND(15)), "bvc", "a,m"}, 197 {(FORMAT2(0, 2) | EIF_F2_COND(7)), "bvs", "a,m"}, 198 199 /* Branch on Integer Condition Codes with Prediction "BPcc" */ 200 {(FORMAT2(0, 1) | EIF_F2_COND(8)), "ba", "ap,u"}, 201 {(FORMAT2(0, 1) | EIF_F2_COND(0)), "bn", "ap,u"}, 202 {(FORMAT2(0, 1) | EIF_F2_COND(9)), "bne", "ap,u"}, 203 {(FORMAT2(0, 1) | EIF_F2_COND(1)), "be", "ap,u"}, 204 {(FORMAT2(0, 1) | EIF_F2_COND(10)), "bg", "ap,u"}, 205 {(FORMAT2(0, 1) | EIF_F2_COND(2)), "ble", "ap,u"}, 206 {(FORMAT2(0, 1) | EIF_F2_COND(11)), "bge", "ap,u"}, 207 {(FORMAT2(0, 1) | EIF_F2_COND(3)), "bl", "ap,u"}, 208 {(FORMAT2(0, 1) | EIF_F2_COND(12)), "bgu", "ap,u"}, 209 {(FORMAT2(0, 1) | EIF_F2_COND(4)), "bleu", "ap,u"}, 210 {(FORMAT2(0, 1) | EIF_F2_COND(13)), "bcc", "ap,u"}, 211 {(FORMAT2(0, 1) | EIF_F2_COND(5)), "bcs", "ap,u"}, 212 {(FORMAT2(0, 1) | EIF_F2_COND(14)), "bpos", "ap,u"}, 213 {(FORMAT2(0, 1) | EIF_F2_COND(6)), "bneg", "ap,u"}, 214 {(FORMAT2(0, 1) | EIF_F2_COND(15)), "bvc", "ap,u"}, 215 {(FORMAT2(0, 1) | EIF_F2_COND(7)), "bvs", "ap,u"}, 216 217 /* Branch on Integer Register with Prediction "BPr" */ 218 {(FORMAT2(0, 3) | EIF_F2_RCOND(1)), "brz", "ap,1l"}, 219 {(FORMAT2(0, 3) | EIF_F2_A(1) | EIF_F2_P(1) | 220 EIF_F2_RCOND(2)), "brlex", "ap,1l"}, 221 {(FORMAT2(0, 3) | EIF_F2_RCOND(3)), "brlz", "ap,1l"}, 222 {(FORMAT2(0, 3) | EIF_F2_RCOND(5)), "brnz", "ap,1l"}, 223 {(FORMAT2(0, 3) | EIF_F2_RCOND(6)), "brgz", "ap,1l"}, 224 {(FORMAT2(0, 3) | EIF_F2_RCOND(7)), "brgez", "ap,1l"}, 225 226 /* Branch on Floating-Point Condition Codes with Prediction "FBPfcc" */ 227 {(FORMAT2(0, 5) | EIF_F2_COND(8)), "fba", "ap,m"}, 228 {(FORMAT2(0, 5) | EIF_F2_COND(0)), "fbn", "ap,m"}, 229 {(FORMAT2(0, 5) | EIF_F2_COND(7)), "fbu", "ap,m"}, 230 {(FORMAT2(0, 5) | EIF_F2_COND(6)), "fbg", "ap,m"}, 231 {(FORMAT2(0, 5) | EIF_F2_COND(5)), "fbug", "ap,m"}, 232 {(FORMAT2(0, 5) | EIF_F2_COND(4)), "fbl", "ap,m"}, 233 {(FORMAT2(0, 5) | EIF_F2_COND(3)), "fbul", "ap,m"}, 234 {(FORMAT2(0, 5) | EIF_F2_COND(2)), "fblg", "ap,m"}, 235 {(FORMAT2(0, 5) | EIF_F2_COND(1)), "fbne", "ap,m"}, 236 {(FORMAT2(0, 5) | EIF_F2_COND(9)), "fbe", "ap,m"}, 237 {(FORMAT2(0, 5) | EIF_F2_COND(10)), "fbue", "ap,m"}, 238 {(FORMAT2(0, 5) | EIF_F2_COND(11)), "fbge", "ap,m"}, 239 {(FORMAT2(0, 5) | EIF_F2_COND(12)), "fbuge", "ap,m"}, 240 {(FORMAT2(0, 5) | EIF_F2_COND(13)), "fble", "ap,m"}, 241 {(FORMAT2(0, 5) | EIF_F2_COND(14)), "fbule", "ap,m"}, 242 {(FORMAT2(0, 5) | EIF_F2_COND(15)), "fbo", "ap,m"}, 243 244 /* Branch on Floating-Point Condition Codes "FBfcc" */ 245 {(FORMAT2(0, 6) | EIF_F2_COND(8)), "fba", "a,m"}, 246 {(FORMAT2(0, 6) | EIF_F2_COND(0)), "fbn", "a,m"}, 247 {(FORMAT2(0, 6) | EIF_F2_COND(7)), "fbu", "a,m"}, 248 {(FORMAT2(0, 6) | EIF_F2_COND(6)), "fbg", "a,m"}, 249 {(FORMAT2(0, 6) | EIF_F2_COND(5)), "fbug", "a,m"}, 250 {(FORMAT2(0, 6) | EIF_F2_COND(4)), "fbl", "a,m"}, 251 {(FORMAT2(0, 6) | EIF_F2_COND(3)), "fbul", "a,m"}, 252 {(FORMAT2(0, 6) | EIF_F2_COND(2)), "fblg", "a,m"}, 253 {(FORMAT2(0, 6) | EIF_F2_COND(1)), "fbne", "a,m"}, 254 {(FORMAT2(0, 6) | EIF_F2_COND(9)), "fbe", "a,m"}, 255 {(FORMAT2(0, 6) | EIF_F2_COND(10)), "fbue", "a,m"}, 256 {(FORMAT2(0, 6) | EIF_F2_COND(11)), "fbge", "a,m"}, 257 {(FORMAT2(0, 6) | EIF_F2_COND(12)), "fbuge", "a,m"}, 258 {(FORMAT2(0, 6) | EIF_F2_COND(13)), "fble", "a,m"}, 259 {(FORMAT2(0, 6) | EIF_F2_COND(14)), "fbule", "a,m"}, 260 {(FORMAT2(0, 6) | EIF_F2_COND(15)), "fbo", "a,m"}, 261 262 263 264 /* 265 * Format 3/2: Arithmetic & misc (table 32, appendix E) 266 */ 267 {FORMAT3(2, OP3_X(0,0), 0), "add", "12d"}, 268 {FORMAT3(2, OP3_X(0,0), 1), "add", "1id"}, 269 {FORMAT3(2, OP3_X(1,0), 0), "addcc", "12d"}, 270 {FORMAT3(2, OP3_X(1,0), 1), "addcc", "1id"}, 271 {FORMAT3(2, OP3_X(2,0), 0), "taddcc", "12d"}, 272 {FORMAT3(2, OP3_X(2,0), 1), "taddcc", "1id"}, 273 {(FORMAT3(2, 0x30, 1) | EIF_F3_RD(0xf)), "sir", "i"}, 274 {FORMAT3(2, OP3_X(3,0), 0), "wr", "12H"}, 275 {FORMAT3(2, OP3_X(3,0), 1), "wr", "1iH"}, 276 277 {FORMAT3(2, OP3_X(0,1), 0), "and", "12d"}, 278 {FORMAT3(2, OP3_X(0,1), 1), "and", "1id"}, 279 {FORMAT3(2, OP3_X(1,1), 0), "andcc", "12d"}, 280 {FORMAT3(2, OP3_X(1,1), 1), "andcc", "1id"}, 281 {FORMAT3(2, OP3_X(2,1), 0), "tsubcc", "12d"}, 282 {FORMAT3(2, OP3_X(2,1), 1), "tsubcc", "1id"}, 283 {FORMAT3(2, OP3_X(3,1), 0), "saved", ""}, 284 {FORMAT3(2, OP3_X(3,1), 0) | EIF_F3_FCN(1), "restored", ""}, 285 286 {FORMAT3(2, OP3_X(0,2), 0), "or", "12d"}, 287 {FORMAT3(2, OP3_X(0,2), 1), "or", "1id"}, 288 {FORMAT3(2, OP3_X(1,2), 0), "orcc", "12d"}, 289 {FORMAT3(2, OP3_X(1,2), 1), "orcc", "1id"}, 290 {FORMAT3(2, OP3_X(2,2), 0), "taddcctv", "12d"}, 291 {FORMAT3(2, OP3_X(2,2), 1), "taddcctv", "1id"}, 292 {FORMAT3(2, OP3_X(3,2), 0), "wrpr", "12G"}, 293 {FORMAT3(2, OP3_X(3,2), 1), "wrpr", "1iG"}, 294 295 {FORMAT3(2, OP3_X(0,3), 0), "xor", "12d"}, 296 {FORMAT3(2, OP3_X(0,3), 1), "xor", "1id"}, 297 {FORMAT3(2, OP3_X(1,3), 0), "xorcc", "12d"}, 298 {FORMAT3(2, OP3_X(1,3), 1), "xorcc", "1id"}, 299 {FORMAT3(2, OP3_X(2,3), 0), "tsubcctv", "12d"}, 300 {FORMAT3(2, OP3_X(2,3), 1), "tsubcctv", "1id"}, 301 {FORMAT3(2, OP3_X(3,3), 0), "UNDEFINED", ""}, 302 303 {FORMAT3(2, OP3_X(0,4), 0), "sub", "12d"}, 304 {FORMAT3(2, OP3_X(0,4), 1), "sub", "1id"}, 305 {FORMAT3(2, OP3_X(1,4), 0), "subcc", "12d"}, 306 {FORMAT3(2, OP3_X(1,4), 1), "subcc", "1id"}, 307 {FORMAT3(2, OP3_X(2,4), 0), "mulscc", "12d"}, 308 {FORMAT3(2, OP3_X(2,4), 1), "mulscc", "1id"}, 309 {FORMAT3(2, OP3_X(3,4), 1), "FPop1", ""}, /* see below */ 310 311 {FORMAT3(2, OP3_X(0,5), 0), "andn", "12d"}, 312 {FORMAT3(2, OP3_X(0,5), 1), "andn", "1id"}, 313 {FORMAT3(2, OP3_X(1,5), 0), "andncc", "12d"}, 314 {FORMAT3(2, OP3_X(1,5), 1), "andncc", "1id"}, 315 {FORMAT3(2, OP3_X(2,5), 0), "sll", "12d"}, 316 {FORMAT3(2, OP3_X(2,5), 1), "sll", "1Dd"}, 317 {FORMAT3(2, OP3_X(2,5), 0) | EIF_F3_X(1), "sllx", "12d"}, 318 {FORMAT3(2, OP3_X(2,5), 1) | EIF_F3_X(1), "sllx", "1Ed"}, 319 {FORMAT3(2, OP3_X(3,5), 1), "FPop2", ""}, /* see below */ 320 321 {FORMAT3(2, OP3_X(0,6), 0), "orn", "12d"}, 322 {FORMAT3(2, OP3_X(0,6), 1), "orn", "1id"}, 323 {FORMAT3(2, OP3_X(1,6), 0), "orncc", "12d"}, 324 {FORMAT3(2, OP3_X(1,6), 1), "orncc", "1id"}, 325 {FORMAT3(2, OP3_X(2,6), 0), "srl", "12d"}, 326 {FORMAT3(2, OP3_X(2,6), 1), "srl", "1Dd"}, 327 {FORMAT3(2, OP3_X(2,6), 0) | EIF_F3_X(1), "srlx", "12d"}, 328 {FORMAT3(2, OP3_X(2,6), 1) | EIF_F3_X(1), "srlx", "1Ed"}, 329 {FORMAT3(2, OP3_X(3,6), 1), "impdep1", ""}, 330 331 {FORMAT3(2, OP3_X(0,7), 0), "xorn", "12d"}, 332 {FORMAT3(2, OP3_X(0,7), 1), "xorn", "1id"}, 333 {FORMAT3(2, OP3_X(1,7), 0), "xorncc", "12d"}, 334 {FORMAT3(2, OP3_X(1,7), 1), "xorncc", "1id"}, 335 {FORMAT3(2, OP3_X(2,7), 0), "sra", "12d"}, 336 {FORMAT3(2, OP3_X(2,7), 1), "sra", "1Dd"}, 337 {FORMAT3(2, OP3_X(2,7), 0) | EIF_F3_X(1), "srax", "12d"}, 338 {FORMAT3(2, OP3_X(2,7), 1) | EIF_F3_X(1), "srax", "1Ed"}, 339 {FORMAT3(2, OP3_X(3,7), 1), "impdep2", ""}, 340 341 {FORMAT3(2, OP3_X(0,8), 0), "addc", "12d"}, 342 {FORMAT3(2, OP3_X(0,8), 1), "addc", "1id"}, 343 {FORMAT3(2, OP3_X(1,8), 0), "addccc", "12d"}, 344 {FORMAT3(2, OP3_X(1,8), 1), "addccc", "1id"}, 345 {(FORMAT3(2, 0x28, 1) | EIF_F3_RS1(15)), "membar", "9"}, 346 {(FORMAT3(2, 0x28, 0) | EIF_F3_RS1(15)), "stbar", ""}, 347 {FORMAT3(2, OP3_X(2,8), 0), "rd", "Bd"}, 348 349 {FORMAT3(2, OP3_X(3,8), 0), "jmpl", "pd"}, 350 {FORMAT3(2, OP3_X(3,8), 1), "jmpl", "qd"}, 351 352 {FORMAT3(2, OP3_X(0,9), 0), "mulx", "12d"}, 353 {FORMAT3(2, OP3_X(0,9), 1), "mulx", "1id"}, 354 {FORMAT3(2, OP3_X(1,9), 0), "UNDEFINED", ""}, 355 {FORMAT3(2, OP3_X(2,9), 0), "UNDEFINED", ""}, 356 {FORMAT3(2, OP3_X(3,9), 0), "return", "p"}, 357 {FORMAT3(2, OP3_X(3,9), 1), "return", "q"}, 358 359 {FORMAT3(2, OP3_X(0,10), 0), "umul", "12d"}, 360 {FORMAT3(2, OP3_X(0,10), 1), "umul", "1id"}, 361 {FORMAT3(2, OP3_X(1,10), 0), "umulcc", "12d"}, 362 {FORMAT3(2, OP3_X(1,10), 1), "umulcc", "1id"}, 363 {FORMAT3(2, OP3_X(2,10), 0), "rdpr", "Ad"}, 364 /* 365 * OP3 = (3,10): TCC: Trap on Integer Condition Codes 366 */ 367 {(FORMAT3(2, OP3_X(3,10), 0) | EIF_F4_TCOND(0x8)), "ta", "12F"}, 368 {(FORMAT3(2, OP3_X(3,10), 1) | EIF_F4_TCOND(0x8)), "ta", "0F"}, 369 {(FORMAT3(2, OP3_X(3,10), 0) | EIF_F4_TCOND(0x0)), "tn", "12F"}, 370 {(FORMAT3(2, OP3_X(3,10), 1) | EIF_F4_TCOND(0x0)), "tn", "0F"}, 371 {(FORMAT3(2, OP3_X(3,10), 0) | EIF_F4_TCOND(0x9)), "tne", "12F"}, 372 {(FORMAT3(2, OP3_X(3,10), 1) | EIF_F4_TCOND(0x9)), "tne", "0F"}, 373 {(FORMAT3(2, OP3_X(3,10), 0) | EIF_F4_TCOND(0x1)), "te", "12F"}, 374 {(FORMAT3(2, OP3_X(3,10), 1) | EIF_F4_TCOND(0x1)), "te", "0F"}, 375 {(FORMAT3(2, OP3_X(3,10), 0) | EIF_F4_TCOND(0xa)), "tg", "12F"}, 376 {(FORMAT3(2, OP3_X(3,10), 1) | EIF_F4_TCOND(0xa)), "tg", "0F"}, 377 {(FORMAT3(2, OP3_X(3,10), 0) | EIF_F4_TCOND(0x2)), "tle", "12F"}, 378 {(FORMAT3(2, OP3_X(3,10), 1) | EIF_F4_TCOND(0x2)), "tle", "0F"}, 379 {(FORMAT3(2, OP3_X(3,10), 0) | EIF_F4_TCOND(0xb)), "tge", "12F"}, 380 {(FORMAT3(2, OP3_X(3,10), 1) | EIF_F4_TCOND(0xb)), "tge", "0F"}, 381 {(FORMAT3(2, OP3_X(3,10), 0) | EIF_F4_TCOND(0x3)), "tl", "12F"}, 382 {(FORMAT3(2, OP3_X(3,10), 1) | EIF_F4_TCOND(0x3)), "tl", "0F"}, 383 {(FORMAT3(2, OP3_X(3,10), 0) | EIF_F4_TCOND(0xc)), "tgu", "12F"}, 384 {(FORMAT3(2, OP3_X(3,10), 1) | EIF_F4_TCOND(0xc)), "tgu", "0F"}, 385 {(FORMAT3(2, OP3_X(3,10), 0) | EIF_F4_TCOND(0x4)), "tleu", "12F"}, 386 {(FORMAT3(2, OP3_X(3,10), 1) | EIF_F4_TCOND(0x4)), "tleu", "0F"}, 387 {(FORMAT3(2, OP3_X(3,10), 0) | EIF_F4_TCOND(0xd)), "tcc", "12F"}, 388 {(FORMAT3(2, OP3_X(3,10), 1) | EIF_F4_TCOND(0xd)), "tcc", "0F"}, 389 {(FORMAT3(2, OP3_X(3,10), 0) | EIF_F4_TCOND(0x5)), "tcs", "12F"}, 390 {(FORMAT3(2, OP3_X(3,10), 1) | EIF_F4_TCOND(0x5)), "tcs", "0F"}, 391 {(FORMAT3(2, OP3_X(3,10), 0) | EIF_F4_TCOND(0xe)), "tpos", "12F"}, 392 {(FORMAT3(2, OP3_X(3,10), 1) | EIF_F4_TCOND(0xe)), "tpos", "0F"}, 393 {(FORMAT3(2, OP3_X(3,10), 0) | EIF_F4_TCOND(0x6)), "tneg", "12F"}, 394 {(FORMAT3(2, OP3_X(3,10), 1) | EIF_F4_TCOND(0x6)), "tneg", "0F"}, 395 {(FORMAT3(2, OP3_X(3,10), 0) | EIF_F4_TCOND(0xf)), "tvc", "12F"}, 396 {(FORMAT3(2, OP3_X(3,10), 1) | EIF_F4_TCOND(0xf)), "tvc", "0F"}, 397 {(FORMAT3(2, OP3_X(3,10), 0) | EIF_F4_TCOND(0x7)), "tvs", "12F"}, 398 {(FORMAT3(2, OP3_X(3,10), 1) | EIF_F4_TCOND(0x7)), "tvs", "0F"}, 399 400 {FORMAT3(2, OP3_X(0,11), 0), "smul", "12d"}, 401 {FORMAT3(2, OP3_X(0,11), 1), "smul", "1id"}, 402 {FORMAT3(2, OP3_X(1,11), 0), "smulcc", "12d"}, 403 {FORMAT3(2, OP3_X(1,11), 1), "smulcc", "1id"}, 404 {FORMAT3(2, OP3_X(2,11), 0), "flushw", ""}, 405 {FORMAT3(2, OP3_X(3,11), 0), "flush", "p"}, 406 {FORMAT3(2, OP3_X(3,11), 1), "flush", "q"}, 407 408 {FORMAT3(2, OP3_X(0,12), 0), "subc", "12d"}, 409 {FORMAT3(2, OP3_X(0,12), 1), "subc", "1id"}, 410 {FORMAT3(2, OP3_X(1,12), 0), "subccc", "12d"}, 411 {FORMAT3(2, OP3_X(1,12), 1), "subccc", "1id"}, 412 /* 413 * OP3 = (2,12): MOVcc, Move Integer Register on Condition 414 */ 415 /* For Integer Condition Codes */ 416 {(FORMAT3(2, OP3_X(2,12), 1) | COND2(1,8)), "mova", "0jd"}, 417 {(FORMAT3(2, OP3_X(2,12), 0) | COND2(1,8)), "mova", "02d"}, 418 {(FORMAT3(2, OP3_X(2,12), 1) | COND2(1,0)), "movn", "0jd"}, 419 {(FORMAT3(2, OP3_X(2,12), 0) | COND2(1,0)), "movn", "02d"}, 420 {(FORMAT3(2, OP3_X(2,12), 1) | COND2(1,9)), "movne", "0jd"}, 421 {(FORMAT3(2, OP3_X(2,12), 0) | COND2(1,9)), "movne", "02d"}, 422 {(FORMAT3(2, OP3_X(2,12), 1) | COND2(1,1)), "move", "0jd"}, 423 {(FORMAT3(2, OP3_X(2,12), 0) | COND2(1,1)), "move", "02d"}, 424 {(FORMAT3(2, OP3_X(2,12), 1) | COND2(1,10)), "movg", "0jd"}, 425 {(FORMAT3(2, OP3_X(2,12), 0) | COND2(1,10)), "movg", "02d"}, 426 {(FORMAT3(2, OP3_X(2,12), 1) | COND2(1,2)), "movle", "0jd"}, 427 {(FORMAT3(2, OP3_X(2,12), 0) | COND2(1,2)), "movle", "02d"}, 428 {(FORMAT3(2, OP3_X(2,12), 1) | COND2(1,11)), "movge", "0jd"}, 429 {(FORMAT3(2, OP3_X(2,12), 0) | COND2(1,11)), "movge", "02d"}, 430 {(FORMAT3(2, OP3_X(2,12), 1) | COND2(1,3)), "movl", "0jd"}, 431 {(FORMAT3(2, OP3_X(2,12), 0) | COND2(1,3)), "movl", "02d"}, 432 {(FORMAT3(2, OP3_X(2,12), 1) | COND2(1,12)), "movgu", "0jd"}, 433 {(FORMAT3(2, OP3_X(2,12), 0) | COND2(1,12)), "movgu", "02d"}, 434 {(FORMAT3(2, OP3_X(2,12), 1) | COND2(1,4)), "movleu", "0jd"}, 435 {(FORMAT3(2, OP3_X(2,12), 0) | COND2(1,4)), "movleu", "02d"}, 436 {(FORMAT3(2, OP3_X(2,12), 1) | COND2(1,13)), "movcc", "0jd"}, 437 {(FORMAT3(2, OP3_X(2,12), 0) | COND2(1,13)), "movcc", "02d"}, 438 {(FORMAT3(2, OP3_X(2,12), 1) | COND2(1,5)), "movcs", "0jd"}, 439 {(FORMAT3(2, OP3_X(2,12), 0) | COND2(1,5)), "movcs", "02d"}, 440 {(FORMAT3(2, OP3_X(2,12), 1) | COND2(1,14)), "movpos", "0jd"}, 441 {(FORMAT3(2, OP3_X(2,12), 0) | COND2(1,14)), "movpos", "02d"}, 442 {(FORMAT3(2, OP3_X(2,12), 1) | COND2(1,6)), "movneg", "0jd"}, 443 {(FORMAT3(2, OP3_X(2,12), 0) | COND2(1,6)), "movneg", "02d"}, 444 {(FORMAT3(2, OP3_X(2,12), 1) | COND2(1,15)), "movvc", "0jd"}, 445 {(FORMAT3(2, OP3_X(2,12), 0) | COND2(1,15)), "movvc", "02d"}, 446 {(FORMAT3(2, OP3_X(2,12), 1) | COND2(1,7)), "movvs", "0jd"}, 447 {(FORMAT3(2, OP3_X(2,12), 0) | COND2(1,7)), "movvs", "02d"}, 448 449 /* For Floating-Point Condition Codes */ 450 {(FORMAT3(2, OP3_X(2,12), 1) | COND2(0,8)), "mova", "ojd"}, 451 {(FORMAT3(2, OP3_X(2,12), 0) | COND2(0,8)), "mova", "o2d"}, 452 {(FORMAT3(2, OP3_X(2,12), 1) | COND2(0,0)), "movn", "ojd"}, 453 {(FORMAT3(2, OP3_X(2,12), 0) | COND2(0,0)), "movn", "o2d"}, 454 {(FORMAT3(2, OP3_X(2,12), 1) | COND2(0,7)), "movu", "ojd"}, 455 {(FORMAT3(2, OP3_X(2,12), 0) | COND2(0,7)), "movu", "o2d"}, 456 {(FORMAT3(2, OP3_X(2,12), 1) | COND2(0,6)), "movg", "ojd"}, 457 {(FORMAT3(2, OP3_X(2,12), 0) | COND2(0,6)), "movg", "o2d"}, 458 {(FORMAT3(2, OP3_X(2,12), 1) | COND2(0,5)), "movug", "ojd"}, 459 {(FORMAT3(2, OP3_X(2,12), 0) | COND2(0,5)), "movug", "o2d"}, 460 {(FORMAT3(2, OP3_X(2,12), 1) | COND2(0,4)), "movl", "ojd"}, 461 {(FORMAT3(2, OP3_X(2,12), 0) | COND2(0,4)), "movl", "o2d"}, 462 {(FORMAT3(2, OP3_X(2,12), 1) | COND2(0,3)), "movul", "ojd"}, 463 {(FORMAT3(2, OP3_X(2,12), 0) | COND2(0,3)), "movul", "o2d"}, 464 {(FORMAT3(2, OP3_X(2,12), 1) | COND2(0,2)), "movlg", "ojd"}, 465 {(FORMAT3(2, OP3_X(2,12), 0) | COND2(0,2)), "movlg", "o2d"}, 466 {(FORMAT3(2, OP3_X(2,12), 1) | COND2(0,1)), "movne", "ojd"}, 467 {(FORMAT3(2, OP3_X(2,12), 0) | COND2(0,1)), "movne", "o2d"}, 468 {(FORMAT3(2, OP3_X(2,12), 1) | COND2(0,9)), "move", "ojd"}, 469 {(FORMAT3(2, OP3_X(2,12), 0) | COND2(0,9)), "move", "o2d"}, 470 {(FORMAT3(2, OP3_X(2,12), 1) | COND2(0,10)), "movue", "ojd"}, 471 {(FORMAT3(2, OP3_X(2,12), 0) | COND2(0,10)), "movue", "o2d"}, 472 {(FORMAT3(2, OP3_X(2,12), 1) | COND2(0,11)), "movge", "ojd"}, 473 {(FORMAT3(2, OP3_X(2,12), 0) | COND2(0,11)), "movge", "o2d"}, 474 {(FORMAT3(2, OP3_X(2,12), 1) | COND2(0,12)), "movuge", "ojd"}, 475 {(FORMAT3(2, OP3_X(2,12), 0) | COND2(0,12)), "movuge", "o2d"}, 476 {(FORMAT3(2, OP3_X(2,12), 1) | COND2(0,13)), "movle", "ojd"}, 477 {(FORMAT3(2, OP3_X(2,12), 0) | COND2(0,13)), "movle", "o2d"}, 478 {(FORMAT3(2, OP3_X(2,12), 1) | COND2(0,14)), "movule", "ojd"}, 479 {(FORMAT3(2, OP3_X(2,12), 0) | COND2(0,14)), "movule", "o2d"}, 480 {(FORMAT3(2, OP3_X(2,12), 1) | COND2(0,15)), "movo", "ojd"}, 481 {(FORMAT3(2, OP3_X(2,12), 0) | COND2(0,15)), "movo", "o2d"}, 482 483 {FORMAT3(2, OP3_X(3,12), 0), "save", "12d"}, 484 {FORMAT3(2, OP3_X(3,12), 1), "save", "1id"}, 485 486 {FORMAT3(2, OP3_X(0,13), 0), "udivx", "12d"}, 487 {FORMAT3(2, OP3_X(0,13), 1), "udivx", "1id"}, 488 {FORMAT3(2, OP3_X(1,13), 0), "UNDEFINED", ""}, 489 {FORMAT3(2, OP3_X(2,13), 0), "sdivx", "12d"}, 490 {FORMAT3(2, OP3_X(2,13), 1), "sdivx", "1id"}, 491 {FORMAT3(2, OP3_X(3,13), 0), "restore", "12d"}, 492 {FORMAT3(2, OP3_X(3,13), 1), "restore", "1id"}, 493 494 {FORMAT3(2, OP3_X(0,14), 0), "udiv", "12d"}, 495 {FORMAT3(2, OP3_X(0,14), 1), "udiv", "1id"}, 496 {FORMAT3(2, OP3_X(1,14), 0), "udivcc", "12d"}, 497 {FORMAT3(2, OP3_X(1,14), 1), "udivcc", "1id"}, 498 {FORMAT3(2, OP3_X(2,14), 0), "popc", "2d"}, 499 {FORMAT3(2, OP3_X(2,14), 1), "popc", "id"}, 500 501 {FORMAT3(2, OP3_X(3,14), 0), "done", ""}, 502 {FORMAT3(2, OP3_X(3,14) | EIF_F3_FCN(1), 1), "retry", ""}, 503 504 {FORMAT3(2, OP3_X(0,15), 0), "sdiv", "12d"}, 505 {FORMAT3(2, OP3_X(0,15), 1), "sdiv", "1id"}, 506 {FORMAT3(2, OP3_X(1,15), 0), "sdivcc", "12d"}, 507 {FORMAT3(2, OP3_X(1,15), 1), "sdivcc", "1id"}, 508 /* 509 * OP3 = (2,15): MOVr: 510 * Move Integer Register on Register Condition 511 */ 512 {(FORMAT3(2, OP3_X(2,15), 1) | EIF_F3_RCOND(1)), "movrz", "1jd"}, 513 {(FORMAT3(2, OP3_X(2,15), 0) | EIF_F3_RCOND(1)), "movrz", "12d"}, 514 {(FORMAT3(2, OP3_X(2,15), 1) | EIF_F3_RCOND(2)), "movrlez", "1jd"}, 515 {(FORMAT3(2, OP3_X(2,15), 0) | EIF_F3_RCOND(2)), "movrlez", "12d"}, 516 {(FORMAT3(2, OP3_X(2,15), 1) | EIF_F3_RCOND(3)), "movrlz", "1jd"}, 517 {(FORMAT3(2, OP3_X(2,15), 0) | EIF_F3_RCOND(3)), "movrlz", "12d"}, 518 {(FORMAT3(2, OP3_X(2,15), 1) | EIF_F3_RCOND(5)), "movrnz", "1jd"}, 519 {(FORMAT3(2, OP3_X(2,15), 0) | EIF_F3_RCOND(5)), "movrnz", "12d"}, 520 {(FORMAT3(2, OP3_X(2,15), 1) | EIF_F3_RCOND(6)), "movrgz", "1jd"}, 521 {(FORMAT3(2, OP3_X(2,15), 0) | EIF_F3_RCOND(6)), "movrgz", "12d"}, 522 {(FORMAT3(2, OP3_X(2,15), 1) | EIF_F3_RCOND(7)), "movrgez", "1jd"}, 523 {(FORMAT3(2, OP3_X(2,15), 0) | EIF_F3_RCOND(7)), "movrgez", "12d"}, 524 525 {FORMAT3(2, OP3_X(3,15), 0), "UNDEFINED", ""}, 526 527 528 /* 529 * Format 3/3: Load and store (appendix E, table 33) 530 */ 531 532 /* Loads */ 533 {(FORMAT3(3, OP3_X(0,0), 0)), "lduw", "pd"}, 534 {(FORMAT3(3, OP3_X(0,0), 1)), "lduw", "qd"}, 535 {(FORMAT3(3, OP3_X(1,0), 0)), "lduwa", "7d"}, 536 {(FORMAT3(3, OP3_X(1,0), 1)), "lduwa", "8d"}, 537 {(FORMAT3(3, OP3_X(2,0), 0)), "ldf", "pe"}, 538 {(FORMAT3(3, OP3_X(2,0), 1)), "ldf", "qe"}, 539 {(FORMAT3(3, OP3_X(3,0), 0)), "ldfa", "7e"}, 540 {(FORMAT3(3, OP3_X(3,0), 1)), "ldfa", "8e"}, 541 542 {(FORMAT3(3, OP3_X(0,1), 0)), "ldub", "pd"}, 543 {(FORMAT3(3, OP3_X(0,1), 1)), "ldub", "qd"}, 544 {(FORMAT3(3, OP3_X(1,1), 0)), "lduba", "7d"}, 545 {(FORMAT3(3, OP3_X(1,1), 1)), "lduba", "8d"}, 546 {(FORMAT3(3, OP3_X(2,1), 0) | EIF_F3_RD(0)), "lduw", "p5"}, 547 {(FORMAT3(3, OP3_X(2,1), 1) | EIF_F3_RD(0)), "lduw", "q5"}, 548 {(FORMAT3(3, OP3_X(2,1), 0) | EIF_F3_RD(1)), "ldx", "p6"}, 549 {(FORMAT3(3, OP3_X(2,1), 1) | EIF_F3_RD(1)), "ldx", "q6"}, 550 551 {(FORMAT3(3, OP3_X(0,2), 0)), "lduh", "pd"}, 552 {(FORMAT3(3, OP3_X(0,2), 1)), "lduh", "qd"}, 553 {(FORMAT3(3, OP3_X(1,2), 0)), "lduha", "7d"}, 554 {(FORMAT3(3, OP3_X(1,2), 1)), "lduha", "8d"}, 555 {(FORMAT3(3, OP3_X(2,2), 0)), "ldq", "pe"}, 556 {(FORMAT3(3, OP3_X(2,2), 1)), "ldq", "qe"}, 557 {(FORMAT3(3, OP3_X(3,2), 0)), "ldqa", "7e"}, 558 {(FORMAT3(3, OP3_X(3,2), 1)), "ldqa", "8e"}, 559 560 {(FORMAT3(3, OP3_X(0,3), 0)), "ldd", "pd"}, 561 {(FORMAT3(3, OP3_X(0,3), 1)), "ldd", "qd"}, 562 {(FORMAT3(3, OP3_X(1,3), 0)), "ldda", "7d"}, 563 {(FORMAT3(3, OP3_X(1,3), 1)), "ldda", "8d"}, 564 {(FORMAT3(3, OP3_X(2,3), 0)), "ldd", "pe"}, 565 {(FORMAT3(3, OP3_X(2,3), 1)), "ldd", "qe"}, 566 {(FORMAT3(3, OP3_X(3,3), 0)), "ldda", "7e"}, 567 {(FORMAT3(3, OP3_X(3,3), 1)), "ldda", "8e"}, 568 569 {(FORMAT3(3, OP3_X(0,4), 0)), "stw", "dp"}, 570 {(FORMAT3(3, OP3_X(0,4), 1)), "stw", "dq"}, 571 {(FORMAT3(3, OP3_X(1,4), 0)), "stwa", "d7"}, 572 {(FORMAT3(3, OP3_X(1,4), 1)), "stwa", "d8"}, 573 {(FORMAT3(3, OP3_X(2,4), 0)), "stf", "ep"}, 574 {(FORMAT3(3, OP3_X(2,4), 1)), "stf", "eq"}, 575 {(FORMAT3(3, OP3_X(3,4), 0)), "stfa", "e7"}, 576 {(FORMAT3(3, OP3_X(3,4), 1)), "stfa", "e8"}, 577 578 {(FORMAT3(3, OP3_X(0,5), 0)), "stb", "dp"}, 579 {(FORMAT3(3, OP3_X(0,5), 1)), "stb", "dq"}, 580 {(FORMAT3(3, OP3_X(1,5), 0)), "stba", "d7"}, 581 {(FORMAT3(3, OP3_X(1,5), 1)), "stba", "d8"}, 582 {(FORMAT3(3, OP3_X(2,5), 0)), "stw", "5p"}, 583 {(FORMAT3(3, OP3_X(2,5), 1)), "stw", "5q"}, 584 {(FORMAT3(3, OP3_X(2,5), 0) | EIF_F3_RD(1)), "stx", "6p"}, 585 {(FORMAT3(3, OP3_X(2,5), 1) | EIF_F3_RD(1)), "stx", "6q"}, 586 587 {(FORMAT3(3, OP3_X(0,6), 0)), "sth", "dp"}, 588 {(FORMAT3(3, OP3_X(0,6), 1)), "sth", "dq"}, 589 {(FORMAT3(3, OP3_X(1,6), 0)), "stha", "d7"}, 590 {(FORMAT3(3, OP3_X(1,6), 1)), "stha", "d8"}, 591 {(FORMAT3(3, OP3_X(2,6), 0)), "stq", "ep"}, 592 {(FORMAT3(3, OP3_X(2,6), 1)), "stq", "eq"}, 593 {(FORMAT3(3, OP3_X(3,6), 0)), "stqa", "e7"}, 594 {(FORMAT3(3, OP3_X(3,6), 1)), "stqa", "e8"}, 595 596 {(FORMAT3(3, OP3_X(0,7), 0)), "std", "dp"}, 597 {(FORMAT3(3, OP3_X(0,7), 1)), "std", "dq"}, 598 {(FORMAT3(3, OP3_X(1,7), 0)), "stda", "d7"}, 599 {(FORMAT3(3, OP3_X(1,7), 1)), "stda", "d8"}, 600 {(FORMAT3(3, OP3_X(2,7), 0)), "std", "ep"}, 601 {(FORMAT3(3, OP3_X(2,7), 1)), "std", "eq"}, 602 {(FORMAT3(3, OP3_X(3,7), 0)), "stda", "e7"}, 603 {(FORMAT3(3, OP3_X(3,7), 1)), "stda", "e8"}, 604 605 {(FORMAT3(3, OP3_X(0,8), 0)), "ldsw", "pd"}, 606 {(FORMAT3(3, OP3_X(0,8), 1)), "ldsw", "qd"}, 607 {(FORMAT3(3, OP3_X(1,8), 0)), "ldswa", "7d"}, 608 {(FORMAT3(3, OP3_X(1,8), 1)), "ldswa", "8d"}, 609 610 {(FORMAT3(3, OP3_X(0,9), 0)), "ldsb", "pd"}, 611 {(FORMAT3(3, OP3_X(0,9), 1)), "ldsb", "qd"}, 612 {(FORMAT3(3, OP3_X(1,9), 0)), "ldsba", "7d"}, 613 {(FORMAT3(3, OP3_X(1,9), 1)), "ldsba", "8d"}, 614 615 {(FORMAT3(3, OP3_X(0,10), 0)), "ldsh", "pd"}, 616 {(FORMAT3(3, OP3_X(0,10), 1)), "ldsh", "qd"}, 617 {(FORMAT3(3, OP3_X(1,10), 0)), "ldsha", "7d"}, 618 {(FORMAT3(3, OP3_X(1,10), 1)), "ldsha", "8d"}, 619 620 {(FORMAT3(3, OP3_X(0,11), 0)), "ldx", "pd"}, 621 {(FORMAT3(3, OP3_X(0,11), 1)), "ldx", "qd"}, 622 {(FORMAT3(3, OP3_X(1,11), 0)), "ldxa", "7d"}, 623 {(FORMAT3(3, OP3_X(1,11), 1)), "ldxa", "8d"}, 624 625 {(FORMAT3(3, OP3_X(3,12), 1)), "casa", "s2d"}, 626 {(FORMAT3(3, OP3_X(3,12), 0)), "casa", "t2d"}, 627 628 {(FORMAT3(3, OP3_X(0,13), 0)), "ldstub", "7d"}, 629 {(FORMAT3(3, OP3_X(0,13), 1)), "ldstub", "8d"}, 630 {(FORMAT3(3, OP3_X(1,13), 0)), "ldstuba", "pd"}, 631 {(FORMAT3(3, OP3_X(1,13), 1)), "ldstuba", "qd"}, 632 {(FORMAT3(3, OP3_X(2,13), 0)), "prefetch", "pr"}, 633 {(FORMAT3(3, OP3_X(2,13), 1)), "prefetch", "qr"}, 634 {(FORMAT3(3, OP3_X(3,13), 0)), "prefetcha", "7r"}, 635 {(FORMAT3(3, OP3_X(3,13), 1)), "prefetcha", "8r"}, 636 637 {(FORMAT3(3, OP3_X(0,14), 0)), "stx", "dp"}, 638 {(FORMAT3(3, OP3_X(0,14), 1)), "stx", "dq"}, 639 {(FORMAT3(3, OP3_X(1,14), 0)), "stxa", "d7"}, 640 {(FORMAT3(3, OP3_X(1,14), 1)), "stxa", "d8"}, 641 {(FORMAT3(3, OP3_X(3,14), 0)), "casxa", "t2d"}, 642 {(FORMAT3(3, OP3_X(3,14), 1)), "casxa", "s2d"}, 643 644 /* Swap Register */ 645 {(FORMAT3(3, OP3_X(0,15), 0)), "swap", "pd"}, 646 {(FORMAT3(3, OP3_X(0,15), 1)), "swap", "qd"}, 647 {(FORMAT3(3, OP3_X(1,15), 0)), "swapa", "7d"}, 648 {(FORMAT3(3, OP3_X(1,15), 1)), "swapa", "8d"}, 649 650 651 /* 652 * OP3 = (3,4): FPop1 (table 34) 653 */ 654 {(FORMAT3F(2, OP3_X(3,4), OPF_X(0,1))), "fmovs", ".4e"}, 655 {(FORMAT3F(2, OP3_X(3,4), OPF_X(0,2))), "fmovd", ".4e"}, 656 {(FORMAT3F(2, OP3_X(3,4), OPF_X(0,3))), "fmovq", ".4e"}, 657 {(FORMAT3F(2, OP3_X(3,4), OPF_X(0,5))), "fnegs", "4e"}, 658 {(FORMAT3F(2, OP3_X(3,4), OPF_X(0,6))), "fnegd", "4e"}, 659 {(FORMAT3F(2, OP3_X(3,4), OPF_X(0,7))), "fnegq", "4e"}, 660 {(FORMAT3F(2, OP3_X(3,4), OPF_X(0,9))), "fabss", "4e"}, 661 {(FORMAT3F(2, OP3_X(3,4), OPF_X(0,10))), "fabsd", "4e"}, 662 {(FORMAT3F(2, OP3_X(3,4), OPF_X(0,11))), "fabsq", "4e"}, 663 664 {(FORMAT3F(2, OP3_X(3,4), OPF_X(2,9))), "fsqrts", "4e"}, 665 {(FORMAT3F(2, OP3_X(3,4), OPF_X(2,10))), "fsqrtd", "4e"}, 666 {(FORMAT3F(2, OP3_X(3,4), OPF_X(2,11))), "fsqrtq", "4e"}, 667 668 {(FORMAT3F(2, OP3_X(3,4), OPF_X(4,1))), "fadds", "34e"}, 669 {(FORMAT3F(2, OP3_X(3,4), OPF_X(4,2))), "faddd", "34e"}, 670 {(FORMAT3F(2, OP3_X(3,4), OPF_X(4,3))), "faddq", "34e"}, 671 {(FORMAT3F(2, OP3_X(3,4), OPF_X(4,5))), "fsubs", "34e"}, 672 {(FORMAT3F(2, OP3_X(3,4), OPF_X(4,6))), "fsubd", "34e"}, 673 {(FORMAT3F(2, OP3_X(3,4), OPF_X(4,7))), "fsubq", "34e"}, 674 {(FORMAT3F(2, OP3_X(3,4), OPF_X(4,9))), "fmuls", "34e"}, 675 {(FORMAT3F(2, OP3_X(3,4), OPF_X(4,10))), "fmuld", "34e"}, 676 {(FORMAT3F(2, OP3_X(3,4), OPF_X(4,11))), "fmulq", "34e"}, 677 {(FORMAT3F(2, OP3_X(3,4), OPF_X(4,13))), "fdivs", "34e"}, 678 {(FORMAT3F(2, OP3_X(3,4), OPF_X(4,14))), "fdivd", "34e"}, 679 {(FORMAT3F(2, OP3_X(3,4), OPF_X(4,15))), "fdivq", "34e"}, 680 681 {(FORMAT3F(2, OP3_X(3,4), OPF_X(6,9))), "fsmuld", "34e"}, 682 {(FORMAT3F(2, OP3_X(3,4), OPF_X(6,14))), "fdmulq", "34e"}, 683 684 {(FORMAT3F(2, OP3_X(3,4), OPF_X(8,1))), "fstox", "4e"}, 685 {(FORMAT3F(2, OP3_X(3,4), OPF_X(8,2))), "fdtox", "4e"}, 686 {(FORMAT3F(2, OP3_X(3,4), OPF_X(8,3))), "fqtox", "4e"}, 687 {(FORMAT3F(2, OP3_X(3,4), OPF_X(8,4))), "fxtos", "4e"}, 688 {(FORMAT3F(2, OP3_X(3,4), OPF_X(8,8))), "fxtod", "4e"}, 689 {(FORMAT3F(2, OP3_X(3,4), OPF_X(8,12))), "fxtoq", "4e"}, 690 691 {(FORMAT3F(2, OP3_X(3,4), OPF_X(12,4))), "fitos", "4e"}, 692 {(FORMAT3F(2, OP3_X(3,4), OPF_X(12,6))), "fdtos", "4e"}, 693 {(FORMAT3F(2, OP3_X(3,4), OPF_X(12,7))), "fqtos", "4e"}, 694 {(FORMAT3F(2, OP3_X(3,4), OPF_X(12,8))), "fitod", "4e"}, 695 {(FORMAT3F(2, OP3_X(3,4), OPF_X(12,9))), "fstod", "4e"}, 696 {(FORMAT3F(2, OP3_X(3,4), OPF_X(12,11))), "fqtod", "4e"}, 697 {(FORMAT3F(2, OP3_X(3,4), OPF_X(12,12))), "fitoq", "4e"}, 698 {(FORMAT3F(2, OP3_X(3,4), OPF_X(12,13))), "fstoq", "4e"}, 699 {(FORMAT3F(2, OP3_X(3,4), OPF_X(12,14))), "fdtoq", "4e"}, 700 701 {(FORMAT3F(2, OP3_X(3,4), OPF_X(13,1))), "fstoi", "4e"}, 702 {(FORMAT3F(2, OP3_X(3,4), OPF_X(13,2))), "fdtoi", "4e"}, 703 {(FORMAT3F(2, OP3_X(3,4), OPF_X(13,3))), "fqtoi", "4e"}, 704 705 706 #ifdef xxx 707 /* 708 * OP3 =(3,5): FPop2 (table 35) 709 */ 710 {(FORMAT3F(2, OP3_X(3,5), 81)), "fcmps", "o34"}, 711 {(FORMAT3F(2, OP3_X(3,5), 82)), "fcmpd", "o34"}, 712 {(FORMAT3F(2, OP3_X(3,5), 83)), "fcmpq", "o34"}, 713 {(FORMAT3F(2, OP3_X(3,5), 85)), "fcmpes", "o34"}, 714 {(FORMAT3F(2, OP3_X(3,5), 86)), "fcmped", "o34"}, 715 {(FORMAT3F(2, OP3_X(3,5), 87)), "fcmpeq", "o34"}, 716 717 /* Move Floating-Point Register on Condition "FMOVcc" */ 718 /* FIXME should check for single, double, and quad movements */ 719 /* Integer Condition Codes */ 720 {(FORMAT3(2, OP3_X(3,5), 0) | COND2(0,8)), "fmova", "04e"}, 721 {(FORMAT3(2, OP3_X(3,5), 0) | COND2(0,0)), "fmovn", "04e"}, 722 {(FORMAT3(2, OP3_X(3,5), 0) | COND2(0,9)), "fmovne", "04e"}, 723 {(FORMAT3(2, OP3_X(3,5), 0) | COND2(0,1)), "fmove", "04e"}, 724 {(FORMAT3(2, OP3_X(3,5), 0) | COND2(0,10)), "fmovg", "04e"}, 725 {(FORMAT3(2, OP3_X(3,5), 0) | COND2(0,2)), "fmovle", "04e"}, 726 {(FORMAT3(2, OP3_X(3,5), 0) | COND2(0,11)), "fmovge", "04e"}, 727 {(FORMAT3(2, OP3_X(3,5), 0) | COND2(0,3)), "fmovl", "04e"}, 728 {(FORMAT3(2, OP3_X(3,5), 0) | COND2(0,12)), "fmovgu", "04e"}, 729 {(FORMAT3(2, OP3_X(3,5), 0) | COND2(0,4)), "fmovleu", "04e"}, 730 {(FORMAT3(2, OP3_X(3,5), 0) | COND2(0,13)), "fmovcc", "04e"}, 731 {(FORMAT3(2, OP3_X(3,5), 0) | COND2(0,5)), "fmovcs", "04e"}, 732 {(FORMAT3(2, OP3_X(3,5), 0) | COND2(0,14)), "fmovpos", "04e"}, 733 {(FORMAT3(2, OP3_X(3,5), 0) | COND2(0,6)), "fmovneg", "04e"}, 734 {(FORMAT3(2, OP3_X(3,5), 0) | COND2(0,15)), "fmovvc", "04e"}, 735 {(FORMAT3(2, OP3_X(3,5), 0) | COND2(0,7)), "fmovvs", "04e"}, 736 737 /* Floating-Point Condition Codes */ 738 {(FORMAT3(2, OP3_X(3,5), 0) | COND2(0,8)), "fmova", "o4e"}, 739 {(FORMAT3(2, OP3_X(3,5), 0) | COND2(0,0)), "fmovn", "o4e"}, 740 {(FORMAT3(2, OP3_X(3,5), 0) | COND2(0,7)), "fmovu", "o4e"}, 741 {(FORMAT3(2, OP3_X(3,5), 0) | COND2(0,6)), "fmovg", "o4e"}, 742 {(FORMAT3(2, OP3_X(3,5), 0) | COND2(0,5)), "fmovug", "o4e"}, 743 {(FORMAT3(2, OP3_X(3,5), 0) | COND2(0,4)), "fmovk", "o4e"}, 744 {(FORMAT3(2, OP3_X(3,5), 0) | COND2(0,3)), "fmovul", "o4e"}, 745 {(FORMAT3(2, OP3_X(3,5), 0) | COND2(0,2)), "fmovlg", "o4e"}, 746 {(FORMAT3(2, OP3_X(3,5), 0) | COND2(0,1)), "fmovne", "o4e"}, 747 {(FORMAT3(2, OP3_X(3,5), 0) | COND2(0,9)), "fmove", "o4e"}, 748 {(FORMAT3(2, OP3_X(3,5), 0) | COND2(0,10)), "fmovue", "o4e"}, 749 {(FORMAT3(2, OP3_X(3,5), 0) | COND2(0,11)), "fmovge", "o4e"}, 750 {(FORMAT3(2, OP3_X(3,5), 0) | COND2(0,12)), "fmovuge", "o4e"}, 751 {(FORMAT3(2, OP3_X(3,5), 0) | COND2(0,13)), "fmovle", "o4e"}, 752 {(FORMAT3(2, OP3_X(3,5), 0) | COND2(0,14)), "fmovule", "o4e"}, 753 {(FORMAT3(2, OP3_X(3,5), 0) | COND2(0,15)), "fmovo", "o4e"}, 754 755 /* Move F-P Register on Integer Register Condition "FMOVr" */ 756 /* FIXME: check for short, double, and quad's */ 757 {(FORMAT3(2, OP3_X(3,5), 0) | EIF_F3_RCOND(1)), "fmovre", "14e"}, 758 {(FORMAT3(2, OP3_X(3,5), 0) | EIF_F3_RCOND(2)), "fmovrlez", "14e"}, 759 {(FORMAT3(2, OP3_X(3,5), 0) | EIF_F3_RCOND(3)), "fmovrlz", "14e"}, 760 {(FORMAT3(2, OP3_X(3,5), 0) | EIF_F3_RCOND(5)), "fmovrne", "14e"}, 761 {(FORMAT3(2, OP3_X(3,5), 0) | EIF_F3_RCOND(6)), "fmovrgz", "14e"}, 762 {(FORMAT3(2, OP3_X(3,5), 0) | EIF_F3_RCOND(7)), "fmovrgez", "14e"}, 763 #endif 764 /* FP logical insns -- UltraSPARC extens */ 765 {(FORMAT3F(2, OP3_X(3,6), OPF_X(6,0))), "fzero", "e"}, 766 {(FORMAT3F(2, OP3_X(3,6), OPF_X(6,1))), "fzeros", "e"}, 767 {(FORMAT3F(2, OP3_X(3,6), OPF_X(7,14))), "fone", "e"}, 768 {(FORMAT3F(2, OP3_X(3,6), OPF_X(7,15))), "fones", "e"}, 769 {(FORMAT3F(2, OP3_X(3,6), OPF_X(7,4))), "fsrc1", "3e"}, 770 {(FORMAT3F(2, OP3_X(3,6), OPF_X(7,5))), "fsrc1s", "3e"}, 771 {(FORMAT3F(2, OP3_X(3,6), OPF_X(7,8))), "fsrc2", "4e"}, 772 {(FORMAT3F(2, OP3_X(3,6), OPF_X(7,9))), "fsrc2s", "4e"}, 773 {(FORMAT3F(2, OP3_X(3,6), OPF_X(6,10))), "fnot1", "3e"}, 774 {(FORMAT3F(2, OP3_X(3,6), OPF_X(6,11))), "fnot1s", "3e"}, 775 {(FORMAT3F(2, OP3_X(3,6), OPF_X(6,6))), "fnot2", "4e"}, 776 {(FORMAT3F(2, OP3_X(3,6), OPF_X(6,7))), "fnot2s", "4e"}, 777 {(FORMAT3F(2, OP3_X(3,6), OPF_X(7,12))), "for", "34e"}, 778 {(FORMAT3F(2, OP3_X(3,6), OPF_X(7,13))), "fors", "34e"}, 779 {(FORMAT3F(2, OP3_X(3,6), OPF_X(6,2))), "fnor", "34e"}, 780 {(FORMAT3F(2, OP3_X(3,6), OPF_X(6,3))), "fnors", "34e"}, 781 {(FORMAT3F(2, OP3_X(3,6), OPF_X(7,0))), "fand", "34e"}, 782 {(FORMAT3F(2, OP3_X(3,6), OPF_X(7,1))), "fands", "34e"}, 783 {(FORMAT3F(2, OP3_X(3,6), OPF_X(6,14))), "fnand", "34e"}, 784 {(FORMAT3F(2, OP3_X(3,6), OPF_X(6,15))), "fnands", "34e"}, 785 {(FORMAT3F(2, OP3_X(3,6), OPF_X(6,12))), "fxor", "34e"}, 786 {(FORMAT3F(2, OP3_X(3,6), OPF_X(6,13))), "fxors", "34e"}, 787 {(FORMAT3F(2, OP3_X(3,6), OPF_X(7,2))), "fxnor", "34e"}, 788 {(FORMAT3F(2, OP3_X(3,6), OPF_X(7,3))), "fxnors", "34e"}, 789 {(FORMAT3F(2, OP3_X(3,6), OPF_X(7,10))), "fornot1", "34e"}, 790 {(FORMAT3F(2, OP3_X(3,6), OPF_X(7,11))), "fornot1s", "34e"}, 791 {(FORMAT3F(2, OP3_X(3,6), OPF_X(7,6))), "fornot2", "34e"}, 792 {(FORMAT3F(2, OP3_X(3,6), OPF_X(7,7))), "fornot2s", "34e"}, 793 {(FORMAT3F(2, OP3_X(3,6), OPF_X(6,8))), "fandnot1", "34e"}, 794 {(FORMAT3F(2, OP3_X(3,6), OPF_X(6,9))), "fandnot1s", "34e"}, 795 {(FORMAT3F(2, OP3_X(3,6), OPF_X(6,4))), "fandnot2", "34e"}, 796 {(FORMAT3F(2, OP3_X(3,6), OPF_X(6,5))), "fandnot2s", "34e"}, 797 798 /* grrrr.... */ 799 {0, 0, 0} 800 801 }; 802 803 db_addr_t 804 db_disasm(db_addr_t loc, boolean_t altfmt) 805 { 806 struct sparc_insn* i_ptr = (struct sparc_insn *)&sparc_i; 807 808 unsigned int insn, you_lose, bitmask; 809 int matchp; 810 char* f_ptr, *cp; 811 812 you_lose = 0; 813 matchp = 0; 814 insn = db_get_value(loc, 4, 0); 815 816 if (insn == 0x01000000) { 817 db_printf("nop\n"); 818 return loc + 4; 819 } 820 821 while (i_ptr->name) { 822 /* calculate YOU_LOSE value */ 823 bitmask= (i_ptr->match); 824 you_lose = (~bitmask); 825 826 if (((bitmask>>30) & 0x3) == 0x1) { 827 /* Call */ 828 you_lose = ((~0x1)<<30); 829 } else if (((bitmask>>30) & 0x3) == 0x0) { 830 if (((bitmask>>22) & 0x7) == 0x4) { 831 /* Sethi */ 832 you_lose &= (FORMAT2(0x3,0x7)); 833 } else { 834 /* Branches */ 835 you_lose &= (FORMAT2(0x3,0x7) | 836 EIF_F2_COND(0xf)); 837 } 838 } else if (((bitmask>>30) & 0x3) == 0x2 && 839 ((bitmask>>19) & 0x3f) == 0x34) /* XXX */ { 840 /* FPop1 */ 841 you_lose &= (FORMAT3(0x3,0x3f,0x1) | 842 EIF_F3_OPF(0x1ff)); 843 } else if (((bitmask>>30) & 0x3) == 0x2 && 844 ((bitmask>>19) & 0x3f) == 0x3a) /* XXX */ { 845 /* Tcc */ 846 you_lose &= (FORMAT3(0x3,0x3f,0x1) | EIF_F4_TCOND(0xf)); 847 } else if (((bitmask>>30) & 0x3) == 0x2 && 848 ((bitmask>>21) & 0xf) == 0x9 && 849 ((bitmask>>19) & 0x3) != 0) /* XXX */ { 850 /* shifts */ 851 you_lose &= (FORMAT3(0x3,0x3f,0x1)) | EIF_F3_X(1); 852 } else if (((bitmask>>30) & 0x3) == 0x2 && 853 ((bitmask>>19) & 0x3f) == 0x2c) /* XXX */ { 854 /* cmov */ 855 you_lose &= (FORMAT3(0x3,0x3f,0x1) | COND2(1,0xf)); 856 } else if (((bitmask>>30) & 0x3) == 0x2 && 857 ((bitmask>>19) & 0x3f) == 0x35) /* XXX */ { 858 /* fmov */ 859 you_lose &= (FORMAT3(0x3,0x3f,0x1) | COND2(1,0xf)); 860 } else { 861 you_lose &= (FORMAT3(0x3,0x3f,0x1)); 862 } 863 864 if (((bitmask & insn) == bitmask) && ((you_lose & insn) == 0)) { 865 matchp = 1; 866 break; 867 } 868 i_ptr++; 869 }; 870 871 if (!matchp) { 872 db_printf("undefined\n"); 873 return loc + 4; 874 } 875 876 db_printf("%s", i_ptr->name); 877 878 f_ptr = i_ptr->format; 879 880 for (cp = f_ptr; *cp; cp++) { 881 if (*cp == ',') { 882 for (;f_ptr < cp; f_ptr++) 883 switch (*f_ptr) { 884 case 'a': 885 if (insn & EIF_F2_A(1)) 886 db_printf(",a"); 887 break; 888 case 'p': 889 if (insn & EIF_F2_P(1)) 890 db_printf(",pt"); 891 else 892 db_printf(",pn"); 893 break; 894 } 895 f_ptr++; 896 break; 897 } 898 } 899 db_printf(" \t"); 900 901 while (*f_ptr) { 902 switch (*f_ptr) { 903 int64_t val; 904 case '1': 905 db_printf("%%%s", regs[((insn >> 14) & 0x1f)]); 906 break; 907 case '2': 908 db_printf("%%%s", regs[(insn & 0x1f)]); 909 break; 910 case 'd': 911 db_printf("%%%s", regs[((insn >> 25) & 0x1f)]); 912 break; 913 case '3': 914 db_printf("%%f%d", ((insn >> 14) & 0x1f)); 915 break; 916 case '4': 917 db_printf("%%f%d", (insn & 0x1f)); 918 break; 919 case 'e': 920 db_printf("%%f%d", ((insn >> 25) & 0x1f)); 921 break; 922 case 'i': 923 /* simm13 -- signed */ 924 val = IF_SIMM(insn, 13); 925 db_printf("%s0x%x", SIGN(val), (int)abs(val)); 926 break; 927 case 'j': 928 /* simm11 -- signed */ 929 val = IF_SIMM(insn, 11); 930 db_printf("%s0x%x", SIGN(val), (int)abs(val)); 931 break; 932 case 'l': 933 val = (((insn>>20)&0x3)<<13)|(insn & 0x1fff); 934 val = IF_SIMM(val, 16); 935 db_printsym((db_addr_t)(loc + (4 * val)), DB_STGY_ANY); 936 break; 937 case 'm': 938 db_printsym((db_addr_t)(loc + (4 * IF_SIMM(insn, 22))), 939 DB_STGY_ANY); 940 break; 941 case 'u': 942 db_printsym((db_addr_t)(loc + (4 * IF_SIMM(insn, 19))), 943 DB_STGY_ANY); 944 break; 945 case 'n': 946 db_printsym((db_addr_t)(loc + (4 * IF_SIMM(insn, 30))), 947 DB_STGY_PROC); 948 break; 949 case 's': 950 db_printf("%%asi"); 951 break; 952 case 't': 953 db_printf("0x%-2.2x", ((insn >> 5) & 0xff)); 954 break; 955 case 'o': 956 db_printf("%%fcc%d", ((insn >> 25) & 0x3)); 957 break; 958 case 'p': 959 case '7': 960 db_printf("[%%%s + %%%s]", 961 regs[((insn >> 14) & 0x1f)], 962 regs[(insn & 0x1f)]); 963 if (*f_ptr == '7') 964 db_printf(" %d", ((insn >> 5) & 0xff)); 965 break; 966 case 'q': 967 case '8': 968 val = IF_SIMM(insn, 13); 969 db_printf("[%%%s %c 0x%x]", 970 regs[((insn >> 14) & 0x1f)], 971 (int)((val<0)?'-':'+'), 972 (int)abs(val)); 973 if (*f_ptr == '8') 974 db_printf(" %%asi"); 975 break; 976 case '5': 977 db_printf("%%fsr"); 978 break; 979 case '6': 980 db_printf("%%fsr"); 981 break; 982 case '9': 983 db_printf("0x%xl", 984 ((insn & 0xf) | ((insn >> 4) & 0x7))); 985 break; 986 case '': 987 db_printf("%%%s", ccodes[((insn >> 11) & 0x3) + 4]); 988 break; 989 case '.': 990 db_printf("%%%s", ccodes[((insn >> 11) & 0x7)]); 991 break; 992 case 'r': 993 db_printf("#%s", prefetch[((insn >> 25) & 0x1f)]); 994 break; 995 case 'A': 996 db_printf("%%%s", priv_regs[((insn >> 14) & 0x1f)]); 997 break; 998 case 'B': 999 db_printf("%%%s", state_regs[((insn >> 14) & 0x1f)]); 1000 break; 1001 case 'C': 1002 db_printf("%%hi(0x%x)", ((insn & 0x3fffff) << 10)); 1003 break; 1004 case 'D': 1005 db_printf("0x%x", (insn & 0x1f)); 1006 break; 1007 case 'E': 1008 db_printf("%d", (insn & 0x3f)); 1009 break; 1010 case 'F': 1011 db_printf("%d", (insn & 0x3f)); 1012 break; 1013 case 'G': 1014 db_printf("%%%s", priv_regs[((insn >> 25) & 0x1f)]); 1015 break; 1016 case 'H': 1017 db_printf("%%%s", state_regs[((insn >> 25) & 0x1f)]); 1018 break; 1019 default: 1020 db_printf("(UNKNOWN)"); 1021 break; 1022 } 1023 if (*(++f_ptr)) 1024 db_printf(", "); 1025 }; 1026 1027 db_printf("\n"); 1028 1029 return (loc + 4); 1030 } 1031
Cache object: e0d4cb8e4386252ada1542bb37c4da26
[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]