mp_exception.S

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    1 /*-
    2  * Copyright (c) 2002 Jake Burkholder.
    3  * All rights reserved.
    4  *
    5  * Redistribution and use in source and binary forms, with or without
    6  * modification, are permitted provided that the following conditions
    7  * are met:
    8  * 1. Redistributions of source code must retain the above copyright
    9  *    notice, this list of conditions and the following disclaimer.
   10  * 2. Redistributions in binary form must reproduce the above copyright
   11  *    notice, this list of conditions and the following disclaimer in the
   12  *    documentation and/or other materials provided with the distribution.
   13  *
   14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   24  * SUCH DAMAGE.
   25  */
   26 
   27 #include <machine/asm.h>
   28 __FBSDID("$FreeBSD: releng/6.0/sys/sparc64/sparc64/mp_exception.S 116567 2003-06-19 05:27:04Z jake $");
   29 
   30 #include <machine/asi.h>
   31 #include <machine/ktr.h>
   32 #include <machine/asmacros.h>
   33 #include <machine/pstate.h>
   34 
   35 #include "assym.s"
   36 
   37         .register       %g2, #ignore
   38         .register       %g3, #ignore
   39 
   40 #define IPI_DONE(r1, r2, r3, r4) \
   41         lduw    [PCPU(CPUMASK)], r4 ;  \
   42         ATOMIC_CLEAR_INT(r1, r2, r3, r4)
   43 
   44 /*
   45  * Invalidate a physical page in the data cache.  For UltraSPARC I and II.
   46  */
   47 ENTRY(tl_ipi_spitfire_dcache_page_inval)
   48 #if KTR_COMPILE & KTR_SMP
   49         CATR(KTR_SMP, "ipi_dcache_page_inval: pa=%#lx"
   50             , %g1, %g2, %g3, 7, 8, 9)
   51         ldx     [%g5 + ICA_PA], %g2
   52         stx     %g2, [%g1 + KTR_PARM1]
   53 9:
   54 #endif
   55 
   56         ldx     [%g5 + ICA_PA], %g6
   57         srlx    %g6, PAGE_SHIFT - DC_TAG_SHIFT, %g6
   58 
   59         SET(cache, %g3, %g2)
   60         lduw    [%g2 + DC_SIZE], %g3
   61         lduw    [%g2 + DC_LINESIZE], %g4
   62         sub     %g3, %g4, %g2
   63 
   64 1:      ldxa    [%g2] ASI_DCACHE_TAG, %g1
   65         srlx    %g1, DC_VALID_SHIFT, %g3
   66         andcc   %g3, DC_VALID_MASK, %g0
   67         bz,pt   %xcc, 2f
   68          set    DC_TAG_MASK, %g3
   69         sllx    %g3, DC_TAG_SHIFT, %g3
   70         and     %g1, %g3, %g1
   71         cmp     %g1, %g6
   72         bne,a,pt %xcc, 2f
   73          nop
   74         stxa    %g1, [%g2] ASI_DCACHE_TAG
   75         membar  #Sync
   76 
   77 2:      brgz,pt %g2, 1b
   78          sub    %g2, %g4, %g2
   79 
   80         IPI_DONE(%g5, %g1, %g2, %g3)
   81         retry
   82 END(tl_ipi_spitfire_dcache_page_inval)
   83 
   84 /*
   85  * Invalidate a physical page in the instruction cache.  For UltraSPARC I and
   86  * II.
   87  */
   88 ENTRY(tl_ipi_spitfire_icache_page_inval)
   89 #if KTR_COMPILE & KTR_SMP
   90         CATR(KTR_SMP, "ipi_icache_page_inval: pa=%#lx"
   91             , %g1, %g2, %g3, 7, 8, 9)
   92         ldx     [%g5 + ICA_PA], %g2
   93         stx     %g2, [%g1 + KTR_PARM1]
   94 9:
   95 #endif
   96 
   97         ldx     [%g5 + ICA_PA], %g6
   98         srlx    %g6, PAGE_SHIFT - IC_TAG_SHIFT, %g6
   99 
  100         SET(cache, %g3, %g2)
  101         lduw    [%g2 + IC_SIZE], %g3
  102         lduw    [%g2 + IC_LINESIZE], %g4
  103         sub     %g3, %g4, %g2
  104 
  105 1:      ldda    [%g2] ASI_ICACHE_TAG, %g0 /*, %g1 */
  106         srlx    %g1, IC_VALID_SHIFT, %g3
  107         andcc   %g3, IC_VALID_MASK, %g0
  108         bz,pt   %xcc, 2f
  109          set    IC_TAG_MASK, %g3
  110         sllx    %g3, IC_TAG_SHIFT, %g3
  111         and     %g1, %g3, %g1
  112         cmp     %g1, %g6
  113         bne,a,pt %xcc, 2f
  114          nop
  115         stxa    %g1, [%g2] ASI_ICACHE_TAG
  116         membar  #Sync
  117 
  118 2:      brgz,pt %g2, 1b
  119          sub    %g2, %g4, %g2
  120 
  121         IPI_DONE(%g5, %g1, %g2, %g3)
  122         retry
  123 END(tl_ipi_spitfire_icache_page_inval)
  124 
  125 /*
  126  * Invalidate a physical page in the data cache.  For UltraSPARC III.
  127  */
  128 ENTRY(tl_ipi_cheetah_dcache_page_inval)
  129 #if KTR_COMPILE & KTR_SMP
  130         CATR(KTR_SMP, "ipi_dcache_page_inval: pa=%#lx"
  131             , %g1, %g2, %g3, 7, 8, 9)
  132         ldx     [%g5 + ICA_PA], %g2
  133         stx     %g2, [%g1 + KTR_PARM1]
  134 9:
  135 #endif
  136 
  137         ldx     [%g5 + ICA_PA], %g1
  138 
  139         set     PAGE_SIZE, %g2
  140         add     %g1, %g2, %g3
  141 
  142         SET(cache, %g4, %g2)
  143         lduw    [%g2 + DC_LINESIZE], %g2
  144 
  145 1:      stxa    %g0, [%g1] ASI_DCACHE_INVALIDATE
  146         membar  #Sync
  147 
  148         add     %g1, %g2, %g1
  149         cmp     %g1, %g3
  150         blt,a,pt %xcc, 1b
  151          nop
  152 
  153         IPI_DONE(%g5, %g1, %g2, %g3)
  154         retry
  155 END(tl_ipi_cheetah_dcache_page_inval)
  156 
  157 /*
  158  * Trigger a softint at the desired level.
  159  */
  160 ENTRY(tl_ipi_level)
  161 #if KTR_COMPILE & KTR_SMP
  162         CATR(KTR_SMP, "tl_ipi_level: cpuid=%d mid=%d d1=%#lx d2=%#lx"
  163             , %g1, %g2, %g3, 7, 8, 9)
  164         lduw    [PCPU(CPUID)], %g2
  165         stx     %g2, [%g1 + KTR_PARM1]
  166         lduw    [PCPU(MID)], %g2
  167         stx     %g2, [%g1 + KTR_PARM2]
  168         stx     %g4, [%g1 + KTR_PARM3]
  169         stx     %g5, [%g1 + KTR_PARM4]
  170 9:
  171 #endif
  172 
  173         mov     1, %g1
  174         sllx    %g1, %g5, %g1
  175         wr      %g1, 0, %set_softint
  176         retry
  177 END(tl_ipi_level)
  178 
  179 /*
  180  * Demap a page from the dtlb and/or itlb.
  181  */
  182 ENTRY(tl_ipi_tlb_page_demap)
  183 #if KTR_COMPILE & KTR_SMP
  184         CATR(KTR_SMP, "ipi_tlb_page_demap: pm=%p va=%#lx"
  185             , %g1, %g2, %g3, 7, 8, 9)
  186         ldx     [%g5 + ITA_PMAP], %g2
  187         stx     %g2, [%g1 + KTR_PARM1]
  188         ldx     [%g5 + ITA_VA], %g2
  189         stx     %g2, [%g1 + KTR_PARM2]
  190 9:
  191 #endif
  192 
  193         ldx     [%g5 + ITA_PMAP], %g1
  194 
  195         SET(kernel_pmap_store, %g3, %g2)
  196         mov     TLB_DEMAP_NUCLEUS | TLB_DEMAP_PAGE, %g3
  197 
  198         cmp     %g1, %g2
  199         movne   %xcc, TLB_DEMAP_PRIMARY | TLB_DEMAP_PAGE, %g3
  200 
  201         ldx     [%g5 + ITA_VA], %g2
  202         or      %g2, %g3, %g2
  203 
  204         stxa    %g0, [%g2] ASI_DMMU_DEMAP
  205         stxa    %g0, [%g2] ASI_IMMU_DEMAP
  206         membar  #Sync
  207 
  208         IPI_DONE(%g5, %g1, %g2, %g3)
  209         retry
  210 END(tl_ipi_tlb_page_demap)
  211 
  212 /*
  213  * Demap a range of pages from the dtlb and itlb.
  214  */
  215 ENTRY(tl_ipi_tlb_range_demap)
  216 #if KTR_COMPILE & KTR_SMP
  217         CATR(KTR_SMP, "ipi_tlb_range_demap: pm=%p start=%#lx end=%#lx"
  218             , %g1, %g2, %g3, 7, 8, 9)
  219         ldx     [%g5 + ITA_PMAP], %g2
  220         stx     %g2, [%g1 + KTR_PARM1]
  221         ldx     [%g5 + ITA_START], %g2
  222         stx     %g2, [%g1 + KTR_PARM2]
  223         ldx     [%g5 + ITA_END], %g2
  224         stx     %g2, [%g1 + KTR_PARM3]
  225 9:
  226 #endif
  227 
  228         ldx     [%g5 + ITA_PMAP], %g1
  229 
  230         SET(kernel_pmap_store, %g3, %g2)
  231         mov     TLB_DEMAP_NUCLEUS | TLB_DEMAP_PAGE, %g3
  232 
  233         cmp     %g1, %g2
  234         movne   %xcc, TLB_DEMAP_PRIMARY | TLB_DEMAP_PAGE, %g3
  235 
  236         ldx     [%g5 + ITA_START], %g1
  237         ldx     [%g5 + ITA_END], %g2
  238 
  239         set     PAGE_SIZE, %g6
  240 
  241 1:      or      %g1, %g3, %g4
  242         stxa    %g0, [%g4] ASI_DMMU_DEMAP
  243         stxa    %g0, [%g4] ASI_IMMU_DEMAP
  244         membar  #Sync
  245 
  246         add     %g1, %g6, %g1
  247         cmp     %g1, %g2
  248         blt,a,pt %xcc, 1b
  249          nop
  250 
  251         IPI_DONE(%g5, %g1, %g2, %g3)
  252         retry
  253 END(tl_ipi_tlb_range_demap)
  254 
  255 /*
  256  * Demap the primary context from the dtlb and itlb.
  257  */
  258 ENTRY(tl_ipi_tlb_context_demap)
  259 #if KTR_COMPILE & KTR_SMP
  260         CATR(KTR_SMP, "ipi_tlb_page_demap: pm=%p va=%#lx"
  261             , %g1, %g2, %g3, 7, 8, 9)
  262         ldx     [%g5 + ITA_PMAP], %g2
  263         stx     %g2, [%g1 + KTR_PARM1]
  264         ldx     [%g5 + ITA_VA], %g2
  265         stx     %g2, [%g1 + KTR_PARM2]
  266 9:
  267 #endif
  268 
  269         mov     TLB_DEMAP_PRIMARY | TLB_DEMAP_CONTEXT, %g1
  270         stxa    %g0, [%g1] ASI_DMMU_DEMAP
  271         stxa    %g0, [%g1] ASI_IMMU_DEMAP
  272         membar  #Sync
  273 
  274         IPI_DONE(%g5, %g1, %g2, %g3)
  275         retry
  276 END(tl_ipi_tlb_context_demap)

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