Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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FreeBSD/Linux Kernel Cross Reference
sys/sys/ata.h
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1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2000 - 2008 Søren Schmidt <sos@FreeBSD.org> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer, 12 * without modification, immediately at the beginning of the file. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * $FreeBSD$ 29 */ 30 31 #ifndef _SYS_ATA_H_ 32 #define _SYS_ATA_H_ 33 34 #include <sys/types.h> 35 #include <sys/ioccom.h> 36 37 /* ATA/ATAPI device parameters */ 38 struct ata_params { 39 /*000*/ u_int16_t config; /* configuration info */ 40 #define ATA_PROTO_MASK 0x8003 41 #define ATA_PROTO_ATAPI 0x8000 42 #define ATA_PROTO_ATAPI_12 0x8000 43 #define ATA_PROTO_ATAPI_16 0x8001 44 #define ATA_PROTO_CFA 0x848a 45 #define ATA_ATAPI_TYPE_MASK 0x1f00 46 #define ATA_ATAPI_TYPE_DIRECT 0x0000 /* disk/floppy */ 47 #define ATA_ATAPI_TYPE_TAPE 0x0100 /* streaming tape */ 48 #define ATA_ATAPI_TYPE_CDROM 0x0500 /* CD-ROM device */ 49 #define ATA_ATAPI_TYPE_OPTICAL 0x0700 /* optical disk */ 50 #define ATA_ATAPI_REMOVABLE 0x0080 51 #define ATA_DRQ_MASK 0x0060 52 #define ATA_DRQ_SLOW 0x0000 /* cpu 3 ms delay */ 53 #define ATA_DRQ_INTR 0x0020 /* interrupt 10 ms delay */ 54 #define ATA_DRQ_FAST 0x0040 /* accel 50 us delay */ 55 #define ATA_RESP_INCOMPLETE 0x0004 56 57 /*001*/ u_int16_t cylinders; /* # of cylinders */ 58 /*002*/ u_int16_t specconf; /* specific configuration */ 59 /*003*/ u_int16_t heads; /* # heads */ 60 u_int16_t obsolete4; 61 u_int16_t obsolete5; 62 /*006*/ u_int16_t sectors; /* # sectors/track */ 63 /*007*/ u_int16_t vendor7[3]; 64 /*010*/ u_int8_t serial[20]; /* serial number */ 65 /*020*/ u_int16_t retired20; 66 u_int16_t retired21; 67 u_int16_t obsolete22; 68 /*023*/ u_int8_t revision[8]; /* firmware revision */ 69 /*027*/ u_int8_t model[40]; /* model name */ 70 /*047*/ u_int16_t sectors_intr; /* sectors per interrupt */ 71 /*048*/ u_int16_t tcg; /* Trusted Computing Group */ 72 #define ATA_SUPPORT_TCG 0x0001 73 /*049*/ u_int16_t capabilities1; 74 #define ATA_SUPPORT_DMA 0x0100 75 #define ATA_SUPPORT_LBA 0x0200 76 #define ATA_SUPPORT_IORDYDIS 0x0400 77 #define ATA_SUPPORT_IORDY 0x0800 78 #define ATA_SUPPORT_OVERLAP 0x4000 79 80 /*050*/ u_int16_t capabilities2; 81 /*051*/ u_int16_t retired_piomode; /* PIO modes 0-2 */ 82 #define ATA_RETIRED_PIO_MASK 0x0300 83 84 /*052*/ u_int16_t retired_dmamode; /* DMA modes */ 85 #define ATA_RETIRED_DMA_MASK 0x0003 86 87 /*053*/ u_int16_t atavalid; /* fields valid */ 88 #define ATA_FLAG_54_58 0x0001 /* words 54-58 valid */ 89 #define ATA_FLAG_64_70 0x0002 /* words 64-70 valid */ 90 #define ATA_FLAG_88 0x0004 /* word 88 valid */ 91 92 /*054*/ u_int16_t current_cylinders; 93 /*055*/ u_int16_t current_heads; 94 /*056*/ u_int16_t current_sectors; 95 /*057*/ u_int16_t current_size_1; 96 /*058*/ u_int16_t current_size_2; 97 /*059*/ u_int16_t multi; 98 #define ATA_SUPPORT_BLOCK_ERASE_EXT 0x8000 99 #define ATA_SUPPORT_OVERWRITE_EXT 0x4000 100 #define ATA_SUPPORT_CRYPTO_SCRAMBLE_EXT 0x2000 101 #define ATA_SUPPORT_SANITIZE 0x1000 102 #define ATA_SUPPORT_SANITIZE_ALLOWED 0x0800 103 #define ATA_SUPPORT_ANTIFREEZE_LOCK_EXT 0x0400 104 #define ATA_MULTI_VALID 0x0100 105 106 /*060*/ u_int16_t lba_size_1; 107 u_int16_t lba_size_2; 108 u_int16_t obsolete62; 109 /*063*/ u_int16_t mwdmamodes; /* multiword DMA modes */ 110 /*064*/ u_int16_t apiomodes; /* advanced PIO modes */ 111 112 /*065*/ u_int16_t mwdmamin; /* min. M/W DMA time/word ns */ 113 /*066*/ u_int16_t mwdmarec; /* rec. M/W DMA time ns */ 114 /*067*/ u_int16_t pioblind; /* min. PIO cycle w/o flow */ 115 /*068*/ u_int16_t pioiordy; /* min. PIO cycle IORDY flow */ 116 /*069*/ u_int16_t support3; 117 #define ATA_SUPPORT_RZAT 0x0020 118 #define ATA_SUPPORT_DRAT 0x4000 119 #define ATA_ENCRYPTS_ALL_USER_DATA 0x0010 /* Self-encrypting drive */ 120 #define ATA_SUPPORT_ZONE_MASK 0x0003 121 #define ATA_SUPPORT_ZONE_NR 0x0000 122 #define ATA_SUPPORT_ZONE_HOST_AWARE 0x0001 123 #define ATA_SUPPORT_ZONE_DEV_MANAGED 0x0002 124 u_int16_t reserved70; 125 /*071*/ u_int16_t rlsovlap; /* rel time (us) for overlap */ 126 /*072*/ u_int16_t rlsservice; /* rel time (us) for service */ 127 u_int16_t reserved73; 128 u_int16_t reserved74; 129 /*075*/ u_int16_t queue; 130 #define ATA_QUEUE_LEN(x) ((x) & 0x001f) 131 132 /*76*/ u_int16_t satacapabilities; 133 #define ATA_SATA_GEN1 0x0002 134 #define ATA_SATA_GEN2 0x0004 135 #define ATA_SATA_GEN3 0x0008 136 #define ATA_SUPPORT_NCQ 0x0100 137 #define ATA_SUPPORT_IFPWRMNGTRCV 0x0200 138 #define ATA_SUPPORT_PHYEVENTCNT 0x0400 139 #define ATA_SUPPORT_NCQ_UNLOAD 0x0800 140 #define ATA_SUPPORT_NCQ_PRIO 0x1000 141 #define ATA_SUPPORT_HAPST 0x2000 142 #define ATA_SUPPORT_DAPST 0x4000 143 #define ATA_SUPPORT_READLOGDMAEXT 0x8000 144 145 /*77*/ u_int16_t satacapabilities2; 146 #define ATA_SATA_CURR_GEN_MASK 0x0006 147 #define ATA_SUPPORT_NCQ_STREAM 0x0010 148 #define ATA_SUPPORT_NCQ_NON_DATA 0x0020 149 #define ATA_SUPPORT_NCQ_QMANAGEMENT ATA_SUPPORT_NCQ_NON_DATA 150 #define ATA_SUPPORT_RCVSND_FPDMA_QUEUED 0x0040 151 /*78*/ u_int16_t satasupport; 152 #define ATA_SUPPORT_NONZERO 0x0002 153 #define ATA_SUPPORT_AUTOACTIVATE 0x0004 154 #define ATA_SUPPORT_IFPWRMNGT 0x0008 155 #define ATA_SUPPORT_INORDERDATA 0x0010 156 #define ATA_SUPPORT_ASYNCNOTIF 0x0020 157 #define ATA_SUPPORT_SOFTSETPRESERVE 0x0040 158 #define ATA_SUPPORT_NCQ_AUTOSENSE 0x0080 159 /*79*/ u_int16_t sataenabled; 160 #define ATA_ENABLED_DAPST 0x0080 161 162 /*080*/ u_int16_t version_major; 163 /*081*/ u_int16_t version_minor; 164 165 struct { 166 /*082/085*/ u_int16_t command1; 167 #define ATA_SUPPORT_SMART 0x0001 168 #define ATA_SUPPORT_SECURITY 0x0002 169 #define ATA_SUPPORT_REMOVABLE 0x0004 170 #define ATA_SUPPORT_POWERMGT 0x0008 171 #define ATA_SUPPORT_PACKET 0x0010 172 #define ATA_SUPPORT_WRITECACHE 0x0020 173 #define ATA_SUPPORT_LOOKAHEAD 0x0040 174 #define ATA_SUPPORT_RELEASEIRQ 0x0080 175 #define ATA_SUPPORT_SERVICEIRQ 0x0100 176 #define ATA_SUPPORT_RESET 0x0200 177 #define ATA_SUPPORT_PROTECTED 0x0400 178 #define ATA_SUPPORT_WRITEBUFFER 0x1000 179 #define ATA_SUPPORT_READBUFFER 0x2000 180 #define ATA_SUPPORT_NOP 0x4000 181 182 /*083/086*/ u_int16_t command2; 183 #define ATA_SUPPORT_MICROCODE 0x0001 184 #define ATA_SUPPORT_QUEUED 0x0002 185 #define ATA_SUPPORT_CFA 0x0004 186 #define ATA_SUPPORT_APM 0x0008 187 #define ATA_SUPPORT_NOTIFY 0x0010 188 #define ATA_SUPPORT_STANDBY 0x0020 189 #define ATA_SUPPORT_SPINUP 0x0040 190 #define ATA_SUPPORT_MAXSECURITY 0x0100 191 #define ATA_SUPPORT_AUTOACOUSTIC 0x0200 192 #define ATA_SUPPORT_ADDRESS48 0x0400 193 #define ATA_SUPPORT_OVERLAY 0x0800 194 #define ATA_SUPPORT_FLUSHCACHE 0x1000 195 #define ATA_SUPPORT_FLUSHCACHE48 0x2000 196 197 /*084/087*/ u_int16_t extension; 198 #define ATA_SUPPORT_SMARTLOG 0x0001 199 #define ATA_SUPPORT_SMARTTEST 0x0002 200 #define ATA_SUPPORT_MEDIASN 0x0004 201 #define ATA_SUPPORT_MEDIAPASS 0x0008 202 #define ATA_SUPPORT_STREAMING 0x0010 203 #define ATA_SUPPORT_GENLOG 0x0020 204 #define ATA_SUPPORT_WRITEDMAFUAEXT 0x0040 205 #define ATA_SUPPORT_WRITEDMAQFUAEXT 0x0080 206 #define ATA_SUPPORT_64BITWWN 0x0100 207 #define ATA_SUPPORT_UNLOAD 0x2000 208 } __packed support, enabled; 209 210 /*088*/ u_int16_t udmamodes; /* UltraDMA modes */ 211 /*089*/ u_int16_t erase_time; /* time req'd in 2min units */ 212 /*090*/ u_int16_t enhanced_erase_time; /* time req'd in 2min units */ 213 /*091*/ u_int16_t apm_value; 214 /*092*/ u_int16_t master_passwd_revision; /* password revision code */ 215 /*093*/ u_int16_t hwres; 216 #define ATA_CABLE_ID 0x2000 217 218 /*094*/ u_int16_t acoustic; 219 #define ATA_ACOUSTIC_CURRENT(x) ((x) & 0x00ff) 220 #define ATA_ACOUSTIC_VENDOR(x) (((x) & 0xff00) >> 8) 221 222 /*095*/ u_int16_t stream_min_req_size; 223 /*096*/ u_int16_t stream_transfer_time; 224 /*097*/ u_int16_t stream_access_latency; 225 /*098*/ u_int32_t stream_granularity; 226 /*100*/ u_int16_t lba_size48_1; 227 u_int16_t lba_size48_2; 228 u_int16_t lba_size48_3; 229 u_int16_t lba_size48_4; 230 u_int16_t reserved104; 231 /*105*/ u_int16_t max_dsm_blocks; 232 /*106*/ u_int16_t pss; 233 #define ATA_PSS_LSPPS 0x000F 234 #define ATA_PSS_LSSABOVE512 0x1000 235 #define ATA_PSS_MULTLS 0x2000 236 #define ATA_PSS_VALID_MASK 0xC000 237 #define ATA_PSS_VALID_VALUE 0x4000 238 /*107*/ u_int16_t isd; 239 /*108*/ u_int16_t wwn[4]; 240 u_int16_t reserved112[5]; 241 /*117*/ u_int16_t lss_1; 242 /*118*/ u_int16_t lss_2; 243 /*119*/ u_int16_t support2; 244 #define ATA_SUPPORT_WRITEREADVERIFY 0x0002 245 #define ATA_SUPPORT_WRITEUNCORREXT 0x0004 246 #define ATA_SUPPORT_RWLOGDMAEXT 0x0008 247 #define ATA_SUPPORT_MICROCODE3 0x0010 248 #define ATA_SUPPORT_FREEFALL 0x0020 249 #define ATA_SUPPORT_SENSE_REPORT 0x0040 250 #define ATA_SUPPORT_EPC 0x0080 251 #define ATA_SUPPORT_AMAX_ADDR 0x0100 252 #define ATA_SUPPORT_DSN 0x0200 253 /*120*/ u_int16_t enabled2; 254 #define ATA_ENABLED_WRITEREADVERIFY 0x0002 255 #define ATA_ENABLED_WRITEUNCORREXT 0x0004 256 #define ATA_ENABLED_FREEFALL 0x0020 257 #define ATA_ENABLED_SENSE_REPORT 0x0040 258 #define ATA_ENABLED_EPC 0x0080 259 #define ATA_ENABLED_DSN 0x0200 260 u_int16_t reserved121[6]; 261 /*127*/ u_int16_t removable_status; 262 /*128*/ u_int16_t security_status; 263 #define ATA_SECURITY_LEVEL 0x0100 /* 0: high, 1: maximum */ 264 #define ATA_SECURITY_ENH_SUPP 0x0020 /* enhanced erase supported */ 265 #define ATA_SECURITY_COUNT_EXP 0x0010 /* count expired */ 266 #define ATA_SECURITY_FROZEN 0x0008 /* security config is frozen */ 267 #define ATA_SECURITY_LOCKED 0x0004 /* drive is locked */ 268 #define ATA_SECURITY_ENABLED 0x0002 /* ATA Security is enabled */ 269 #define ATA_SECURITY_SUPPORTED 0x0001 /* ATA Security is supported */ 270 271 u_int16_t reserved129[31]; 272 /*160*/ u_int16_t cfa_powermode1; 273 u_int16_t reserved161; 274 /*162*/ u_int16_t cfa_kms_support; 275 /*163*/ u_int16_t cfa_trueide_modes; 276 /*164*/ u_int16_t cfa_memory_modes; 277 u_int16_t reserved165[3]; 278 /*168*/ u_int16_t form_factor; 279 #define ATA_FORM_FACTOR_MASK 0x000f 280 #define ATA_FORM_FACTOR_NOT_REPORTED 0x0000 281 #define ATA_FORM_FACTOR_5_25 0x0001 282 #define ATA_FORM_FACTOR_3_5 0x0002 283 #define ATA_FORM_FACTOR_2_5 0x0003 284 #define ATA_FORM_FACTOR_1_8 0x0004 285 #define ATA_FORM_FACTOR_SUB_1_8 0x0005 286 #define ATA_FORM_FACTOR_MSATA 0x0006 287 #define ATA_FORM_FACTOR_M_2 0x0007 288 #define ATA_FORM_FACTOR_MICRO_SSD 0x0008 289 #define ATA_FORM_FACTOR_C_FAST 0x0009 290 /*169*/ u_int16_t support_dsm; 291 #define ATA_SUPPORT_DSM_TRIM 0x0001 292 /*170*/ u_int8_t product_id[8]; /* Additional Product Identifier */ 293 u_int16_t reserved174[2]; 294 /*176*/ u_int8_t media_serial[60]; 295 /*206*/ u_int16_t sct; 296 u_int16_t reserved207[2]; 297 /*209*/ u_int16_t lsalign; 298 /*210*/ u_int16_t wrv_sectors_m3_1; 299 u_int16_t wrv_sectors_m3_2; 300 /*212*/ u_int16_t wrv_sectors_m2_1; 301 u_int16_t wrv_sectors_m2_2; 302 /*214*/ u_int16_t nv_cache_caps; 303 /*215*/ u_int16_t nv_cache_size_1; 304 u_int16_t nv_cache_size_2; 305 /*217*/ u_int16_t media_rotation_rate; 306 #define ATA_RATE_NOT_REPORTED 0x0000 307 #define ATA_RATE_NON_ROTATING 0x0001 308 u_int16_t reserved218; 309 /*219*/ u_int16_t nv_cache_opt; 310 /*220*/ u_int16_t wrv_mode; 311 u_int16_t reserved221; 312 /*222*/ u_int16_t transport_major; 313 /*223*/ u_int16_t transport_minor; 314 u_int16_t reserved224[31]; 315 /*255*/ u_int16_t integrity; 316 } __packed __aligned(2); 317 318 /* ATA Dataset Management */ 319 #define ATA_DSM_BLK_SIZE 512 320 #define ATA_DSM_BLK_RANGES 64 321 #define ATA_DSM_RANGE_SIZE 8 322 #define ATA_DSM_RANGE_MAX 65535 323 324 /* 325 * ATA Device Register 326 * 327 * bit 7 Obsolete (was 1 in early ATA specs) 328 * bit 6 Sets LBA/CHS mode. 1=LBA, 0=CHS 329 * bit 5 Obsolete (was 1 in early ATA specs) 330 * bit 4 1 = Slave Drive, 0 = Master Drive 331 * bit 3-0 In LBA mode, 27-24 of address. In CHS mode, head number 332 */ 333 334 #define ATA_DEV_MASTER 0x00 335 #define ATA_DEV_SLAVE 0x10 336 #define ATA_DEV_LBA 0x40 337 338 /* ATA limits */ 339 #define ATA_MAX_28BIT_LBA 268435455UL 340 341 /* ATA Status Register */ 342 #define ATA_STATUS_ERROR 0x01 343 #define ATA_STATUS_SENSE_AVAIL 0x02 344 #define ATA_STATUS_ALIGN_ERR 0x04 345 #define ATA_STATUS_DATA_REQ 0x08 346 #define ATA_STATUS_DEF_WRITE_ERR 0x10 347 #define ATA_STATUS_DEVICE_FAULT 0x20 348 #define ATA_STATUS_DEVICE_READY 0x40 349 #define ATA_STATUS_BUSY 0x80 350 351 /* ATA Error Register */ 352 #define ATA_ERROR_ABORT 0x04 353 #define ATA_ERROR_ID_NOT_FOUND 0x10 354 355 /* ATA HPA Features */ 356 #define ATA_HPA_FEAT_MAX_ADDR 0x00 357 #define ATA_HPA_FEAT_SET_PWD 0x01 358 #define ATA_HPA_FEAT_LOCK 0x02 359 #define ATA_HPA_FEAT_UNLOCK 0x03 360 #define ATA_HPA_FEAT_FREEZE 0x04 361 362 /* ATA transfer modes */ 363 #define ATA_MODE_MASK 0x0f 364 #define ATA_DMA_MASK 0xf0 365 #define ATA_PIO 0x00 366 #define ATA_PIO0 0x08 367 #define ATA_PIO1 0x09 368 #define ATA_PIO2 0x0a 369 #define ATA_PIO3 0x0b 370 #define ATA_PIO4 0x0c 371 #define ATA_PIO_MAX 0x0f 372 #define ATA_DMA 0x10 373 #define ATA_WDMA0 0x20 374 #define ATA_WDMA1 0x21 375 #define ATA_WDMA2 0x22 376 #define ATA_UDMA0 0x40 377 #define ATA_UDMA1 0x41 378 #define ATA_UDMA2 0x42 379 #define ATA_UDMA3 0x43 380 #define ATA_UDMA4 0x44 381 #define ATA_UDMA5 0x45 382 #define ATA_UDMA6 0x46 383 #define ATA_SA150 0x47 384 #define ATA_SA300 0x48 385 #define ATA_SA600 0x49 386 #define ATA_DMA_MAX 0x4f 387 388 /* ATA commands */ 389 #define ATA_NOP 0x00 /* NOP */ 390 #define ATA_NF_FLUSHQUEUE 0x00 /* flush queued cmd's */ 391 #define ATA_NF_AUTOPOLL 0x01 /* start autopoll function */ 392 #define ATA_DATA_SET_MANAGEMENT 0x06 393 #define ATA_DSM_TRIM 0x01 394 #define ATA_DEVICE_RESET 0x08 /* reset device */ 395 #define ATA_READ 0x20 /* read */ 396 #define ATA_READ48 0x24 /* read 48bit LBA */ 397 #define ATA_READ_DMA48 0x25 /* read DMA 48bit LBA */ 398 #define ATA_READ_DMA_QUEUED48 0x26 /* read DMA QUEUED 48bit LBA */ 399 #define ATA_READ_NATIVE_MAX_ADDRESS48 0x27 /* read native max addr 48bit */ 400 #define ATA_READ_MUL48 0x29 /* read multi 48bit LBA */ 401 #define ATA_READ_STREAM_DMA48 0x2a /* read DMA stream 48bit LBA */ 402 #define ATA_READ_LOG_EXT 0x2f /* read log ext - PIO Data-In */ 403 #define ATA_READ_STREAM48 0x2b /* read stream 48bit LBA */ 404 #define ATA_WRITE 0x30 /* write */ 405 #define ATA_WRITE48 0x34 /* write 48bit LBA */ 406 #define ATA_WRITE_DMA48 0x35 /* write DMA 48bit LBA */ 407 #define ATA_WRITE_DMA_QUEUED48 0x36 /* write DMA QUEUED 48bit LBA*/ 408 #define ATA_SET_MAX_ADDRESS48 0x37 /* set max address 48bit */ 409 #define ATA_WRITE_MUL48 0x39 /* write multi 48bit LBA */ 410 #define ATA_WRITE_STREAM_DMA48 0x3a 411 #define ATA_WRITE_STREAM48 0x3b 412 #define ATA_WRITE_DMA_FUA48 0x3d 413 #define ATA_WRITE_DMA_QUEUED_FUA48 0x3e 414 #define ATA_WRITE_LOG_EXT 0x3f 415 #define ATA_READ_VERIFY 0x40 416 #define ATA_READ_VERIFY48 0x42 417 #define ATA_WRITE_UNCORRECTABLE48 0x45 /* write uncorrectable 48bit LBA */ 418 #define ATA_WU_PSEUDO 0x55 /* pseudo-uncorrectable error */ 419 #define ATA_WU_FLAGGED 0xaa /* flagged-uncorrectable error */ 420 #define ATA_READ_LOG_DMA_EXT 0x47 /* read log DMA ext - PIO Data-In */ 421 #define ATA_ZAC_MANAGEMENT_IN 0x4a /* ZAC management in */ 422 #define ATA_ZM_REPORT_ZONES 0x00 /* report zones */ 423 #define ATA_WRITE_LOG_DMA_EXT 0x57 /* WRITE LOG DMA EXT */ 424 #define ATA_TRUSTED_NON_DATA 0x5b /* TRUSTED NON-DATA */ 425 #define ATA_TRUSTED_RECEIVE 0x5c /* TRUSTED RECEIVE */ 426 #define ATA_TRUSTED_RECEIVE_DMA 0x5d /* TRUSTED RECEIVE DMA */ 427 #define ATA_TRUSTED_SEND 0x5e /* TRUSTED SEND */ 428 #define ATA_TRUSTED_SEND_DMA 0x5f /* TRUSTED SEND DMA */ 429 #define ATA_READ_FPDMA_QUEUED 0x60 /* read DMA NCQ */ 430 #define ATA_WRITE_FPDMA_QUEUED 0x61 /* write DMA NCQ */ 431 #define ATA_NCQ_NON_DATA 0x63 /* NCQ non-data command */ 432 #define ATA_ABORT_NCQ_QUEUE 0x00 /* abort NCQ queue */ 433 #define ATA_DEADLINE_HANDLING 0x01 /* deadline handling */ 434 #define ATA_SET_FEATURES 0x05 /* set features */ 435 #define ATA_ZERO_EXT 0x06 /* zero ext */ 436 #define ATA_NCQ_ZAC_MGMT_OUT 0x07 /* NCQ ZAC mgmt out no data */ 437 #define ATA_SEND_FPDMA_QUEUED 0x64 /* send DMA NCQ */ 438 #define ATA_SFPDMA_DSM 0x00 /* Data set management */ 439 #define ATA_SFPDMA_DSM_TRIM 0x01 /* Set trim bit in auxiliary */ 440 #define ATA_SFPDMA_HYBRID_EVICT 0x01 /* Hybrid Evict */ 441 #define ATA_SFPDMA_WLDMA 0x02 /* Write Log DMA EXT */ 442 #define ATA_SFPDMA_ZAC_MGMT_OUT 0x03 /* NCQ ZAC mgmt out w/data */ 443 #define ATA_RECV_FPDMA_QUEUED 0x65 /* receive DMA NCQ */ 444 #define ATA_RFPDMA_RL_DMA_EXT 0x00 /* Read Log DMA EXT */ 445 #define ATA_RFPDMA_ZAC_MGMT_IN 0x02 /* NCQ ZAC mgmt in w/data */ 446 #define ATA_SEP_ATTN 0x67 /* SEP request */ 447 #define ATA_SEEK 0x70 /* seek */ 448 #define ATA_AMAX_ADDR 0x78 /* Accessible Max Address */ 449 #define ATA_AMAX_ADDR_GET 0x00 /* GET NATIVE MAX ADDRESS EXT */ 450 #define ATA_AMAX_ADDR_SET 0x01 /* SET ACCESSIBLE MAX ADDRESS EXT */ 451 #define ATA_AMAX_ADDR_FREEZE 0x02 /* FREEZE ACCESSIBLE MAX ADDRESS EXT */ 452 #define ATA_ZAC_MANAGEMENT_OUT 0x9f /* ZAC management out */ 453 #define ATA_ZM_CLOSE_ZONE 0x01 /* close zone */ 454 #define ATA_ZM_FINISH_ZONE 0x02 /* finish zone */ 455 #define ATA_ZM_OPEN_ZONE 0x03 /* open zone */ 456 #define ATA_ZM_RWP 0x04 /* reset write pointer */ 457 #define ATA_DOWNLOAD_MICROCODE 0x92 /* DOWNLOAD MICROCODE */ 458 #define ATA_DOWNLOAD_MICROCODE_DMA 0x93 /* DOWNLOAD MICROCODE DMA */ 459 #define ATA_PACKET_CMD 0xa0 /* packet command */ 460 #define ATA_ATAPI_IDENTIFY 0xa1 /* get ATAPI params*/ 461 #define ATA_SERVICE 0xa2 /* service command */ 462 #define ATA_SMART_CMD 0xb0 /* SMART command */ 463 #define ATA_SANITIZE 0xb4 /* sanitize device */ 464 #define ATA_CFA_ERASE 0xc0 /* CFA erase */ 465 #define ATA_READ_MUL 0xc4 /* read multi */ 466 #define ATA_WRITE_MUL 0xc5 /* write multi */ 467 #define ATA_SET_MULTI 0xc6 /* set multi size */ 468 #define ATA_READ_DMA_QUEUED 0xc7 /* read DMA QUEUED */ 469 #define ATA_READ_DMA 0xc8 /* read DMA */ 470 #define ATA_WRITE_DMA 0xca /* write DMA */ 471 #define ATA_WRITE_DMA_QUEUED 0xcc /* write DMA QUEUED */ 472 #define ATA_WRITE_MUL_FUA48 0xce 473 #define ATA_STANDBY_IMMEDIATE 0xe0 /* standby immediate */ 474 #define ATA_IDLE_IMMEDIATE 0xe1 /* idle immediate */ 475 #define ATA_STANDBY_CMD 0xe2 /* standby */ 476 #define ATA_IDLE_CMD 0xe3 /* idle */ 477 #define ATA_READ_BUFFER 0xe4 /* read buffer */ 478 #define ATA_READ_PM 0xe4 /* read portmultiplier */ 479 #define ATA_CHECK_POWER_MODE 0xe5 /* device power mode */ 480 #define ATA_PM_STANDBY 0x00 /* standby, also ATA_EPC_STANDBY_Z */ 481 #define ATA_PM_STANDBY_Y 0x01 /* standby, also ATA_EPC_STANDBY_Y */ 482 #define ATA_PM_IDLE 0x80 /* idle */ 483 #define ATA_PM_IDLE_A 0x81 /* idle, also ATA_EPC_IDLE_A */ 484 #define ATA_PM_IDLE_B 0x82 /* idle, also ATA_EPC_IDLE_B */ 485 #define ATA_PM_IDLE_C 0x83 /* idle, also ATA_EPC_IDLE_C */ 486 #define ATA_PM_ACTIVE_IDLE 0xff /* active or idle */ 487 #define ATA_SLEEP 0xe6 /* sleep */ 488 #define ATA_FLUSHCACHE 0xe7 /* flush cache to disk */ 489 #define ATA_WRITE_BUFFER 0xe8 /* write buffer */ 490 #define ATA_WRITE_PM 0xe8 /* write portmultiplier */ 491 #define ATA_READ_BUFFER_DMA 0xe9 /* read buffer DMA */ 492 #define ATA_FLUSHCACHE48 0xea /* flush cache to disk */ 493 #define ATA_WRITE_BUFFER_DMA 0xeb /* write buffer DMA */ 494 #define ATA_ATA_IDENTIFY 0xec /* get ATA params */ 495 #define ATA_SETFEATURES 0xef /* features command */ 496 #define ATA_SF_ENAB_WCACHE 0x02 /* enable write cache */ 497 #define ATA_SF_DIS_WCACHE 0x82 /* disable write cache */ 498 #define ATA_SF_SETXFER 0x03 /* set transfer mode */ 499 #define ATA_SF_APM 0x05 /* Enable APM feature set */ 500 #define ATA_SF_ENAB_PUIS 0x06 /* enable PUIS */ 501 #define ATA_SF_DIS_PUIS 0x86 /* disable PUIS */ 502 #define ATA_SF_PUIS_SPINUP 0x07 /* PUIS spin-up */ 503 #define ATA_SF_WRV 0x0b /* Enable Write-Read-Verify */ 504 #define ATA_SF_DLC 0x0c /* Enable device life control */ 505 #define ATA_SF_SATA 0x10 /* Enable use of SATA feature */ 506 #define ATA_SF_FFC 0x41 /* Free-fall Control */ 507 #define ATA_SF_MHIST 0x43 /* Set Max Host Sect. Times */ 508 #define ATA_SF_RATE 0x45 /* Set Rate Basis */ 509 #define ATA_SF_EPC 0x4A /* Extended Power Conditions */ 510 #define ATA_SF_ENAB_RCACHE 0xaa /* enable readahead cache */ 511 #define ATA_SF_DIS_RCACHE 0x55 /* disable readahead cache */ 512 #define ATA_SF_ENAB_RELIRQ 0x5d /* enable release interrupt */ 513 #define ATA_SF_DIS_RELIRQ 0xdd /* disable release interrupt */ 514 #define ATA_SF_ENAB_SRVIRQ 0x5e /* enable service interrupt */ 515 #define ATA_SF_DIS_SRVIRQ 0xde /* disable service interrupt */ 516 #define ATA_SF_LPSAERC 0x62 /* Long Phys Sect Align ErrRep*/ 517 #define ATA_SF_DSN 0x63 /* Device Stats Notification */ 518 #define ATA_SECURITY_SET_PASSWORD 0xf1 /* set drive password */ 519 #define ATA_SECURITY_UNLOCK 0xf2 /* unlock drive using passwd */ 520 #define ATA_SECURITY_ERASE_PREPARE 0xf3 /* prepare to erase drive */ 521 #define ATA_SECURITY_ERASE_UNIT 0xf4 /* erase all blocks on drive */ 522 #define ATA_SECURITY_FREEZE_LOCK 0xf5 /* freeze security config */ 523 #define ATA_SECURITY_DISABLE_PASSWORD 0xf6 /* disable drive password */ 524 #define ATA_READ_NATIVE_MAX_ADDRESS 0xf8 /* read native max address */ 525 #define ATA_SET_MAX_ADDRESS 0xf9 /* set max address */ 526 527 /* ATAPI commands */ 528 #define ATAPI_TEST_UNIT_READY 0x00 /* check if device is ready */ 529 #define ATAPI_REZERO 0x01 /* rewind */ 530 #define ATAPI_REQUEST_SENSE 0x03 /* get sense data */ 531 #define ATAPI_FORMAT 0x04 /* format unit */ 532 #define ATAPI_READ 0x08 /* read data */ 533 #define ATAPI_WRITE 0x0a /* write data */ 534 #define ATAPI_WEOF 0x10 /* write filemark */ 535 #define ATAPI_WF_WRITE 0x01 536 #define ATAPI_SPACE 0x11 /* space command */ 537 #define ATAPI_SP_FM 0x01 538 #define ATAPI_SP_EOD 0x03 539 #define ATAPI_INQUIRY 0x12 /* get inquiry data */ 540 #define ATAPI_MODE_SELECT 0x15 /* mode select */ 541 #define ATAPI_ERASE 0x19 /* erase */ 542 #define ATAPI_MODE_SENSE 0x1a /* mode sense */ 543 #define ATAPI_START_STOP 0x1b /* start/stop unit */ 544 #define ATAPI_SS_LOAD 0x01 545 #define ATAPI_SS_RETENSION 0x02 546 #define ATAPI_SS_EJECT 0x04 547 #define ATAPI_PREVENT_ALLOW 0x1e /* media removal */ 548 #define ATAPI_READ_FORMAT_CAPACITIES 0x23 /* get format capacities */ 549 #define ATAPI_READ_CAPACITY 0x25 /* get volume capacity */ 550 #define ATAPI_READ_BIG 0x28 /* read data */ 551 #define ATAPI_WRITE_BIG 0x2a /* write data */ 552 #define ATAPI_LOCATE 0x2b /* locate to position */ 553 #define ATAPI_READ_POSITION 0x34 /* read position */ 554 #define ATAPI_SYNCHRONIZE_CACHE 0x35 /* flush buf, close channel */ 555 #define ATAPI_WRITE_BUFFER 0x3b /* write device buffer */ 556 #define ATAPI_READ_BUFFER 0x3c /* read device buffer */ 557 #define ATAPI_READ_SUBCHANNEL 0x42 /* get subchannel info */ 558 #define ATAPI_READ_TOC 0x43 /* get table of contents */ 559 #define ATAPI_PLAY_10 0x45 /* play by lba */ 560 #define ATAPI_PLAY_MSF 0x47 /* play by MSF address */ 561 #define ATAPI_PLAY_TRACK 0x48 /* play by track number */ 562 #define ATAPI_PAUSE 0x4b /* pause audio operation */ 563 #define ATAPI_READ_DISK_INFO 0x51 /* get disk info structure */ 564 #define ATAPI_READ_TRACK_INFO 0x52 /* get track info structure */ 565 #define ATAPI_RESERVE_TRACK 0x53 /* reserve track */ 566 #define ATAPI_SEND_OPC_INFO 0x54 /* send OPC structurek */ 567 #define ATAPI_MODE_SELECT_BIG 0x55 /* set device parameters */ 568 #define ATAPI_REPAIR_TRACK 0x58 /* repair track */ 569 #define ATAPI_READ_MASTER_CUE 0x59 /* read master CUE info */ 570 #define ATAPI_MODE_SENSE_BIG 0x5a /* get device parameters */ 571 #define ATAPI_CLOSE_TRACK 0x5b /* close track/session */ 572 #define ATAPI_READ_BUFFER_CAPACITY 0x5c /* get buffer capicity */ 573 #define ATAPI_SEND_CUE_SHEET 0x5d /* send CUE sheet */ 574 #define ATAPI_SERVICE_ACTION_IN 0x96 /* get service data */ 575 #define ATAPI_BLANK 0xa1 /* blank the media */ 576 #define ATAPI_SEND_KEY 0xa3 /* send DVD key structure */ 577 #define ATAPI_REPORT_KEY 0xa4 /* get DVD key structure */ 578 #define ATAPI_PLAY_12 0xa5 /* play by lba */ 579 #define ATAPI_LOAD_UNLOAD 0xa6 /* changer control command */ 580 #define ATAPI_READ_STRUCTURE 0xad /* get DVD structure */ 581 #define ATAPI_PLAY_CD 0xb4 /* universal play command */ 582 #define ATAPI_SET_SPEED 0xbb /* set drive speed */ 583 #define ATAPI_MECH_STATUS 0xbd /* get changer status */ 584 #define ATAPI_READ_CD 0xbe /* read data */ 585 #define ATAPI_POLL_DSC 0xff /* poll DSC status bit */ 586 587 struct ata_ioc_devices { 588 int channel; 589 char name[2][32]; 590 struct ata_params params[2]; 591 }; 592 593 /* pr channel ATA ioctl calls */ 594 #define IOCATAGMAXCHANNEL _IOR('a', 1, int) 595 #define IOCATAREINIT _IOW('a', 2, int) 596 #define IOCATAATTACH _IOW('a', 3, int) 597 #define IOCATADETACH _IOW('a', 4, int) 598 #define IOCATADEVICES _IOWR('a', 5, struct ata_ioc_devices) 599 600 /* ATAPI request sense structure */ 601 struct atapi_sense { 602 u_int8_t error; /* current or deferred errors */ 603 #define ATA_SENSE_VALID 0x80 604 605 u_int8_t segment; /* segment number */ 606 u_int8_t key; /* sense key */ 607 #define ATA_SENSE_KEY_MASK 0x0f /* sense key mask */ 608 #define ATA_SENSE_NO_SENSE 0x00 /* no specific sense key info */ 609 #define ATA_SENSE_RECOVERED_ERROR 0x01 /* command OK, data recovered */ 610 #define ATA_SENSE_NOT_READY 0x02 /* no access to drive */ 611 #define ATA_SENSE_MEDIUM_ERROR 0x03 /* non-recovered data error */ 612 #define ATA_SENSE_HARDWARE_ERROR 0x04 /* non-recoverable HW failure */ 613 #define ATA_SENSE_ILLEGAL_REQUEST 0x05 /* invalid command param(s) */ 614 #define ATA_SENSE_UNIT_ATTENTION 0x06 /* media changed */ 615 #define ATA_SENSE_DATA_PROTECT 0x07 /* write protect */ 616 #define ATA_SENSE_BLANK_CHECK 0x08 /* blank check */ 617 #define ATA_SENSE_VENDOR_SPECIFIC 0x09 /* vendor specific skey */ 618 #define ATA_SENSE_COPY_ABORTED 0x0a /* copy aborted */ 619 #define ATA_SENSE_ABORTED_COMMAND 0x0b /* command aborted, try again */ 620 #define ATA_SENSE_EQUAL 0x0c /* equal */ 621 #define ATA_SENSE_VOLUME_OVERFLOW 0x0d /* volume overflow */ 622 #define ATA_SENSE_MISCOMPARE 0x0e /* data dont match the medium */ 623 #define ATA_SENSE_RESERVED 0x0f 624 #define ATA_SENSE_ILI 0x20; 625 #define ATA_SENSE_EOM 0x40; 626 #define ATA_SENSE_FILEMARK 0x80; 627 628 u_int32_t cmd_info; /* cmd information */ 629 u_int8_t sense_length; /* additional sense len (n-7) */ 630 u_int32_t cmd_specific_info; /* additional cmd spec info */ 631 u_int8_t asc; /* additional sense code */ 632 u_int8_t ascq; /* additional sense code qual */ 633 u_int8_t replaceable_unit_code; /* replaceable unit code */ 634 u_int8_t specific; /* sense key specific */ 635 #define ATA_SENSE_SPEC_VALID 0x80 636 #define ATA_SENSE_SPEC_MASK 0x7f 637 638 u_int8_t specific1; /* sense key specific */ 639 u_int8_t specific2; /* sense key specific */ 640 } __packed; 641 642 /* 643 * SET FEATURES subcommands 644 */ 645 646 /* 647 * SET FEATURES command 648 * Extended Power Conditions subcommand -- ATA_SF_EPC (0x4A) 649 * These values go in the LBA 3:0. 650 */ 651 #define ATA_SF_EPC_RESTORE 0x00 /* Restore Power Condition Settings */ 652 #define ATA_SF_EPC_GOTO 0x01 /* Go To Power Condition */ 653 #define ATA_SF_EPC_SET_TIMER 0x02 /* Set Power Condition Timer */ 654 #define ATA_SF_EPC_SET_STATE 0x03 /* Set Power Condition State */ 655 #define ATA_SF_EPC_ENABLE 0x04 /* Enable the EPC feature set */ 656 #define ATA_SF_EPC_DISABLE 0x05 /* Disable the EPC feature set */ 657 #define ATA_SF_EPC_SET_SOURCE 0x06 /* Set EPC Power Source */ 658 659 /* 660 * SET FEATURES command 661 * Extended Power Conditions subcommand -- ATA_SF_EPC (0x4A) 662 * Power Condition ID field 663 * These values go in the count register. 664 */ 665 #define ATA_EPC_STANDBY_Z 0x00 /* Substate of PM2:Standby */ 666 #define ATA_EPC_STANDBY_Y 0x01 /* Substate of PM2:Standby */ 667 #define ATA_EPC_IDLE_A 0x81 /* Substate of PM1:Idle */ 668 #define ATA_EPC_IDLE_B 0x82 /* Substate of PM1:Idle */ 669 #define ATA_EPC_IDLE_C 0x83 /* Substate of PM1:Idle */ 670 #define ATA_EPC_ALL 0xff /* All supported power conditions */ 671 672 /* 673 * SET FEATURES command 674 * Extended Power Conditions subcommand -- ATA_SF_EPC (0x4A) 675 * Restore Power Conditions Settings subcommand 676 * These values go in the LBA register. 677 */ 678 #define ATA_SF_EPC_RST_DFLT 0x40 /* 1=Rst from Default, 0= from Saved */ 679 #define ATA_SF_EPC_RST_SAVE 0x10 /* 1=Save on completion */ 680 681 /* 682 * SET FEATURES command 683 * Extended Power Conditions subcommand -- ATA_SF_EPC (0x4A) 684 * Got To Power Condition subcommand 685 * These values go in the LBA register. 686 */ 687 #define ATA_SF_EPC_GOTO_DELAY 0x02000000 /* Delayed entry bit */ 688 #define ATA_SF_EPC_GOTO_HOLD 0x01000000 /* Hold Power Cond bit */ 689 690 /* 691 * SET FEATURES command 692 * Extended Power Conditions subcommand -- ATA_SF_EPC (0x4A) 693 * Set Power Condition Timer subcommand 694 * These values go in the LBA register. 695 */ 696 #define ATA_SF_EPC_TIMER_MASK 0x00ffff00 /* Timer field */ 697 #define ATA_SF_EPC_TIMER_SHIFT 8 698 #define ATA_SF_EPC_TIMER_SEC 0x00000080 /* Timer units, 1=sec, 0=.1s */ 699 #define ATA_SF_EPC_TIMER_EN 0x00000020 /* Enable/disable cond. */ 700 #define ATA_SF_EPC_TIMER_SAVE 0x00000010 /* Save settings on comp. */ 701 702 /* 703 * SET FEATURES command 704 * Extended Power Conditions subcommand -- ATA_SF_EPC (0x4A) 705 * Set Power Condition State subcommand 706 * These values go in the LBA register. 707 */ 708 #define ATA_SF_EPC_SETCON_EN 0x00000020 /* Enable power cond. */ 709 #define ATA_SF_EPC_SETCON_SAVE 0x00000010 /* Save settings on comp */ 710 711 /* 712 * SET FEATURES command 713 * Extended Power Conditions subcommand -- ATA_SF_EPC (0x4A) 714 * Set EPC Power Source subcommand 715 * These values go in the count register. 716 */ 717 #define ATA_SF_EPC_SRC_UNKNOWN 0x0000 /* Unknown source */ 718 #define ATA_SF_EPC_SRC_BAT 0x0001 /* battery source */ 719 #define ATA_SF_EPC_SRC_NOT_BAT 0x0002 /* not battery source */ 720 721 #define ATA_LOG_DIRECTORY 0x00 /* Directory of all logs */ 722 #define ATA_POWER_COND_LOG 0x08 /* Power Conditions Log */ 723 #define ATA_PCL_IDLE 0x00 /* Idle Power Conditions Page */ 724 #define ATA_PCL_STANDBY 0x01 /* Standby Power Conditions Page */ 725 #define ATA_IDENTIFY_DATA_LOG 0x30 /* Identify Device Data Log */ 726 #define ATA_IDL_PAGE_LIST 0x00 /* List of supported pages */ 727 #define ATA_IDL_IDENTIFY_DATA 0x01 /* Copy of Identify Device data */ 728 #define ATA_IDL_CAPACITY 0x02 /* Capacity */ 729 #define ATA_IDL_SUP_CAP 0x03 /* Supported Capabilities */ 730 #define ATA_IDL_CUR_SETTINGS 0x04 /* Current Settings */ 731 #define ATA_IDL_ATA_STRINGS 0x05 /* ATA Strings */ 732 #define ATA_IDL_SECURITY 0x06 /* Security */ 733 #define ATA_IDL_PARALLEL_ATA 0x07 /* Parallel ATA */ 734 #define ATA_IDL_SERIAL_ATA 0x08 /* Serial ATA */ 735 #define ATA_IDL_ZDI 0x09 /* Zoned Device Information */ 736 737 struct ata_gp_log_dir { 738 uint8_t header[2]; 739 #define ATA_GP_LOG_DIR_VERSION 0x0001 740 uint8_t num_pages[255*2]; /* Number of log pages at address */ 741 }; 742 743 /* 744 * ATA Power Conditions log descriptor 745 */ 746 struct ata_power_cond_log_desc { 747 uint8_t reserved1; 748 uint8_t flags; 749 #define ATA_PCL_COND_SUPPORTED 0x80 750 #define ATA_PCL_COND_SAVEABLE 0x40 751 #define ATA_PCL_COND_CHANGEABLE 0x20 752 #define ATA_PCL_DEFAULT_TIMER_EN 0x10 753 #define ATA_PCL_SAVED_TIMER_EN 0x08 754 #define ATA_PCL_CURRENT_TIMER_EN 0x04 755 #define ATA_PCL_HOLD_PC_NOT_SUP 0x02 756 uint8_t reserved2[2]; 757 uint8_t default_timer[4]; 758 uint8_t saved_timer[4]; 759 uint8_t current_timer[4]; 760 uint8_t nom_time_to_active[4]; 761 uint8_t min_timer[4]; 762 uint8_t max_timer[4]; 763 uint8_t num_transitions_to_pc[4]; 764 uint8_t hours_in_pc[4]; 765 uint8_t reserved3[28]; 766 }; 767 768 /* 769 * ATA Power Conditions Log (0x08), Idle power conditions page (0x00) 770 */ 771 struct ata_power_cond_log_idle { 772 struct ata_power_cond_log_desc idle_a_desc; 773 struct ata_power_cond_log_desc idle_b_desc; 774 struct ata_power_cond_log_desc idle_c_desc; 775 uint8_t reserved[320]; 776 }; 777 778 /* 779 * ATA Power Conditions Log (0x08), Standby power conditions page (0x01) 780 */ 781 struct ata_power_cond_log_standby { 782 uint8_t reserved[384]; 783 struct ata_power_cond_log_desc standby_y_desc; 784 struct ata_power_cond_log_desc standby_z_desc; 785 }; 786 787 /* 788 * ATA IDENTIFY DEVICE data log (0x30) page 0x00 789 * List of Supported IDENTIFY DEVICE data pages. 790 */ 791 struct ata_identify_log_pages { 792 uint8_t header[8]; 793 #define ATA_IDLOG_REVISION 0x0000000000000001 794 uint8_t entry_count; 795 uint8_t entries[503]; 796 }; 797 798 /* 799 * ATA IDENTIFY DEVICE data log (0x30) 800 * Capacity (Page 0x02). 801 */ 802 struct ata_identify_log_capacity { 803 uint8_t header[8]; 804 #define ATA_CAP_HEADER_VALID 0x8000000000000000 805 #define ATA_CAP_PAGE_NUM_MASK 0x0000000000ff0000 806 #define ATA_CAP_PAGE_NUM_SHIFT 16 807 #define ATA_CAP_REV_MASK 0x00000000000000ff 808 uint8_t capacity[8]; 809 #define ATA_CAP_CAPACITY_VALID 0x8000000000000000 810 #define ATA_CAP_ACCESSIBLE_CAP 0x0000ffffffffffff 811 uint8_t phys_logical_sect_size[8]; 812 #define ATA_CAP_PL_VALID 0x8000000000000000 813 #define ATA_CAP_LTOP_REL_SUP 0x4000000000000000 814 #define ATA_CAP_LOG_SECT_SUP 0x2000000000000000 815 #define ATA_CAP_ALIGN_ERR_MASK 0x0000000000300000 816 #define ATA_CAP_LTOP_MASK 0x00000000000f0000 817 #define ATA_CAP_LOG_SECT_OFF 0x000000000000ffff 818 uint8_t logical_sect_size[8]; 819 #define ATA_CAP_LOG_SECT_VALID 0x8000000000000000 820 #define ATA_CAP_LOG_SECT_SIZE 0x00000000ffffffff 821 uint8_t nominal_buffer_size[8]; 822 #define ATA_CAP_NOM_BUF_VALID 0x8000000000000000 823 #define ATA_CAP_NOM_BUF_SIZE 0x7fffffffffffffff 824 uint8_t reserved[472]; 825 }; 826 827 /* 828 * ATA IDENTIFY DEVICE data log (0x30) 829 * Supported Capabilities (Page 0x03). 830 */ 831 832 struct ata_identify_log_sup_cap { 833 uint8_t header[8]; 834 #define ATA_SUP_CAP_HEADER_VALID 0x8000000000000000 835 #define ATA_SUP_CAP_PAGE_NUM_MASK 0x0000000000ff0000 836 #define ATA_SUP_CAP_PAGE_NUM_SHIFT 16 837 #define ATA_SUP_CAP_REV_MASK 0x00000000000000ff 838 uint8_t sup_cap[8]; 839 #define ATA_SUP_CAP_VALID 0x8000000000000000 840 #define ATA_SC_SET_SECT_CONFIG_SUP 0x0002000000000000 /* Set Sect Conf*/ 841 #define ATA_SC_ZERO_EXT_SUP 0x0001000000000000 /* Zero EXT */ 842 #define ATA_SC_SUCC_NCQ_SENSE_SUP 0x0000800000000000 /* Succ. NCQ Sns */ 843 #define ATA_SC_DLC_SUP 0x0000400000000000 /* DLC */ 844 #define ATA_SC_RQSN_DEV_FAULT_SUP 0x0000200000000000 /* Req Sns Dev Flt*/ 845 #define ATA_SC_DSN_SUP 0x0000100000000000 /* DSN */ 846 #define ATA_SC_LP_STANDBY_SUP 0x0000080000000000 /* LP Standby */ 847 #define ATA_SC_SET_EPC_PS_SUP 0x0000040000000000 /* Set EPC PS */ 848 #define ATA_SC_AMAX_ADDR_SUP 0x0000020000000000 /* AMAX Addr */ 849 #define ATA_SC_DRAT_SUP 0x0000008000000000 /* DRAT */ 850 #define ATA_SC_LPS_MISALGN_SUP 0x0000004000000000 /* LPS Misalign */ 851 #define ATA_SC_RB_DMA_SUP 0x0000001000000000 /* Read Buf DMA */ 852 #define ATA_SC_WB_DMA_SUP 0x0000000800000000 /* Write Buf DMA */ 853 #define ATA_SC_DNLD_MC_DMA_SUP 0x0000000200000000 /* DL MCode DMA */ 854 #define ATA_SC_28BIT_SUP 0x0000000100000000 /* 28-bit */ 855 #define ATA_SC_RZAT_SUP 0x0000000080000000 /* RZAT */ 856 #define ATA_SC_NOP_SUP 0x0000000020000000 /* NOP */ 857 #define ATA_SC_READ_BUFFER_SUP 0x0000000010000000 /* Read Buffer */ 858 #define ATA_SC_WRITE_BUFFER_SUP 0x0000000008000000 /* Write Buffer */ 859 #define ATA_SC_READ_LOOK_AHEAD_SUP 0x0000000002000000 /* Read Look-Ahead*/ 860 #define ATA_SC_VOLATILE_WC_SUP 0x0000000001000000 /* Volatile WC */ 861 #define ATA_SC_SMART_SUP 0x0000000000800000 /* SMART */ 862 #define ATA_SC_FLUSH_CACHE_EXT_SUP 0x0000000000400000 /* Flush Cache Ext */ 863 #define ATA_SC_48BIT_SUP 0x0000000000100000 /* 48-Bit */ 864 #define ATA_SC_SPINUP_SUP 0x0000000000040000 /* Spin-Up */ 865 #define ATA_SC_PUIS_SUP 0x0000000000020000 /* PUIS */ 866 #define ATA_SC_APM_SUP 0x0000000000010000 /* APM */ 867 #define ATA_SC_DL_MICROCODE_SUP 0x0000000000004000 /* DL Microcode */ 868 #define ATA_SC_UNLOAD_SUP 0x0000000000002000 /* Unload */ 869 #define ATA_SC_WRITE_FUA_EXT_SUP 0x0000000000001000 /* Write FUA EXT */ 870 #define ATA_SC_GPL_SUP 0x0000000000000800 /* GPL */ 871 #define ATA_SC_STREAMING_SUP 0x0000000000000400 /* Streaming */ 872 #define ATA_SC_SMART_SELFTEST_SUP 0x0000000000000100 /* SMART self-test */ 873 #define ATA_SC_SMART_ERR_LOG_SUP 0x0000000000000080 /* SMART Err Log */ 874 #define ATA_SC_EPC_SUP 0x0000000000000040 /* EPC */ 875 #define ATA_SC_SENSE_SUP 0x0000000000000020 /* Sense data */ 876 #define ATA_SC_FREEFALL_SUP 0x0000000000000010 /* Free-Fall */ 877 #define ATA_SC_DM_MODE3_SUP 0x0000000000000008 /* DM Mode 3 */ 878 #define ATA_SC_GPL_DMA_SUP 0x0000000000000004 /* GPL DMA */ 879 #define ATA_SC_WRITE_UNCOR_SUP 0x0000000000000002 /* Write uncorr. */ 880 #define ATA_SC_WRV_SUP 0x0000000000000001 /* WRV */ 881 uint8_t download_code_cap[8]; 882 #define ATA_DL_CODE_VALID 0x8000000000000000 883 #define ATA_DLC_DM_OFFSETS_DEFER_SUP 0x0000000400000000 884 #define ATA_DLC_DM_IMMED_SUP 0x0000000200000000 885 #define ATA_DLC_DM_OFF_IMMED_SUP 0x0000000100000000 886 #define ATA_DLC_DM_MAX_XFER_SIZE_MASK 0x00000000ffff0000 887 #define ATA_DLC_DM_MAX_XFER_SIZE_SHIFT 16 888 #define ATA_DLC_DM_MIN_XFER_SIZE_MASK 0x000000000000ffff 889 uint8_t nom_media_rotation_rate[8]; 890 #define ATA_NOM_MEDIA_ROTATION_VALID 0x8000000000000000 891 #define ATA_ROTATION_MASK 0x000000000000ffff 892 uint8_t form_factor[8]; 893 #define ATA_FORM_FACTOR_VALID 0x8000000000000000 894 #define ATA_FF_MASK 0x000000000000000f 895 #define ATA_FF_NOT_REPORTED 0x0000000000000000 /* Not reported */ 896 #define ATA_FF_525_IN 0x0000000000000001 /* 5.25 inch */ 897 #define ATA_FF_35_IN 0x0000000000000002 /* 3.5 inch */ 898 #define ATA_FF_25_IN 0x0000000000000003 /* 2.5 inch */ 899 #define ATA_FF_18_IN 0x0000000000000004 /* 1.8 inch */ 900 #define ATA_FF_LT_18_IN 0x0000000000000005 /* < 1.8 inch */ 901 #define ATA_FF_MSATA 0x0000000000000006 /* mSATA */ 902 #define ATA_FF_M2 0x0000000000000007 /* M.2 */ 903 #define ATA_FF_MICROSSD 0x0000000000000008 /* MicroSSD */ 904 #define ATA_FF_CFAST 0x0000000000000009 /* CFast */ 905 uint8_t wrv_sec_cnt_mode3[8]; 906 #define ATA_WRV_MODE3_VALID 0x8000000000000000 907 #define ATA_WRV_MODE3_COUNT 0x00000000ffffffff 908 uint8_t wrv_sec_cnt_mode2[8]; 909 #define ATA_WRV_MODE2_VALID 0x8000000000000000 910 #define ATA_WRV_MODE2_COUNT 0x00000000ffffffff 911 uint8_t wwn[16]; 912 /* XXX KDM need to figure out how to handle 128-bit fields */ 913 uint8_t dsm[8]; 914 #define ATA_DSM_VALID 0x8000000000000000 915 #define ATA_LB_MARKUP_SUP 0x000000000000ff00 916 #define ATA_TRIM_SUP 0x0000000000000001 917 uint8_t util_per_unit_time[16]; 918 /* XXX KDM need to figure out how to handle 128-bit fields */ 919 uint8_t util_usage_rate_sup[8]; 920 #define ATA_UTIL_USAGE_RATE_VALID 0x8000000000000000 921 #define ATA_SETTING_RATE_SUP 0x0000000000800000 922 #define ATA_SINCE_POWERON_SUP 0x0000000000000100 923 #define ATA_POH_RATE_SUP 0x0000000000000010 924 #define ATA_DATE_TIME_RATE_SUP 0x0000000000000001 925 uint8_t zoned_cap[8]; 926 #define ATA_ZONED_VALID 0x8000000000000000 927 #define ATA_ZONED_MASK 0x0000000000000003 928 uint8_t sup_zac_cap[8]; 929 #define ATA_SUP_ZAC_CAP_VALID 0x8000000000000000 930 #define ATA_ND_RWP_SUP 0x0000000000000010 /* Reset Write Ptr*/ 931 #define ATA_ND_FINISH_ZONE_SUP 0x0000000000000008 /* Finish Zone */ 932 #define ATA_ND_CLOSE_ZONE_SUP 0x0000000000000004 /* Close Zone */ 933 #define ATA_ND_OPEN_ZONE_SUP 0x0000000000000002 /* Open Zone */ 934 #define ATA_REPORT_ZONES_SUP 0x0000000000000001 /* Report Zones */ 935 uint8_t reserved[392]; 936 }; 937 938 /* 939 * ATA Identify Device Data Log Zoned Device Information Page (0x09). 940 * Current as of ZAC r04a, August 25, 2015. 941 */ 942 struct ata_zoned_info_log { 943 uint8_t header[8]; 944 #define ATA_ZDI_HEADER_VALID 0x8000000000000000 945 #define ATA_ZDI_PAGE_NUM_MASK 0x0000000000ff0000 946 #define ATA_ZDI_PAGE_NUM_SHIFT 16 947 #define ATA_ZDI_REV_MASK 0x00000000000000ff 948 uint8_t zoned_cap[8]; 949 #define ATA_ZDI_CAP_VALID 0x8000000000000000 950 #define ATA_ZDI_CAP_URSWRZ 0x0000000000000001 951 uint8_t zoned_settings[8]; 952 #define ATA_ZDI_SETTINGS_VALID 0x8000000000000000 953 uint8_t optimal_seq_zones[8]; 954 #define ATA_ZDI_OPT_SEQ_VALID 0x8000000000000000 955 #define ATA_ZDI_OPT_SEQ_MASK 0x00000000ffffffff 956 uint8_t optimal_nonseq_zones[8]; 957 #define ATA_ZDI_OPT_NS_VALID 0x8000000000000000 958 #define ATA_ZDI_OPT_NS_MASK 0x00000000ffffffff 959 uint8_t max_seq_req_zones[8]; 960 #define ATA_ZDI_MAX_SEQ_VALID 0x8000000000000000 961 #define ATA_ZDI_MAX_SEQ_MASK 0x00000000ffffffff 962 uint8_t version_info[8]; 963 #define ATA_ZDI_VER_VALID 0x8000000000000000 964 #define ATA_ZDI_VER_ZAC_SUP 0x0100000000000000 965 #define ATA_ZDI_VER_ZAC_MASK 0x00000000000000ff 966 uint8_t reserved[456]; 967 }; 968 969 struct ata_ioc_request { 970 union { 971 struct { 972 u_int8_t command; 973 u_int8_t feature; 974 u_int64_t lba; 975 u_int16_t count; 976 } ata; 977 struct { 978 char ccb[16]; 979 struct atapi_sense sense; 980 } atapi; 981 } u; 982 caddr_t data; 983 int count; 984 int flags; 985 #define ATA_CMD_CONTROL 0x01 986 #define ATA_CMD_READ 0x02 987 #define ATA_CMD_WRITE 0x04 988 #define ATA_CMD_ATAPI 0x08 989 990 int timeout; 991 int error; 992 }; 993 994 struct ata_security_password { 995 u_int16_t ctrl; 996 #define ATA_SECURITY_PASSWORD_USER 0x0000 997 #define ATA_SECURITY_PASSWORD_MASTER 0x0001 998 #define ATA_SECURITY_ERASE_NORMAL 0x0000 999 #define ATA_SECURITY_ERASE_ENHANCED 0x0002 1000 #define ATA_SECURITY_LEVEL_HIGH 0x0000 1001 #define ATA_SECURITY_LEVEL_MAXIMUM 0x0100 1002 1003 u_int8_t password[32]; 1004 u_int16_t revision; 1005 u_int16_t reserved[238]; 1006 }; 1007 1008 /* pr device ATA ioctl calls */ 1009 #define IOCATAREQUEST _IOWR('a', 100, struct ata_ioc_request) 1010 #define IOCATAGPARM _IOR('a', 101, struct ata_params) 1011 #define IOCATAGMODE _IOR('a', 102, int) 1012 #define IOCATASMODE _IOW('a', 103, int) 1013 1014 #define IOCATAGSPINDOWN _IOR('a', 104, int) 1015 #define IOCATASSPINDOWN _IOW('a', 105, int) 1016 1017 struct ata_ioc_raid_config { 1018 int lun; 1019 int type; 1020 #define AR_JBOD 0x0001 1021 #define AR_SPAN 0x0002 1022 #define AR_RAID0 0x0004 1023 #define AR_RAID1 0x0008 1024 #define AR_RAID01 0x0010 1025 #define AR_RAID3 0x0020 1026 #define AR_RAID4 0x0040 1027 #define AR_RAID5 0x0080 1028 1029 int interleave; 1030 int status; 1031 #define AR_READY 1 1032 #define AR_DEGRADED 2 1033 #define AR_REBUILDING 4 1034 1035 int progress; 1036 int total_disks; 1037 int disks[16]; 1038 }; 1039 1040 struct ata_ioc_raid_status { 1041 int lun; 1042 int type; 1043 int interleave; 1044 int status; 1045 int progress; 1046 int total_disks; 1047 struct { 1048 int state; 1049 #define AR_DISK_ONLINE 0x01 1050 #define AR_DISK_PRESENT 0x02 1051 #define AR_DISK_SPARE 0x04 1052 int lun; 1053 } disks[16]; 1054 }; 1055 1056 /* ATA RAID ioctl calls */ 1057 #define IOCATARAIDCREATE _IOWR('a', 200, struct ata_ioc_raid_config) 1058 #define IOCATARAIDDELETE _IOW('a', 201, int) 1059 #define IOCATARAIDSTATUS _IOWR('a', 202, struct ata_ioc_raid_status) 1060 #define IOCATARAIDADDSPARE _IOW('a', 203, struct ata_ioc_raid_config) 1061 #define IOCATARAIDREBUILD _IOW('a', 204, int) 1062 1063 #endif /* _SYS_ATA_H_ */
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