The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/sys/ata.h

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    1 /*-
    2  * Copyright (c) 2000 - 2008 Søren Schmidt <sos@FreeBSD.org>
    3  * All rights reserved.
    4  *
    5  * Redistribution and use in source and binary forms, with or without
    6  * modification, are permitted provided that the following conditions
    7  * are met:
    8  * 1. Redistributions of source code must retain the above copyright
    9  *    notice, this list of conditions and the following disclaimer,
   10  *    without modification, immediately at the beginning of the file.
   11  * 2. Redistributions in binary form must reproduce the above copyright
   12  *    notice, this list of conditions and the following disclaimer in the
   13  *    documentation and/or other materials provided with the distribution.
   14  *
   15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
   16  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
   17  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
   18  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
   19  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
   20  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
   21  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
   22  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
   23  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
   24  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   25  *
   26  * $FreeBSD: releng/11.1/sys/sys/ata.h 319089 2017-05-29 05:22:34Z rpokala $
   27  */
   28 
   29 #ifndef _SYS_ATA_H_
   30 #define _SYS_ATA_H_
   31 
   32 #include <sys/ioccom.h>
   33 
   34 /* ATA/ATAPI device parameters */
   35 struct ata_params {
   36 /*000*/ u_int16_t       config;         /* configuration info */
   37 #define ATA_PROTO_MASK                  0x8003
   38 #define ATA_PROTO_ATAPI                 0x8000
   39 #define ATA_PROTO_ATAPI_12              0x8000
   40 #define ATA_PROTO_ATAPI_16              0x8001
   41 #define ATA_PROTO_CFA                   0x848a
   42 #define ATA_ATAPI_TYPE_MASK             0x1f00
   43 #define ATA_ATAPI_TYPE_DIRECT           0x0000  /* disk/floppy */
   44 #define ATA_ATAPI_TYPE_TAPE             0x0100  /* streaming tape */
   45 #define ATA_ATAPI_TYPE_CDROM            0x0500  /* CD-ROM device */
   46 #define ATA_ATAPI_TYPE_OPTICAL          0x0700  /* optical disk */
   47 #define ATA_DRQ_MASK                    0x0060
   48 #define ATA_DRQ_SLOW                    0x0000  /* cpu 3 ms delay */
   49 #define ATA_DRQ_INTR                    0x0020  /* interrupt 10 ms delay */
   50 #define ATA_DRQ_FAST                    0x0040  /* accel 50 us delay */
   51 #define ATA_RESP_INCOMPLETE             0x0004
   52 
   53 /*001*/ u_int16_t       cylinders;              /* # of cylinders */
   54 /*002*/ u_int16_t       specconf;               /* specific configuration */
   55 /*003*/ u_int16_t       heads;                  /* # heads */
   56         u_int16_t       obsolete4;
   57         u_int16_t       obsolete5;
   58 /*006*/ u_int16_t       sectors;                /* # sectors/track */
   59 /*007*/ u_int16_t       vendor7[3];
   60 /*010*/ u_int8_t        serial[20];             /* serial number */
   61 /*020*/ u_int16_t       retired20;
   62         u_int16_t       retired21;
   63         u_int16_t       obsolete22;
   64 /*023*/ u_int8_t        revision[8];            /* firmware revision */
   65 /*027*/ u_int8_t        model[40];              /* model name */
   66 /*047*/ u_int16_t       sectors_intr;           /* sectors per interrupt */
   67 /*048*/ u_int16_t       usedmovsd;              /* double word read/write? */
   68 /*049*/ u_int16_t       capabilities1;
   69 #define ATA_SUPPORT_DMA                 0x0100
   70 #define ATA_SUPPORT_LBA                 0x0200
   71 #define ATA_SUPPORT_IORDY               0x0400
   72 #define ATA_SUPPORT_IORDYDIS            0x0800
   73 #define ATA_SUPPORT_OVERLAP             0x4000
   74 
   75 /*050*/ u_int16_t       capabilities2;
   76 /*051*/ u_int16_t       retired_piomode;        /* PIO modes 0-2 */
   77 #define ATA_RETIRED_PIO_MASK            0x0300
   78 
   79 /*052*/ u_int16_t       retired_dmamode;        /* DMA modes */
   80 #define ATA_RETIRED_DMA_MASK            0x0003
   81 
   82 /*053*/ u_int16_t       atavalid;               /* fields valid */
   83 #define ATA_FLAG_54_58                  0x0001  /* words 54-58 valid */
   84 #define ATA_FLAG_64_70                  0x0002  /* words 64-70 valid */
   85 #define ATA_FLAG_88                     0x0004  /* word 88 valid */
   86 
   87 /*054*/ u_int16_t       current_cylinders;
   88 /*055*/ u_int16_t       current_heads;
   89 /*056*/ u_int16_t       current_sectors;
   90 /*057*/ u_int16_t       current_size_1;
   91 /*058*/ u_int16_t       current_size_2;
   92 /*059*/ u_int16_t       multi;
   93 #define ATA_MULTI_VALID                 0x0100
   94 
   95 /*060*/ u_int16_t       lba_size_1;
   96         u_int16_t       lba_size_2;
   97         u_int16_t       obsolete62;
   98 /*063*/ u_int16_t       mwdmamodes;             /* multiword DMA modes */
   99 /*064*/ u_int16_t       apiomodes;              /* advanced PIO modes */
  100 
  101 /*065*/ u_int16_t       mwdmamin;               /* min. M/W DMA time/word ns */
  102 /*066*/ u_int16_t       mwdmarec;               /* rec. M/W DMA time ns */
  103 /*067*/ u_int16_t       pioblind;               /* min. PIO cycle w/o flow */
  104 /*068*/ u_int16_t       pioiordy;               /* min. PIO cycle IORDY flow */
  105 /*069*/ u_int16_t       support3;
  106 #define ATA_SUPPORT_RZAT                0x0020
  107 #define ATA_SUPPORT_DRAT                0x4000
  108 #define ATA_SUPPORT_ZONE_MASK           0x0003
  109 #define ATA_SUPPORT_ZONE_NR             0x0000
  110 #define ATA_SUPPORT_ZONE_HOST_AWARE     0x0001
  111 #define ATA_SUPPORT_ZONE_DEV_MANAGED    0x0002
  112         u_int16_t       reserved70;
  113 /*071*/ u_int16_t       rlsovlap;               /* rel time (us) for overlap */
  114 /*072*/ u_int16_t       rlsservice;             /* rel time (us) for service */
  115         u_int16_t       reserved73;
  116         u_int16_t       reserved74;
  117 /*075*/ u_int16_t       queue;
  118 #define ATA_QUEUE_LEN(x)                ((x) & 0x001f)
  119 
  120 /*76*/  u_int16_t       satacapabilities;
  121 #define ATA_SATA_GEN1                   0x0002
  122 #define ATA_SATA_GEN2                   0x0004
  123 #define ATA_SATA_GEN3                   0x0008
  124 #define ATA_SUPPORT_NCQ                 0x0100
  125 #define ATA_SUPPORT_IFPWRMNGTRCV        0x0200
  126 #define ATA_SUPPORT_PHYEVENTCNT         0x0400
  127 #define ATA_SUPPORT_NCQ_UNLOAD          0x0800
  128 #define ATA_SUPPORT_NCQ_PRIO            0x1000
  129 #define ATA_SUPPORT_HAPST               0x2000
  130 #define ATA_SUPPORT_DAPST               0x4000
  131 #define ATA_SUPPORT_READLOGDMAEXT       0x8000
  132 
  133 /*77*/  u_int16_t       satacapabilities2;
  134 #define ATA_SATA_CURR_GEN_MASK          0x0006
  135 #define ATA_SUPPORT_NCQ_STREAM          0x0010
  136 #define ATA_SUPPORT_NCQ_QMANAGEMENT     0x0020
  137 #define ATA_SUPPORT_RCVSND_FPDMA_QUEUED 0x0040
  138 /*78*/  u_int16_t       satasupport;
  139 #define ATA_SUPPORT_NONZERO             0x0002
  140 #define ATA_SUPPORT_AUTOACTIVATE        0x0004
  141 #define ATA_SUPPORT_IFPWRMNGT           0x0008
  142 #define ATA_SUPPORT_INORDERDATA         0x0010
  143 #define ATA_SUPPORT_ASYNCNOTIF          0x0020
  144 #define ATA_SUPPORT_SOFTSETPRESERVE     0x0040
  145 /*79*/  u_int16_t       sataenabled;
  146 #define ATA_ENABLED_DAPST               0x0080
  147 
  148 /*080*/ u_int16_t       version_major;
  149 /*081*/ u_int16_t       version_minor;
  150 
  151         struct {
  152 /*082/085*/ u_int16_t   command1;
  153 #define ATA_SUPPORT_SMART               0x0001
  154 #define ATA_SUPPORT_SECURITY            0x0002
  155 #define ATA_SUPPORT_REMOVABLE           0x0004
  156 #define ATA_SUPPORT_POWERMGT            0x0008
  157 #define ATA_SUPPORT_PACKET              0x0010
  158 #define ATA_SUPPORT_WRITECACHE          0x0020
  159 #define ATA_SUPPORT_LOOKAHEAD           0x0040
  160 #define ATA_SUPPORT_RELEASEIRQ          0x0080
  161 #define ATA_SUPPORT_SERVICEIRQ          0x0100
  162 #define ATA_SUPPORT_RESET               0x0200
  163 #define ATA_SUPPORT_PROTECTED           0x0400
  164 #define ATA_SUPPORT_WRITEBUFFER         0x1000
  165 #define ATA_SUPPORT_READBUFFER          0x2000
  166 #define ATA_SUPPORT_NOP                 0x4000
  167 
  168 /*083/086*/ u_int16_t   command2;
  169 #define ATA_SUPPORT_MICROCODE           0x0001
  170 #define ATA_SUPPORT_QUEUED              0x0002
  171 #define ATA_SUPPORT_CFA                 0x0004
  172 #define ATA_SUPPORT_APM                 0x0008
  173 #define ATA_SUPPORT_NOTIFY              0x0010
  174 #define ATA_SUPPORT_STANDBY             0x0020
  175 #define ATA_SUPPORT_SPINUP              0x0040
  176 #define ATA_SUPPORT_MAXSECURITY         0x0100
  177 #define ATA_SUPPORT_AUTOACOUSTIC        0x0200
  178 #define ATA_SUPPORT_ADDRESS48           0x0400
  179 #define ATA_SUPPORT_OVERLAY             0x0800
  180 #define ATA_SUPPORT_FLUSHCACHE          0x1000
  181 #define ATA_SUPPORT_FLUSHCACHE48        0x2000
  182 
  183 /*084/087*/ u_int16_t   extension;
  184 #define ATA_SUPPORT_SMARTLOG            0x0001
  185 #define ATA_SUPPORT_SMARTTEST           0x0002
  186 #define ATA_SUPPORT_MEDIASN             0x0004
  187 #define ATA_SUPPORT_MEDIAPASS           0x0008
  188 #define ATA_SUPPORT_STREAMING           0x0010
  189 #define ATA_SUPPORT_GENLOG              0x0020
  190 #define ATA_SUPPORT_WRITEDMAFUAEXT      0x0040
  191 #define ATA_SUPPORT_WRITEDMAQFUAEXT     0x0080
  192 #define ATA_SUPPORT_64BITWWN            0x0100
  193 #define ATA_SUPPORT_UNLOAD              0x2000
  194         } __packed support, enabled;
  195 
  196 /*088*/ u_int16_t       udmamodes;              /* UltraDMA modes */
  197 /*089*/ u_int16_t       erase_time;             /* time req'd in 2min units */
  198 /*090*/ u_int16_t       enhanced_erase_time;    /* time req'd in 2min units */
  199 /*091*/ u_int16_t       apm_value;
  200 /*092*/ u_int16_t       master_passwd_revision; /* password revision code */
  201 /*093*/ u_int16_t       hwres;
  202 #define ATA_CABLE_ID                    0x2000
  203 
  204 /*094*/ u_int16_t       acoustic;
  205 #define ATA_ACOUSTIC_CURRENT(x)         ((x) & 0x00ff)
  206 #define ATA_ACOUSTIC_VENDOR(x)          (((x) & 0xff00) >> 8)
  207 
  208 /*095*/ u_int16_t       stream_min_req_size;
  209 /*096*/ u_int16_t       stream_transfer_time;
  210 /*097*/ u_int16_t       stream_access_latency;
  211 /*098*/ u_int32_t       stream_granularity;
  212 /*100*/ u_int16_t       lba_size48_1;
  213         u_int16_t       lba_size48_2;
  214         u_int16_t       lba_size48_3;
  215         u_int16_t       lba_size48_4;
  216         u_int16_t       reserved104;
  217 /*105*/ u_int16_t       max_dsm_blocks;
  218 /*106*/ u_int16_t       pss;
  219 #define ATA_PSS_LSPPS                   0x000F
  220 #define ATA_PSS_LSSABOVE512             0x1000
  221 #define ATA_PSS_MULTLS                  0x2000
  222 #define ATA_PSS_VALID_MASK              0xC000
  223 #define ATA_PSS_VALID_VALUE             0x4000
  224 /*107*/ u_int16_t       isd;
  225 /*108*/ u_int16_t       wwn[4];
  226         u_int16_t       reserved112[5];
  227 /*117*/ u_int16_t       lss_1;
  228 /*118*/ u_int16_t       lss_2;
  229 /*119*/ u_int16_t       support2;
  230 #define ATA_SUPPORT_WRITEREADVERIFY     0x0002
  231 #define ATA_SUPPORT_WRITEUNCORREXT      0x0004
  232 #define ATA_SUPPORT_RWLOGDMAEXT         0x0008
  233 #define ATA_SUPPORT_MICROCODE3          0x0010
  234 #define ATA_SUPPORT_FREEFALL            0x0020
  235 #define ATA_SUPPORT_SENSE_REPORT        0x0040
  236 #define ATA_SUPPORT_EPC                 0x0080
  237 /*120*/ u_int16_t       enabled2;
  238 #define ATA_ENABLED_WRITEREADVERIFY     0x0002
  239 #define ATA_ENABLED_WRITEUNCORREXT      0x0004
  240 #define ATA_ENABLED_FREEFALL            0x0020
  241 #define ATA_ENABLED_SENSE_REPORT        0x0040
  242 #define ATA_ENABLED_EPC                 0x0080
  243         u_int16_t       reserved121[6];
  244 /*127*/ u_int16_t       removable_status;
  245 /*128*/ u_int16_t       security_status;
  246 #define ATA_SECURITY_LEVEL              0x0100  /* 0: high, 1: maximum */
  247 #define ATA_SECURITY_ENH_SUPP           0x0020  /* enhanced erase supported */
  248 #define ATA_SECURITY_COUNT_EXP          0x0010  /* count expired */
  249 #define ATA_SECURITY_FROZEN             0x0008  /* security config is frozen */
  250 #define ATA_SECURITY_LOCKED             0x0004  /* drive is locked */
  251 #define ATA_SECURITY_ENABLED            0x0002  /* ATA Security is enabled */
  252 #define ATA_SECURITY_SUPPORTED          0x0001  /* ATA Security is supported */
  253 
  254         u_int16_t       reserved129[31];
  255 /*160*/ u_int16_t       cfa_powermode1;
  256         u_int16_t       reserved161;
  257 /*162*/ u_int16_t       cfa_kms_support;
  258 /*163*/ u_int16_t       cfa_trueide_modes;
  259 /*164*/ u_int16_t       cfa_memory_modes;
  260         u_int16_t       reserved165[4];
  261 /*169*/ u_int16_t       support_dsm;
  262 #define ATA_SUPPORT_DSM_TRIM            0x0001
  263         u_int16_t       reserved170[6];
  264 /*176*/ u_int8_t        media_serial[60];
  265 /*206*/ u_int16_t       sct;
  266         u_int16_t       reserved207[2];
  267 /*209*/ u_int16_t       lsalign;
  268 /*210*/ u_int16_t       wrv_sectors_m3_1;
  269         u_int16_t       wrv_sectors_m3_2;
  270 /*212*/ u_int16_t       wrv_sectors_m2_1;
  271         u_int16_t       wrv_sectors_m2_2;
  272 /*214*/ u_int16_t       nv_cache_caps;
  273 /*215*/ u_int16_t       nv_cache_size_1;
  274         u_int16_t       nv_cache_size_2;
  275 /*217*/ u_int16_t       media_rotation_rate;
  276 #define ATA_RATE_NOT_REPORTED           0x0000
  277 #define ATA_RATE_NON_ROTATING           0x0001
  278         u_int16_t       reserved218;
  279 /*219*/ u_int16_t       nv_cache_opt;
  280 /*220*/ u_int16_t       wrv_mode;
  281         u_int16_t       reserved221;
  282 /*222*/ u_int16_t       transport_major;
  283 /*223*/ u_int16_t       transport_minor;
  284         u_int16_t       reserved224[31];
  285 /*255*/ u_int16_t       integrity;
  286 } __packed;
  287 
  288 /* ATA Dataset Management */
  289 #define ATA_DSM_BLK_SIZE        512
  290 #define ATA_DSM_BLK_RANGES      64
  291 #define ATA_DSM_RANGE_SIZE      8
  292 #define ATA_DSM_RANGE_MAX       65535
  293 
  294 /*
  295  * ATA Device Register
  296  *
  297  * bit 7 Obsolete (was 1 in early ATA specs)
  298  * bit 6 Sets LBA/CHS mode. 1=LBA, 0=CHS 
  299  * bit 5 Obsolete (was 1 in early ATA specs)
  300  * bit 4 1 = Slave Drive, 0 = Master Drive
  301  * bit 3-0 In LBA mode, 27-24 of address. In CHS mode, head number
  302 */
  303 
  304 #define ATA_DEV_MASTER          0x00
  305 #define ATA_DEV_SLAVE           0x10
  306 #define ATA_DEV_LBA             0x40
  307 
  308 /* ATA limits */
  309 #define ATA_MAX_28BIT_LBA       268435455UL
  310 
  311 /* ATA Status Register */
  312 #define ATA_STATUS_ERROR                0x01
  313 #define ATA_STATUS_SENSE_AVAIL          0x02
  314 #define ATA_STATUS_ALIGN_ERR            0x04
  315 #define ATA_STATUS_DATA_REQ             0x08
  316 #define ATA_STATUS_DEF_WRITE_ERR        0x10
  317 #define ATA_STATUS_DEVICE_FAULT         0x20
  318 #define ATA_STATUS_DEVICE_READY         0x40
  319 #define ATA_STATUS_BUSY                 0x80
  320 
  321 /* ATA Error Register */
  322 #define ATA_ERROR_ABORT         0x04
  323 #define ATA_ERROR_ID_NOT_FOUND  0x10
  324 
  325 /* ATA HPA Features */
  326 #define ATA_HPA_FEAT_MAX_ADDR   0x00
  327 #define ATA_HPA_FEAT_SET_PWD    0x01
  328 #define ATA_HPA_FEAT_LOCK       0x02
  329 #define ATA_HPA_FEAT_UNLOCK     0x03
  330 #define ATA_HPA_FEAT_FREEZE     0x04
  331 
  332 /* ATA transfer modes */
  333 #define ATA_MODE_MASK           0x0f
  334 #define ATA_DMA_MASK            0xf0
  335 #define ATA_PIO                 0x00
  336 #define ATA_PIO0                0x08
  337 #define ATA_PIO1                0x09
  338 #define ATA_PIO2                0x0a
  339 #define ATA_PIO3                0x0b
  340 #define ATA_PIO4                0x0c
  341 #define ATA_PIO_MAX             0x0f
  342 #define ATA_DMA                 0x10
  343 #define ATA_WDMA0               0x20
  344 #define ATA_WDMA1               0x21
  345 #define ATA_WDMA2               0x22
  346 #define ATA_UDMA0               0x40
  347 #define ATA_UDMA1               0x41
  348 #define ATA_UDMA2               0x42
  349 #define ATA_UDMA3               0x43
  350 #define ATA_UDMA4               0x44
  351 #define ATA_UDMA5               0x45
  352 #define ATA_UDMA6               0x46
  353 #define ATA_SA150               0x47
  354 #define ATA_SA300               0x48
  355 #define ATA_SA600               0x49
  356 #define ATA_DMA_MAX             0x4f
  357 
  358 
  359 /* ATA commands */
  360 #define ATA_NOP                         0x00    /* NOP */
  361 #define         ATA_NF_FLUSHQUEUE       0x00    /* flush queued cmd's */
  362 #define         ATA_NF_AUTOPOLL         0x01    /* start autopoll function */
  363 #define ATA_DATA_SET_MANAGEMENT         0x06
  364 #define         ATA_DSM_TRIM            0x01
  365 #define ATA_DEVICE_RESET                0x08    /* reset device */
  366 #define ATA_READ                        0x20    /* read */
  367 #define ATA_READ48                      0x24    /* read 48bit LBA */
  368 #define ATA_READ_DMA48                  0x25    /* read DMA 48bit LBA */
  369 #define ATA_READ_DMA_QUEUED48           0x26    /* read DMA QUEUED 48bit LBA */
  370 #define ATA_READ_NATIVE_MAX_ADDRESS48   0x27    /* read native max addr 48bit */
  371 #define ATA_READ_MUL48                  0x29    /* read multi 48bit LBA */
  372 #define ATA_READ_STREAM_DMA48           0x2a    /* read DMA stream 48bit LBA */
  373 #define ATA_READ_LOG_EXT                0x2f    /* read log ext - PIO Data-In */
  374 #define ATA_READ_STREAM48               0x2b    /* read stream 48bit LBA */
  375 #define ATA_WRITE                       0x30    /* write */
  376 #define ATA_WRITE48                     0x34    /* write 48bit LBA */
  377 #define ATA_WRITE_DMA48                 0x35    /* write DMA 48bit LBA */
  378 #define ATA_WRITE_DMA_QUEUED48          0x36    /* write DMA QUEUED 48bit LBA*/
  379 #define ATA_SET_MAX_ADDRESS48           0x37    /* set max address 48bit */
  380 #define ATA_WRITE_MUL48                 0x39    /* write multi 48bit LBA */
  381 #define ATA_WRITE_STREAM_DMA48          0x3a
  382 #define ATA_WRITE_STREAM48              0x3b
  383 #define ATA_WRITE_DMA_FUA48             0x3d
  384 #define ATA_WRITE_DMA_QUEUED_FUA48      0x3e
  385 #define ATA_WRITE_LOG_EXT               0x3f
  386 #define ATA_READ_VERIFY                 0x40
  387 #define ATA_READ_VERIFY48               0x42
  388 #define ATA_WRITE_UNCORRECTABLE48       0x45    /* write uncorrectable 48bit LBA */
  389 #define         ATA_WU_PSEUDO           0x55    /* pseudo-uncorrectable error */
  390 #define         ATA_WU_FLAGGED          0xaa    /* flagged-uncorrectable error */
  391 #define ATA_READ_LOG_DMA_EXT            0x47    /* read log DMA ext - PIO Data-In */
  392 #define ATA_ZAC_MANAGEMENT_IN           0x4a    /* ZAC management in */
  393 #define         ATA_ZM_REPORT_ZONES     0x00    /* report zones */
  394 #define ATA_READ_FPDMA_QUEUED           0x60    /* read DMA NCQ */
  395 #define ATA_WRITE_FPDMA_QUEUED          0x61    /* write DMA NCQ */
  396 #define ATA_NCQ_NON_DATA                0x63    /* NCQ non-data command */
  397 #define         ATA_ABORT_NCQ_QUEUE     0x00    /* abort NCQ queue */
  398 #define         ATA_DEADLINE_HANDLING   0x01    /* deadline handling */
  399 #define         ATA_SET_FEATURES        0x05    /* set features */
  400 #define         ATA_ZERO_EXT            0x06    /* zero ext */
  401 #define         ATA_NCQ_ZAC_MGMT_OUT    0x07    /* NCQ ZAC mgmt out no data */
  402 #define ATA_SEND_FPDMA_QUEUED           0x64    /* send DMA NCQ */
  403 #define         ATA_SFPDMA_DSM          0x00    /* Data set management */
  404 #define                 ATA_SFPDMA_DSM_TRIM     0x01    /* Set trim bit in auxiliary */
  405 #define         ATA_SFPDMA_HYBRID_EVICT 0x01    /* Hybrid Evict */
  406 #define         ATA_SFPDMA_WLDMA        0x02    /* Write Log DMA EXT */
  407 #define         ATA_SFPDMA_ZAC_MGMT_OUT 0x03    /* NCQ ZAC mgmt out w/data */
  408 #define ATA_RECV_FPDMA_QUEUED           0x65    /* receive DMA NCQ */
  409 #define         ATA_RFPDMA_RL_DMA_EXT   0x00    /* Read Log DMA EXT */
  410 #define         ATA_RFPDMA_ZAC_MGMT_IN  0x02    /* NCQ ZAC mgmt in w/data */
  411 #define ATA_SEP_ATTN                    0x67    /* SEP request */
  412 #define ATA_SEEK                        0x70    /* seek */
  413 #define ATA_ZAC_MANAGEMENT_OUT          0x9f    /* ZAC management out */
  414 #define         ATA_ZM_CLOSE_ZONE       0x01    /* close zone */
  415 #define         ATA_ZM_FINISH_ZONE      0x02    /* finish zone */
  416 #define         ATA_ZM_OPEN_ZONE        0x03    /* open zone */
  417 #define         ATA_ZM_RWP              0x04    /* reset write pointer */
  418 #define ATA_PACKET_CMD                  0xa0    /* packet command */
  419 #define ATA_ATAPI_IDENTIFY              0xa1    /* get ATAPI params*/
  420 #define ATA_SERVICE                     0xa2    /* service command */
  421 #define ATA_SMART_CMD                   0xb0    /* SMART command */
  422 #define ATA_CFA_ERASE                   0xc0    /* CFA erase */
  423 #define ATA_READ_MUL                    0xc4    /* read multi */
  424 #define ATA_WRITE_MUL                   0xc5    /* write multi */
  425 #define ATA_SET_MULTI                   0xc6    /* set multi size */
  426 #define ATA_READ_DMA_QUEUED             0xc7    /* read DMA QUEUED */
  427 #define ATA_READ_DMA                    0xc8    /* read DMA */
  428 #define ATA_WRITE_DMA                   0xca    /* write DMA */
  429 #define ATA_WRITE_DMA_QUEUED            0xcc    /* write DMA QUEUED */
  430 #define ATA_WRITE_MUL_FUA48             0xce
  431 #define ATA_STANDBY_IMMEDIATE           0xe0    /* standby immediate */
  432 #define ATA_IDLE_IMMEDIATE              0xe1    /* idle immediate */
  433 #define ATA_STANDBY_CMD                 0xe2    /* standby */
  434 #define ATA_IDLE_CMD                    0xe3    /* idle */
  435 #define ATA_READ_BUFFER                 0xe4    /* read buffer */
  436 #define ATA_READ_PM                     0xe4    /* read portmultiplier */
  437 #define ATA_CHECK_POWER_MODE            0xe5    /* device power mode */
  438 #define ATA_SLEEP                       0xe6    /* sleep */
  439 #define ATA_FLUSHCACHE                  0xe7    /* flush cache to disk */
  440 #define ATA_WRITE_PM                    0xe8    /* write portmultiplier */
  441 #define ATA_FLUSHCACHE48                0xea    /* flush cache to disk */
  442 #define ATA_ATA_IDENTIFY                0xec    /* get ATA params */
  443 #define ATA_SETFEATURES                 0xef    /* features command */
  444 #define         ATA_SF_ENAB_WCACHE      0x02    /* enable write cache */
  445 #define         ATA_SF_DIS_WCACHE       0x82    /* disable write cache */
  446 #define         ATA_SF_SETXFER          0x03    /* set transfer mode */
  447 #define         ATA_SF_APM              0x05    /* Enable APM feature set */
  448 #define         ATA_SF_ENAB_PUIS        0x06    /* enable PUIS */
  449 #define         ATA_SF_DIS_PUIS         0x86    /* disable PUIS */
  450 #define         ATA_SF_PUIS_SPINUP      0x07    /* PUIS spin-up */
  451 #define         ATA_SF_WRV              0x0b    /* Enable Write-Read-Verify */
  452 #define         ATA_SF_DLC              0x0c    /* Enable device life control */
  453 #define         ATA_SF_SATA             0x10    /* Enable use of SATA feature */
  454 #define         ATA_SF_FFC              0x41    /* Free-fall Control */
  455 #define         ATA_SF_MHIST            0x43    /* Set Max Host Sect. Times */
  456 #define         ATA_SF_RATE             0x45    /* Set Rate Basis */
  457 #define         ATA_SF_EPC              0x4A    /* Extended Power Conditions */
  458 #define         ATA_SF_ENAB_RCACHE      0xaa    /* enable readahead cache */
  459 #define         ATA_SF_DIS_RCACHE       0x55    /* disable readahead cache */
  460 #define         ATA_SF_ENAB_RELIRQ      0x5d    /* enable release interrupt */
  461 #define         ATA_SF_DIS_RELIRQ       0xdd    /* disable release interrupt */
  462 #define         ATA_SF_ENAB_SRVIRQ      0x5e    /* enable service interrupt */
  463 #define         ATA_SF_DIS_SRVIRQ       0xde    /* disable service interrupt */
  464 #define         ATA_SF_LPSAERC          0x62    /* Long Phys Sect Align ErrRep*/
  465 #define         ATA_SF_DSN              0x63    /* Device Stats Notification */
  466 #define ATA_CHECK_POWER_MODE            0xe5    /* Check Power Mode */
  467 #define ATA_SECURITY_SET_PASSWORD       0xf1    /* set drive password */
  468 #define ATA_SECURITY_UNLOCK             0xf2    /* unlock drive using passwd */
  469 #define ATA_SECURITY_ERASE_PREPARE      0xf3    /* prepare to erase drive */
  470 #define ATA_SECURITY_ERASE_UNIT         0xf4    /* erase all blocks on drive */
  471 #define ATA_SECURITY_FREEZE_LOCK        0xf5    /* freeze security config */
  472 #define ATA_SECURITY_DISABLE_PASSWORD   0xf6    /* disable drive password */
  473 #define ATA_READ_NATIVE_MAX_ADDRESS     0xf8    /* read native max address */
  474 #define ATA_SET_MAX_ADDRESS             0xf9    /* set max address */
  475 
  476 
  477 /* ATAPI commands */
  478 #define ATAPI_TEST_UNIT_READY           0x00    /* check if device is ready */
  479 #define ATAPI_REZERO                    0x01    /* rewind */
  480 #define ATAPI_REQUEST_SENSE             0x03    /* get sense data */
  481 #define ATAPI_FORMAT                    0x04    /* format unit */
  482 #define ATAPI_READ                      0x08    /* read data */
  483 #define ATAPI_WRITE                     0x0a    /* write data */
  484 #define ATAPI_WEOF                      0x10    /* write filemark */
  485 #define         ATAPI_WF_WRITE          0x01
  486 #define ATAPI_SPACE                     0x11    /* space command */
  487 #define         ATAPI_SP_FM             0x01
  488 #define         ATAPI_SP_EOD            0x03
  489 #define ATAPI_INQUIRY                   0x12    /* get inquiry data */
  490 #define ATAPI_MODE_SELECT               0x15    /* mode select */
  491 #define ATAPI_ERASE                     0x19    /* erase */
  492 #define ATAPI_MODE_SENSE                0x1a    /* mode sense */
  493 #define ATAPI_START_STOP                0x1b    /* start/stop unit */
  494 #define         ATAPI_SS_LOAD           0x01
  495 #define         ATAPI_SS_RETENSION      0x02
  496 #define         ATAPI_SS_EJECT          0x04
  497 #define ATAPI_PREVENT_ALLOW             0x1e    /* media removal */
  498 #define ATAPI_READ_FORMAT_CAPACITIES    0x23    /* get format capacities */
  499 #define ATAPI_READ_CAPACITY             0x25    /* get volume capacity */
  500 #define ATAPI_READ_BIG                  0x28    /* read data */
  501 #define ATAPI_WRITE_BIG                 0x2a    /* write data */
  502 #define ATAPI_LOCATE                    0x2b    /* locate to position */
  503 #define ATAPI_READ_POSITION             0x34    /* read position */
  504 #define ATAPI_SYNCHRONIZE_CACHE         0x35    /* flush buf, close channel */
  505 #define ATAPI_WRITE_BUFFER              0x3b    /* write device buffer */
  506 #define ATAPI_READ_BUFFER               0x3c    /* read device buffer */
  507 #define ATAPI_READ_SUBCHANNEL           0x42    /* get subchannel info */
  508 #define ATAPI_READ_TOC                  0x43    /* get table of contents */
  509 #define ATAPI_PLAY_10                   0x45    /* play by lba */
  510 #define ATAPI_PLAY_MSF                  0x47    /* play by MSF address */
  511 #define ATAPI_PLAY_TRACK                0x48    /* play by track number */
  512 #define ATAPI_PAUSE                     0x4b    /* pause audio operation */
  513 #define ATAPI_READ_DISK_INFO            0x51    /* get disk info structure */
  514 #define ATAPI_READ_TRACK_INFO           0x52    /* get track info structure */
  515 #define ATAPI_RESERVE_TRACK             0x53    /* reserve track */
  516 #define ATAPI_SEND_OPC_INFO             0x54    /* send OPC structurek */
  517 #define ATAPI_MODE_SELECT_BIG           0x55    /* set device parameters */
  518 #define ATAPI_REPAIR_TRACK              0x58    /* repair track */
  519 #define ATAPI_READ_MASTER_CUE           0x59    /* read master CUE info */
  520 #define ATAPI_MODE_SENSE_BIG            0x5a    /* get device parameters */
  521 #define ATAPI_CLOSE_TRACK               0x5b    /* close track/session */
  522 #define ATAPI_READ_BUFFER_CAPACITY      0x5c    /* get buffer capicity */
  523 #define ATAPI_SEND_CUE_SHEET            0x5d    /* send CUE sheet */
  524 #define ATAPI_SERVICE_ACTION_IN         0x96    /* get service data */
  525 #define ATAPI_BLANK                     0xa1    /* blank the media */
  526 #define ATAPI_SEND_KEY                  0xa3    /* send DVD key structure */
  527 #define ATAPI_REPORT_KEY                0xa4    /* get DVD key structure */
  528 #define ATAPI_PLAY_12                   0xa5    /* play by lba */
  529 #define ATAPI_LOAD_UNLOAD               0xa6    /* changer control command */
  530 #define ATAPI_READ_STRUCTURE            0xad    /* get DVD structure */
  531 #define ATAPI_PLAY_CD                   0xb4    /* universal play command */
  532 #define ATAPI_SET_SPEED                 0xbb    /* set drive speed */
  533 #define ATAPI_MECH_STATUS               0xbd    /* get changer status */
  534 #define ATAPI_READ_CD                   0xbe    /* read data */
  535 #define ATAPI_POLL_DSC                  0xff    /* poll DSC status bit */
  536 
  537 
  538 struct ata_ioc_devices {
  539     int                 channel;
  540     char                name[2][32];
  541     struct ata_params   params[2];
  542 };
  543 
  544 /* pr channel ATA ioctl calls */
  545 #define IOCATAGMAXCHANNEL       _IOR('a',  1, int)
  546 #define IOCATAREINIT            _IOW('a',  2, int)
  547 #define IOCATAATTACH            _IOW('a',  3, int)
  548 #define IOCATADETACH            _IOW('a',  4, int)
  549 #define IOCATADEVICES           _IOWR('a',  5, struct ata_ioc_devices)
  550 
  551 /* ATAPI request sense structure */
  552 struct atapi_sense {
  553     u_int8_t    error;                          /* current or deferred errors */
  554 #define ATA_SENSE_VALID                 0x80
  555 
  556     u_int8_t    segment;                        /* segment number */
  557     u_int8_t    key;                            /* sense key */
  558 #define ATA_SENSE_KEY_MASK              0x0f    /* sense key mask */
  559 #define ATA_SENSE_NO_SENSE              0x00    /* no specific sense key info */
  560 #define ATA_SENSE_RECOVERED_ERROR       0x01    /* command OK, data recovered */
  561 #define ATA_SENSE_NOT_READY             0x02    /* no access to drive */
  562 #define ATA_SENSE_MEDIUM_ERROR          0x03    /* non-recovered data error */
  563 #define ATA_SENSE_HARDWARE_ERROR        0x04    /* non-recoverable HW failure */
  564 #define ATA_SENSE_ILLEGAL_REQUEST       0x05    /* invalid command param(s) */
  565 #define ATA_SENSE_UNIT_ATTENTION        0x06    /* media changed */
  566 #define ATA_SENSE_DATA_PROTECT          0x07    /* write protect */
  567 #define ATA_SENSE_BLANK_CHECK           0x08    /* blank check */
  568 #define ATA_SENSE_VENDOR_SPECIFIC       0x09    /* vendor specific skey */
  569 #define ATA_SENSE_COPY_ABORTED          0x0a    /* copy aborted */
  570 #define ATA_SENSE_ABORTED_COMMAND       0x0b    /* command aborted, try again */
  571 #define ATA_SENSE_EQUAL                 0x0c    /* equal */
  572 #define ATA_SENSE_VOLUME_OVERFLOW       0x0d    /* volume overflow */
  573 #define ATA_SENSE_MISCOMPARE            0x0e    /* data dont match the medium */
  574 #define ATA_SENSE_RESERVED              0x0f
  575 #define ATA_SENSE_ILI                   0x20;
  576 #define ATA_SENSE_EOM                   0x40;
  577 #define ATA_SENSE_FILEMARK              0x80;
  578 
  579     u_int32_t   cmd_info;               /* cmd information */
  580     u_int8_t    sense_length;           /* additional sense len (n-7) */
  581     u_int32_t   cmd_specific_info;      /* additional cmd spec info */
  582     u_int8_t    asc;                    /* additional sense code */
  583     u_int8_t    ascq;                   /* additional sense code qual */
  584     u_int8_t    replaceable_unit_code;  /* replaceable unit code */
  585     u_int8_t    specific;               /* sense key specific */
  586 #define ATA_SENSE_SPEC_VALID    0x80
  587 #define ATA_SENSE_SPEC_MASK     0x7f
  588         
  589     u_int8_t    specific1;              /* sense key specific */
  590     u_int8_t    specific2;              /* sense key specific */
  591 } __packed;
  592 
  593 /*
  594  * SET FEATURES subcommands
  595  */
  596 
  597 /*
  598  * SET FEATURES command
  599  * Extended Power Conditions subcommand -- ATA_SF_EPC (0x4A)
  600  * These values go in the LBA 3:0.
  601  */
  602 #define ATA_SF_EPC_RESTORE      0x00    /* Restore Power Condition Settings */
  603 #define ATA_SF_EPC_GOTO         0x01    /* Go To Power Condition */
  604 #define ATA_SF_EPC_SET_TIMER    0x02    /* Set Power Condition Timer */
  605 #define ATA_SF_EPC_SET_STATE    0x03    /* Set Power Condition State */
  606 #define ATA_SF_EPC_ENABLE       0x04    /* Enable the EPC feature set */
  607 #define ATA_SF_EPC_DISABLE      0x05    /* Disable the EPC feature set */
  608 #define ATA_SF_EPC_SET_SOURCE   0x06    /* Set EPC Power Source */
  609 
  610 /*
  611  * SET FEATURES command
  612  * Extended Power Conditions subcommand -- ATA_SF_EPC (0x4A)
  613  * Power Condition ID field
  614  * These values go in the count register.
  615  */
  616 #define ATA_EPC_STANDBY_Z       0x00    /* Substate of PM2:Standby */
  617 #define ATA_EPC_STANDBY_Y       0x01    /* Substate of PM2:Standby */
  618 #define ATA_EPC_IDLE_A          0x81    /* Substate of PM1:Idle */
  619 #define ATA_EPC_IDLE_B          0x82    /* Substate of PM1:Idle */
  620 #define ATA_EPC_IDLE_C          0x83    /* Substate of PM1:Idle */
  621 #define ATA_EPC_ALL             0xff    /* All supported power conditions */
  622 
  623 /*
  624  * SET FEATURES command
  625  * Extended Power Conditions subcommand -- ATA_SF_EPC (0x4A)
  626  * Restore Power Conditions Settings subcommand
  627  * These values go in the LBA register.
  628  */
  629 #define ATA_SF_EPC_RST_DFLT     0x40    /* 1=Rst from Default, 0= from Saved */
  630 #define ATA_SF_EPC_RST_SAVE     0x10    /* 1=Save on completion */
  631 
  632 /*
  633  * SET FEATURES command
  634  * Extended Power Conditions subcommand -- ATA_SF_EPC (0x4A)
  635  * Got To Power Condition subcommand
  636  * These values go in the LBA register.
  637  */
  638 #define ATA_SF_EPC_GOTO_DELAY   0x02000000      /* Delayed entry bit */
  639 #define ATA_SF_EPC_GOTO_HOLD    0x01000000      /* Hold Power Cond bit */
  640 
  641 /*
  642  * SET FEATURES command
  643  * Extended Power Conditions subcommand -- ATA_SF_EPC (0x4A)
  644  * Set Power Condition Timer subcommand
  645  * These values go in the LBA register.
  646  */
  647 #define ATA_SF_EPC_TIMER_MASK   0x00ffff00      /* Timer field */
  648 #define ATA_SF_EPC_TIMER_SHIFT  8
  649 #define ATA_SF_EPC_TIMER_SEC    0x00000080      /* Timer units, 1=sec, 0=.1s */
  650 #define ATA_SF_EPC_TIMER_EN     0x00000020      /* Enable/disable cond. */
  651 #define ATA_SF_EPC_TIMER_SAVE   0x00000010      /* Save settings on comp.  */
  652 
  653 /*
  654  * SET FEATURES command
  655  * Extended Power Conditions subcommand -- ATA_SF_EPC (0x4A)
  656  * Set Power Condition State subcommand
  657  * These values go in the LBA register.
  658  */
  659 #define ATA_SF_EPC_SETCON_EN    0x00000020      /* Enable power cond. */
  660 #define ATA_SF_EPC_SETCON_SAVE  0x00000010      /* Save settings on comp */
  661 
  662 /*
  663  * SET FEATURES command
  664  * Extended Power Conditions subcommand -- ATA_SF_EPC (0x4A)
  665  * Set EPC Power Source subcommand
  666  * These values go in the count register.
  667  */
  668 #define ATA_SF_EPC_SRC_UNKNOWN  0x0000  /* Unknown source */
  669 #define ATA_SF_EPC_SRC_BAT      0x0001  /* battery source */
  670 #define ATA_SF_EPC_SRC_NOT_BAT  0x0002  /* not battery source */
  671 
  672 #define ATA_LOG_DIRECTORY       0x00    /* Directory of all logs */
  673 #define ATA_POWER_COND_LOG      0x08    /* Power Conditions Log */
  674 #define ATA_PCL_IDLE            0x00    /* Idle Power Conditions Page */
  675 #define ATA_PCL_STANDBY         0x01    /* Standby Power Conditions Page */
  676 #define ATA_IDENTIFY_DATA_LOG   0x30    /* Identify Device Data Log */
  677 #define ATA_IDL_PAGE_LIST       0x00    /* List of supported pages */
  678 #define ATA_IDL_IDENTIFY_DATA   0x01    /* Copy of Identify Device data */
  679 #define ATA_IDL_CAPACITY        0x02    /* Capacity */
  680 #define ATA_IDL_SUP_CAP         0x03    /* Supported Capabilities */
  681 #define ATA_IDL_CUR_SETTINGS    0x04    /* Current Settings */
  682 #define ATA_IDL_ATA_STRINGS     0x05    /* ATA Strings */
  683 #define ATA_IDL_SECURITY        0x06    /* Security */
  684 #define ATA_IDL_PARALLEL_ATA    0x07    /* Parallel ATA */
  685 #define ATA_IDL_SERIAL_ATA      0x08    /* Seiral ATA */
  686 #define ATA_IDL_ZDI             0x09    /* Zoned Device Information */
  687 
  688 struct ata_gp_log_dir {
  689         uint8_t header[2];
  690 #define ATA_GP_LOG_DIR_VERSION          0x0001
  691         uint8_t num_pages[255*2];       /* Number of log pages at address */
  692 };
  693 
  694 /*
  695  * ATA Power Conditions log descriptor
  696  */
  697 struct ata_power_cond_log_desc {
  698         uint8_t reserved1;
  699         uint8_t flags;
  700 #define ATA_PCL_COND_SUPPORTED          0x80
  701 #define ATA_PCL_COND_SAVEABLE           0x40
  702 #define ATA_PCL_COND_CHANGEABLE         0x20
  703 #define ATA_PCL_DEFAULT_TIMER_EN        0x10
  704 #define ATA_PCL_SAVED_TIMER_EN          0x08
  705 #define ATA_PCL_CURRENT_TIMER_EN        0x04
  706 #define ATA_PCL_HOLD_PC_NOT_SUP         0x02
  707         uint8_t reserved2[2];
  708         uint8_t default_timer[4];
  709         uint8_t saved_timer[4];
  710         uint8_t current_timer[4];
  711         uint8_t nom_time_to_active[4];
  712         uint8_t min_timer[4];
  713         uint8_t max_timer[4];
  714         uint8_t num_transitions_to_pc[4];
  715         uint8_t hours_in_pc[4];
  716         uint8_t reserved3[28];
  717 };
  718 
  719 /*
  720  * ATA Power Conditions Log (0x08), Idle power conditions page (0x00)
  721  */
  722 struct ata_power_cond_log_idle {
  723         struct ata_power_cond_log_desc idle_a_desc;
  724         struct ata_power_cond_log_desc idle_b_desc;
  725         struct ata_power_cond_log_desc idle_c_desc;
  726         uint8_t reserved[320];
  727 };
  728 
  729 /*
  730  * ATA Power Conditions Log (0x08), Standby power conditions page (0x01)
  731  */
  732 struct ata_power_cond_log_standby {
  733         uint8_t reserved[384];
  734         struct ata_power_cond_log_desc standby_y_desc;
  735         struct ata_power_cond_log_desc standby_z_desc;
  736 };
  737 
  738 /*
  739  * ATA IDENTIFY DEVICE data log (0x30) page 0x00
  740  * List of Supported IDENTIFY DEVICE data pages.
  741  */
  742 struct ata_identify_log_pages {
  743         uint8_t header[8];
  744 #define ATA_IDLOG_REVISION      0x0000000000000001
  745         uint8_t entry_count;
  746         uint8_t entries[503];
  747 };
  748 
  749 /*
  750  * ATA IDENTIFY DEVICE data log (0x30)
  751  * Capacity (Page 0x02).
  752  */
  753 struct ata_identify_log_capacity {
  754         uint8_t header[8];
  755 #define ATA_CAP_HEADER_VALID    0x8000000000000000
  756 #define ATA_CAP_PAGE_NUM_MASK   0x0000000000ff0000
  757 #define ATA_CAP_PAGE_NUM_SHIFT  16
  758 #define ATA_CAP_REV_MASK        0x00000000000000ff
  759         uint8_t capacity[8];
  760 #define ATA_CAP_CAPACITY_VALID  0x8000000000000000
  761 #define ATA_CAP_ACCESSIBLE_CAP  0x0000ffffffffffff
  762         uint8_t phys_logical_sect_size[8];
  763 #define ATA_CAP_PL_VALID        0x8000000000000000
  764 #define ATA_CAP_LTOP_REL_SUP    0x4000000000000000
  765 #define ATA_CAP_LOG_SECT_SUP    0x2000000000000000
  766 #define ATA_CAP_ALIGN_ERR_MASK  0x0000000000300000
  767 #define ATA_CAP_LTOP_MASK       0x00000000000f0000
  768 #define ATA_CAP_LOG_SECT_OFF    0x000000000000ffff
  769         uint8_t logical_sect_size[8];
  770 #define ATA_CAP_LOG_SECT_VALID  0x8000000000000000
  771 #define ATA_CAP_LOG_SECT_SIZE   0x00000000ffffffff
  772         uint8_t nominal_buffer_size[8];
  773 #define ATA_CAP_NOM_BUF_VALID   0x8000000000000000
  774 #define ATA_CAP_NOM_BUF_SIZE    0x7fffffffffffffff
  775         uint8_t reserved[472];
  776 };
  777 
  778 /*
  779  * ATA IDENTIFY DEVICE data log (0x30)
  780  * Supported Capabilities (Page 0x03).
  781  */
  782 
  783 struct ata_identify_log_sup_cap {
  784         uint8_t header[8];
  785 #define ATA_SUP_CAP_HEADER_VALID        0x8000000000000000
  786 #define ATA_SUP_CAP_PAGE_NUM_MASK       0x0000000000ff0000
  787 #define ATA_SUP_CAP_PAGE_NUM_SHIFT      16
  788 #define ATA_SUP_CAP_REV_MASK            0x00000000000000ff
  789         uint8_t sup_cap[8];
  790 #define ATA_SUP_CAP_VALID               0x8000000000000000
  791 #define ATA_SC_SET_SECT_CONFIG_SUP      0x0002000000000000 /* Set Sect Conf*/
  792 #define ATA_SC_ZERO_EXT_SUP             0x0001000000000000 /* Zero EXT */
  793 #define ATA_SC_SUCC_NCQ_SENSE_SUP       0x0000800000000000 /* Succ. NCQ Sns */
  794 #define ATA_SC_DLC_SUP                  0x0000400000000000 /* DLC */
  795 #define ATA_SC_RQSN_DEV_FAULT_SUP       0x0000200000000000 /* Req Sns Dev Flt*/
  796 #define ATA_SC_DSN_SUP                  0x0000100000000000 /* DSN */
  797 #define ATA_SC_LP_STANDBY_SUP           0x0000080000000000 /* LP Standby */
  798 #define ATA_SC_SET_EPC_PS_SUP           0x0000040000000000 /* Set EPC PS */
  799 #define ATA_SC_AMAX_ADDR_SUP            0x0000020000000000 /* AMAX Addr */
  800 #define ATA_SC_DRAT_SUP                 0x0000008000000000 /* DRAT */
  801 #define ATA_SC_LPS_MISALGN_SUP          0x0000004000000000 /* LPS Misalign */
  802 #define ATA_SC_RB_DMA_SUP               0x0000001000000000 /* Read Buf DMA */
  803 #define ATA_SC_WB_DMA_SUP               0x0000000800000000 /* Write Buf DMA */
  804 #define ATA_SC_DNLD_MC_DMA_SUP          0x0000000200000000 /* DL MCode DMA */
  805 #define ATA_SC_28BIT_SUP                0x0000000100000000 /* 28-bit */
  806 #define ATA_SC_RZAT_SUP                 0x0000000080000000 /* RZAT */
  807 #define ATA_SC_NOP_SUP                  0x0000000020000000 /* NOP */
  808 #define ATA_SC_READ_BUFFER_SUP          0x0000000010000000 /* Read Buffer */
  809 #define ATA_SC_WRITE_BUFFER_SUP         0x0000000008000000 /* Write Buffer */
  810 #define ATA_SC_READ_LOOK_AHEAD_SUP      0x0000000002000000 /* Read Look-Ahead*/
  811 #define ATA_SC_VOLATILE_WC_SUP          0x0000000001000000 /* Volatile WC */
  812 #define ATA_SC_SMART_SUP                0x0000000000800000 /* SMART */
  813 #define ATA_SC_FLUSH_CACHE_EXT_SUP      0x0000000000400000 /* Flush Cache Ext */
  814 #define ATA_SC_48BIT_SUP                0x0000000000100000 /* 48-Bit */
  815 #define ATA_SC_SPINUP_SUP               0x0000000000040000 /* Spin-Up */
  816 #define ATA_SC_PUIS_SUP                 0x0000000000020000 /* PUIS */
  817 #define ATA_SC_APM_SUP                  0x0000000000010000 /* APM */
  818 #define ATA_SC_DL_MICROCODE_SUP         0x0000000000004000 /* DL Microcode */
  819 #define ATA_SC_UNLOAD_SUP               0x0000000000002000 /* Unload */
  820 #define ATA_SC_WRITE_FUA_EXT_SUP        0x0000000000001000 /* Write FUA EXT */
  821 #define ATA_SC_GPL_SUP                  0x0000000000000800 /* GPL */
  822 #define ATA_SC_STREAMING_SUP            0x0000000000000400 /* Streaming */
  823 #define ATA_SC_SMART_SELFTEST_SUP       0x0000000000000100 /* SMART self-test */
  824 #define ATA_SC_SMART_ERR_LOG_SUP        0x0000000000000080 /* SMART Err Log */
  825 #define ATA_SC_EPC_SUP                  0x0000000000000040 /* EPC */
  826 #define ATA_SC_SENSE_SUP                0x0000000000000020 /* Sense data */
  827 #define ATA_SC_FREEFALL_SUP             0x0000000000000010 /* Free-Fall */
  828 #define ATA_SC_DM_MODE3_SUP             0x0000000000000008 /* DM Mode 3 */
  829 #define ATA_SC_GPL_DMA_SUP              0x0000000000000004 /* GPL DMA */
  830 #define ATA_SC_WRITE_UNCOR_SUP          0x0000000000000002 /* Write uncorr.  */
  831 #define ATA_SC_WRV_SUP                  0x0000000000000001 /* WRV */
  832         uint8_t download_code_cap[8];
  833 #define ATA_DL_CODE_VALID               0x8000000000000000
  834 #define ATA_DLC_DM_OFFSETS_DEFER_SUP    0x0000000400000000
  835 #define ATA_DLC_DM_IMMED_SUP            0x0000000200000000
  836 #define ATA_DLC_DM_OFF_IMMED_SUP        0x0000000100000000
  837 #define ATA_DLC_DM_MAX_XFER_SIZE_MASK   0x00000000ffff0000
  838 #define ATA_DLC_DM_MAX_XFER_SIZE_SHIFT  16
  839 #define ATA_DLC_DM_MIN_XFER_SIZE_MASK   0x000000000000ffff
  840         uint8_t nom_media_rotation_rate[8];
  841 #define ATA_NOM_MEDIA_ROTATION_VALID    0x8000000000000000
  842 #define ATA_ROTATION_MASK               0x000000000000ffff
  843         uint8_t form_factor[8];
  844 #define ATA_FORM_FACTOR_VALID           0x8000000000000000
  845 #define ATA_FF_MASK                     0x000000000000000f
  846 #define ATA_FF_NOT_REPORTED             0x0000000000000000 /* Not reported */
  847 #define ATA_FF_525_IN                   0x0000000000000001 /* 5.25 inch */
  848 #define ATA_FF_35_IN                    0x0000000000000002 /* 3.5 inch */
  849 #define ATA_FF_25_IN                    0x0000000000000003 /* 2.5 inch */
  850 #define ATA_FF_18_IN                    0x0000000000000004 /* 1.8 inch */
  851 #define ATA_FF_LT_18_IN                 0x0000000000000005 /* < 1.8 inch */
  852 #define ATA_FF_MSATA                    0x0000000000000006 /* mSATA */
  853 #define ATA_FF_M2                       0x0000000000000007 /* M.2 */
  854 #define ATA_FF_MICROSSD                 0x0000000000000008 /* MicroSSD */
  855 #define ATA_FF_CFAST                    0x0000000000000009 /* CFast */
  856         uint8_t wrv_sec_cnt_mode3[8];
  857 #define ATA_WRV_MODE3_VALID             0x8000000000000000
  858 #define ATA_WRV_MODE3_COUNT             0x00000000ffffffff
  859         uint8_t wrv_sec_cnt_mode2[8];
  860 #define ATA_WRV_MODE2_VALID             0x8000000000000000
  861 #define ATA_WRV_MODE2_COUNT             0x00000000ffffffff
  862         uint8_t wwn[16];
  863         /* XXX KDM need to figure out how to handle 128-bit fields */
  864         uint8_t dsm[8];
  865 #define ATA_DSM_VALID                   0x8000000000000000
  866 #define ATA_LB_MARKUP_SUP               0x000000000000ff00
  867 #define ATA_TRIM_SUP                    0x0000000000000001
  868         uint8_t util_per_unit_time[16];
  869         /* XXX KDM need to figure out how to handle 128-bit fields */
  870         uint8_t util_usage_rate_sup[8];
  871 #define ATA_UTIL_USAGE_RATE_VALID       0x8000000000000000
  872 #define ATA_SETTING_RATE_SUP            0x0000000000800000
  873 #define ATA_SINCE_POWERON_SUP           0x0000000000000100
  874 #define ATA_POH_RATE_SUP                0x0000000000000010
  875 #define ATA_DATE_TIME_RATE_SUP          0x0000000000000001
  876         uint8_t zoned_cap[8];
  877 #define ATA_ZONED_VALID                 0x8000000000000000
  878 #define ATA_ZONED_MASK                  0x0000000000000003
  879         uint8_t sup_zac_cap[8];
  880 #define ATA_SUP_ZAC_CAP_VALID           0x8000000000000000
  881 #define ATA_ND_RWP_SUP                  0x0000000000000010 /* Reset Write Ptr*/
  882 #define ATA_ND_FINISH_ZONE_SUP          0x0000000000000008 /* Finish Zone */
  883 #define ATA_ND_CLOSE_ZONE_SUP           0x0000000000000004 /* Close Zone */
  884 #define ATA_ND_OPEN_ZONE_SUP            0x0000000000000002 /* Open Zone */
  885 #define ATA_REPORT_ZONES_SUP            0x0000000000000001 /* Report Zones */
  886         uint8_t reserved[392];
  887 };
  888 
  889 /*
  890  * ATA Identify Device Data Log Zoned Device Information Page (0x09).
  891  * Current as of ZAC r04a, August 25, 2015.
  892  */
  893 struct ata_zoned_info_log {
  894         uint8_t header[8];
  895 #define ATA_ZDI_HEADER_VALID    0x8000000000000000
  896 #define ATA_ZDI_PAGE_NUM_MASK   0x0000000000ff0000
  897 #define ATA_ZDI_PAGE_NUM_SHIFT  16
  898 #define ATA_ZDI_REV_MASK        0x00000000000000ff
  899         uint8_t zoned_cap[8];
  900 #define ATA_ZDI_CAP_VALID       0x8000000000000000
  901 #define ATA_ZDI_CAP_URSWRZ      0x0000000000000001
  902         uint8_t zoned_settings[8];
  903 #define ATA_ZDI_SETTINGS_VALID  0x8000000000000000
  904         uint8_t optimal_seq_zones[8];
  905 #define ATA_ZDI_OPT_SEQ_VALID   0x8000000000000000
  906 #define ATA_ZDI_OPT_SEQ_MASK    0x00000000ffffffff
  907         uint8_t optimal_nonseq_zones[8];
  908 #define ATA_ZDI_OPT_NS_VALID    0x8000000000000000
  909 #define ATA_ZDI_OPT_NS_MASK     0x00000000ffffffff
  910         uint8_t max_seq_req_zones[8];
  911 #define ATA_ZDI_MAX_SEQ_VALID   0x8000000000000000
  912 #define ATA_ZDI_MAX_SEQ_MASK    0x00000000ffffffff
  913         uint8_t version_info[8];
  914 #define ATA_ZDI_VER_VALID       0x8000000000000000
  915 #define ATA_ZDI_VER_ZAC_SUP     0x0100000000000000
  916 #define ATA_ZDI_VER_ZAC_MASK    0x00000000000000ff
  917         uint8_t reserved[456];
  918 };
  919 
  920 struct ata_ioc_request {
  921     union {
  922         struct {
  923             u_int8_t            command;
  924             u_int8_t            feature;
  925             u_int64_t           lba;
  926             u_int16_t           count;
  927         } ata;
  928         struct {
  929             char                ccb[16];
  930             struct atapi_sense  sense;
  931         } atapi;
  932     } u;
  933     caddr_t             data;
  934     int                 count;
  935     int                 flags;
  936 #define ATA_CMD_CONTROL                 0x01
  937 #define ATA_CMD_READ                    0x02
  938 #define ATA_CMD_WRITE                   0x04
  939 #define ATA_CMD_ATAPI                   0x08
  940 
  941     int                 timeout;
  942     int                 error;
  943 };
  944 
  945 struct ata_security_password {
  946         u_int16_t               ctrl;
  947 #define ATA_SECURITY_PASSWORD_USER      0x0000
  948 #define ATA_SECURITY_PASSWORD_MASTER    0x0001
  949 #define ATA_SECURITY_ERASE_NORMAL       0x0000
  950 #define ATA_SECURITY_ERASE_ENHANCED     0x0002
  951 #define ATA_SECURITY_LEVEL_HIGH         0x0000
  952 #define ATA_SECURITY_LEVEL_MAXIMUM      0x0100
  953 
  954         u_int8_t                password[32];
  955         u_int16_t               revision;
  956         u_int16_t               reserved[238];
  957 };
  958 
  959 /* pr device ATA ioctl calls */
  960 #define IOCATAREQUEST           _IOWR('a', 100, struct ata_ioc_request)
  961 #define IOCATAGPARM             _IOR('a', 101, struct ata_params)
  962 #define IOCATAGMODE             _IOR('a', 102, int)
  963 #define IOCATASMODE             _IOW('a', 103, int)
  964 
  965 #define IOCATAGSPINDOWN         _IOR('a', 104, int)
  966 #define IOCATASSPINDOWN         _IOW('a', 105, int)
  967 
  968 
  969 struct ata_ioc_raid_config {
  970             int                 lun;
  971             int                 type;
  972 #define AR_JBOD                         0x0001
  973 #define AR_SPAN                         0x0002
  974 #define AR_RAID0                        0x0004
  975 #define AR_RAID1                        0x0008
  976 #define AR_RAID01                       0x0010
  977 #define AR_RAID3                        0x0020
  978 #define AR_RAID4                        0x0040
  979 #define AR_RAID5                        0x0080
  980 
  981             int                 interleave;
  982             int                 status;
  983 #define AR_READY                        1
  984 #define AR_DEGRADED                     2
  985 #define AR_REBUILDING                   4
  986 
  987             int                 progress;
  988             int                 total_disks;
  989             int                 disks[16];
  990 };
  991 
  992 struct ata_ioc_raid_status {
  993             int                 lun;
  994             int                 type;
  995             int                 interleave;
  996             int                 status;
  997             int                 progress;
  998             int                 total_disks;
  999             struct {
 1000                     int         state;
 1001 #define AR_DISK_ONLINE                  0x01
 1002 #define AR_DISK_PRESENT                 0x02
 1003 #define AR_DISK_SPARE                   0x04
 1004                     int         lun;
 1005             } disks[16];
 1006 };
 1007 
 1008 /* ATA RAID ioctl calls */
 1009 #define IOCATARAIDCREATE        _IOWR('a', 200, struct ata_ioc_raid_config)
 1010 #define IOCATARAIDDELETE        _IOW('a', 201, int)
 1011 #define IOCATARAIDSTATUS        _IOWR('a', 202, struct ata_ioc_raid_status)
 1012 #define IOCATARAIDADDSPARE      _IOW('a', 203, struct ata_ioc_raid_config)
 1013 #define IOCATARAIDREBUILD       _IOW('a', 204, int)
 1014 
 1015 #endif /* _SYS_ATA_H_ */

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